Radio frequency module and method for manufacturing a radio frequency module

Abstract

Embodiments of the present application provide a radio frequency module and a preparation method of the radio frequency module. The radio frequency module comprises a functional module, the functional module comprising a substrate, a first chip disposed on the substrate, the first chip being electrically connected to the substrate, a second chip disposed on a side of the substrate away from the first chip, the second chip being electrically connected to the substrate, and a filter module electrically connected to the functional module, the filter module being disposed on a side of the first chip away from the substrate, a heat dissipation gap being provided between the filter module and the functional module, and the power of the first chip being greater than the power of the second chip. The radio frequency module of the embodiments can be highly integrated, reduce the overall size of the radio frequency module, and improve the heat dissipation effect of the radio frequency module, further improving the stability of the radio frequency module.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a radio frequency (RF) module and a method for fabricating the RF module. Background Technology

[0002] The main difference between 3D packaging and 2.5D packaging is that 2.5D packaging involves wiring and vias on an interposer, while 3D packaging involves directly drilling and wiring on the chip itself to electrically connect the upper and lower layers of chips. 3D integration currently largely refers specifically to integration via 3D TSVs (Through Silicon Vias). In a 3D package structure, all chips and passive components are located above the substrate plane, with the chips stacked together. Through-silicon vias pass through the chips above the substrate plane, and wiring and vias are also present on the substrate to electrically connect the chips and the substrate.

[0003] Advanced packaging technologies increasingly rely on advanced manufacturing processes and close collaboration between design and manufacturing companies. 3D integration of different types of chips typically involves vertically stacking two different chips and electrically connecting them via TSVs, interconnecting them with the underlying substrate. However, this structure cannot achieve the high-performance improvements required for RF modules, and heat dissipation of high-power chips after high integration is also a pressing issue. Summary of the Invention

[0004] Therefore, in order to overcome at least some of the defects and deficiencies in the prior art, embodiments of this application provide a radio frequency module and a method for manufacturing a radio frequency module.

[0005] Specifically, on one hand, the radio frequency module provided in the embodiments of this application includes: a functional module, the functional module including: a substrate; a first chip disposed on the substrate and electrically connected to the substrate; a second chip disposed on the side of the substrate away from the first chip and electrically connected to the substrate; and a filter module electrically connected to the functional module, wherein the filter module is disposed on the side of the first chip away from the substrate, a heat dissipation gap is provided between the filter module and the functional module, and the power of the first chip is greater than the power of the second chip.

[0006] On the other hand, embodiments of this application also provide a method for fabricating a radio frequency module, comprising: providing a functional module, the functional module comprising: a substrate; a first chip disposed on the substrate and electrically connected to the substrate; and a second chip disposed on a side of the substrate opposite to the first chip and electrically connected to the substrate; providing a filter module; and connecting the filter module to the side of the first chip opposite to the substrate, thereby forming a heat dissipation gap between the filter module and the functional module.

[0007] As can be seen from the above, the embodiments of this application configure the functional module to include a first chip, a second chip, and a substrate. The first chip and the second chip are respectively disposed on both sides of the substrate, and the functional module and the filter module are connected. This allows the RF module to be highly integrated, reducing the overall size of the RF module and thus reducing the terminal space. By setting a heat dissipation gap between the functional module and the filter module, and placing the high-power first chip adjacent to the heat dissipation gap, the heat dissipation effect of the RF module can be improved, further enhancing the stability of the RF module. Attached Figure Description

[0008] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 This is a schematic diagram of the structure of a radio frequency module provided in the first embodiment of this application.

[0010] Figure 2 This is a schematic flowchart illustrating a method for fabricating a radio frequency module according to a second embodiment of this application.

[0011] Figure 3 for Figure 2 A partial flowchart of step S10.

[0012] Figure 4 for Figure 2 A flowchart of step S10.

[0013] Figure 5 for Figure 2 A flowchart of step S20.

[0014] Figures 6A to 6J This is a schematic diagram of the structure of the functional module prepared in this application.

[0015] Figures 7A to 7D This is a schematic diagram of the structure of the filter module fabricated in this application.

[0016] Explanation of reference numerals in the attached figures:

[0017] 100. RF module; 10. Substrate; 20. Wall layer; 21. Third conductive via; 31. First chip; 32. Third chip; 33. First conductive via; 40. First encapsulation layer; 51. Second chip; 52. Fourth chip; 53. Second conductive via; 60. Second encapsulation layer; 70. Wiring layer; 80. First solder layer; 91. Adapter board; 92. Filter device; 93. Third encapsulation layer; 94. Second solder layer. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments described in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0019] It should be noted that all directional indicators (such as up, down, left, right, front, back, top, and bottom) in the embodiments of this application are only used to explain the relative positional relationship and movement of the components in a specific posture (as shown in the attached figure). If the specific posture changes, the directional indicator will also change accordingly. In addition, the term "vertical" used in the embodiments and claims refers to an angle of 90° between two components or a deviation of -5° to +5°, and the term "parallel" refers to an angle of 0° between two components or a deviation of -5° to +5°.

[0020] In the embodiments of this application, the descriptions involving "first," "second," etc., are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature.

[0021] [First Embodiment]

[0022] The first embodiment of this application provides a radio frequency module 100, which may include, for example, a filter module A and a functional module B.

[0023] See Figure 1Functional module B includes a substrate 10, a first chip 31, and a second chip 51. In the radio frequency module 100, the substrate 10 is mainly used to support and fix electronic components (such as the first chip and the second chip) and provide them with electrical and mechanical connections to realize functions such as signal transmission, power distribution, and thermal management. The substrate 10 can be, for example, a ceramic substrate, a glass substrate, a metal substrate, or a polymer substrate, depending on actual needs. Conductive vias and metal wiring are provided on the substrate 10. The first chip 31 and the second chip 51 can be, for example, functional chips or switch chips of the radio frequency module 100, and the power of the first chip 31 can be, for example, greater than the power of the second chip 51. When the radio frequency module 100 is working, the operating heat of the first chip 31 is greater than that of the second chip 51. The first chip 31 is disposed on the substrate 10 and is electrically connected to the substrate 10, specifically through conductive vias and metal wiring on the substrate 10. The second chip 51 is disposed on the side of the substrate 10 opposite to the first chip 31. The second chip is electrically connected to the substrate 10, specifically through conductive vias and metal wiring on the substrate 10. That is, the first chip 31 and the second chip 51 are respectively disposed on opposite sides of the substrate 10.

[0024] Filter module A and functional module B are electrically connected, with filter module A positioned on the side of the first chip 31 furthest from the substrate 10. A heat dissipation gap 101 is provided between filter module A and functional module B. By placing the first chip 31 and the second chip 51 on opposite sides of the substrate 10 and electrically connecting functional module B and filter module A, a high degree of integration of the RF module 100 is achieved, reducing the overall size of the RF module 100 and thus minimizing terminal space. Furthermore, by providing a heat dissipation gap 101 between functional module B and filter module A and placing the high-power first chip 31 adjacent to the heat dissipation gap 101, the heat dissipation effect of the RF module 100 can be improved, further enhancing the stability of the RF module 100.

[0025] Furthermore, the size range of the heat dissipation gap 101 is 50μm to 200μm, meaning the thickness of the heat dissipation gap 101 in the height direction perpendicular to the substrate 10 ranges from 50μm to 200μm, specifically, for example, 50μm, 100μm, 150μm, or 200μm. When the size range of the heat dissipation gap 101 is less than 50μm, the manufacturing process becomes more difficult and costly, and an excessively small gap will result in lower connection stability between filter module A and functional module B. Conversely, a heat dissipation gap greater than 200μm will also lead to higher connection costs and lower reliability. Therefore, setting the size range of the heat dissipation gap 101 to 50μm to 200μm improves the heat dissipation of the RF module 100 while ensuring the connection stability and reliability of the RF module 100, without increasing manufacturing difficulty or cost.

[0026] In this embodiment, the first chip 31 may be, for example, a high-power chip, and the second chip 51 may be, for example, a low-power chip. The first chip 31 may be, for example, a power amplifier (PA), an HBT (Heterojunction Bipolar Transistor) power amplifier, a GaN (Gallium Nitride) power device, a CMOS (Complementary Metal-Oxide Semiconductor), or a HEMT (High Electron Mobility Transistor). The second chip 51 may be, for example, an SOI (Silicon-On-Insulator) switching device or a SOC (System on a Chip) switching device. Of course, this embodiment is not limited to these limitations.

[0027] See also Figure 1 Functional module B may also include, for example, a wall layer 20, a first encapsulation layer 40, a second encapsulation layer 60, a wiring layer 70, and a first solder layer 80.

[0028] The wall layer 20 may be disposed on the substrate 10, for example. The material of the wall layer 20 may be, for example, polyimide (PI), epoxy resin, photoresist, silicon, or glass. The wall layer 20 may form a cavity on the substrate 10, for example, and the first chip 31 is disposed in the cavity. A third conductive via 21 may be disposed within the wall layer 20, for example, and the third conductive via 21 penetrates the upper and lower surfaces of the wall layer 20. The material of the first encapsulation layer 40 may be, for example, epoxy resin. The first encapsulation layer 40 is disposed on the substrate 10, covers the first chip 31, and exposes the third conductive via 21 of the wall layer 20 away from the substrate 10, that is, the upper surface of the wall layer 20 is exposed to the air to expose the third conductive via 21. The filter module A is electrically connected to the substrate 10 through the third conductive via 21.

[0029] The material of the second encapsulation layer 60 may be, for example, epoxy resin. The second encapsulation layer 60 may be disposed on the side of the substrate 10 where the second chip 51 is disposed, and cover the second chip 51. The second encapsulation layer 60 encapsulates the second chip 51. A wiring layer 70 is disposed on the outer surface of the second encapsulation layer 60. The wiring layer 70 may be, for example, an RDL wiring layer. Specifically, the wiring layer 70 may be electrically connected to the substrate 10, and may be disposed on the side surface of the second encapsulation layer 60 and the outer surface of the second encapsulation layer 60 away from the substrate 10. The first solder layer 80 may be, for example, a solder ball. The material of the first solder layer 80 may be, for example, a metal such as copper, gold, or tin. The first solder layer 80 is connected to the side of the wiring layer 70 away from the substrate 10.

[0030] In one specific embodiment of this example, the heat dissipation coefficient of the first encapsulation layer 40 is greater than 1.5 W / m. 2 K, specifically, can be, for example, 5W / m 2 K. Because the first encapsulation layer 40 is made of a thermally conductive material, it has a better heat dissipation effect, thereby further improving the heat dissipation effect of the RF module 100. In this embodiment, the first encapsulation layer 40 can be made of epoxy resin or polyimide resin. To improve the heat dissipation of the encapsulation layer, materials with high thermal conductivity, such as metal oxides, nitrides (boron nitride, aluminum nitride), silicon carbide powders, etc., can be filled into the encapsulation layer.

[0031] Filter module A may include, for example, an adapter board 91, a filter device 92, a third encapsulation layer 93, and a second solder layer 94. The adapter board 91 may be, for example, an interposer. The filter device 92 is disposed on the adapter board 91 and electrically connected to the adapter board 91. The filter device 92 may include, for example, two devices, laid flat on the adapter board 91; however, this embodiment is not limited to this. The filter device 92 may be, for example, a WLP (Wafer Level Packaging) filter device or a CLP (Chip Level Packaging) filter device; this embodiment is not limited to this. The material of the third encapsulation layer 93 may be, for example, epoxy resin. The third encapsulation layer 93 is disposed on the adapter board 91 and covers the filter device 92. The second solder layer 94 is disposed on the side of the adapter plate 91 opposite to the filter device 92. The second solder layer 94 is electrically connected to the filter device 92 through the adapter plate 91. The material of the second solder layer 94 can be, for example, metals such as gold, copper, or tin. Filter module A and functional module B are connected through the second solder layer 94, which is connected between the wall layer 20 and the adapter plate 91, and is electrically connected to the third conductive via 21. Filter module A and functional module B can be connected, for example, through eutectic bonding. A heat dissipation gap 101 is disposed between the adapter plate 91 and the first encapsulation layer 40.

[0032] In one embodiment of this invention, functional module B may further include, for example, a third chip 32 and a fourth chip 52. The third chip 32 may be disposed, for example, between the first chip 31 and the substrate 10, with the first chip 31 and the third chip 32 stacked together. The third chip 32 and the first chip 31 are electrically connected to the substrate 10 through a first conductive via 33. The fourth chip 52 is stacked with the second chip 51, with the second chip 51 and the fourth chip 52 electrically connected to the substrate 10 through a second conductive via 53. The power of the first chip 31 may be, for example, greater than the power of the second chip 51, the third chip 32, and the fourth chip 52. The third chip 32 and the fourth chip 52 may be, for example, functional chips; however, the number of chips can be set according to actual needs, and this embodiment is not limited thereto. The first conductive via 33, the second conductive via 53, and the third conductive via 21 may, for example, be achieved through TSV (Through Silicon Via) technology. TSV achieves vertical electrical interconnection of silicon vias by creating vertical connections between chips and between wafers. In this embodiment, functional module B applies RDL and TSV technologies, uses advanced encapsulation core technologies, and achieves a high degree of integration of functional module B.

[0033] In summary, the embodiments of this application configure the functional module B to include a first chip 31, a second chip 51, and a substrate 10. The first chip 31 and the second chip 51 are respectively disposed on both sides of the substrate 10, and the functional module B and the filter module A are connected. This allows the RF module 100 to be highly integrated, reducing the overall size of the RF module 100 and thus reducing the terminal space. By setting a heat dissipation gap 101 between the functional module B and the filter module A, and placing the high-power first chip 31 adjacent to the heat dissipation gap 101, the heat dissipation effect of the RF module 100 can be improved, further enhancing the stability of the RF module 100.

[0034] [Second Embodiment]

[0035] See Figure 2 The second embodiment of this application provides a method for fabricating a radio frequency module, which may include, for example, the following steps:

[0036] S10 provides functional modules;

[0037] S20 provides a filter module; and

[0038] S30, the filter module is connected to the side of the first chip away from the substrate, so that a heat dissipation gap is formed between the filter module and the functional module.

[0039] Functional module B includes a substrate 10, a first chip 31, and a second chip 51. In the radio frequency module 100, the substrate 10 mainly supports and fixes electronic components (such as the first and second chips) and provides them with electrical and mechanical connections to achieve functions such as signal transmission, power distribution, and thermal management. The substrate 10 can be, for example, a ceramic substrate, a glass substrate, a metal substrate, or a polymer substrate, depending on actual needs. Conductive vias and metal wiring are provided on the substrate 10. The first chip 31 and the second chip 51 can be, for example, functional chips or switch chips of the radio frequency module 100, and the power of the first chip 31 can be, for example, greater than the power of the second chip 51. When the radio frequency module 100 is working, the operating heat of the first chip 31 is greater than that of the second chip 51. The first chip 31 is disposed on the substrate 10 and is electrically connected to the substrate 10, specifically through conductive vias and metal wiring on the substrate 10. The second chip 51 is disposed on the side of the substrate 10 opposite to the first chip 31. The second chip is electrically connected to the substrate 10, specifically through conductive vias and metal wiring on the substrate 10. That is, the first chip 31 and the second chip 51 are respectively disposed on opposite sides of the substrate 10.

[0040] See Figure 3 Providing a functional module may include, for example, the following steps:

[0041] S11 provides a substrate;

[0042] S12, a wall layer is prepared on the substrate, the wall layer forms a cavity on the substrate, and a third conductive via is formed in the wall layer;

[0043] S13, A first chip is formed on the substrate and disposed in the cavity;

[0044] S14, forming a first encapsulation layer, the first encapsulation layer covering the wall layer and the first chip, and the first encapsulation layer exposing the third conductive via of the wall layer away from the substrate.

[0045] See Figure 4 Providing a functional module may, for example, include the following steps:

[0046] S16, a second chip is formed on the side of the substrate opposite to the first chip;

[0047] S17, forming a second encapsulation layer, the second encapsulation layer covering the second chip;

[0048] S18, a wiring layer is formed on the outer surface of the second encapsulation layer;

[0049] S19, a first solder layer is formed on the side of the wiring layer opposite to the substrate.

[0050] See Figure 5 Providing a filter module may include, for example, the following steps:

[0051] S21, provides an adapter board;

[0052] S22, a filter device is formed on the adapter board;

[0053] S23, forming a third encapsulation layer, the third encapsulation layer covering the filter device; and

[0054] S24, a second solder layer is formed on the side of the adapter plate opposite to the filter device, and the second solder layer is electrically connected to the filter device through the adapter plate.

[0055] like Figure 6A As shown, a substrate 10 is provided. The substrate 10 can be, for example, a ceramic substrate, a glass substrate, a metal substrate, or a polymer substrate. Conductive vias and metal wiring may be provided on the substrate 10, for example. Figure 6BAs shown, a wall layer 20 is fabricated on the substrate 10. The material of the wall layer 20 can be, for example, polyimide (PI), epoxy resin, photoresist, silicon, or glass. The wall layer 20 can, for example, enclose a cavity on the substrate 10, and through-holes can be formed within the wall layer 20 to communicate with the metal wiring on the substrate 10. Figure 6C As shown, a third conductive through-hole 21 is formed within the through-hole of the wall layer 20. Specifically, the third conductive through-hole 21 can be formed, for example, through processes such as sputtering or electroplating. Figure 6D As shown, a first chip 31 and a third chip 32 can be formed on the substrate 10, and a first conductive via 33 is formed through processes such as opening, reflow, and flux cleaning, so that the first chip 31 and the third chip 32 are electrically connected to the substrate 10 through the first conductive via 33. Figure 6E As shown, a first encapsulation layer 40 is formed, which covers the wall layer 20, the first chip 31, and the third chip 32. Specifically, the first encapsulation layer 40 encapsulates the first chip 31 on the side of the substrate 10 where it is located. Figure 6F As shown, the first encapsulation layer 40 protruding from the upper surface of the wall layer 20 is removed, so that the first encapsulation layer 40 is exposed on the upper surface of the wall layer 20 away from the substrate 10. Specifically, the third conductive via 21 on the side of the wall layer 20 away from the substrate 10 can be exposed by processes such as grinding and polishing.

[0056] like Figure 6G As shown, a second chip 51 and a fourth chip 52 can be formed, for example, on the side of the substrate 10 opposite to the first chip 31, and a second conductive via 53 is formed through processes such as opening, reflow, and flux cleaning, so that the second chip 51 and the fourth chip 52 are electrically connected to the substrate 10 through the second conductive via 53. Figure 6H As shown, a second encapsulation layer 60 is formed, which covers the second chip 51 and the fourth chip 52. That is, the second encapsulation layer 60 encapsulates the second chip 51 on the side of the substrate 10 where the second chip 51 is disposed. Figure 6I As shown, a wiring layer 70 is formed on the outer surface of the second encapsulation layer 60, which can be formed, for example, by sputtering, electroplating, or other processes. Figure 6J As shown, a first solder layer 80 is formed on the side of the wiring layer 70 away from the substrate 10. Specifically, it may form solder balls, but this embodiment is not limited thereto.

[0057] like Figure 7A As shown, an adapter board 91 is provided, which may also be provided with conductive vias and metal wiring, for example. Figure 7B As shown, a filter device 92 is formed on the adapter board 91, and the filter device 92 is electrically connected to the adapter board 91. Figure 7C As shown, a third encapsulation layer 93 is formed, which covers the filter device 92 and is disposed on the adapter board 91. Figure 7DAs shown, a second solder layer 94 is formed on the side of the adapter plate 91 away from the filter device 92. The second solder layer 94 is electrically connected to the filter device 92 through the adapter plate 91. The second solder layer 94 can be, for example, solder paste.

[0058] Filter module A and functional module B are connected via a second solder layer 94. Specifically, functional module B can be placed on filter module A, and the third conductive via 21 on wall layer 20 can be correspondingly placed with the second solder layer 94. Filter module A and functional module B are connected via the second solder layer 94 through eutectic bonding, forming a heat dissipation gap 101 between the adapter board 91 and the first encapsulation layer 40. The size of the heat dissipation gap 101 ranges from 50μm to 200μm, that is, the thickness of the heat dissipation gap 101 in the height direction perpendicular to the substrate 10 ranges from 50μm to 200μm, specifically, for example, 50μm, 100μm, 150μm, or 200μm.

[0059] In summary, the RF module 100 formed through the above-described fabrication process, by configuring the functional module B to include a first chip 31, a second chip 51, and a substrate 10, and by placing the first chip 31 and the second chip 51 on opposite sides of the substrate 10, and by connecting the functional module B and the filter module A, allows for high integration of the RF module 100, reducing its overall size and thus minimizing terminal space. Furthermore, by providing a heat dissipation gap 101 between the functional module B and the filter module A, and by placing the high-power first chip 31 adjacent to the heat dissipation gap 101, the heat dissipation effect of the RF module 100 can be improved, further enhancing its stability.

[0060] Furthermore, it is understood that the foregoing embodiments are merely illustrative examples of this application. Provided that the technical features do not conflict, the structure is not contradictory, and the inventive purpose of this application is not violated, the technical solutions of the various embodiments can be arbitrarily combined and used.

[0061] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A radio frequency module, characterized in that, include: Functional module, the functional module includes: substrate; A first chip is disposed on the substrate and is electrically connected to the substrate. A second chip is disposed on the side of the substrate opposite to the first chip, and the second chip is electrically connected to the substrate; and A filter module is electrically connected to the functional module, and the filter module is disposed on the side of the first chip away from the substrate. A heat dissipation gap is provided between the filter module and the functional module, and the power of the first chip is greater than the power of the second chip. The functional module also includes: A wall layer is disposed on the substrate, and the first chip is located in the cavity enclosed by the wall layer. A third conductive via is disposed in the wall layer. A first encapsulation layer covers the first chip, and the first encapsulation layer exposes the third conductive via of the wall layer away from the substrate, and the filter module is electrically connected to the substrate through the third conductive via; The filter module includes: an adapter board; a filter device disposed on the adapter board and electrically connected to the adapter board; a second solder layer disposed on the side of the adapter board away from the filter device; the filter module is electrically connected to the third conductive via through the second solder layer, and the heat dissipation gap is formed between the adapter board and the first encapsulation layer.

2. The radio frequency module as described in claim 1, characterized in that, The size of the heat dissipation gap ranges from 50μm to 200μm.

3. The radio frequency module as described in claim 1, characterized in that, The functional module also includes: A second packaging layer covers the second chip; A wiring layer is disposed on the outer surface of the second encapsulation layer and electrically connected to the substrate; and The first solder layer is connected to the side of the wiring layer opposite to the substrate.

4. The radio frequency module as described in claim 1, characterized in that, The heat dissipation coefficient of the first encapsulation layer is greater than 1.5 W / m. 2 ·K.

5. The radio frequency module as described in claim 1, characterized in that, The filter module also includes: A third encapsulation layer is disposed on the adapter board and covers the filter device.

6. The radio frequency module as described in claim 5, characterized in that, The filter module and the functional module are connected through the second solder layer, which is connected between the wall layer and the adapter plate, and is electrically connected to the third conductive via.

7. The radio frequency module as described in claim 1, characterized in that, The functional module also includes: A third chip is disposed between the first chip and the substrate. The first chip and the third chip are stacked together. The third chip and the first chip are electrically connected to the substrate through a first conductive via.

8. The radio frequency module as described in claim 1, characterized in that, The functional module also includes: The fourth chip is stacked on top of the second chip, and the second chip and the fourth chip are electrically connected to the substrate through a second conductive via.

9. The radio frequency module as described in claim 7, characterized in that, The power of the first chip is greater than that of the second chip and the third chip.

10. The radio frequency module as described in claim 8, characterized in that, The power of the first chip is greater than that of the second chip and the fourth chip.

11. The radio frequency module as described in claim 1, characterized in that, The first chip is a power amplifier chip, and the second chip is a switching device.

12. A method for fabricating a radio frequency module, characterized in that, include: Provide a functional module, the functional module including: substrate; A first chip is disposed on the substrate and electrically connected to the substrate; and The second chip is disposed on the side of the substrate opposite to the first chip, and the second chip is electrically connected to the substrate. Provide filter modules; and The filter module is connected to the side of the first chip away from the substrate, and a heat dissipation gap is formed between the filter module and the functional module. The provided functional modules include: Provide substrate; A wall layer is prepared on the substrate, the wall layer forms a cavity on the substrate, and a third conductive via is formed within the wall layer; A first chip is formed on the substrate, and the first chip is disposed in the cavity; A first encapsulation layer is formed, which covers the wall layer and the first chip, and exposes the third conductive via of the wall layer away from the substrate. The filter module includes: Adapter board provided; A filter device is formed on the adapter board; A third encapsulation layer is formed, the third encapsulation layer covering the filter device; and A second solder layer is formed on the side of the adapter plate opposite to the filter device, and the second solder layer is electrically connected to the filter device through the adapter plate; The step of connecting the filter module to the side of the first chip away from the substrate, thereby creating a heat dissipation gap between the filter module and the functional module, includes: The adapter plate is connected to the side of the wall layer away from the substrate via the second solder layer, thereby forming the heat dissipation gap between the adapter plate and the first encapsulation layer.

13. The method for fabricating the radio frequency module as described in claim 12, characterized in that, The functional module also includes: A second chip is formed on the side of the substrate opposite to the first chip; A second encapsulation layer is formed, which covers the second chip; A wiring layer is formed on the outer surface of the second encapsulation layer; A first solder layer is formed on the side of the wiring layer opposite to the substrate.

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