PFC busbar voltage equalization control method and device

Abstract

The present application discloses a PFC busbar voltage balancing control method and device, which relates to the field of new energy vehicle technology. Applied to a PFC busbar voltage balancing circuit, the circuit includes a first capacitor and a second capacitor connected in series, and the first capacitor and the second capacitor are respectively connected in parallel with a discharge circuit, and the method includes: when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be connected, and controlling the discharge circuit connected in parallel with the second target capacitor to be disconnected; wherein the first target capacitor is a capacitor corresponding to the larger voltage of the voltage of the first capacitor and the voltage of the second capacitor, and the second target capacitor is a capacitor corresponding to the smaller voltage of the voltage of the first capacitor and the voltage of the second capacitor. By controlling the connection and disconnection of the discharge circuit, the present application can timely balance the voltage of the first capacitor and the second capacitor, so that the voltages of the first capacitor and the second capacitor are consistent, and avoid capacitor overvoltage.

Description

Technical Field

[0001] The present application relates to the field of new energy vehicle technology, and in particular to a PFC busbar voltage equalization control method and device. Background Art

[0002] In the circuit topology of the on-board charger (OBC) of new energy electric vehicles, the external AC power is first input into the power factor correction (PFC) circuit for rectification and power factor correction, and then the output end of the PFC circuit uses capacitors for filtering and voltage stabilization, and then input into the LLC circuit for boosting and electrical isolation. When using three-phase power input, the output voltage of the PFC circuit exceeds 500V. Since the commonly used capacitor voltage level in the current market is 500V, it is necessary to use two 500V capacitors in series to form a 1000V capacitor.

[0003] However, when there are individual differences between the two 500V capacitors connected in series (for example, the material compositions of the two capacitors connected in series are different), the leakage currents of the two capacitors will be greatly different, resulting in different voltages at the ends of the two capacitors connected in series, which in turn causes capacitor overvoltage. Summary of the invention

[0004] In response to the above technical problems, the embodiments of the present application provide a PFC bus voltage equalization control method and device, which can timely equalize the voltage of the first capacitor and the second capacitor to keep the voltage of the first capacitor and the second capacitor consistent, thereby avoiding capacitor overvoltage.

[0005] The technical solution of this application is implemented as follows:

[0006] In a first aspect, an embodiment of the present application provides a PFC bus voltage equalization control method, which is applied to a PFC bus voltage equalization circuit, wherein the PFC bus voltage equalization circuit includes a first capacitor and a second capacitor connected in series with each other, and the first capacitor and the second capacitor are respectively connected in parallel with a discharge circuit, and the method includes:

[0007] When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off;

[0008] The first target capacitance is a capacitance corresponding to a larger voltage between the voltage of the first capacitance and the voltage of the second capacitance, and the second target capacitance is a capacitance corresponding to a smaller voltage between the voltage of the first capacitance and the voltage of the second capacitance.

[0009] In some embodiments, when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off, comprises:

[0010] determining an absolute difference between a voltage of the first capacitor and a voltage of the second capacitor;

[0011] When it is determined that the absolute difference is greater than a set threshold, the discharge circuit connected in parallel with the first target capacitor is controlled to be turned on, and the discharge circuit connected in parallel with the second target capacitor is controlled to be turned off.

[0012] In some embodiments, the method further comprises:

[0013] When it is determined that the absolute difference is less than or equal to the set threshold, the discharge circuit connected in parallel with the first capacitor is controlled to be disconnected, and the discharge circuit connected in parallel with the second capacitor is controlled to be disconnected.

[0014] In some embodiments, the set threshold is determined based on current operating environment temperatures of the first capacitor and the second capacitor.

[0015] In some embodiments, the method further comprises:

[0016] determining a switching frequency of the first capacitor and the second capacitor;

[0017] The set threshold is adjusted based on the switching frequency.

[0018] In some embodiments, the bleeding circuit is composed of a controllable switch and a resistor connected in series with the controllable switch.

[0019] In some embodiments, the discharge circuit is composed of a controllable switch and a power conversion circuit connected in series with the controllable switch, and the power conversion circuit is used to convert part of the charge energy stored in the first capacitor or the second capacitor and output it.

[0020] In some embodiments, when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off, comprises:

[0021] When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, the controllable switch of the discharge circuit connected in parallel with the first target capacitor is controlled to be closed, and the controllable switch of the discharge circuit connected in parallel with the second target capacitor is controlled to be opened.

[0022] In some embodiments, the controllable switch is any one of a semiconductor switch and a mechanical switch.

[0023] In a second aspect, an embodiment of the present application provides a PFC bus voltage equalization control device, which is applied to a PFC bus voltage equalization circuit, wherein the PFC bus voltage equalization circuit includes a first capacitor and a second capacitor connected in series with each other, and the first capacitor and the second capacitor are respectively connected in parallel with a discharge circuit, and the device includes:

[0024] a control module, configured to control the discharge circuit connected in parallel with the first target capacitor to be turned on, and control the discharge circuit connected in parallel with the second target capacitor to be turned off, when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced;

[0025] The first target capacitance is a capacitance corresponding to a larger voltage between the voltage of the first capacitance and the voltage of the second capacitance, and the second target capacitance is a capacitance corresponding to a smaller voltage between the voltage of the first capacitance and the voltage of the second capacitance.

[0026] The PFC busbar voltage equalization control method and device provided in the embodiments of the present application, by controlling the discharge circuit connected in parallel with the capacitor corresponding to the larger voltage between the voltage of the first capacitor and the voltage of the second capacitor to be turned on, and controlling the discharge circuit connected in parallel with the capacitor corresponding to the smaller voltage between the voltage of the first capacitor and the voltage of the second capacitor to be turned off when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, effectively realizes that by controlling the connection and disconnection of the discharge circuit, the first capacitor and the second capacitor can be timely voltage-equalized, the voltages of the first capacitor and the second capacitor are kept consistent, and capacitor overvoltage is avoided. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 A schematic diagram of a PFC bus capacitor series connection provided for related technology;

[0029] Figure 2 A schematic diagram of a capacitor equivalent model provided for related technologies;

[0030] Figure 3 A schematic diagram of a PFC busbar voltage equalization circuit provided for related technology;

[0031] Figure 4A schematic diagram of a PFC busbar voltage balancing circuit provided in an embodiment of the present application;

[0032] Figure 5 A schematic flow chart of a PFC busbar voltage balancing control method provided in an embodiment of the present application;

[0033] Figure 6 A schematic diagram of the working process of a PFC busbar voltage balancing circuit provided in an embodiment of the present application;

[0034] Figure 7 A schematic diagram of a vehicle charging process provided in an embodiment of the present application;

[0035] Figure 8 A waveform diagram corresponding to a simulation circuit provided in an embodiment of the present application;

[0036] Fig. 9 A schematic diagram of the structure of a PFC busbar voltage equalization control device provided in an embodiment of the present application;

[0037] Fig.10 A schematic diagram of the physical structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0039] It should be noted that in the description of the embodiments of the present application, the terms "first", "second", etc. are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of the same type, and the number of objects is not limited. For example, the first object can be one or more.

[0040] In order to facilitate a clearer understanding of the embodiments of the present application, some related technologies are first introduced as follows.

[0041] Figure 1 A schematic diagram of a PFC bus capacitor series connection provided for related technology, such as Figure 1 As shown in the figure, in the PFC bus capacitor module, two capacitors are directly connected in series. In practice, the capacitor equivalent model can be used. Figure 2 A schematic diagram of a capacitor equivalent model provided for related technologies, such as Figure 2 As shown in the figure, the capacitor equivalent model consists of an ideal capacitor C in parallel with a resistor Rp, and then a series resistor Rs. However, when there are individual differences between the two series capacitors, the leakage current of the two series capacitors is uneven due to the difference between the equivalent parallel resistance Rp and the equivalent series resistance Rs, which leads to bias of the two series capacitors, and then causes one of the capacitors to be overvoltage (that is, the voltage that the capacitor withstands during operation exceeds its rated voltage).

[0042] In order to balance the voltage of the capacitors, the related technology connects two identical 500V capacitors in series to form a 1000V capacitor, and simultaneously connects a resistor in parallel to each capacitor. Figure 3 A schematic diagram of a PFC busbar voltage equalization circuit provided for related technology, such as Figure 3 As shown in the figure, in the PFC busbar voltage equalization circuit, two capacitors are connected in parallel with a resistor. However, when a smaller resistor is selected for parallel connection, when the capacitor is working at a normal high voltage, the current flowing through the small resistor is too large, resulting in heat generation and low charging conversion efficiency; when a larger resistor is selected for parallel connection, and the leakage current of the two capacitors is quite different, especially when the working environment temperature of the capacitor is too low, the two capacitors in series need to be voltage-equalized in time, but the two large voltage-equalizing resistors in series cannot meet the voltage-equalizing requirements in time, resulting in different voltages at the ends of the two same capacitors in series, which in turn causes capacitor overvoltage.

[0043] In order to overcome the above-mentioned defects in the related art, the embodiment of the present application provides a PFC bus voltage equalization control method and device, which can timely equalize the voltage of two capacitors connected in series, so that the voltage of the two capacitors connected in series is consistent, and capacitor overvoltage is avoided. The PFC bus voltage equalization control method and device provided in the embodiment of the present application are exemplarily introduced below in conjunction with the drawings in the embodiment of the present application.

[0044] Before introducing the PFC bus voltage equalization control method provided in the embodiment of the present application, the PFC bus voltage equalization circuit provided in the embodiment of the present application is first introduced as follows.

[0045] Figure 4 A schematic diagram of a PFC busbar voltage equalization circuit provided in an embodiment of the present application is shown in FIG. Figure 4 As shown, the PFC busbar voltage equalizing circuit includes a first capacitor (C1) and a second capacitor (C2) connected in series with each other, and the first capacitor (C1) and the second capacitor (C2) are respectively connected in parallel with a discharge circuit.

[0046] In some embodiments, the bleeding circuit is composed of a controllable switch and a resistor connected in series with the controllable switch.

[0047] like Figure 4As shown, the discharge circuit connected in parallel with the first capacitor (C1) is composed of a controllable switch (S1) and a resistor (R1) in series, and the discharge circuit connected in parallel with the second capacitor (C2) is composed of a controllable switch (S2) and a resistor (R2) in series.

[0048] It can be understood that the resistor connected in series with the controllable switch in the discharge circuit is a discharge resistor, and the discharge resistor can discharge the voltage stored on the capacitor connected in parallel with the discharge resistor.

[0049] In some embodiments, the discharge circuit is composed of a controllable switch and a power conversion circuit connected in series with the controllable switch, and the power conversion circuit is used to convert part of the charge energy stored in the first capacitor or the second capacitor and output it.

[0050] In some embodiments, part of the charge energy stored in the first capacitor or the second capacitor can be converted by a power conversion circuit and used as a voltage source input of the PFC circuit to reduce energy loss and improve charging conversion efficiency.

[0051] In some embodiments, the controllable switch is any one of a semiconductor switch and a mechanical switch.

[0052] In some embodiments, the semiconductor switch includes but is not limited to a triode, a metal-oxide-semiconductor field-effect transistor (MOS) and an insulated-gate bipolar transistor (IGBT).

[0053] Figure 5 A flow chart of a PFC bus voltage equalization control method provided in an embodiment of the present application is provided. The method is applied to the above-mentioned PFC bus voltage equalization circuit, such as Figure 5 As shown, the method includes:

[0054] S501: When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, control the discharge circuit connected in parallel with the first target capacitor to be turned on, and control the discharge circuit connected in parallel with the second target capacitor to be turned off;

[0055] The first target capacitance is a capacitance corresponding to a larger voltage between the voltage of the first capacitance and the voltage of the second capacitance, and the second target capacitance is a capacitance corresponding to a smaller voltage between the voltage of the first capacitance and the voltage of the second capacitance.

[0056] In some embodiments, the voltage of the first capacitor and the voltage of the second capacitor can be detected in real time. If it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, that is, the voltages of the first capacitor and the second capacitor are inconsistent, the first target capacitor and the second target capacitor are determined from the first capacitor and the second capacitor, wherein the first target capacitor is the capacitor corresponding to the larger voltage between the voltage of the first capacitor and the voltage of the second capacitor, and the second target capacitor is the capacitor corresponding to the smaller voltage between the voltage of the first capacitor and the voltage of the second capacitor, thereby controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off.

[0057] In some embodiments, a discharge circuit may be connected in parallel at both ends of the first capacitor and the second capacitor, respectively, and the discharge circuit is composed of a controllable switch series resistor. The voltage of the first capacitor and the second capacitor is detected in real time. If the voltage of the first capacitor and the second capacitor is detected to be unbalanced, the discharge circuit connected in parallel with the capacitor with a higher voltage is controlled by an external control circuit to be turned on, and the discharge circuit connected in parallel with the capacitor with a lower voltage is disconnected. After determining that the voltage is balanced, the corresponding discharge circuit is disconnected, so that the voltage of the two series-connected first capacitors and the second capacitors remain consistent, and no capacitor overvoltage occurs.

[0058] It can be understood that the embodiment of the present application discharges the voltage of the capacitor with a higher voltage by connecting the discharge circuit in parallel with the capacitor with a higher voltage, so that the voltage of the two capacitors connected in series (the first capacitor and the second capacitor) remains consistent, thereby avoiding capacitor overvoltage.

[0059] The PFC bus voltage equalization control method provided in the embodiment of the present application effectively realizes that by controlling the connection and disconnection of the discharge circuit, the first capacitor and the second capacitor can be voltage-equalized in time, so that the voltages of the first capacitor and the second capacitor are kept consistent, thereby avoiding capacitor overvoltage.

[0060] In some embodiments, when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off, comprises:

[0061] When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, the controllable switch of the discharge circuit connected in parallel with the first target capacitor is controlled to be closed, and the controllable switch of the discharge circuit connected in parallel with the second target capacitor is controlled to be opened.

[0062] In the embodiment of the present application, the discharge circuits respectively connected in parallel with the first capacitor and the second capacitor each include a controllable switch. Therefore, when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, the controllable switch of the discharge circuit connected in parallel with the capacitor corresponding to the larger voltage between the voltage of the first capacitor and the voltage of the second capacitor is controlled to be closed, thereby connecting the discharge circuit connected in parallel with the capacitor corresponding to the larger voltage, and controlling the controllable switch of the discharge circuit connected in parallel with the capacitor corresponding to the smaller voltage between the voltage of the first capacitor and the voltage of the second capacitor to be disconnected, thereby disconnecting the discharge circuit connected in parallel with the capacitor corresponding to the smaller voltage.

[0063] It can be understood that the embodiment of the present application effectively controls the connection and disconnection of the discharge circuit by controlling the on and off of the controllable switch in the discharge circuit, thereby being able to timely equalize the voltage of the first capacitor and the second capacitor, so that the voltage of the first capacitor and the second capacitor remain consistent, thereby avoiding capacitor overvoltage.

[0064] In some embodiments, when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off, comprises:

[0065] determining an absolute difference between a voltage of the first capacitor and a voltage of the second capacitor;

[0066] When it is determined that the absolute difference is greater than a set threshold, the discharge circuit connected in parallel with the first target capacitor is controlled to be turned on, and the discharge circuit connected in parallel with the second target capacitor is controlled to be turned off.

[0067] In the embodiment of the present application, the voltage of the first capacitor and the voltage of the second capacitor can be detected in real time, and the absolute difference between the voltage of the first capacitor and the voltage of the second capacitor can be determined. If it is determined that the absolute difference is greater than a set threshold, the discharge circuit connected in parallel with the capacitor corresponding to the larger voltage between the voltage of the first capacitor and the voltage of the second capacitor is controlled to be turned on, and the discharge circuit connected in parallel with the capacitor corresponding to the smaller voltage between the voltage of the first capacitor and the voltage of the second capacitor is controlled to be disconnected.

[0068] It should be noted that if the absolute difference between the voltage of the first capacitor and the voltage of the second capacitor is greater than the set threshold, it indicates that the leakage current of the first capacitor and the second capacitor is significantly different. Therefore, it is necessary to discharge part of the charge energy stored on the capacitor with a higher voltage so that the voltage of the first capacitor is consistent with the voltage of the second capacitor and no capacitor overvoltage occurs.

[0069] It should be noted that the set threshold in the embodiments of the present application can be adaptively set based on actual applications, and the embodiments of the present application do not make specific limitations on this.

[0070] In some embodiments, the set threshold is determined based on current operating environment temperatures of the first capacitor and the second capacitor.

[0071] For example, assuming that the current working environment temperature of the first capacitor and the second capacitor is 0 degrees, the set threshold is set to 5V; assuming that the current working environment temperature of the first capacitor and the second capacitor is 10 degrees, the set threshold is set to 10V.

[0072] It should be noted that the embodiment of the present application can improve the defect of a large difference in leakage current between the first capacitor and the second capacitor at low temperatures by adjusting the set threshold for controlling the connection and disconnection of the discharge circuit according to the working environment temperature of the capacitor.

[0073] In some embodiments, the PFC bus voltage equalization control method further includes:

[0074] When it is determined that the absolute difference is less than or equal to the set threshold, the discharge circuit connected in parallel with the first capacitor is controlled to be disconnected, and the discharge circuit connected in parallel with the second capacitor is controlled to be disconnected.

[0075] In an embodiment of the present application, the voltage of the first capacitor and the voltage of the second capacitor can be detected in real time, and the absolute difference between the voltage of the first capacitor and the voltage of the second capacitor can be determined. If it is determined that the absolute difference is less than or equal to the set threshold, the discharge circuit connected in parallel with the first capacitor is controlled to be disconnected, and the discharge circuit connected in parallel with the second capacitor is controlled to be disconnected.

[0076] It should be noted that if the absolute difference between the voltage of the first capacitor and the voltage of the second capacitor is less than or equal to the set threshold, it indicates that the leakage current of the first capacitor and the second capacitor is substantially the same, so both capacitors do not need to be connected to the discharge circuit for voltage discharge.

[0077] In some embodiments, the PFC bus voltage equalization control method further includes:

[0078] determining a switching frequency of the first capacitor and the second capacitor;

[0079] The set threshold is adjusted based on the switching frequency.

[0080] In the embodiment of the present application, the switching frequency of the first capacitor and the second capacitor can be monitored in real time, and the set threshold can be adjusted based on the switching frequency of the first capacitor and the second capacitor.

[0081] It should be noted that the switching frequency of the capacitor mainly depends on the type of capacitor and the working environment. Generally speaking, the switching power supply will reduce the frequency to between 20Hz and 20kHz to improve light load efficiency and reduce noise generation. However, for some specific applications, such as high-voltage isolated power supplies and low-voltage non-isolated power supplies, the power supply design usually chooses to operate between 20kHz and 150kHz. In addition, in order to reduce the environmental noise pollution generated by low-frequency switching noise, it is necessary to keep the switching frequency above 20kHz, or limit the noise source energy to a frequency band below 20kHz.

[0082] For example, if the switching frequency of the first capacitor and the second capacitor is in the range of 80kHz to 100kHz, the threshold value is adjusted to be in the range of 2V to 5V; if the switching frequency of the first capacitor and the second capacitor is in the range of 20kHz to 40kHz, the threshold value is adjusted to be in the range of 10V to 13V.

[0083] It should be noted that the embodiment of the present application can improve the life of the controllable switch in the discharge circuit by dynamically adjusting the set threshold for controlling the connection and disconnection of the discharge circuit according to the switching frequency of the first capacitor and the second capacitor.

[0084] The following is an explanation of an exemplary application of an embodiment of the present application in a practical application scenario.

[0085] Figure 6 A schematic diagram of the working process of a PFC busbar voltage balancing circuit provided in an embodiment of the present application is shown in FIG. Figure 6 As shown, including:

[0086] S601, start the PFC bus voltage equalizing circuit.

[0087] S602: The on-board charger sets a threshold value according to the current working environment temperature.

[0088] S603 , detecting the voltage across the first capacitor and the second capacitor in the PFC bus voltage equalizing circuit.

[0089] S604, compare the voltage difference between the voltages across the first capacitor and the second capacitor with a threshold; if the voltage of the first capacitor minus the voltage of the second capacitor is greater than the threshold, execute S605; if the voltage of the second capacitor minus the voltage of the first capacitor is greater than the threshold, execute S606; if the absolute difference between the voltage of the first capacitor and the voltage of the second capacitor is less than or equal to the threshold, execute S607.

[0090] S605 , controlling the controllable switch of the discharge circuit connected in parallel with the first capacitor to be closed, and controlling the controllable switch of the discharge circuit connected in parallel with the second capacitor to be opened.

[0091] S606: Control the controllable switch of the discharge circuit connected in parallel with the second capacitor to be closed, and control the controllable switch of the discharge circuit connected in parallel with the first capacitor to be opened.

[0092] S607 , controlling the controllable switch of the discharge circuit connected in parallel with the first capacitor to be disconnected, and controlling the controllable switch of the discharge circuit connected in parallel with the second capacitor to be disconnected.

[0093] S608, determine whether the on-board charger has triggered to stop charging; if so, execute S609; if not, execute S610.

[0094] S609: turn off the PFC bus voltage equalizing circuit.

[0095] S610 , dynamically adjust the threshold according to the switching frequency of the first capacitor and the second capacitor, and then return to S603 .

[0096] Figure 7 A schematic diagram of a vehicle charging process provided in an embodiment of the present application is shown in FIG. Figure 7 As shown, including:

[0097] S701, start charging the entire vehicle.

[0098] S702: Start the vehicle charger.

[0099] S703: Start the PFC bus voltage equalizing circuit at the output end of the PFC circuit.

[0100] S704: The PFC circuit charges the PFC bus capacitor in the PFC bus voltage balancing circuit.

[0101] S705 , the PFC circuit operates on the PFC bus capacitor in the PFC bus voltage equalizing circuit.

[0102] S706: The on-board charger is triggered to stop charging.

[0103] S707: turn off the PFC bus voltage equalization circuit.

[0104] S708, discharge the PFC bus capacitor.

[0105] S709. Turn off the on-board charger.

[0106] S710: End vehicle charging.

[0107] In addition, the embodiment of the present application is verified by performing circuit simulation, treating the PFC circuit as a voltage source 600V input and the LLC circuit as a resistive load to construct an equivalent circuit simulation model. Through circuit simulation, when the leakage current of the first capacitor and the second capacitor connected in series is large, the voltage across the first capacitor and the second capacitor is observed through an oscilloscope. Figure 8A waveform diagram corresponding to a simulation circuit provided in an embodiment of the present application, such as Figure 8 As shown in the waveform, it can be seen that after power-on, the voltage difference between capacitors C1 and C2 is always within the threshold range. Figure 8 The S1 switch in the figure is a switch in the discharge circuit connected in parallel with the capacitor C1, and the S2 switch is a switch in the discharge circuit connected in parallel with the capacitor C2.

[0108] It should be noted that the PFC busbar voltage balancing control method provided in the embodiment of the present application can improve the reliability of the charging process of the on-board charger and avoid capacitor overvoltage caused by large differences in leakage current of the series capacitors; it can not only balance the series capacitors in time, but also reduce heat generation, reduce energy loss, and improve charging conversion efficiency. Specifically, it can bring the following beneficial effects:

[0109] (1) Through the controllable switch in the discharge circuit, the discharge circuit is actively controlled to be turned on and off, and the capacitor voltage is balanced in time, and the voltage balance has good real-time performance.

[0110] (2) At low temperatures, the threshold can be lowered, the sensitivity of the PFC busbar equalizing circuit can be improved, and the defect of large differences in capacitor leakage current at low temperatures can be improved.

[0111] (3) During the operation of the PFC busbar voltage balancing circuit, the threshold is dynamically adjusted according to the switching frequency, which can improve the life of the controllable switch in the discharge circuit.

[0112] The following is a description of a PFC bus voltage equalization control device provided in an embodiment of the present application. The PFC bus voltage equalization control device described below and the PFC bus voltage equalization control method described above can be referenced to each other.

[0113] Fig. 9 A schematic diagram of the structure of a PFC bus voltage equalization control device provided in an embodiment of the present application, the device is applied to a PFC bus voltage equalization circuit, the PFC bus voltage equalization circuit includes a first capacitor and a second capacitor connected in series with each other, and the first capacitor and the second capacitor are respectively connected in parallel with a discharge circuit, such as Fig. 9 As shown, the device includes: a control module 910; wherein:

[0114] A control module 910, configured to control the discharge circuit connected in parallel with the first target capacitor to be turned on, and control the discharge circuit connected in parallel with the second target capacitor to be turned off, when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced;

[0115] The first target capacitance is a capacitance corresponding to a larger voltage between the voltage of the first capacitance and the voltage of the second capacitance, and the second target capacitance is a capacitance corresponding to a smaller voltage between the voltage of the first capacitance and the voltage of the second capacitance.

[0116] The PFC busbar voltage equalization control device provided in the embodiment of the present application effectively realizes timely voltage equalization of the first capacitor and the second capacitor by controlling the discharge circuit connected in parallel with the capacitor corresponding to the larger voltage between the voltage of the first capacitor and the voltage of the second capacitor to be turned on, and controlling the discharge circuit connected in parallel with the capacitor corresponding to the smaller voltage between the voltage of the first capacitor and the voltage of the second capacitor to be turned off, by controlling the connection and disconnection of the discharge circuit, so as to keep the voltage of the first capacitor and the second capacitor consistent and avoid capacitor overvoltage.

[0117] In some embodiments, the control module 910 includes a determination unit and a control unit; wherein:

[0118] a determining unit, configured to determine an absolute difference between a voltage of the first capacitor and a voltage of the second capacitor;

[0119] A control unit is used to control the discharge circuit connected in parallel with the first target capacitor to be turned on, and control the discharge circuit connected in parallel with the second target capacitor to be turned off when it is determined that the absolute difference is greater than a set threshold.

[0120] In some embodiments, the control unit is further configured to:

[0121] When it is determined that the absolute difference is less than or equal to the set threshold, the discharge circuit connected in parallel with the first capacitor is controlled to be disconnected, and the discharge circuit connected in parallel with the second capacitor is controlled to be disconnected.

[0122] In some embodiments, the set threshold is determined based on current operating environment temperatures of the first capacitor and the second capacitor.

[0123] In some embodiments, the apparatus further comprises a determination module and an adjustment module; wherein:

[0124] A determination module, used to determine the switching frequency of the first capacitor and the second capacitor;

[0125] An adjustment module is used to adjust the set threshold based on the switching frequency.

[0126] In some embodiments, the bleeding circuit is composed of a controllable switch and a resistor connected in series with the controllable switch.

[0127] In some embodiments, the discharge circuit is composed of a controllable switch and a power conversion circuit connected in series with the controllable switch, and the power conversion circuit is used to convert part of the charge energy stored in the first capacitor or the second capacitor and output it.

[0128] In some embodiments, the control module 910 is specifically used to:

[0129] When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, the controllable switch of the discharge circuit connected in parallel with the first target capacitor is controlled to be closed, and the controllable switch of the discharge circuit connected in parallel with the second target capacitor is controlled to be opened.

[0130] In some embodiments, the controllable switch is any one of a semiconductor switch and a mechanical switch.

[0131] It should be noted here that the above-mentioned PFC bus voltage equalization control device provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned PFC bus voltage equalization control method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as those in the method embodiment will not be specifically repeated here.

[0132] Fig.10 A schematic diagram of the physical structure of an electronic device provided in an embodiment of the present application, such as Fig.10 As shown, the electronic device may include: a processor 1010, a communication interface 1020, a memory 1030 and a communication bus 1040, wherein the processor 1010, the communication interface 1020 and the memory 1030 communicate with each other through the communication bus 1040. The processor 1010 may execute executable data instructions stored in the memory 1030 to implement some or all steps in the PFC bus voltage equalization control method provided in the above embodiments.

[0133] In addition, the executable data instructions stored in the above-mentioned memory 1030 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on this understanding, the technical solution of the embodiment of the present application can be essentially or partly embodied in the form of a software product that contributes to the relevant technology. The software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read Only Memory, ROM), random access memory (Random Access Memory, RAM), disk or optical disk and other media that can store program code.

[0134] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, some or all of the steps in the PFC bus voltage equalization control method provided in the above embodiments are implemented.

[0135] An embodiment of the present application further provides a computer program product, which includes a computer program stored in a computer-readable storage medium, and the computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute some or all of the steps in the PFC bus voltage equalization control method provided in the above embodiments.

[0136] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Those of ordinary skill in the art may understand and implement it without creative work.

[0137] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the embodiments of the present application may adopt the form of hardware embodiments, software embodiments, or embodiments in combination with software and hardware. Moreover, the embodiments of the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0138] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0139] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0140] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0141] The above description is merely an optional embodiment of the present application and is not intended to limit the protection scope of the present application.

Claims

1. A PFC busbar voltage equalization control method, characterized in that: Applied to a PFC bus voltage equalizing circuit, the PFC bus voltage equalizing circuit includes a first capacitor and a second capacitor connected in series, and the first capacitor and the second capacitor are respectively connected in parallel with a discharge circuit, and the method includes: When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off; The first target capacitance is a capacitance corresponding to a larger voltage between the voltage of the first capacitance and the voltage of the second capacitance, and the second target capacitance is a capacitance corresponding to a smaller voltage between the voltage of the first capacitance and the voltage of the second capacitance; When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off, comprises: determining an absolute difference between a voltage of the first capacitor and a voltage of the second capacitor; When it is determined that the absolute difference is greater than a set threshold, the discharge circuit connected in parallel with the first target capacitor is controlled to be turned on, and the discharge circuit connected in parallel with the second target capacitor is controlled to be disconnected; the set threshold is determined based on the current working environment temperature of the first capacitor and the second capacitor, and the set threshold decreases as the current working environment temperature decreases.

2. The PFC busbar voltage equalization control method according to claim 1, characterized in that: The method further comprises: When it is determined that the absolute difference is less than or equal to the set threshold, the discharge circuit connected in parallel with the first capacitor is controlled to be disconnected, and the discharge circuit connected in parallel with the second capacitor is controlled to be disconnected.

3. The PFC busbar voltage balancing control method according to claim 1 or 2, characterized in that: The method further comprises: determining a switching frequency of the first capacitor and the second capacitor; The set threshold is adjusted based on the switching frequency.

4. The PFC busbar voltage equalization control method according to claim 1, characterized in that: The discharge circuit is composed of a controllable switch and a resistor connected in series with the controllable switch.

5. The PFC busbar voltage equalization control method according to claim 1, characterized in that: The discharge circuit is composed of a controllable switch and a power conversion circuit connected in series with the controllable switch, and the power conversion circuit is used for converting part of the charge energy stored in the first capacitor or the second capacitor and outputting it.

6. The PFC busbar voltage balancing control method according to claim 4 or 5, characterized in that: When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off, comprises: When it is determined that the voltages of the first capacitor and the second capacitor are unbalanced, the controllable switch of the discharge circuit connected in parallel with the first target capacitor is controlled to be closed, and the controllable switch of the discharge circuit connected in parallel with the second target capacitor is controlled to be opened.

7. The PFC busbar voltage balancing control method according to claim 4 or 5, characterized in that: The controllable switch is any one of a semiconductor switch and a mechanical switch.

8. A PFC busbar voltage equalization control device, characterized in that: Applied to a PFC busbar voltage balancing circuit, the PFC busbar voltage balancing circuit includes a first capacitor and a second capacitor connected in series, and the first capacitor and the second capacitor are respectively connected in parallel with a discharge circuit, and the device includes: a control module, configured to control the discharge circuit connected in parallel with the first target capacitor to be turned on, and control the discharge circuit connected in parallel with the second target capacitor to be turned off, when it is determined that the voltages of the first capacitor and the second capacitor are unbalanced; The first target capacitance is a capacitance corresponding to a larger voltage between the voltage of the first capacitance and the voltage of the second capacitance, and the second target capacitance is a capacitance corresponding to a smaller voltage between the voltage of the first capacitance and the voltage of the second capacitance; The control module comprises: a determining unit, configured to determine an absolute difference between a voltage of the first capacitor and a voltage of the second capacitor; A control unit, for controlling the discharge circuit connected in parallel with the first target capacitor to be turned on, and controlling the discharge circuit connected in parallel with the second target capacitor to be turned off, when it is determined that the absolute difference is greater than a set threshold; the set threshold is determined based on the current working environment temperature of the first capacitor and the second capacitor, and the set threshold decreases as the current working environment temperature decreases.

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