A Four-Switch Buck-Boost Converter Topology Circuit and Its Control Method

Abstract

The present invention discloses a four-switch buck-boost converter topology circuit and its control method. To solve the problem of insufficient freewheeling circuits, the order of two bridge arms is adjusted and the inductor is split. The Boost bridge arm and the Buck bridge arm each have an independent freewheeling inductor. Additionally, through the combination of an inductor and a unidirectional diode, a unidirectional freewheeling branch is connected in parallel at the upper switch terminal of the Boost bridge arm, which can ensure that all switch tubes have a reliable freewheeling circuit. This not only solves the soft-switching problem but also independently sets filter circuits for the front and rear bridge arms, which can effectively reduce the electromagnetic interference generated during the operation of the circuit and also enhance the anti-disturbance ability of the circuit itself, solving the technical problems that the four-switch buck-boost circuit cannot provide a reliable freewheeling circuit for all switch tubes and has poor stability.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and in particular, to a four-switch buck-boost converter topology circuit and a control method thereof. Background Art

[0002] The four-switch buck-boost circuit has excellent characteristics such as a wide adjustment range, low device stress, and high power-carrying capacity of the topology, and is widely used in high-power and wide-range DC-DC conversion scenarios. The four-switch Buck-Boost can be considered as two independent arms, namely the Buck arm and the Boost arm. The Buck arm and the Boost arm are connected by an inductor. Since the inductor current does not change suddenly, the inductor has a freewheeling effect. Therefore, during the working cycle, through the inductor freewheeling, an effective freewheeling path can be provided for one switch of the Buck and the Boost, thereby completing the charging and discharging of the switch parasitic capacitance. However, in the CCM (Continuous Conduction Mode) operating state, the inductor current is unidirectional and cannot provide a freewheeling path for the other switch of the Buck and Boost arms. Therefore, in the CCM operating state, adding a suitable auxiliary circuit to ensure that all switch parasitic capacitances can be fully discharged is an important difficulty in realizing soft switching of the four-switch Buck-Boost converter. In addition to providing a reliable auxiliary freewheeling path, the balance of the circuit topology is also crucial. The basic symmetry of the four-switch Buck-Boost is very good, and the circuit parameters are very balanced. When an auxiliary direct path is added to the topology, it is very easy to cause the circuit balance to deteriorate and reduce the topology stability. Therefore, how to provide a reliable freewheeling path for the switches of the four-switch buck-boost circuit and increase the stability of the circuit is a technical problem that those skilled in the art urgently need to solve. Summary of the Invention

[0003] The present invention provides a four-switch buck-boost converter topology circuit and a control method thereof, which are used to solve the technical problems that the four-switch buck-boost circuit cannot provide a reliable freewheeling path for all switches and has poor stability.

[0004] In view of this, the first aspect of the present invention provides a four-switch buck-boost converter topology circuit, including: a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, a first inductor, a second inductor, a third inductor, a first capacitor, a second capacitor, and a unidirectional diode;

[0005] The drain of the first MOS transistor is connected to the positive electrode of a unidirectional diode. The negative electrode of the unidirectional diode is connected to one end of the second inductor. The other end of the second inductor is connected to the source of the first MOS transistor. The gate of the first MOS transistor is floating. The source of the first MOS transistor is respectively connected to one end of the first inductor and the drain of the second MOS transistor. The other end of the first inductor is connected to the positive electrode of the first DC power supply. The gate of the second MOS transistor is floating. The source of the second MOS transistor is connected to the negative electrode of the first DC power supply. One end of the first capacitor is connected to the drain of the first MOS transistor. The other end of the first capacitor is connected to the source of the second MOS transistor. The drain of the third MOS transistor is connected to the drain of the first MOS transistor. The gate of the third MOS transistor is floating. The source of the third MOS transistor is respectively connected to one end of the third inductor and the drain of the fourth MOS transistor. The other end of the third inductor is respectively connected to one end of the second capacitor and the positive electrode of the second DC power supply. The gate of the fourth MOS transistor is floating. The source of the fourth MOS transistor is respectively connected to one end of the first capacitor and the negative electrode of the second DC power supply. The other end of the second capacitor is connected to the negative electrode of the second DC power supply.

[0006] Optionally, diodes are connected in parallel with the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor respectively.

[0007] Optionally, capacitors are connected in parallel with the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor respectively.

[0008] In a second aspect of the present invention, there is provided a control method for the four-switch buck-boost converter topology circuit provided in the first aspect, including:

[0009] Input a path of PWM signal into the gates of the first MOS transistor and the second MOS transistor respectively, and input another path of PWM signal into the gates of the third MOS transistor and the fourth MOS transistor respectively. The two paths of PWM signals are complementary, and the switching period is T. s , one switching period T s includes six switching modes;

[0010] Calculate the dead time of the first MOS transistor and the second MOS transistor, and control the duty cycle of the first MOS transistor and the second MOS transistor through the PWM signal to ensure that the dead time of the first MOS transistor and the second MOS transistor can satisfy the full discharge of the first MOS transistor and the second MOS transistor.

[0011] Control the duty cycle of the third MOS transistor and the fourth MOS transistor through the PWM signal to ensure that there is an effective freewheeling circuit when the third MOS transistor and the fourth MOS transistor enter the dead time.

[0012] Optionally, the six switching modes include a first mode, a second mode, a third mode, a fourth mode, a fifth mode, and a sixth mode.

[0013] The first mode is that the second MOS transistor and the fourth MOS transistor are turned on, the first inductor is charged, and the third inductor and the second capacitor are discharged.

[0014] Optionally, the second mode is that the first MOS transistor and the second MOS transistor enter the dead time. The parasitic capacitance of the first MOS transistor discharges through the second inductor, and the first inductor charges the parasitic capacitance of the second MOS transistor. When the discharge of the first MOS transistor is completed, the zero-voltage turn-on of the first MOS transistor is achieved.

[0015] Optionally, the third mode is that the first MOS transistor is turned on, and the third MOS transistor and the fourth MOS transistor enter the dead time. The parasitic capacitance of the third MOS transistor charges the parasitic capacitance of the second MOS transistor through the second inductor and the freewheeling loop of the unidirectional diode. After charging for a certain time, the zero-voltage turn-on of the third MOS transistor is completed.

[0016] Optionally, the fourth mode is that the first MOS transistor and the third MOS transistor are turned on.

[0017] Optionally, the fifth mode is that the third MOS transistor and the fourth MOS transistor enter the dead time again. The parasitic capacitance of the fourth MOS transistor discharges through the third inductor and the second capacitor. When the discharge of the parasitic capacitance of the fourth MOS transistor is completed, the zero-voltage turn-on of the fourth MOS transistor is achieved.

[0018] Optionally, the sixth mode is that the second MOS transistor is turned on, and the third MOS transistor and the fourth MOS transistor enter the dead time. The parasitic capacitance of the fourth MOS transistor discharges through the third inductor. When the discharge of the parasitic capacitance of the fourth MOS transistor is completed, the zero-voltage turn-on of the fourth MOS transistor is achieved.

[0019] As can be seen from the above technical solutions, the four-switch buck-boost converter topology circuit provided by the present invention has the following advantages:

[0020] The four-switch buck-boost converter topology circuit provided by the present invention adjusts the order of the two bridge arms and splits the inductor to solve the problem of insufficient freewheeling loop. The Boost bridge arm and the Buck bridge arm each have an independent freewheeling inductor. In addition, through the combination of the inductor and the unidirectional diode, a unidirectional freewheeling branch is connected in parallel at the upper switch terminal of the Boost bridge arm, which can ensure that all switch transistors have a reliable freewheeling loop, not only solves the soft-switching problem, but also independently sets a filter circuit for the front and rear bridge arms, which can effectively reduce the electromagnetic interference generated during the operation of the circuit, and at the same time increases the anti-disturbance ability of the circuit itself, solving the technical problems that the four-switch buck-boost circuit cannot provide a reliable freewheeling loop for all switch transistors and has poor stability.

[0021] At the same time, the control strategy of the four-switch buck-boost converter topology circuit provided by the present invention is simple and has low requirements for auxiliary devices. Brief Description of the Drawings

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0023] Figure 1 It is a schematic structural diagram of a four-switch buck-boost converter topology circuit provided in an embodiment of the present invention;

[0024] Figure 2 It is a control timing diagram of the four-switch buck-boost converter topology circuit provided in an embodiment of the present invention;

[0025] Figure 3 It is six switching mode diagrams of the four-switch buck-boost converter topology circuit provided in an embodiment of the present invention;

[0026] Figure 4 It is a schematic flow diagram of the control method of the four-switch buck-boost converter topology circuit provided in an embodiment of the present invention. Detailed Embodiments

[0027] In order to enable those skilled in the art to better understand the solution of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0028] For ease of understanding, please refer to Figure 1 , an embodiment of a four-switch buck-boost converter topology circuit provided by the present invention includes: a first MOS transistor S1, a second MOS transistor S2, a third MOS transistor S3, a fourth MOS transistor S4, a first inductor L1, a second inductor L2, a third inductor L3, a first capacitor C1, a second capacitor C2, and a unidirectional diode D1;

[0029] The drain of the first MOS transistor S1 is connected to the anode of the unidirectional diode D1. The cathode of the unidirectional diode D1 is connected to one end of the second inductor L2. The other end of the second inductor L2 is connected to the source of the first MOS transistor S1. The gate of the first MOS transistor S1 is floating. The source of the first MOS transistor S1 is respectively connected to one end of the first inductor L1 and the drain of the second MOS transistor S2. The other end of the first inductor L1 is connected to the positive pole of the first DC power supply. The gate of the second MOS transistor S2 is floating. The source of the second MOS transistor S2 is connected to the negative pole of the first DC power supply. One end of the first capacitor C1 is connected to the drain of the first MOS transistor S1, and the other end of the first capacitor C1 is connected to the source of the second MOS transistor S2. The drain of the third MOS transistor S3 is connected to the drain of the first MOS transistor S1. The gate of the third MOS transistor S3 is floating. The source of the third MOS transistor S3 is respectively connected to one end of the third inductor L3 and the drain of the fourth MOS transistor S4. The other end of the third inductor L3 is respectively connected to one end of the second capacitor C2 and the positive pole of the second DC power supply. The gate of the fourth MOS transistor S4 is floating. The source of the fourth MOS transistor S4 is respectively connected to one end of the first capacitor C1 and the negative pole of the second DC power supply. The other end of the second capacitor C2 is connected to the negative pole of the second DC power supply.

[0030] It should be noted that in the traditional four-switch Buck-Boost circuit topology, the front bridge arm is the Buck bridge arm and the rear bridge arm is the Boost bridge arm. In the CCM (Continuous Conduction Mode) working state, the inductor current is unidirectional and the freewheeling loop is limited, making it impossible to achieve ZVS (Zero Voltage Switch) for all switches. To solve the problem of insufficient freewheeling loop, the four-switch buck-boost converter topology circuit of the present invention adjusts the order of the two bridge arms. The front bridge arm is the Boost bridge arm and the rear bridge arm is the Buck bridge arm, and the inductor is split. The Boost bridge arm and the Buck bridge arm each have an independent freewheeling inductor. In addition, through the combination of the coupled inductor (i.e., the second inductor L2) and the unidirectional diode D1, a unidirectional freewheeling branch is connected in parallel at the upper switch tube end of the Boost bridge arm, which can ensure a reliable freewheeling loop for all switch tubes. This circuit topology not only solves the soft-switching problem but also independently sets up a filter circuit for the front and rear bridge arms, which can effectively reduce the electromagnetic interference generated during the operation of the circuit and also increase the anti-disturbance ability of the circuit itself.

[0031] In one embodiment, diodes are respectively connected in parallel with the first MOS transistor S1, the second MOS transistor S2, the third MOS transistor S3, and the fourth MOS transistor S4, and capacitors are also connected in parallel.

[0032] The control timing diagram of the four-switch buck-boost converter topology circuit provided by the present invention is as Figure 2 shown, and the circuit mode diagram is as Figure 3 shown, Figure 3 which includes six switch mode diagrams.

[0033] The first mode (corresponding to Figure 3 -a): In this stage, the second MOS transistor S2 and the fourth MOS transistor S4 are turned on, the first inductor L1 is charged, and the third inductor L3 and the second capacitor C2 are discharged.

[0034] The second mode (corresponding to Figure 3 -b): In this stage, the first MOS transistor S1 and the second MOS transistor S2 enter the dead time. The parasitic capacitance of the first MOS transistor S1 is discharged through the second inductor L2, and the first inductor L1 charges the parasitic capacitance of the second MOS transistor S2. When the parasitic capacitance of the first MOS transistor S1 is discharged completely, zero-voltage turn-on of the first MOS transistor S1 is achieved.

[0035] The third mode (corresponding to Figure 3 -c): In this stage, the first MOS transistor S1 is turned on, and the third MOS transistor S3 and the fourth MOS transistor S4 enter the dead time. The parasitic capacitance of the third MOS transistor S3 is charged to the parasitic capacitance of the second MOS transistor S2 through the second inductor L2 and the freewheeling loop of the unidirectional diode D1. After a certain time, zero-voltage turn-on of the third MOS transistor S3 is achieved.

[0036] The fourth mode (corresponding to Figure 3 -d): In this stage, both the first MOS transistor S1 and the third MOS transistor S3 are turned on, and the circuit operates normally.

[0037] The fifth mode (corresponding to Figure 3 -e): In this stage, the third MOS transistor S3 and the fourth MOS transistor S4 enter the dead time again. The parasitic capacitance of the fourth MOS transistor S4 is discharged through the third inductor L3 and the second capacitor C2. When the parasitic capacitance of the fourth MOS transistor S4 is discharged completely, zero-voltage turn-on of the fourth MOS transistor S4 is achieved.

[0038] The sixth mode (corresponding to Figure 3 -f) In this stage, the second MOS transistor S2 is turned on, and the third MOS transistor S3 and the fourth MOS transistor S4 enter the dead time. The body capacitance of the fourth MOS transistor S4 is discharged through the third inductor L3, and finally zero-voltage turn-on of the fourth MOS transistor S4 is achieved.

[0039] The control focus of the four-switch buck-boost converter topology circuit provided by the present invention includes two parts. The first part is the dead time of the first MOS transistor S1 and the second MOS transistor S2, and it is necessary to ensure that the dead time is long enough so that the first MOS transistor S1 and the second MOS transistor S2 can discharge fully. The second part is the phase-shift angle of the third MOS transistor S3 and the fourth MOS transistor S4. By adjusting the phase-shift angle, it is ensured that when the third MOS transistor S3 and the fourth MOS transistor S4 enter the dead time, there is an effective freewheeling circuit. Specifically, one PWM signal is respectively input into the gates of the first MOS transistor S1 and the second MOS transistor S2, and the other PWM signal is respectively input into the gates of the third MOS transistor S3 and the fourth MOS transistor S4. The two PWM signals are complementary, and the switching period is T s , one switching period T s includes six switching modes; calculate the dead time of the first MOS transistor S1 and the second MOS transistor S2, control the duty cycles of the first MOS transistor S1 and the second MOS transistor S2 through the PWM signal, and ensure that the dead time of the first MOS transistor S1 and the second MOS transistor S2 can satisfy the full discharge of the first MOS transistor S1 and the second MOS transistor S2; control the duty cycles of the third MOS transistor S3 and the fourth MOS transistor S4 through the PWM signal, and ensure that when the third MOS transistor S3 and the fourth MOS transistor S4 enter the dead time, there is an effective freewheeling circuit.

[0040] For the four-switch buck-boost converter topology circuit provided by the present invention, in order to solve the problem of insufficient freewheeling circuit, the order of the two bridge arms is adjusted and the inductor is split. The Boost bridge arm and the Buck bridge arm each have an independent freewheeling inductor; in addition, through the combination of the inductor and the unidirectional diode, a unidirectional freewheeling branch is connected in parallel at the upper switch tube end of the Boost bridge arm, so that it can be ensured that all switch tubes have a reliable freewheeling circuit, which not only solves the soft-switching problem, but also independently sets a filter circuit for the front and rear bridge arms respectively, which can effectively reduce the electromagnetic interference generated during the operation of the circuit, and at the same time increases the anti-disturbance ability of the circuit itself, and solves the technical problems that the four-switch buck-boost circuit cannot provide a reliable freewheeling circuit for all switch tubes and has poor stability.

[0041] At the same time, the control strategy of the four-switch buck-boost converter topology circuit provided by the present invention is simple and has low requirements for auxiliary devices.

[0042] For the convenience of understanding, please refer to Figure 4 , an embodiment of a control method for a four-switch buck-boost converter topology circuit provided in the present invention includes:

[0043] Step 101: Input one path of PWM signal into the gates of the first MOS transistor and the second MOS transistor respectively, and input the other path of PWM signal into the gates of the third MOS transistor and the fourth MOS transistor respectively. The two paths of PWM signals are complementary, and the switching period is T for both. s , one switching period T s includes six switching modes;

[0044] Step 102: Calculate the dead time of the first MOS transistor and the second MOS transistor, and control the duty cycles of the first MOS transistor and the second MOS transistor through the PWM signal to ensure that the dead time of the first MOS transistor and the second MOS transistor can meet the full discharge of the first MOS transistor and the second MOS transistor.

[0045] Step 103: Control the duty cycles of the third MOS transistor and the fourth MOS transistor through the PWM signal to ensure that there is an effective freewheeling loop when the third MOS transistor and the fourth MOS transistor enter the dead time.

[0046] Among them, the six switching modes include the first mode, the second mode, the third mode, the fourth mode, the fifth mode, and the sixth mode;

[0047] The first mode is: the second MOS transistor and the fourth MOS transistor are turned on, the first inductor is charged, and the third inductor and the second capacitor are discharged.

[0048] The second mode is: the first MOS transistor and the second MOS transistor enter the dead time, the parasitic capacitance of the first MOS transistor discharges through the second inductor, and the first inductor charges the parasitic capacitance of the second MOS transistor. When the first MOS transistor finishes discharging, the zero-voltage turn-on of the first MOS transistor is completed.

[0049] The third mode is: the first MOS transistor is turned on, the third MOS transistor and the fourth MOS transistor enter the dead time, the parasitic capacitance of the third MOS transistor discharges through the second inductor and the freewheeling loop of the unidirectional diode, and charges the parasitic capacitance of the second MOS transistor. After charging for a certain time, the zero-voltage turn-on of the third MOS transistor is completed.

[0050] The fourth mode is: the first MOS transistor and the third MOS transistor are turned on.

[0051] The fifth mode is: the third MOS transistor and the fourth MOS transistor enter the dead time again, the parasitic capacitance of the fourth MOS transistor discharges through the third inductor and the second capacitor. When the parasitic capacitance of the fourth MOS transistor finishes discharging, the zero-voltage turn-on of the fourth MOS transistor is completed.

[0052] The sixth mode is as follows: the second MOS transistor is turned on, the third and fourth MOS transistors enter the dead time, the parasitic capacitance of the fourth MOS transistor discharges through the third inductor, and when the parasitic capacitance of the fourth MOS transistor is discharged, zero-voltage turn-on of the fourth MOS transistor is completed.

[0053] The terms "first", "second", "third", "fourth", etc. (if any) in the present invention are used to distinguish similar objects and do not necessarily have to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that comprises a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products, or devices.

[0054] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A four-switch buck-boost converter topology circuit, characterized in that, Including: A first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, a first inductor, a second inductor, a third inductor, a first capacitor, a second capacitor, and a unidirectional diode; The drain of the first MOS transistor is connected to the positive electrode of the unidirectional diode, the negative electrode of the unidirectional diode is connected to one end of the second inductor, the other end of the second inductor is connected to the source of the first MOS transistor, the gate of the first MOS transistor is floating, the source of the first MOS transistor is respectively connected to one end of the first inductor and the drain of the second MOS transistor, the other end of the first inductor is connected to the positive electrode of the first DC power supply, the gate of the second MOS transistor is floating, the source of the second MOS transistor is connected to the negative electrode of the first DC power supply, one end of the first capacitor is connected to the drain of the first MOS transistor, the other end of the first capacitor is connected to the source of the second MOS transistor, the drain of the third MOS transistor is connected to the drain of the first MOS transistor, the gate of the third MOS transistor is floating, the source of the third MOS transistor is respectively connected to one end of the third inductor and the drain of the fourth MOS transistor, the other end of the third inductor is respectively connected to one end of the second capacitor and the positive electrode of the second DC power supply, the gate of the fourth MOS transistor is floating, the source of the fourth MOS transistor is respectively connected to the other end of the first capacitor and the negative electrode of the second DC power supply, and the other end of the second capacitor is connected to the negative electrode of the second DC power supply.

2. The four-switch buck-boost converter topology circuit according to claim 1, characterized in that, Diodes are connected in parallel to the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor.

3. The four-switch buck-boost converter topology circuit according to claim 2, wherein Capacitors are also connected in parallel to the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor.

4. A control method for the four-switch buck-boost converter topology circuit according to any one of claims 1-3, characterized in that, Including: Input four PWM signals into the gates of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor respectively. Among them, the PWM signals of the first MOS transistor and the second MOS transistor are complementary and have a dead zone, the PWM signals of the third MOS transistor and the fourth MOS transistor are complementary and have a dead zone, and the switching periods of the four PWM signals are all T s , a switching period T s includes six switching modes; Calculate the dead time of the first MOS transistor and the second MOS transistor, control the duty cycle of the first MOS transistor and the second MOS transistor through a PWM signal, and ensure that the dead time of the first MOS transistor and the second MOS transistor can satisfy the full discharge of the first MOS transistor and the second MOS transistor; Control the duty cycle of the third MOS transistor and the fourth MOS transistor through a PWM signal, and ensure that there is an effective freewheeling circuit when the third MOS transistor and the fourth MOS transistor enter the dead time; The six switching modes include a first mode, a second mode, a third mode, a fourth mode, a fifth mode, and a sixth mode; The first mode is: the second MOS transistor and the fourth MOS transistor are conducting, the first inductor is charging, and the third inductor and the second capacitor are discharging; The second mode is: the first MOS transistor and the second MOS transistor enter the dead time, the parasitic capacitance of the first MOS transistor discharges through the second inductor, the first inductor charges the parasitic capacitance of the second MOS transistor, and when the first MOS transistor finishes discharging, the zero-voltage turn-on of the first MOS transistor is completed; The third mode is: the first MOS transistor is conducting, the third MOS transistor and the fourth MOS transistor enter the dead time, the parasitic capacitance of the third MOS transistor discharges through the second inductor and the unidirectional diode freewheeling circuit, charges the parasitic capacitance of the second MOS transistor, and after charging for a certain time, the zero-voltage turn-on of the third MOS transistor is completed; The fourth mode is: the first MOS transistor and the third MOS transistor are conducting; The fifth mode is that the first MOS transistor and the second MOS transistor enter the dead time again, and the parasitic capacitance of the second MOS transistor discharges through the third inductor and the second capacitor. When the parasitic capacitance of the second MOS transistor finishes discharging, the zero-voltage turn-on of the second MOS transistor is completed; The sixth mode is that the second MOS transistor turns on, the third MOS transistor and the fourth MOS transistor enter the dead time, and the parasitic capacitance of the fourth MOS transistor discharges through the third inductor. When the parasitic capacitance of the fourth MOS transistor finishes discharging, the zero-voltage turn-on of the fourth MOS transistor is completed.

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