A context switching verification method, device and electronic device

Abstract

The present disclosure relates to the field of electronic digital data processing technology, and in particular to a context switching verification method, device and electronic device, wherein the method includes enabling a design under test and a reference model to respectively obtain data generated during at least one stage of the execution of a first task, wherein first state information is used to control the operation of the reference model, and the first state information represents the first state of the design under test when responding to a first context storage instruction during the execution of the first task; the design under test is verified by comparing data generated by the design under test and the reference model in at least one stage. Through the present disclosure, it is ensured that the design under test and the reference model perform context switching in the same state, so that the data generated by each context switching can be automatically and synchronously compared, and at the same time, the context switching function of the design under test is fully and comprehensively verified, and the convergence of the verification project can be quickly achieved, thereby improving the verification efficiency.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electronic digital data processing, and in particular to a context switching verification method, device and electronic device. Background Art

[0002] Context switch is an important topic in chip design. Moreover, as the complexity of chip design increases on a large scale and the usage scenarios become more and more complex, the scenarios in which context switch occurs will increase exponentially, and the content that needs to be verified will become extremely large and it is easy to miss vulnerabilities (bugs). The existing functional unit level verification (unit level test, UT), functional block level verification (block level test, BT), register level verification (IP level test, IT), and system-on-chip (System on Chip, SoC) level verification do not have closed-loop verification solutions, that is, it is impossible to achieve complete verification of context switch. Summary of the invention

[0003] In view of this, the present disclosure proposes a context switching verification method, device, electronic device, storage medium and computer program product.

[0004] According to one aspect of the present disclosure, a context switching verification method is provided, the method comprising:

[0005] The design under test and the reference model are respectively enabled to obtain data generated in at least one stage during the execution of the first task, wherein the first state information is used to control the operation of the reference model, and the first state information represents a first state of the design under test when responding to a first context storage instruction during the execution of the first task;

[0006] The design under test is verified by comparing data between the design under test and data generated by the reference model in the at least one stage.

[0007] In a possible implementation, enabling the design under test and the reference model to respectively obtain data generated in at least one stage during the execution of the first task includes:

[0008] Controlling the design under test to start, and sending the first context storage instruction to the design under test during the process of the design under test executing the first task;

[0009] Acquire the first status information;

[0010] Sending the first state information to a first reference model, and controlling the first reference model to start executing the first task until the first reference model runs to the first state;

[0011] After the design under test completes the first task, instructing the first reference model to perform context storage and continue to run until the first task is completed;

[0012] The output result of the design under test and the output result of the first reference model are obtained.

[0013] In a possible implementation, the output result of the design under test includes: data generated by the design under test executing the first task, and data generated by the design under test performing context storage in response to the first context storage instruction;

[0014] The output result of the first reference model includes: data generated by the first reference model executing the first task, and data generated by the first reference model performing context storage.

[0015] In a possible implementation, enabling the design under test and the reference model to respectively obtain data generated in at least one stage during the execution of the first task includes:

[0016] Controlling the first reference model to start and complete the execution of the first task, and obtaining first data generated by the first reference model after the first task is executed;

[0017] Controlling the design under test to start, and sending the first context storage instruction to the design under test during the process of the design under test executing the first task;

[0018] Sending an excitation signal to a second reference model so that the second reference model calculates output data corresponding to the first task and a second task; wherein the second task is a new task switched as indicated by the first context storage instruction;

[0019] Acquire the first status information;

[0020] sending the first state information to the second reference model so that the second reference model calculates data generated by executing context storage in the first state;

[0021] The verifying the design under test by comparing the data generated by the design under test and the reference model in the at least one stage includes:

[0022] Compare the data generated by executing context storage in the first state calculated by the second reference model and the data generated by the context storage performed by the design under test in response to the first context storage instruction;

[0023] Compare the first data generated by the first reference model after executing the first task, the output data corresponding to the first task calculated by the second reference model, and the second data generated by the design under test from startup to responding to the first context storage instruction, and obtain the remaining data corresponding to the first reference model and the remaining data corresponding to the second reference model, wherein the remaining data is data in the first data and the output data corresponding to the first task other than the data to be compared with the second data;

[0024] After controlling the design under test and the first reference model to complete the second task, comparing data generated by the design under test after the second task is completed, data generated by the first reference model after the second task is completed, and output data corresponding to the second task calculated by the second reference model;

[0025] After the design under test completes the first task, compare the data generated when the design under test continues to perform the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model.

[0026] In a possible implementation, enabling the design under test and the reference model to respectively obtain data generated in at least one stage during the execution of the first task includes:

[0027] Controlling the first reference model to start for the first time and complete the execution of the first task, and obtaining data generated by the first reference model after the first task is executed;

[0028] Sending an excitation signal to a second reference model so that the second reference model calculates output data corresponding to the first task;

[0029] After the first reference model completes executing the first task, the first reference model is paused, the design under test is controlled to start, and the first context storage instruction is sent to the design under test during the process of the design under test executing the first task;

[0030] Acquire the first status information;

[0031] sending the first state information to the first reference model, and controlling the first reference model to start executing the first task again until the first reference model runs to the first state;

[0032] After the design under test completes the first task, instructing the first reference model to perform context storage and continue to run until the first task is completed;

[0033] The verifying the design under test by comparing the data generated by the design under test and the reference model in the at least one stage includes:

[0034] At least one of the data generated in real time from the first start-up of the first reference model to the completion of the first task, the data generated in real time from the second start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model is compared with the data generated in real time from the start-up of the tested design to the completion of the first task.

[0035] In a possible implementation, comparing at least one of data generated in real time from the first reference model being started for the first time to the completion of the first task, data generated in real time from the first reference model being started again to the completion of the first task, and output data corresponding to the first task calculated by the second reference model with data generated in real time from the start of the design under test to the completion of the first task, includes:

[0036] After the first reference model is contextually stored, comparing the data generated in real time from the start of the design under test to the completion of the first task with the data generated in real time from the re-start of the first reference model to the completion of the first task;

[0037] Compare the data generated in real time from the start-up of the tested design to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model.

[0038] In a possible implementation, comparing at least one of data generated in real time from the first reference model being started for the first time to the completion of the first task, data generated in real time from the first reference model being started again to the completion of the first task, and output data corresponding to the first task calculated by the second reference model with data generated in real time from the start of the design under test to the completion of the first task, includes:

[0039] After the first reference model is started again and the first task is completed, comparing the data generated in real time during the process of the design under test from the start-up to the completion of the first task with the data generated in real time during the process of the first reference model being started again to the completion of the first task;

[0040] Compare the data generated in real time from the start-up of the tested design to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model.

[0041] In a possible implementation, after the first reference model is started again and the first task is completed, comparing the data generated in real time from the start of the design under test to the completion of the first task, the data generated in real time from the first start of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model, includes:

[0042] comparing the data generated when the design under test continues to execute the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model; the remaining data is data generated when the first reference model executes the first task and output data corresponding to the first task calculated by the second reference model, other than data compared with data generated when the design under test is started up to respond to the first context storage instruction, and / or

[0043] Compare the data generated by executing context storage in the first state calculated by the second reference model with the data generated by the context storage performed by the design under test in response to the first context storage instruction.

[0044] In a possible implementation, comparing the data generated by the design under test continuing to perform the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model includes any one of the following:

[0045] If the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model is greater than the data generated by the design under test continuing to perform the first task after completing the second task, it is determined that the design under test has a data shortage problem;

[0046] If the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model is less than the data generated by the design under test continuing to perform the first task after completing the second task, it is determined that the design under test has a data multiple generation problem;

[0047] If, in the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model, there is data that is different from the data generated when the design under test continues to execute the first task after completing the second task, it is determined that the design under test has a data error problem.

[0048] In a possible implementation, comparing the data generated by executing context storage in the first state calculated by the second reference model and the data generated by the context storage performed by the design under test in response to the first context storage instruction includes:

[0049] If the data generated by executing context storage in the first state calculated by the second reference model is different from the data generated by the tested design performing context storage in response to the first context storage instruction, it is determined that the tested design has a data error problem.

[0050] In one possible implementation, the second reference model calculates the output data corresponding to the first task or the second task, including: the second reference model calculates the number of data items output to the downstream module during the execution of the first task, the number of data items output to the downstream module during the execution of the second task, and the identifier corresponding to each piece of data.

[0051] In a possible implementation, the second reference model is configured as a hybrid of a reference model SVRM and a bus function model BFM.

[0052] In one possible implementation, the second reference model includes: a bottom layer, a middle layer and an upper layer, wherein the bottom layer stores configuration information for calculating output data corresponding to each task, data generated by the first reference model and data generated by the second reference model; the middle layer stores the corresponding identifier of each task; and the upper layer is used to instantiate the middle layer.

[0053] In a possible implementation, the method further includes:

[0054] In the process of the design under test responding to the first context storage instruction and executing the second task, sending at least one second context storage instruction to the design under test, wherein the second task is a new task switched as indicated by the first context storage instruction;

[0055] For each second context storage instruction, obtaining second state information, wherein the second state information indicates a second state of the design under test when responding to the second context storage instruction;

[0056] The second state information is sent to the first reference model, instructing the first reference model to perform context storage and continue running until the first reference model runs to the second state.

[0057] According to another aspect of the present disclosure, a context switching verification device is provided, the device comprising:

[0058] A data module, used to enable the design under test and the reference model to respectively obtain data generated in at least one stage during the execution of the first task, wherein the first state information is used to control the operation of the reference model, and the first state information represents a first state of the design under test when responding to the first context storage instruction during the execution of the first task;

[0059] The comparison module is used to verify the design under test by comparing the data between the design under test and the data generated by the reference model in the at least one stage.

[0060] According to another aspect of the present disclosure, an electronic device is provided, comprising: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to implement the above method when executing the instructions stored in the memory.

[0061] According to another aspect of the present disclosure, a non-volatile computer-readable storage medium is provided, on which computer program instructions are stored, wherein the computer program instructions implement the above method when executed by a processor.

[0062] According to another aspect of the present disclosure, a computer program product is provided, including a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0063] Through various aspects of the present disclosure, the design under test and the reference model respectively obtain data generated at least in one stage during the execution of the first task, wherein the first state information is used to control the operation of the reference model, and the first state information represents the first state of the design under test when responding to the first context storage instruction during the execution of the first task; the design under test is verified by comparing the data generated at least in one stage between the design under test and the reference model. In this way, the operation of the reference model is controlled by the first state information to ensure that the design under test and the reference model perform context switching in the same state, so that the data generated by each context switching can be automatically and synchronously compared. At the same time, by comparing the data generated at least in one stage between the design under test and the reference model, a complete verification of the context switching is achieved, that is, a complete and comprehensive verification of the context switching function of the design under test is performed. At the same time, through the synchronization of the design under test and the reference model, the convergence of the verification project can be quickly achieved, thereby improving the verification efficiency.

[0064] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0066] Figure 1 A flowchart of a context switching verification method according to an embodiment of the present disclosure is shown.

[0067] Figure 2 A flowchart of another context switching verification method according to an embodiment of the present disclosure is shown.

[0068] Figure 3 A schematic diagram of context switch verification according to an embodiment of the present disclosure is shown.

[0069] Figure 4 A flowchart of another context switching verification method according to an embodiment of the present disclosure is shown.

[0070] Figure 5 A structural diagram of sv_misc_rm model storage data according to an embodiment of the present disclosure is shown.

[0071] Figure 6 A schematic diagram of context switch verification according to an embodiment of the present disclosure is shown.

[0072] Figure 7 A flowchart of another context switching verification method according to an embodiment of the present disclosure is shown.

[0073] Figure 8 A schematic diagram of context switch verification according to an embodiment of the present disclosure is shown.

[0074] Fig. 9 A structural diagram of a context switching verification device according to an embodiment of the present disclosure is shown.

[0075] Fig.10 A block diagram of an electronic device 1900 according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0076] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0077] References to "one embodiment" or "some embodiments" etc. described in this specification mean that one or more embodiments of the present disclosure include specific features, structures or characteristics described in conjunction with the embodiment. Thus, the phrases "exemplary", "in one embodiment", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0078] In the present disclosure, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: including the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

[0079] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0080] Context switching actually means task switching. When the multitasking kernel decides to run another task, it saves the context of the running task A, that is, context storage (context store). The context is saved in the stack of task A. After the stacking work is completed, the context of the next task B to be run is loaded from the stack of task B into the CPU register and the next task B is started. When task B is executed, the saved context of task A is reloaded into the CPU register, that is, context resume (context resume), and task A continues to execute. This process is context switching.

[0081] The difficulty of context switching is that the context storage can occur at any time, any time before fetch cmd (i.e. fetch context storage instruction from memory), any time in fetch cmd, any time before execute cmd (i.e. load executable instruction), any time after loading execute cmd, and any time after the entire instruction is completed. Therefore, it is difficult to implement the Design under Test (DUT) and the Reference Model (RM) (for example, C language reference model cmodel RM, The SVRM (Simplified Chinese Language Reference Model) synchronizes at the point where context storage occurs, making it difficult to verify context switches.

[0082] The following introduces two context switching verification methods in related technologies:

[0083] Method 1: Compare the two operations of context switching together, that is, no matter how many layers of context switching are nested between context storage and context recovery, no comparison is performed when context is stored, but the final result is compared uniformly after context recovery. This method has the following disadvantages: 1. Once a problem occurs, it is difficult to locate, because this method must be compared after the two context switching operations of context storage and context recovery are completely completed, so once an error occurs, it is unknown at which stage it occurred; if there are multiple layers of context switching nesting, then once an error occurs, the workload of locating the node where the problem occurs will be very huge, the efficiency is very low, and the complete verification of context switching cannot be achieved. 2. When switching contexts, some data of intermediate operations cannot be compared, and the correct processing of the modules involved in these uncomparable data cannot be guaranteed, which will leave risks in UT / BT / IT level verification; in addition, due to the huge scale of SoC-level chips, even for SoC-level testing, context switching cannot be fully verified, resulting in legacy risks before chip launch.

[0084] Method 2: Convert the reference model to a timing-level reference model. This method has the following disadvantages: 1. If cmodel is used as a reference model, it is difficult to implement a timing-level cmodel because cmodel does not have the concept of cycle (i.e., one beat in the clock) corresponding to the register transfer level (RTL). Moreover, if cmodel implements cycle-related functions similar to RTL (such as back pressure), it is easy to cause the cmodel reference model to become unreliable, and it is easy to check errors with errors, and it is even more impossible to achieve complete verification of context switching. 2. If SVRM is used as a reference model, a large amount of synchronization processing with the device under test (DUT) is required, which is a huge workload and will seriously affect the project progress. Secondly, since it is necessary to synchronize with the design under test to achieve the level of cycle by cycle (i.e., one beat as the accuracy); the SVRM reference model is more likely to be designed following the idea of ​​RTL, resulting in the SVRM reference model being no longer stable and reliable, and it is even more impossible to achieve complete verification of context switching.

[0085] In order to solve the above technical problems, the embodiment of the present disclosure proposes a context switching verification method (for detailed description, see below), so that the design under test and the reference model respectively obtain data generated at least one stage during the execution of the first task, wherein the first state information is used to control the operation of the reference model, and the first state information represents the first state of the design under test when responding to the first context storage instruction during the execution of the first task; the design under test is verified by comparing the data generated by the design under test and the reference model in at least one stage. In this way, the operation of the reference model is controlled by the first state information to ensure that the design under test and the reference model perform context switching in the same state, so that the data generated by each context switch can be automatically and synchronously compared. At the same time, by comparing the data generated by the design under test and the reference model in at least one stage, the complete verification of the context switching is achieved, that is, the context switching function of the design under test is fully and comprehensively verified. At the same time, through the synchronization of the design under test and the reference model, the convergence of the verification project can be quickly achieved, thereby improving the verification efficiency.

[0086] It should be noted that for other similar scenarios, for example, there is a need to retain the current task and then switch to a higher priority processing task, and finally continue to process the remaining part of the current task after the higher priority task is processed, the context switching verification idea proposed in the embodiment of the present disclosure is also applicable.

[0087] The context switching verification method proposed in the embodiment of the present disclosure is described in detail below; illustratively, the method can be executed by entities with data processing capabilities such as processors, servers, and server clusters, and the above-mentioned entities can simulate the design verification (Design Verification, DV) environment of the chip to be tested to achieve context switching verification in the environment.

[0088] Figure 1 FIG. 1 is a flow chart showing a context switching verification method according to an embodiment of the present disclosure. Figure 1 As shown, the method may include the following steps:

[0089] Step 101: enable the design under test and the reference model to respectively obtain data generated in at least one stage during the execution of a first task, wherein first state information is used to control the operation of the reference model, and the first state information represents a first state of the design under test when responding to a first context storage instruction during the execution of the first task.

[0090] The design under test may be an RTL code designed according to the requirements, which simulates the logic function of the design chip in a DV environment to verify whether the function of the design chip meets the requirements. The reference model may simulate the function of the design under test to provide reference data for verifying the function of the design under test, i.e., the correct golden data output by the chip verification process; for example, the reference model may be a reference model such as a cmodel or SVRM. Exemplarily, the reference model may be one or more, without limitation.

[0091] Exemplarily, the first state information may include: information in the form of time, node, or instruction corresponding to when the design under test responds to the first context storage instruction. The first context storage instruction may be each context storage instruction to which the design under test responds during the execution of the first task. When the design under test responds to the first context storage instruction, it stops executing the first task, saves the context, and switches to executing a new task.

[0092] In one possible implementation, the DV environment can send a first context storage instruction to the design under test at any time during the process of the design under test executing the first task. After the design under test receives the first context storage instruction, the DV environment can obtain first state information and send the first state information to the reference model to control the operation of the reference model; illustratively, the first state information is used to control the process of the reference model executing the first task, for example, it can be used to control the reference model to run to the first state represented by the first state information, which is the first state of the design under test when it responds to the first context storage instruction.

[0093] Exemplarily, at least one stage during the execution of the first task may include all stages in the process from starting to execute the first task to completing the execution of the first task, wherein each stage may be divided according to the context switching occurring during the execution of the first task.

[0094] As an example, a context switch occurs during the execution of the first task, that is, during the execution of the first task, a context switch is performed, and then the task is switched to a new task. After the new task is executed, the first task is continued to be executed until the first task is completed; correspondingly, at least one stage during the execution of the first task may include a stage from the start of execution of the first task to the switch to the new task, a stage of executing the new task, and a stage of continuing to execute the first task after the new task is executed until the first task is completed; wherein, in the stage from the start of execution of the first task to the switch to the new task, part of the first task is executed and a context storage operation is performed.

[0095] As another example, multiple nested context switches occur during the execution of the first task, that is, during the execution of the first task, a context switch is performed, and then the context is switched to a new task. During the execution of the new task, another context switch is performed, and then the context is switched to another task other than the new task. In this way, multiple context switches can be nested until the first task is switched back and the remaining part of the first task is executed. For example, during the execution of task A (i.e., the first task), a context switch is performed, and the context is switched to the execution of task B. During the execution of task B, another context switch is performed, and the context is switched to the execution of task C. After the execution of task C, the context is switched back to task B for continued execution, and after the completion of task B, the context is switched back to task A for continued execution until task A is completed. In this way, two nested context switches are performed during the execution of task A. Correspondingly, at least one stage during the execution of the first task may include a stage from the start of the execution of task A to the switching to task B, a stage from the execution of task B to the switching to task C, a stage of the execution of task C, a stage of continuing to execute task B after the execution of task C until the completion of task B, and a stage of continuing to execute task A after the execution of task B until the completion of task A. Among them, in the stage from executing task A to switching to task B, part of task A is executed and a context storage operation is performed; in the stage from executing task B to switching to task C, part of task B is executed and a context storage operation is performed.

[0096] As another example, multiple context switches executed in parallel and successively occur during the execution of the first task, that is, during the execution of the first task, a context switch is performed, and then the task is switched to a new task. During the execution of the new task, the task is switched back to the first task for continued execution, and another context switch is performed during the execution of the first task. For example, during the execution of task A (i.e., the first task), a context switch is performed, and the task is switched to the execution of task B. After the execution of task B is completed, the task is switched back to the execution of task A. During the execution of task A, another context switch is performed, and the task is switched to the execution of task C. After the execution of task C is completed, the task is switched back to task A for continued execution until task A is completed. In this way, two context switches executed in parallel and successively occur during the execution of task A. Correspondingly, at least one stage during the execution of the first task may include a stage from the start of the execution of task A to the switching to task B, a stage of executing task B, a stage of continuing to execute task A after the execution of task B until the switching to task C, a stage of executing task C, and a stage of continuing to execute task A after the execution of task C until the completion of task A. Among them, in the stage from executing task A to switching to task B, part of task A is executed and a context storage operation is performed; after executing task B, task A continues to be executed until switching to task C, part of task A is executed and a context storage operation is performed.

[0097] In one possible implementation, the DV environment can control the operation of the design under test and the reference model. For example, relevant instructions and related information, such as instructions to start a first task, first context storage instructions, first state information, configuration information of the first task, etc., can be used to control the execution of the first task of the design under test and the reference model, so that the design under test and the reference model respectively obtain data generated by at least one stage during the execution of the first task.

[0098] Step 102: Verify the design under test by comparing data between the design under test and data generated by the reference model in the at least one stage.

[0099] It can be understood that the data generated by the reference model in at least one stage can be used as golden data to verify the data generated by the design under test in the at least one stage.

[0100] Since during the process of the tested design and the reference model executing the first task, regardless of whether or not the context switch is performed and how many times the context switch is performed, the data output to the downstream module during the entire process of executing the first task is the same; and when the context storage operation is performed in different states, the corresponding data generated by the context storage operation is different. Therefore, the data generated by the tested design and the reference model in at least one stage can be divided into two categories: the first category is the data generated by each context storage operation, that is, the stored context, wherein the data generated by each context storage operation will be different due to the different states when the context storage operation is performed; the second category is the data generated by the execution of the first task, which means the data output to the downstream module generated by the normal execution of the first task according to the configuration information of the first task (which can be called fixed downstream data), and the data does not contain the data generated by the context storage operation. Among them, the first category of data is the data generated by the execution of the context operation in the stage where the context storage operation is located in the data generated in at least one stage, and the second category of data is all the data except the first category of data in the data generated in at least one stage.

[0101] As an example, the design under test can be verified by comparing the data generated by the design under test and the reference model at each stage during the execution of the first task; wherein, the data generated at each stage completely includes the above two types of data, so that the complete data generated by the design under test and the reference model during the test process are comprehensively compared, thereby achieving complete and closed-loop verification coverage. At the same time, since the first state information is used to control the operation of the reference model, the reference model can obtain the data generated by the context storage operation in the first state, that is, the reference model and the design under test can both obtain the data generated by the context storage operation in the first state, wherein, for the case where multiple context switches are nested during the execution of the first task, the data generated by each context storage operation can be synchronously compared to accurately locate the location where the problem occurs, thereby achieving automatic comparison of multiple layers of context switch nesting. In this way, more accurate context switch synchronization between the reference model and the design under test is achieved, so as to fully verify the context switch function of the design under test at a lower level and smaller scale.

[0102] In the disclosed embodiment, the design under test and the reference model are respectively provided with data generated at least in one stage during the execution of the first task, wherein the first state information is used to control the operation of the reference model, and the first state information indicates the first state of the design under test when responding to the first context storage instruction during the execution of the first task; the design under test is verified by comparing the data generated at at least one stage by the design under test and the reference model, so that the operation of the reference model is controlled by the first state information to ensure that the design under test and the reference model perform context switching in the same state, so that the data generated by each context switching can be automatically and synchronously compared, and at the same time, the complete verification of the context switching is achieved by comparing the data generated at at least one stage by the design under test and the reference model, that is, the context switching function of the design under test is completely and comprehensively verified; in addition, through the synchronization of the design under test and the reference model, the convergence of the verification project can be quickly achieved, thereby improving the verification efficiency.

[0103] Figure 2 FIG. 2 is a flow chart showing another context switching verification method according to an embodiment of the present disclosure. Figure 2 As shown, the method may include the following steps:

[0104] Step 201: Control the design under test to start, and send the first context storage instruction to the design under test when the design under test is executing a first task.

[0105] Exemplarily, the DV environment can send an instruction to start the first task to the design under test, and after receiving the instruction, the design under test starts executing the first task normally; the DV environment can also send a first context storage instruction to the design under test at any time after sending the above instruction. After receiving the first context storage instruction sent by the DV environment, the design under test responds to the first context storage instruction, suspends execution of the first task, performs a context storage operation, saves the context, and executes the new task switched to.

[0106] Step 202: Obtain first status information.

[0107] In this step, the first state information obtained by the DV environment may represent the first state of the design under test when responding to the first context storage instruction.

[0108] Step 203: Send the first state information to a first reference model, and control the first reference model to start executing the first task until the first reference model runs to the first state.

[0109] Exemplarily, the DV environment sends the acquired first state information to the first reference model; and sends an instruction to start the first task to the first reference model. After receiving the instruction, the first reference model starts executing the first task until it runs to the first state represented by the first state information.

[0110] In a possible implementation, after executing step 203, when the design under test responds to the first context storage instruction and executes the second task, at least one second context storage instruction is sent to the design under test, wherein the second task is a new task switched as indicated by the first context storage instruction; for each second context storage instruction, second state information is obtained, wherein the second state information indicates the second state of the design under test when responding to the second context storage instruction; and the second state information is sent to the first reference model, indicating the first reference model to perform context storage and continue to run until the first reference model runs to the second state. Exemplarily, each time the first reference model receives a second state information, it can perform context storage from the current running state and continue to run to the state indicated by the second state information. For example, if there are multiple second state information, that is, the design under test has multiple context switches in the process of executing the second task, the first reference model receives the first second state information, then performs context storage in the first state, switches to executing the second task, and runs to the state indicated by the first second state information, waits for receiving the next second state information, performs context storage again, and continues to run, and so on, until it runs to the state indicated by the last second state information. In this way, the DV environment can send at least one second context storage instruction to the design under test while the design under test is executing the second task, so that the design under test can perform multiple nested context switches; and can control the first reference model to run in sequence to the state of the design under test when responding to each context storage instruction, so as to perform each context storage operation in the same state as that of the design under test, thereby achieving more accurate context switching synchronization between the reference model and the design under test.

[0111] Step 204: After the design under test completes the first task, instruct the first reference model to perform context storage and continue running until the first task is completed.

[0112] In this step, when the design under test completes the first task, it is explained that the state to which the first reference model is running is the state in which the design under test is in when it responds to the last context storage instruction, and no new context switch will occur thereafter. In this way, the DV environment instructs the first reference model to perform context storage, that is, to perform context storage in the state in which the design under test is in when it responds to the last context storage instruction, and execute the new task switched to. After the new task is executed, the context is restored, and the remaining part of the first task is continued to be executed until the first task is completed. Among them, the state in which the design under test is in when responding to the last context storage instruction can be the first state in the case where no nested context switch occurs, or it can be the state in which it responds to the last second context storage instruction in the case where multiple nested context switches occur.

[0113] Step 205: Obtain the output result of the design under test and the output result of the first reference model.

[0114] As an example, the output result of the design under test includes: data generated by the design under test when executing the first task, and data generated by the design under test when performing context storage in response to the first context storage instruction. Exemplarily, it may also include data generated by the design under test when executing the second task, data generated by the design under test when performing context storage in response to each second context storage instruction, and data generated by the design under test when executing a new task switched to by each second context storage instruction. In this way, the output result of the design under test includes data generated by the design under test at each stage during the execution of the first task.

[0115] As an example, the output result of the first reference model includes: data generated by the first reference model executing the first task, and data generated by the first reference model performing context storage. Exemplarily, it may also include data generated by the first reference model executing the second task, data generated by the first reference model performing context storage in response to each second context storage instruction, and data generated by the first reference model executing the new task switched as indicated by each second context storage instruction. In this way, the output result of the first reference model includes data generated by the first reference model at each stage during the execution of the first task.

[0116] Step 206: Verify the design under test by comparing the output result of the design under test with the output result of the first reference model.

[0117] Exemplarily, the data generated by the design under test at each stage during the execution of the first task can be compared with the data generated by the design under test at the corresponding stage during the execution of the first task; if the data generated by both stages are the same, it indicates that the function of the design under test is normal, otherwise it indicates that the function of the design under test is abnormal.

[0118] It should be noted that the above steps 201-205 are Figure 1 An implementation example of step 101 in step 206 is Figure 1 An implementation example of step 102 in FIG.

[0119] In the disclosed embodiment, the design under test is controlled to start, and the first context storage instruction is sent to the design under test during the process of the design under test executing the first task; the first state information is sent to the first reference model, and the first reference model is controlled to start executing the first task until the first reference model runs to the first state; then, after the design under test completes the first task, the first reference model is instructed to perform context storage and continue to run until the first task is completed; in this way, the synchronization of the first reference model and the design under test is achieved, so that the data generated by the context storage of the first reference model and the design under test and the data generated by executing the first task can be automatically synchronized and compared, and the complete verification of the context switch can be achieved. At the same time, through the synchronization of the design under test and the reference model, the convergence of the verification project can be quickly achieved, and the verification efficiency can be improved.

[0120] For example, taking the first reference model as cmodel, Figure 3 A schematic diagram of context switching verification according to an embodiment of the present disclosure is shown; Figure 3 As shown, the design under test DUT and the first reference model cmodel run independently, wherein the active configuration (active BFM) is used to configure the instructions that the DUT and cmodel need to run, such as the instructions to start executing the first task, the context storage instructions, etc. The passive configuration (Passive BFM) indicates that the DUT and cmodel passively respond to other functional modules when executing the above instructions, such as the data and configuration information that the DUT and cmodel need to read when running the above instructions. The DV environment is configured with the Sync_info rtl2dv interface and the sync_info dv2cmodel interface, wherein the Sync_info rtl2dv interface is used by the DV environment to obtain the status information indicating the state of the DUT when responding to the context storage instruction. After the DV environment adapts the status information, it transmits the status information to the cmodel through the sync_info dv2cmodel interface.

[0121] Specifically, during the test process, first, the DV environment controls the DUT to start executing the first task normally, and sends the first context storage instruction at any time (i.e., step 201), and the cmodel is not started at this time. The DUT executes the first task, and in response to the first context storage instruction, executes the context storage operation, and the DV environment obtains the first state information indicating the first state of the DUT when responding to the first context storage instruction through the Sync_info rtl2dv interface (i.e., step 202). Then, the DV environment sends the obtained first state information to the cmodel through the sync_info dv2cmodel interface, and starts the normal operation of the cmodel, and the cmodel executes the first task and runs to the first state (i.e., step 203); at the same time, the DUT is still running normally. If the DUT performs nested context storage later, the DV environment informs the cmodel of the second state information of the second state of the DUT when responding to the second context storage instruction in the above manner, and the cmodel runs to the second state after context switching; if the DUT does not have a new context storage later, the DV environment controls the cmodel to perform the context storage operation, and continues to execute and complete the remaining part of the first task (i.e., step 204). The data generated by the cmodel and the DUT from the start-up to the completion of the first task are obtained (i.e., step 205); finally, the cmodel and the data generated by the DUT from the start-up to the completion of the first task can be compared (i.e., step 206). In this way, the synchronization between the DUT and the cmodel is completed through the DV environment as a medium, that is, the DUT and the cmodel perform the same context storage operation in the same state, so that the data generated by the context switch can be automatically synchronized and compared, which can quickly achieve the convergence of the test project, improve the verification efficiency, and achieve complete and closed-loop verification coverage.

[0122] Figure 4 FIG. 2 is a flow chart showing another context switching verification method according to an embodiment of the present disclosure. Figure 4 As shown, the method may include the following steps:

[0123] Step 401: Control a first reference model to start and execute a first task, and obtain first data generated when the first reference model executes the first task.

[0124] Exemplarily, the DV environment may send an instruction to start the first task to the first reference model, and after receiving the instruction, the first reference model normally starts and executes the first task. That is, the first reference model does not perform context switching during the startup and execution of the first task, and the first data obtained is the data output to the downstream module generated after the first task is normally executed; because the first reference model does not perform context switching, the first data obtained is less prone to errors and more stable.

[0125] Step 402: Control the design under test to start, and send the first context storage instruction to the design under test when the design under test is executing the first task.

[0126] Exemplarily, the DV environment can send an instruction to start the first task to the design under test, and after receiving the instruction, the design under test starts executing the first task normally; the DV environment can also send a first context storage instruction to the design under test at any time after sending the above instruction. After receiving the first context storage instruction sent by the DV environment, the design under test responds to the first context storage instruction, suspends execution of the first task, performs a context storage operation, saves the context, and executes the second task switched to.

[0127] Step 403: Send an excitation signal to the second reference model so that the second reference model calculates output data corresponding to the first task and the second task; wherein the second task is the new task switched as indicated by the first context storage instruction.

[0128] Exemplarily, the DV environment can send an excitation signal to the second reference model, and after receiving the excitation signal, the second reference model calculates the output data corresponding to the first task and the second task based on the configuration information. The output data corresponding to the first task is the data output to the downstream module generated by the normal execution of the first task; the output data corresponding to the second task is the data output to the downstream module generated by the normal execution of the second task.

[0129] In one possible implementation, the second reference model calculates the output data corresponding to the first task or the second task, including: the second reference model calculates the number of data items output to the downstream module during the execution of the first task, the number of data items output to the downstream module during the execution of the second task, and the identifier corresponding to each piece of data.

[0130] As an example, the second reference model is configured as a hybrid of the reference model SVRM and the bus function model BFM (Bus Function Model, BFM). The hybrid can be configured to calculate the number of data items to the downstream module and the identifier corresponding to each data item; wherein, the data generated in response to an instruction can be regarded as a data item, and the identifier can be represented by an identity id or a tag tag. The above hybrid can be called the sv_misc_rm model; the reason why the sv_misc_rm model has the concept of misc is that it is not a complete SVRM. Considering that the development cycle of the timing-level SVRM is too long, on the basis of realizing the basic functions of the reference model, that is, obtaining the corresponding output under given input instructions, there is no need to make detailed requirements on whether the specific content of the output result can be obtained. For example, the second reference model (i.e., sv_misc_rm model) in the disclosed embodiment does not need to realize the complete function of the design under test, but at least calculates the number of data output to the downstream module during the execution of the first task, the number of data output to the downstream module during the execution of the second task, and the identifier corresponding to each data, and sends the handle (class handle) of the second reference model to all related bfms; in each related bfm, when receiving the fixed downstream data sent by the design under test, the corresponding number of records can be reduced by one according to the unique ID or tag of the data, so as to judge whether the problem of "less or more transmission" occurs when comparing the data later. Although the second reference model may not realize the complete function of the design under test, since the first reference model can obtain the specific content of the fixed downstream data generated by the execution of the first task, a complete function comparison can still be performed, thereby greatly saving development time and improving the development efficiency of verification. It should be noted that the specific functions that can be implemented by the second reference model can be configured according to requirements, that is, as many design functions under test as possible can be implemented in the second reference model if test time and conditions permit; in addition, the second reference model can also be used for non-context switching task verification, with excellent portability and scalability, which can effectively improve verification efficiency and convergence speed.

[0131] Step 404: Obtain the first status information.

[0132] In this step, the first state information obtained by the DV environment may represent the first state of the design under test when responding to the first context storage instruction.

[0133] Step 405: Send the first state information to the second reference model, so that the second reference model calculates data generated by executing the context storage in the first state.

[0134] Exemplarily, the DV environment sends the acquired first state information to the second reference model; and sends an excitation signal to the second reference model. After receiving the excitation signal, the second reference model calculates the data generated by the execution context storage in the first state based on the configuration information.

[0135] Exemplarily, if the subsequent DV sends at least one second context storage instruction to the design under test so that the design under test performs multi-layer nested context switching, each second state information can be sent to the second reference model, and the second state information represents the second state of the design under test when responding to the second context storage instruction; and an excitation signal is sent to the second reference model. After receiving the excitation signal, the second reference model calculates the data generated by executing the context storage in the second state based on the configuration information.

[0136] In actual testing, there are too many tasks to be executed or multiple layers of context switching may occur when switching contexts, which requires saving a large amount of task information. To this end, the disclosed embodiment optimizes the information storage mode corresponding to each task, encapsulates the information corresponding to each task, and uses the task identifier as an index to store the data generated by executing the task accordingly, so that the location of the problem can be quickly and conveniently located during subsequent data comparison, which can effectively improve the verification efficiency and convergence speed for large-scale verification (multiple tasks or multiple layers of context switching).

[0137] In a possible implementation, the second reference model includes: a bottom layer, a middle layer and an upper layer, wherein the bottom layer stores configuration information for calculating output data corresponding to each task, data generated by the first reference model and data generated by the second reference model; the middle layer stores the corresponding identifier of each task; and the upper layer is used to instantiate the middle layer. Exemplarily, the data generated by the first reference model at least includes: the first data output to the downstream module generated by the normal execution of the first task; the data generated by the second reference model at least includes: the first data output to the downstream module generated by the normal execution of the first task, the first data output to the downstream module generated by the normal execution of the second task, and the calculated data stored in the execution context in the first state; wherein the first data output to the downstream module generated by the normal execution of the first task and the calculated data stored in the execution context in the first state are both information corresponding to the first task.

[0138] Take the sv_misc_rm model as an example, Figure 5 A structural diagram of sv_misc_rm model storage data according to an embodiment of the present disclosure is shown as follows: Figure 5As shown, a kick represents a task. Here, the storage structure of sv_misc_rm has three layers: the bottom layer is the kick_cfg configuration information required to execute each kick (such as various setting options, parameters, attributes and constant values, etc.) and the comparator kick_checker corresponding to each kick. The comparator is used to compare the data generated by the sv_misc_rm model executing the task represented by the kick with the data generated by the design under test executing the task; the middle layer is the information layer containing the bottom layer kick_info, which contains the information contex_switch info of whether a context switch occurs when executing the task and the identification information kick_id of the task; the top layer is sv_misc_rm, which instantiates the middle layer and is instantiated in the sequence seq. In the actual testing process, the configuration information and data generated by each task executed by the sv_misc_rm model can be stored in the middle layer of the corresponding kick_id; since the relevant configuration information of all tasks and the comparator kick_checker are sorted in the above sequence, even if large-scale verification scenarios such as multi-layer nesting of context switching or execution of multiple tasks occur, when performing data comparison later, the corresponding kick_info of the context switching operation can be found according to the task identifier (kick id), which makes it very convenient to locate the location of the vulnerability, greatly simplifies the complexity of the environment, and effectively improves the verification efficiency and convergence speed.

[0139] Step 406: Compare the data generated by executing context storage in the first state calculated by the second reference model with the data generated by the context storage performed by the design under test in response to the first context storage instruction.

[0140] In one possible implementation, the comparison of the data generated by executing context storage in the first state calculated by the second reference model and the data generated by the context storage performed by the design under test in response to the first context storage instruction includes: if the data generated by executing context storage in the first state calculated by the second reference model is different from the data generated by the context storage performed by the design under test in response to the first context storage instruction, it is determined that the design under test has a data error problem.

[0141] Since the data generated by executing context storage in the first state calculated by the second reference model and the data generated by the context storage performed by the tested design in response to the first context storage instruction are the contexts stored by the context storage operation in the same state, the two are compared to achieve a synchronous comparison of the additional data generated by the context switching during the execution of the first task, so that the stage where the problem occurs can be accurately located.

[0142] Step 407, compare the first data generated by the first reference model after executing the first task, the output data corresponding to the first task calculated by the second reference model, and the second data generated by the design under test from startup to response to the first context storage instruction, and obtain the remaining data corresponding to the first reference model and the remaining data corresponding to the second reference model, the remaining data being data in the first data and the output data corresponding to the first task other than the data to be compared with the second data.

[0143] In this step, a three-way comparison is performed on the first data generated when the first reference model executes the first task, the output data corresponding to the first task calculated by the second reference model, and the second data generated when the design under test is started up to responding to the first context storage instruction. In this way, through the three-way comparison, the reliability of verification is further improved, and the omission of vulnerabilities caused by the design under test and a certain reference model being mistakenly combined is avoided. Exemplarily, if the second data generated when the design under test is started up to responding to the first context storage instruction exists in the first data generated when the first reference model executes the first task and the output data corresponding to the first task calculated by the second reference model, then the design under test is determined to be working normally, otherwise, the design under test is determined to be wrong.

[0144] Step 408: After controlling the design under test and the first reference model to complete the second task, compare the data generated by the design under test after completing the second task, the data generated by the first reference model after completing the second task, and the output data corresponding to the second task calculated by the second reference model.

[0145] In this step, a three-way comparison is performed on the data generated by the tested design after executing the second task, the data generated by the first reference model after executing the second task, and the output data corresponding to the second task calculated by the second reference model. In this way, the reliability of verification is further improved through the three-way comparison.

[0146] Step 409: after the design under test completes the first task, compare the data generated when the design under test continues to perform the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model.

[0147] In this step, a three-way comparison is performed on the data generated by the design under test continuing to perform the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model. In this way, the reliability of verification is further improved through the three-way comparison.

[0148] In a possible implementation, the comparison of data generated when the design under test continues to perform the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model includes any one of the following: if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model is more than the data generated when the design under test continues to perform the first task after completing the second task, that is, the data generated by the design under test is omitted, then it is determined that the design under test has a data under-sent problem; if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model is less than the data generated when the design under test continues to perform the first task after completing the second task, that is, the data generated by the design under test is surplus, then it is determined that the design under test has a data over-sent problem; if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model contains data different from the data generated when the design under test continues to perform the first task after completing the second task, then it is determined that the design under test has a data error problem.

[0149] It should be noted that the above steps 401-405 are Figure 1 An implementation example of step 101, steps 406-409 are Figure 1 An implementation example of step 102 in FIG.

[0150] In the disclosed embodiment, the first reference model is controlled to start and execute the first task, and the first data generated by the first reference model after the first task is executed is obtained; the design under test is controlled to start, and the first context storage instruction is sent to the design under test during the process of the design under test executing the first task; an excitation signal is sent to the second reference model so that the second reference model calculates the output data corresponding to the first task and the second task; wherein the second task is the new task switched as indicated by the first context storage instruction; the first state information is sent to the second reference model so that the second reference model calculates the data generated by executing the context storage in the first state; and then the data generated by the design under test and the first reference model and the second reference model at each stage are compared. In this way, the synchronization between the second reference model and the design under test is achieved, and the data generated by the second reference model and the data generated by the design under test both include the data generated by the context storage in the same state, so that the data generated by the second reference model and the design under test at each stage can be automatically synchronized and compared, and the complete verification of the context switch can be achieved. At the same time, through the synchronization of the design under test and the second reference model, the convergence of the verification project can be achieved quickly and the verification efficiency can be improved. In addition, the first reference model is controlled to complete the first task without context switching, and the first data generated by the first reference model when executing the first task is less prone to errors and more stable. The stable first data can be used to verify the correctness of the calculation results of the second reference model, and the phenomenon of the second reference model and the design under test being wrong can be effectively supplemented and compared, making it easier to discover deep vulnerabilities.

[0151] For example, it is assumed that the first reference model is cmodel and the second reference model is sv_misc_rm. Figure 6 A schematic diagram of context switching verification according to an embodiment of the present disclosure is shown; Figure 6 As shown, the design under test DUT, the first reference model cmodel, and the second reference model sv_misc_rm run independently, wherein the active configuration (active BFM) is used to configure the instructions that the DUT, sv_misc_rm, and cmodel need to run, such as the instructions for executing the first task, the context storage instructions, etc., wherein the cmodel does not perform context switching (not happen context switch), and the passive configuration (Passive BFM) indicates that the DUT, sv_misc_rm, and cmodel passively respond to other functional modules when executing the above instructions. The Sync_info rtl2dv interface is configured in the DV environment, which is used for the DV environment to transmit the status information indicating the state of the DUT when responding to the context storage instruction to sv_misc_rm.

[0152] Specifically, during the test process, first, the DV environment controls the DUT and cmodel to start normally, and controls the cmodel to execute the first task without context switching. The first data obtained is fixed downstream data that can be compared, and is cached for later use (ie, step 401); at the same time, the first context storage instruction is sent to the DUT at any time, and the first context storage instruction is not sent to the cmodel and sv_misc_rm model at this time (ie, step 402). At this time, the sv_misc_rm model calculates the golden data that all downstream interfaces should output according to the stimulus signal (i.e., the downstream data fixed for executing the first task and the second task, excluding the additional data generated by the context storage operation) (i.e., step 403); further, when the DUT responds to the first context storage instruction and executes the context storage operation, the DV environment obtains the first state information, which indicates the first state of the DUT when responding to the first context storage instruction (i.e., step 404), and the DV environment transmits the first state information to sv_misc_rm through the Sync_info rtl2dv interface, and sv_misc_rm calculates the golden data of the additional data generated by the context storage in the state indicated by the first state information (i.e., step 405). Then, after the context storage operation is completed, the golden data of the additional data is automatically compared with the additional data generated by the DUT due to the context storage operation (i.e., step 406); in addition, for the fixed downstream data that can be compared by itself, a three-way comparison can be performed, one side is the data generated by the DUT when executing the first task, the other side is the golden data that all downstream interface outputs should have calculated by sv_misc_rm, and the third side is the golden data output by the cached cmodel (i.e., step 407). The three-way comparison is used to minimize the vulnerability omission caused by the DUT and sv_misc_rm being wrong together. Again, if the task switched to after the context storage is executed is a normal task (i.e., no context switching is performed during the period), the DUT and cmodel are started at the same time, and the three-way comparison is performed normally after the task is completed (i.e., step 408). Finally, when the DUT context is restored (i.e., the remaining part of the first task is restored), cmodel and sv_misc_rm are not started, and when the DUT finishes executing the first task, a normal three-way comparison is performed (i.e., step 409), wherein the golden data of cmodel is the data output by the remaining part of the first task corresponding to the execution of the above-mentioned context switch, i.e., the data remaining after the above-mentioned three-way comparison.In addition, in order to ensure the correct integrity of the verification context switch, it is also possible to compare whether the golden data previously cached by cmodel is left over. If so, it indicates that the DUT processing is incorrect; similarly, it is also possible to compare whether the golden data generated by context storage calculated by sv_misc_rm is left over. If so, it indicates that the DUT processing is incorrect. Exemplarily, when performing the above comparison, for the three situations of under-sending, over-sending, and wrong sending, 1. Under-sending: after the DUT context recovery operation is completed, the golden data generated by the cached cmodel can be compared to see if there are omissions; and for whether the golden data generated by the cmodel itself is left over, it is possible to verify whether the DUT and cmodel have loopholes by checking whether the golden data generated by executing the first task calculated by sv_misc_rm is left over. 2. Multiple occurrences: This is only a performance issue, not a functional issue. However, the verification scheme in the disclosed embodiment can still be perfectly verified. This is because if multiple occurrences occur, then when the DUT context recovery operation ends the comparison, the number of multiple occurrences of data must be less than the golden data corresponding to cmodel and sv_misc_rm, thus the vulnerability can be discovered. 3. Error: For fixed downstream data, it can be compared through DUT, cmodel, and sv_misc_rm. For the additional data generated by the context operation, it can be compared with the golden data generated by the context switch calculated by DUT and sv_misc_rm. In this way, the DUT and cmodel+sv_misc_rm complete the collaborative closed-loop verification through the DV environment. sv_misc_rm can greatly reduce the verification workload. Through the combination of sv_misc_rm+cmodel, the project convergence can be achieved quickly, and the verification work can be completed in a short time, which can reduce the workload of verification engineers and effectively improve the verification efficiency and convergence speed. Moreover, sv_misc_rm can effectively supplement and compare the phenomenon that cmodel and DUT are wrong together, which makes it easier to find deep vulnerabilities and prevent logical errors in cmodel from being detected.

[0153] Figure 7 FIG. 2 is a flow chart showing another context switching verification method according to an embodiment of the present disclosure. Figure 7 As shown, the method may include the following steps:

[0154] Step 701: Control a first reference model to start up for the first time and complete the execution of a first task, and obtain data generated by the first reference model after the first task is executed.

[0155] Exemplarily, the DV environment may send an instruction to start the first task to the first reference model, and after receiving the instruction, the first reference model normally starts and executes the first task. That is, the first reference model does not perform context switching during the startup and execution of the first task, and the first data obtained is the data output to the downstream module generated after the first task is normally executed; because the first reference model does not perform context switching, the obtained data is less prone to errors and more stable.

[0156] Step 702: Send an excitation signal to the second reference model so that the second reference model calculates output data corresponding to the first task.

[0157] Exemplarily, the DV environment can send an excitation signal to the second reference model, and after receiving the excitation signal, the second reference model calculates the output data corresponding to the first task based on the configuration information. The output data corresponding to the first task is the data output to the downstream module generated by the normal execution of the first task.

[0158] In one possible implementation, the second reference model calculates the output data corresponding to the first task, including: the second reference model calculates the number of data items output to the downstream module during the execution of the first task, the number of data items output to the downstream module during the execution of the second task, and the identifier corresponding to each data item.

[0159] In a possible implementation, the second reference model is configured as a hybrid of the reference model SVRM and the bus function model BFM. Figure 4 The relevant statement in step 403.

[0160] In a possible implementation, the second reference model includes: a bottom layer, a middle layer and an upper layer, wherein the bottom layer stores configuration information for calculating the output data corresponding to each task, data generated by the first reference model and data generated by the second reference model; the middle layer stores the corresponding identifier of each task; and the upper layer is used to instantiate the middle layer. For a detailed description of this part, please refer to the above Figure 4 The relevant statement in step 405.

[0161] Step 703: Pause the first reference model after the first reference model completes executing the first task, control the design under test to start, and send the first context storage instruction to the design under test during the process of the design under test executing the first task.

[0162] Exemplarily, the DV environment can control the first reference model to pause after the first reference model completes the execution of the first task; and send an instruction to start the first task to the design under test, and the design under test starts to execute the first task normally after receiving the instruction; the DV environment can also send a first context storage instruction to the design under test at any time after sending the above instructions, and after receiving the first context storage instruction sent by the DV environment, the design under test responds to the first context storage instruction, pauses the execution of the first task, performs a context storage operation, saves the context, and executes the second task switched to.

[0163] Step 704: Obtain the first status information;

[0164] In this step, the first state information obtained by the DV environment may represent the first state of the design under test when responding to the first context storage instruction.

[0165] Step 705: Send the first state information to the first reference model, and control the first reference model to start executing the first task again until the first reference model runs to the first state;

[0166] Exemplarily, the DV environment sends the acquired first state information to the first reference model; and sends an instruction to restart the execution of the first task to the first reference model. After receiving the instruction, the first reference model restarts the execution of the first task until it runs to the first state represented by the first state information.

[0167] In one possible implementation, after executing step 705, when the design under test responds to the first context storage instruction and performs a second task, at least one second context storage instruction is sent to the design under test, wherein the second task is a new task switched as indicated by the first context storage instruction; for each second context storage instruction, second state information is obtained, wherein the second state information indicates the second state of the design under test when responding to the second context storage instruction; the second state information is sent to the first reference model, instructing the first reference model to perform context storage and continue to run until the first reference model runs to the second state. For specific instructions in this section, please refer to the above Figure 2 The relevant statement in step 203.

[0168] Step 706: After the design under test completes the first task, instruct the first reference model to perform context storage and continue running until the first task is completed.

[0169] For detailed instructions on this step, please refer to the above Figure 2 The relevant statement in step 204.

[0170] Step 707: compare at least one of the data generated in real time from the first reference model being started for the first time to the completion of the first task, the data generated in real time from the first reference model being started again to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model with the data generated in real time from the start of the design under test to the completion of the first task.

[0171] In a possible implementation, at least one of the data generated in real time from the first start-up of the first reference model to the completion of the first task, the data generated in real time from the second start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model is compared with the data generated in real time from the start-up of the design under test to the completion of the first task, including: after the first reference model is contextually stored, comparing the data generated in real time from the start-up of the design under test to the completion of the first task with the data generated in real time from the second start-up of the first reference model to the completion of the first task; comparing the data generated in real time from the start-up of the design under test to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model.

[0172] In a possible implementation, at least one of the data generated in real time from the first start-up of the first reference model to the completion of the first task, the data generated in real time from the second start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model is compared with the data generated in real time from the start-up of the design under test to the completion of the first task, including: after the first reference model is started again and the first task is completed, comparing the data generated in real time from the start-up of the design under test to the completion of the first task with the data generated in real time from the second start-up of the first reference model to the completion of the first task; comparing the data generated in real time from the start-up of the design under test to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model.

[0173] Since new data are continuously added to the data generated in real time from the first reference model being started for the first time to the completion of the first task, the data generated in real time from the first reference model being started again to the completion of the first task, and the data generated in real time from the start of the design under test to the completion of the first task, after the first reference model is contextually stored and after the first reference model is started again and the first task is completed, the real-time data of the first reference model, the second reference model, and the design under test are respectively synchronously compared, so that the stage at which the problem occurs can be accurately located.

[0174] As an example, after the first reference model is started again and completes the first task, the data generated in real time from the start-up of the design under test to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model are compared, including: comparing the data generated by the design under test continuing to execute the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model; the remaining data is the data generated by the first reference model after executing the first task and the output data corresponding to the first task calculated by the second reference model, other than the data compared with the data generated by the design under test from the start-up to the response to the first context storage instruction, and / or comparing the data calculated by the second reference model to generate context storage in the first state and the data generated by the design under test to perform context storage in response to the first context storage instruction.

[0175] In one possible implementation, the data generated when the design under test continues to perform the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model are compared, including any one of the following: if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model are more than the data generated when the design under test continues to perform the first task after completing the second task, then it is determined that the design under test has a data under-sent problem; if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model are less than the data generated when the design under test continues to perform the first task after completing the second task, then it is determined that the design under test has a data over-sent problem; if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model contain data that is different from the data generated when the design under test continues to perform the first task after completing the second task, then it is determined that the design under test has a data error problem. The specific description of this step can be referred to above Figure 4The relevant statement in step 409.

[0176] In a possible implementation, the comparison of the data generated by executing context storage in the first state calculated by the second reference model and the data generated by the context storage performed by the design under test in response to the first context storage instruction includes: if the data generated by executing context storage in the first state calculated by the second reference model is different from the data generated by the context storage performed by the design under test in response to the first context storage instruction, it is determined that the design under test has a data transmission error problem. The specific description of this step can be referred to above Figure 4 The relevant statement in step 406.

[0177] It should be noted that the above steps 701-706 are Figure 1 An implementation example of step 101 in step 707 is Figure 1 An implementation example of step 102 in FIG.

[0178] In the disclosed embodiment, the first reference model is controlled to start for the first time and complete the first task, and the data generated by the first reference model after the first task is completed is obtained; an excitation signal is sent to the second reference model so that the second reference model calculates the output data corresponding to the first task; the first reference model is paused after the first reference model completes the first task, the design under test is controlled to start, and the first context storage instruction is sent to the design under test during the process of the design under test executing the first task; the first state information is sent to the first reference model, and the first reference model is controlled to start again to execute the first task until the first reference model runs to the first state; after the design under test completes the first task, the first reference model is instructed to perform context storage and continue to run until the first task is completed. Then, at least one of the data generated in real time from the first start of the first reference model to the completion of the first task, the data generated in real time from the second start of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model is compared with the data generated in real time from the start of the design under test to the completion of the first task. In this way, the synchronization between the first reference model and the design under test is achieved, and the data generated by the first reference model and the data generated by the design under test both include the data generated by context storage in the same state, so that the data generated by the first reference model and the design under test at each stage can be automatically synchronized and compared to achieve complete verification of context switching. At the same time, through the synchronization of the design under test and the first reference model, the convergence of the verification project can be achieved quickly, and the verification efficiency can be improved. In addition, the output data corresponding to the first task obtained by controlling the second reference model to calculate the output data corresponding to the first task is less prone to errors and more stable, so as to use stable data to verify the correctness of the data generated by the first reference model, and to make effective supplementary comparisons on the phenomenon that the first reference model and the design under test are wrong together, so as to more easily discover deep vulnerabilities.

[0179] For example, it is assumed that the first reference model is cmodel and the second reference model is sv_misc_rm. Figure 8 A schematic diagram of context switching verification according to an embodiment of the present disclosure is shown; Figure 8As shown, the design under test DUT, the first reference model cmodel (the second layer represents the first startup of cmodel, and the first layer represents the restart of cmodel) and the second reference model sv_misc_rm run independently, wherein the active configuration (active BFM) is used to configure the instructions that DUT, sv_misc_rm, and cmodel need to run, such as the instructions for executing the first task, the context storage instructions, etc., wherein cmodel (the second layer) does not perform context switching (not happen context switch), cmodel (the first layer) performs context switching, and the passive configuration (Passive BFM) represents the passive response of DUT, sv_misc_rm, and cmodel to other functional modules when executing the above instructions. The Sync_info rtl2dv interface is configured in the DV environment, which is used for the DV environment to transmit the state information representing the state of the DUT when responding to the context storage instruction to sv_misc_rm, and further transmit the state information to cmodel (the first layer) through the sync_info dv2cmodel interface.

[0180] Specifically, during the test, first, the DV environment controls the cmodel to start normally, temporarily does not start the DUT, and obtains the fixed downstream data golden data (here named C_A) generated by executing the first task cached by the cmodel (second layer) (i.e., step 701). The sv_misc_rm model calculates the golden data that all downstream interfaces should output (i.e., the fixed downstream data output by executing the first task, excluding the additional data generated by the context storage operation) (i.e., step 702). Then, the DV environment starts the DUT simulation, at which time the re-simulation of cmodel is suspended, and the first context storage instruction is sent to the DUT at any time, and the second simulation of cmodel is not started at this time (i.e., step 703); when the DUT responds to the first context storage instruction, the DV environment obtains the status information indicating the state of the DUT when responding to the first context storage instruction (i.e., step 704); then, the DV environment sends the obtained status information to the cmodel, and starts the normal operation of the cmodel for the second time, and lets the cmodel (first layer) run to the state indicated by the status information (i.e., step 705), while the DUT is still running normally. If there are nested context storage operations later, the DV environment informs the cmodel (first layer) of the state of the DUT when executing each context storage operation in the above manner; if no new context storage operation occurs in the DUT later, the DV environment controls the cmodel (first layer) to perform the context storage operation, and continues to execute the remaining part of the first task (i.e., step 706), and obtains the golden data (named C_B here). After the above context storage operation is completed: the data generated by the DUT is compared with C_B in real time, and the golden data generated by the DUT and sv_misc_rm are compared with C_A in three ways; at the end of the context recovery operation: the data generated by the DUT is compared with C_B in real time and the normal three-way comparison is performed (i.e., step 707). In addition, in order to ensure the correct integrity of the verification context switch, it is also necessary to verify whether the goldendata (C_A) previously cached by cmodel is left. If so, it indicates that the DUT processing is wrong; similarly, it is verified whether the goldendata cached by sv_misc_rm is left. If so, it indicates that the DUT processing is wrong. In this way, the correctness of the verification result and the completeness of the verification can be better guaranteed through the three-way comparison.

[0181] It should be noted that the above Figure 1 , Figure 2 , Figure 4 , Figure 7A closed-loop verification solution for context switching at different levels is provided, which can be easily reused in different projects and iterative projects. In practical applications, the above-mentioned solutions at different levels can be selected according to factors such as demand, project progress and resource allocation, or can be further combined and expanded based on the ideas in the embodiments of the present disclosure.

[0182] Based on the same inventive concept of the above method embodiment, the embodiment of the present disclosure also provides a context switch verification device, which can be used to execute the technical solution described in the above method embodiment. Figure 1 , Figure 2 , Figure 4 or Figure 7 The steps of a context switch verification method shown in .

[0183] Fig. 9 A structural diagram of a context switching verification device according to an embodiment of the present disclosure is shown as follows: Fig. 9 As shown, the device may include: a data module 901, used to enable the design under test and the reference model to obtain data generated in at least one stage during the execution of the first task, wherein the first state information is used to control the operation of the reference model, and the first state information represents the first state of the design under test when responding to the first context storage instruction during the execution of the first task. A comparison module 902, used to verify the design under test by comparing the data generated by the design under test and the reference model in the at least one stage.

[0184] In the disclosed embodiment, the design under test is controlled to perform at least one context switch during the execution of the first task, and the first reference model is controlled to perform a corresponding context switch when the state indicated by the state information of the design under test at each context switch is reached; and the output result of the design under test is compared with the output result of the first reference model. Since the output result includes data generated when the design under test and the first reference model perform context switches in the same state, the data generated by each context switch can be automatically and synchronously compared to achieve complete verification of the context switch, that is, a complete and comprehensive verification of the context switch. At the same time, through the synchronization of the design under test and the first reference model, the convergence of the verification project can be quickly achieved, thereby improving the verification efficiency. In some examples, the output result can execute the data generated by the first task and the data generated by each context switch, thereby achieving complete and closed-loop verification coverage.

[0185] In a possible implementation, the data module 901 is also used to: control the startup of the design under test, and send the first context storage instruction to the design under test while the design under test is executing the first task; obtain the first state information; send the first state information to the first reference model, and control the first reference model to start executing the first task until the first reference model runs to the first state; after the design under test completes the first task, instruct the first reference model to perform context storage and continue running until the first task is completed; obtain the output result of the design under test and the output result of the first reference model.

[0186] In one possible implementation, the output result of the design under test includes: the data generated by the design under test when executing the first task, and the data generated by the design under test when performing context storage in response to the first context storage instruction; the output result of the first reference model includes: the data generated by the first reference model when executing the first task, and the data generated by the first reference model when performing context storage.

[0187] In a possible implementation, the data module 901 is further used to: control the first reference model to start and execute the first task, and obtain the first data generated by the first reference model after the first task is executed; control the design under test to start, and send the first context storage instruction to the design under test during the process of the design under test executing the first task; send an excitation signal to the second reference model so that the second reference model calculates the output data corresponding to the first task and the second task; wherein the second task is a new task switched as indicated by the first context storage instruction; obtain the first state information; send the first state information to the second reference model so that the second reference model calculates the data generated by executing the context storage in the first state; the comparison module 902 is further used to: compare the data generated by executing the context storage in the first state calculated by the second reference model and the data generated by the context storage performed by the design under test in response to the first context storage instruction; compare the first reference The test model controls the first data generated after the test design completes the first task, the output data corresponding to the first task calculated by the second reference model, and the second data generated by the test design from startup to response to the first context storage instruction, and obtains the remaining data corresponding to the first reference model and the remaining data corresponding to the second reference model, wherein the remaining data is data in the first data and the output data corresponding to the first task other than the data to be compared with the second data; after controlling the test design and the first reference model to complete the second task, compare the data generated by the test design after the second task is completed, the data generated by the first reference model after the second task is completed, and the output data corresponding to the second task calculated by the second reference model; after the test design completes the first task, compare the data generated by the test design continuing to execute the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model.

[0188] In a possible implementation, the data module 901 is further used to: control the first reference model to start up for the first time and complete the first task, and obtain data generated by the first reference model after the first reference model completes the first task; send an excitation signal to the second reference model so that the second reference model calculates output data corresponding to the first task; suspend the first reference model after the first reference model completes the first task, control the design under test to start up, and send the first context storage instruction to the design under test during the process of the design under test executing the first task; obtain the first state information; send the first state information to the first reference model, and control the first reference model to start up again to execute the first task until the first reference model runs to the first state; after the design under test completes the first task, instruct the first reference model to perform context storage and continue to run until the first task is completed; the comparison module 902 is further used to: compare at least one of the data generated in real time from the first start-up of the first reference model to the completion of the first task, the data generated in real time from the second start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model with the data generated in real time from the start-up of the design under test to the completion of the first task.

[0189] In one possible implementation, the comparison module 902 is further used to: after the first reference model is contextually stored, compare the data generated in real time from the start-up of the tested design to the completion of the first task with the data generated in real time from the re-start-up of the first reference model to the completion of the first task; compare the data generated in real time from the start-up of the tested design to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model.

[0190] In one possible implementation, the comparison module 902 is further used to: after the first reference model is restarted and the first task is completed, compare the data generated in real time from the start-up of the tested design to the completion of the first task with the data generated in real time from the start-up of the first reference model to the completion of the first task; compare the data generated in real time from the start-up of the tested design to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model.

[0191] In one possible implementation, the comparison module 902 is also used to: compare the data generated by the tested design when it continues to execute the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model; the remaining data is the data generated by the first reference model after executing the first task and the output data corresponding to the first task calculated by the second reference model, other than the data to be compared with the data generated by the tested design from startup to response to the first context storage instruction, and / or, compare the data calculated by the second reference model when executing context storage in the first state and the data generated by the tested design when responding to the first context storage instruction.

[0192] In one possible implementation, the comparison module 902 is also used for any one of the following: if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model is more than the data generated by the design under test continuing to perform the first task after completing the second task, it is determined that the design under test has a data under-sent problem; if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model is less than the data generated by the design under test continuing to perform the first task after completing the second task, it is determined that the design under test has a data over-sent problem; if the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model contains data that is different from the data generated by the design under test continuing to perform the first task after completing the second task, it is determined that the design under test has a data error problem.

[0193] In one possible implementation, the comparison module 902 is also used to: if the data generated by executing context storage in the first state calculated by the second reference model is different from the data generated by the context storage performed by the tested design in response to the first context storage instruction, it is determined that the tested design has a data error problem.

[0194] In one possible implementation, the second reference model calculates the output data corresponding to the first task or the second task, including: the second reference model calculates the number of data items output to the downstream module during the execution of the first task, the number of data items output to the downstream module during the execution of the second task, and the identifier corresponding to each piece of data.

[0195] In a possible implementation, the second reference model is configured as a hybrid of a reference model SVRM and a bus function model BFM.

[0196] In one possible implementation, the second reference model includes: a bottom layer, a middle layer and an upper layer, wherein the bottom layer stores configuration information for calculating output data corresponding to each task, data generated by the first reference model and data generated by the second reference model; the middle layer stores the corresponding identifier of each task; and the upper layer is used to instantiate the middle layer.

[0197] In one possible implementation, the data module 901 is also used to: send at least one second context storage instruction to the design under test when the design under test responds to the first context storage instruction and performs a second task, wherein the second task is a new task switched as indicated by the first context storage instruction; obtain second state information for each second context storage instruction, the second state information indicating a second state of the design under test when responding to the second context storage instruction; and send the second state information to the first reference model to instruct the first reference model to perform context storage and continue running until the first reference model runs to the second state.

[0198] Above Fig. 9 The technical effects and specific descriptions of the context switching verification device and various possible implementation methods thereof can be found in the above-mentioned context switching verification method, which will not be repeated here.

[0199] It should be understood that the division of the modules in the above device is only a division of logical functions, and in actual implementation, they can be fully or partially integrated into one physical entity, or they can be physically separated. In addition, the modules in the device can be implemented in the form of a processor calling software; for example, the device includes a processor, the processor is connected to a memory, and instructions are stored in the memory. The processor calls the instructions stored in the memory to implement any of the above methods or realize the functions of the modules of the device, wherein the processor is, for example, a general-purpose processor, such as a central processing unit (CPU) or a microprocessor, and the memory is a memory inside the device or a memory outside the device. Alternatively, the modules in the device can be implemented in the form of hardware circuits, and the functions of some or all modules can be realized by designing the hardware circuits. The hardware circuit can be understood as one or more processors; for example, in one implementation, the hardware circuit is an application-specific integrated circuit (ASIC), and the functions of some or all modules above are realized by designing the logical relationship of components in the circuit; for another example, in another implementation, the hardware circuit can be realized by a programmable logic device (PLD), taking a field programmable gate array (FPGA) as an example, which can include a large number of logic gate circuits, and the connection relationship between the logic gate circuits is configured by a configuration file, so as to realize the functions of some or all modules above. All modules of the above devices can be realized in the form of a processor calling software, or in the form of hardware circuits, or in part by a processor calling software, and the rest by hardware circuits.

[0200] In the embodiments of the present disclosure, the processor is a circuit with the ability to process signals. In one implementation, the processor may be a circuit with the ability to read and run instructions, such as a CPU, a microprocessor, a graphics processing unit (GPU), a digital signal processor (DSP), a neural-network processing unit (NPU), a tensor processing unit (TPU), etc.; in another implementation, the processor may implement certain functions through the logical relationship of a hardware circuit, and the logical relationship of the hardware circuit is fixed or reconfigurable, such as a hardware circuit implemented by an ASIC or PLD, such as an FPGA. In a reconfigurable hardware circuit, the process of the processor loading a configuration document to implement the hardware circuit configuration can be understood as the process of the processor loading instructions to implement the functions of some or all of the above modules.

[0201] It can be seen that each module in the above device can be one or more processors (or processing circuits) configured to implement the above embodiment method, such as: CPU, GPU, NPU, TPU, microprocessor, DSP, ASIC, FPGA, or a combination of at least two of these processor forms. In addition, each module in the above device can be fully or partially integrated together, or can be implemented independently, which is not limited.

[0202] The present disclosure also provides an electronic device, comprising: a processor; a memory for storing instructions executable by the processor; wherein the processor is configured to implement the method of the above embodiment when executing the instructions. Figure 1 , Figure 2 , Figure 4 or Figure 7 The steps of a context switch verification method shown in .

[0203] Fig.10 1 is a block diagram of an electronic device 1900 according to an embodiment of the present disclosure. For example, the electronic device 1900 may be provided as a server or a terminal device. Fig.10 , the electronic device 1900 includes a processing component 1922, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions executable by the processing component 1922, such as an application. The application stored in the memory 1932 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute instructions to perform the above Figure 1 , Figure 2, Figure 4 or Figure 7 A context switching verification method is shown in .

[0204] The electronic device 1900 may also include a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output interface 1958 (I / O interface). The electronic device 1900 may operate based on an operating system stored in the memory 1932, such as Windows Server 2000. TM , Mac OS X TM , Unix TM , Linux TM , FreeBSD TM or similar.

[0205] The embodiments of the present disclosure provide a computer-readable storage medium on which computer program instructions are stored. When the computer program instructions are executed by a processor, the method in the above embodiments is implemented. Figure 1 , Figure 2 , Figure 4 or Figure 7 The steps of a context switch verification method shown in .

[0206] The embodiments of the present disclosure provide a computer program product, which may include, for example, a computer-readable code or a non-volatile computer-readable storage medium carrying the computer-readable code; when the computer program product is run on a computer, the computer executes the method in the above embodiment. Figure 1 , Figure 2 , Figure 4 or Figure 7 The steps of a context switch verification method shown in .

[0207] The present disclosure may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0208] A computer-readable storage medium may be a tangible device that can hold and store instructions used by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the above. More specific examples (a non-exhaustive list) of computer-readable storage media include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination of the above. The computer-readable storage medium used herein is not to be interpreted as a transient signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted through a wire.

[0209] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0210] The computer program instructions for performing the operations of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer, partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect through the Internet). In some embodiments, by using the state information of the computer-readable program instructions to personalize an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), the electronic circuit may execute the computer-readable program instructions, thereby implementing various aspects of the present disclosure.

[0211] Various aspects of the present disclosure are described herein with reference to flowcharts and / or block diagrams of methods, devices (systems) and computer program products according to embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of boxes in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0212] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0213] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0214] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0215] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A context switching verification method, characterized in that: The method comprises: The design under test and the reference model are respectively enabled to obtain data generated in at least one stage during the execution of the first task, wherein the first state information is used to control the operation of the reference model so that the design under test and the reference model perform context switching in the same state; the first state information represents the first state of the design under test when responding to the first context storage instruction during the execution of the first task; the first state information includes: the time or node corresponding to the context storage operation performed by the design under test in response to the first context storage instruction; The design under test is verified by comparing data between the design under test and data generated by the reference model in the at least one stage.

2. The method according to claim 1, characterized in that The step of enabling the tested design and the reference model to respectively obtain data generated in at least one stage during the execution of the first task comprises: Controlling the design under test to start, and sending the first context storage instruction to the design under test during the process of the design under test executing the first task; Acquire the first status information; Sending the first state information to a first reference model, and controlling the first reference model to start executing the first task until the first reference model runs to the first state; After the design under test completes the first task, instructing the first reference model to perform context storage and continue to run until the first task is completed; The output result of the design under test and the output result of the first reference model are obtained.

3. The method according to claim 2, characterized in that The output result of the design under test includes: data generated by the design under test executing the first task, and data generated by the design under test performing context storage in response to the first context storage instruction; The output result of the first reference model includes: data generated by the first reference model executing the first task, and data generated by the first reference model performing context storage.

4. The method according to claim 1, characterized in that: The step of enabling the tested design and the reference model to respectively obtain data generated in at least one stage during the execution of the first task comprises: Controlling the first reference model to start and complete the execution of the first task, and obtaining first data generated by the first reference model after the first task is executed; Controlling the design under test to start, and sending the first context storage instruction to the design under test during the process of the design under test executing the first task; Sending an excitation signal to a second reference model so that the second reference model calculates output data corresponding to the first task and a second task; wherein the second task is a new task switched as indicated by the first context storage instruction; Acquire the first status information; sending the first state information to the second reference model so that the second reference model calculates data generated by executing context storage in the first state; The verifying the design under test by comparing the data generated by the design under test and the reference model in the at least one stage includes: Compare the data generated by executing context storage in the first state calculated by the second reference model and the data generated by the context storage performed by the design under test in response to the first context storage instruction; Compare the first data generated by the first reference model after executing the first task, the output data corresponding to the first task calculated by the second reference model, and the second data generated by the design under test from startup to responding to the first context storage instruction, and obtain the remaining data corresponding to the first reference model and the remaining data corresponding to the second reference model, wherein the remaining data is data in the first data and the output data corresponding to the first task other than the data to be compared with the second data; After controlling the design under test and the first reference model to complete the second task, comparing data generated by the design under test after the second task is completed, data generated by the first reference model after the second task is completed, and output data corresponding to the second task calculated by the second reference model; After the design under test completes the first task, compare the data generated when the design under test continues to perform the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model.

5. The method according to claim 1, characterized in that The step of enabling the tested design and the reference model to respectively obtain data generated in at least one stage during the execution of the first task comprises: Controlling the first reference model to start for the first time and complete the execution of the first task, and obtaining data generated by the first reference model after the first task is executed; Sending an excitation signal to a second reference model so that the second reference model calculates output data corresponding to the first task; After the first reference model completes executing the first task, the first reference model is paused, the design under test is controlled to start, and the first context storage instruction is sent to the design under test during the process of the design under test executing the first task; Acquire the first status information; sending the first state information to the first reference model, and controlling the first reference model to start executing the first task again until the first reference model runs to the first state; After the design under test completes the first task, instructing the first reference model to perform context storage and continue to run until the first task is completed; The verifying the design under test by comparing the data generated by the design under test and the reference model in the at least one stage includes: At least one of the data generated in real time from the first start-up of the first reference model to the completion of the first task, the data generated in real time from the second start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model is compared with the data generated in real time from the start-up of the tested design to the completion of the first task.

6. The method according to claim 5, characterized in that The comparing at least one of the data generated in real time during the process from the first start-up of the first reference model to the completion of the first task, the data generated in real time during the process from the second start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model with the data generated in real time during the process from the start-up of the design under test to the completion of the first task, includes: After the first reference model is contextually stored, comparing the data generated in real time from the start of the design under test to the completion of the first task with the data generated in real time from the re-start of the first reference model to the completion of the first task; Compare the data generated in real time from the start-up of the tested design to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model.

7. The method according to claim 5, characterized in that The comparing at least one of the data generated in real time during the process from the first start-up of the first reference model to the completion of the first task, the data generated in real time during the process from the second start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model with the data generated in real time during the process from the start-up of the design under test to the completion of the first task, includes: After the first reference model is started again and the first task is completed, comparing the data generated in real time during the process of the design under test from the start-up to the completion of the first task with the data generated in real time during the process of the first reference model being started again to the completion of the first task; Compare the data generated in real time from the start-up of the tested design to the completion of the first task, the data generated in real time from the first start-up of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model.

8. The method according to claim 7, characterized in that After the first reference model is started again and the first task is completed, comparing the data generated in real time from the start of the design under test to the completion of the first task, the data generated in real time from the first start of the first reference model to the completion of the first task, and the output data corresponding to the first task calculated by the second reference model, including: Compare the data generated when the design under test continues to execute the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model; the remaining data is the data generated by the first reference model after executing the first task and the output data corresponding to the first task calculated by the second reference model, other than the data compared with the data generated by the design under test from startup to response to the first context storage instruction, and / or, Compare the data generated by executing context storage in the first state calculated by the second reference model with the data generated by the context storage performed by the design under test in response to the first context storage instruction.

9. The method according to claim 4 or 8, characterized in that: Comparing the data generated by the design under test continuing to perform the first task after completing the second task, the remaining data corresponding to the first reference model, and the remaining data corresponding to the second reference model, including any one of the following: If the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model is greater than the data generated by the design under test continuing to perform the first task after completing the second task, it is determined that the design under test has a data shortage problem; If the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model is less than the data generated by the design under test continuing to perform the first task after completing the second task, it is determined that the design under test has a data multiple generation problem; If, in the remaining data corresponding to the first reference model and / or the remaining data corresponding to the second reference model, there is data that is different from the data generated when the design under test continues to execute the first task after completing the second task, it is determined that the design under test has a data error problem.

10. The method according to claim 4 or 8, characterized in that: The comparing the data generated by executing the context storage in the first state calculated by the second reference model and the data generated by the context storage performed by the design under test in response to the first context storage instruction includes: If the data generated by executing context storage in the first state calculated by the second reference model is different from the data generated by the tested design performing context storage in response to the first context storage instruction, it is determined that the tested design has a data error problem.

11. The method according to claim 4 or 5, characterized in that: The second reference model calculates the output data corresponding to the first task or the second task, including: the second reference model calculates the number of data output to the downstream module during the execution of the first task, the number of data output to the downstream module during the execution of the second task, and the identifier corresponding to each data.

12. The method according to claim 4 or 5, characterized in that: The second reference model is configured as a hybrid of a reference model SVRM and a bus functional model BFM.

13. The method according to claim 4 or 5, characterized in that The second reference model includes: a bottom layer, a middle layer and an upper layer, wherein the bottom layer stores configuration information for calculating output data corresponding to each task, data generated by the first reference model and data generated by the second reference model; the middle layer stores the corresponding identifier of each task; and the upper layer is used to instantiate the middle layer.

14. The method according to claim 2 or 5, characterized in that: The method further comprises: In the process of the design under test responding to the first context storage instruction and executing the second task, sending at least one second context storage instruction to the design under test, wherein the second task is a new task switched as indicated by the first context storage instruction; For each second context storage instruction, obtaining second state information, wherein the second state information indicates a second state of the design under test when responding to the second context storage instruction; The second state information is sent to the first reference model, instructing the first reference model to perform context storage and continue running until the first reference model runs to the second state.

15. A context switching verification device, characterized in that: The device comprises: A data module, used to enable the design under test and the reference model to respectively obtain data generated in at least one stage during the execution of the first task, wherein the first state information is used to control the operation of the reference model so that the design under test and the reference model perform context switching in the same state; the first state information represents the first state of the design under test when responding to the first context storage instruction during the execution of the first task; the first state information includes: the time or node corresponding to the context storage operation performed by the design under test in response to the first context storage instruction; The comparison module is used to verify the design under test by comparing the data between the design under test and the data generated by the reference model in the at least one stage.

16. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; Wherein, the processor is configured to implement the method described in any one of claims 1 to 14 when executing the instructions stored in the memory.

17. A non-volatile computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the method according to any one of claims 1 to 14 is implemented.

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