A driving circuit, control method, device, and medium for a hybrid device.

Abstract

This invention discloses a driving circuit, control method, device, and medium for hybrid devices, belonging to the field of semiconductor technology. The control method includes: acquiring the load current in real time; when the load current is lower than the maximum safe operating current of the SiC MOSFET device, controlling the first and fourth switches to remain off, and controlling the driving chip, the second switch, and the third switch to work together to enable the SiC MOSFET device to turn on before the Si IGBT device turns on and turn off after the Si IGBT device turns off, achieving zero-voltage turn-on and turn-off of the Si IGBT device; when the load current is higher than the maximum safe operating current of the SiC MOSFET device, controlling the second and third switches to remain off, and controlling the driving chip, the first switch, and the fourth switch to work together to enable the SiC MOSFET device to turn on before the Si IGBT device turns on and turn off after the Si IGBT device turns off, achieving zero-voltage turn-on and turn-off of the SiC MOSFET device, thereby reducing the complexity of the hybrid device driving circuit and improving the flexibility of the driving circuit.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a driving circuit based on a hybrid Si and SiC device, a control method, apparatus, and storage medium for the driving circuit based on a hybrid Si and SiC device. Background Technology

[0002] In existing technologies using silicon (Si) and silicon carbide (SiC) semiconductor materials, high-power Si-based devices, such as Si IGBTs, are connected in parallel with low-power SiC-based devices, such as SiC MOSFETs, to form Si / SiC hybrid devices. These hybrid devices, composed of high-power Si IGBTs and low-power SiC MOSFETs, combine the high current-carrying capacity of Si IGBTs with the low switching losses of SiC MOSFETs. By controlling the switching timing of the two devices, the high performance of SiC-based devices and the low cost advantages of Si-based devices are achieved.

[0003] The switching transient characteristics of hybrid devices are affected by their gate drive timing. To balance high efficiency and high reliability of hybrid devices, it is often necessary to flexibly change the switching mode of hybrid devices in different application scenarios. However, the current design idea of ​​hybrid device drive circuit is to achieve different switching modes of hybrid devices by delaying the timing of two independent control signals. This method requires two driver chips, which increases the complexity of the hybrid device drive circuit and results in poor flexibility of the drive circuit. Summary of the Invention

[0004] This invention provides a driving circuit and control method for hybrid devices. In a driving circuit based on Si IGBT devices and SiC MOSFET devices connected in parallel to form a Si / SiC hybrid device, the invention achieves the effect of reducing the complexity of the driving circuit and improving the flexibility of the driving circuit.

[0005] The present invention provides a driving circuit for a hybrid device, comprising: a driving chip, a first switch, a second switch, a third switch, a fourth switch, an RC delay circuit, a SiC MOSFET device, a gate resistor of the SiC MOSFET device, a Si IGBT device, and a gate resistor of the Si IGBT device;

[0006] The RC delay circuit includes a first RC delay circuit and a second RC delay circuit.

[0007] The output terminal of the driver chip is connected to the input terminals of the first switch and the second switch, respectively.

[0008] The output terminals of the third switch and the fourth switch are both connected to the output terminal of the driver chip;

[0009] The output terminal of the first switch is connected to the input terminal of the first RC delay circuit;

[0010] The output terminal of the first RC delay circuit is connected to the input terminal of the second RC delay circuit and one end of the gate resistor, respectively, and the other end of the gate resistor is connected to the gate of the SiC MOSFET device.

[0011] The output of the second RC delay circuit is connected to the input of the third switch;

[0012] The output terminal of the second switch is connected to the input terminal of the fourth switch and one end of the gate resistor, respectively.

[0013] The output terminal of the driver chip is connected to one end of the gate resistor, and the other end of the gate resistor is connected to the gate of the Si IGBT device;

[0014] The drain of the SiC MOSFET device is connected to the collector of the Si IGBT device, and the source of the SiC MOSFET device is connected to the emitter of the Si IGBT device.

[0015] Furthermore, one end of the first resistor serves as the input terminal of the first RC delay circuit, and the other end of the first resistor serves as the output terminal of the first RC delay circuit.

[0016] One end of the second resistor serves as the input terminal of the second RC delay circuit, and the other end of the second resistor serves as the output terminal of the second RC delay circuit.

[0017] The output terminal of the first switch is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the first capacitor and one end of the second resistor, and the other end of the first capacitor is grounded.

[0018] Furthermore, the driver chip outputs a high-voltage turn-on signal or a low-voltage turn-off signal;

[0019] The driver chip is a push-pull structure, a power amplifier with current limiting function, or a power amplifier circuit with current limiting function.

[0020] As a preferred embodiment, the driving circuit based on Si and SiC hybrid devices proposed in this invention employs a single control signal and a single driving chip, simplifying the traditional hybrid device driving circuit structure. It boasts advantages such as simple structure and low control complexity, effectively solving the problem of complex structure and high control cost caused by the need for two driving chips for switching in existing technologies. By selectively adding a delay branch to the SiC MOSFET driving circuit, this invention enables the hybrid device to approximately achieve both "Si IGBT zero-voltage switching" and "SiC MOSFET zero-voltage switching," providing two different switching modes for the hybrid device. This allows selection between two switching modes—high efficiency or high reliability—improving the flexibility of the hybrid device for complex engineering applications.

[0021] Accordingly, the present invention also provides a control method for a driving circuit of a hybrid device, applied to the above-mentioned driving circuit based on a Si and SiC hybrid device, the control method comprising:

[0022] The load current is acquired in real time; the load current is the sum of the drain-source current of the SiC MOSFET device and the collector-emitter current of the Si IGBT device.

[0023] When the load current is lower than the maximum safe operating current of the SiC MOSFET device, the first and fourth switches are kept off, and the driver chip, the second switch, and the third switch work together to enable the SiC MOSFET device to turn on before the SiIGBT device turns on and turn off after the SiIGBT device turns off, thereby achieving zero-voltage turn-on and turn-off of the SiIGBT device.

[0024] When the load current is higher than the maximum safe operating current of the SiC MOSFET device, the second and third switches are kept off, and the driver chip, the first switch, and the fourth switch work together to enable the SiC MOSFET device to turn on before the SiIGBT device turns on and turn off after the SiIGBT device turns off, thereby achieving zero-voltage turn-on or turn-off of the SiC MOSFET.

[0025] Furthermore, when the load current is lower than the maximum safe operating current of the SiC MOSFET device, the first and fourth switches are kept off, and the driver chip, the second switch, and the third switch are coordinated to ensure that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, including:

[0026] Keep the first and fourth switches off;

[0027] When the Si IGBT device requires zero-voltage turn-on, the control driver chip outputs a high-voltage turn-on signal. Simultaneously, it controls the second switch to turn on and the third switch to turn off, so that the SiC MOSFET device turns on when it receives the high-voltage turn-on signal through the second switch. The Si IGBT device also turns on when it receives the high-voltage turn-on signal through its gate resistor. Since the propagation delay and response speed of the Si IGBT device are slower than those of the SiC MOSFET device, the turn-on time of the Si IGBT device will be later than that of the SiC MOSFET device, thus achieving zero-voltage turn-on of the Si IGBT device.

[0028] Furthermore, when the load current is lower than the maximum safe operating current of the SiC MOSFET device, the first and fourth switches are kept off, and the driver chip, the second switch, and the third switch are coordinated to ensure that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off. This also includes:

[0029] Keep the first and fourth switches off;

[0030] When the Si IGBT device requires zero-voltage turn-off, the control driver chip outputs a low-voltage turn-off signal. Simultaneously, it controls the third switch to turn on and the second switch to turn off, so that the SiC MOSFET device turns off when it receives the low-voltage turn-off signal through the third switch and the second RC delay circuit. The Si IGBT device also turns off when it receives the low-voltage turn-off signal through its gate resistor. Due to the presence of the second RC delay circuit, the discharge rate of the gate parasitic capacitance of the SiC MOSFET device is slowed down, delaying the turn-off time of the SiC MOSFET device. This makes the turn-off time of the Si IGBT device earlier than that of the SiC MOSFET device, thereby achieving zero-voltage turn-off of the Si IGBT device.

[0031] Furthermore, when the load current exceeds the maximum safe operating current of the SiC MOSFET device, the second and third switches are kept off, and the driver chip, the first switch, and the fourth switch work together to enable the SiC MOSFET device to turn on before the Si IGBT device turns on and turn off after the Si IGBT device turns off, achieving zero-voltage turn-on or turn-off of the SiC MOSFET, including:

[0032] Keep the second and third switches off;

[0033] When the SiC MOSFET device requires zero-voltage turn-on, the control driver chip outputs a high-voltage turn-on signal to control the first switch to turn on and the fourth switch to turn off, so that the SiC MOSFET device turns on when it receives the high-voltage turn-on signal through the first switch and the first RC delay circuit; the Si IGBT device turns on when it receives the high-voltage turn-on signal through the gate resistor at the same time; due to the presence of the first RC delay circuit, the charging speed of the gate parasitic capacitance of the SiC MOSFET device is slowed down, delaying the turn-on time of the SiC MOSFET device, so that the turn-on time of the Si IGBT device is earlier than that of the SiC MOSFET device, thereby realizing zero-voltage turn-on of the SiC MOSFET device.

[0034] Furthermore, when the load current exceeds the maximum safe operating current of the SiC MOSFET device, the second and third switches are kept off, and the driver chip, the first switch, and the fourth switch work together to enable the SiC MOSFET device to turn on before the Si IGBT device turns on and turn off after the Si IGBT device turns off, achieving zero-voltage turn-on or turn-off of the SiC MOSFET. This also includes:

[0035] Keep the second and third switches off;

[0036] When the SiC MOSFET device requires zero-voltage turn-off, the control driver chip outputs a low-voltage turn-off signal to control the first switch to turn off and the fourth switch to turn on, so that the SiC MOSFET device turns off when it receives the low-voltage turn-off signal through the fourth switch; the Si IGBT device also turns off when it receives the low-voltage turn-off signal through its gate resistor. Since the propagation delay and response speed of the Si IGBT device are slower than those of the SiC MOSFET device, the turn-off time of the Si IGBT device will be later than that of the SiC MOSFET device, thereby achieving zero-voltage turn-off of the SiC MOSFET device.

[0037] As a preferred embodiment, the driving circuit based on Si and SiC hybrid devices proposed in this invention employs a single control signal and a single driving chip, simplifying the traditional hybrid device driving circuit structure. It boasts advantages such as simple structure and low control complexity, effectively solving the problem of complex structure and high control cost caused by the need for two driving chips for switching in existing technologies. This invention selectively adds a delay branch to the SiC MOSFET driving circuit, enabling the hybrid device to approximately achieve "Si IGBT zero-voltage switching" and "SiC MOSFET zero-voltage switching." This provides two different switching modes for the hybrid device, allowing selection between high-efficiency and high-reliability switching modes, improving the flexibility of the hybrid device for complex engineering applications. Furthermore, this invention effectively implements both "SiC MOSFET turn-on-then-off" and "SiIGBT turn-on-then-off" switching modes, with the delay time adjustable through the time constant in the driving circuit, offering even greater flexibility.

[0038] Accordingly, the present invention also provides a control device for a driving circuit of a hybrid device, applied to the above-mentioned driving circuit based on a Si and SiC hybrid device, the control device comprising: a data acquisition module, a first control module, and a second control module;

[0039] The acquisition module is used to acquire the load current in real time; the load current is the sum of the drain-source current of the SiC MOSFET device and the collector-emitter current of the Si IGBT device.

[0040] The first control module is used to control the first switch and the fourth switch to remain off when the load current is lower than the maximum safe operating current of the SiC MOSFET device, and to control the driver chip, the second switch and the third switch to work together so that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, thereby realizing zero-voltage turn-on or turn-off of the SiIGBT device.

[0041] The second control module is used to control the second and third switches to remain off when the load current is higher than the maximum safe operating current of the SiC MOSFET device, and to control the driver chip, the first switch and the fourth switch to work together so that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, thereby realizing zero-voltage turn-on or turn-off of the SiC MOSFET.

[0042] Accordingly, the present invention also provides a computer-readable storage medium comprising a stored computer program; wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium is located to perform a control method for a driving circuit of a hybrid device as described in the present invention. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the structure of one embodiment of the driving circuit for the hybrid device provided by the present invention;

[0044] Figure 2 This is a schematic diagram of another embodiment of the driving circuit for the hybrid device provided by the present invention;

[0045] Figure 3 This is a flowchart illustrating an embodiment of the control method for the driving circuit of the hybrid device provided by the present invention.

[0046] Figure 4 This is a schematic diagram of the turn-on circuit of the driving circuit of the hybrid device provided by the present invention in switch mode I.

[0047] Figure 5 This is a schematic diagram of the structure of the turn-off circuit of the driving circuit of the hybrid device provided by the present invention in switching mode I;

[0048] Figure 6 This is a waveform diagram of an embodiment of the switching voltage of SiC MOSFET and Si IGBT in switching mode I of the driving circuit of the hybrid device provided by the present invention.

[0049] Figure 7 This is a schematic diagram of the structure of an embodiment of the turn-on circuit of the driving circuit of the hybrid device provided by the present invention in switch mode II;

[0050] Figure 8 This is a schematic diagram of the structure of the turn-off circuit of the driving circuit of the hybrid device provided by the present invention in switch mode II.

[0051] Figure 9 This is a waveform diagram of an embodiment of the switching voltage of SiC MOSFET and Si IGBT in switching mode II of the driving circuit of the hybrid device provided by the present invention.

[0052] Figure 10 This is a schematic diagram of one embodiment of the simulation model of the driving circuit of the hybrid device provided by the present invention;

[0053] Figure 11 This is a waveform diagram of an embodiment of the ideal waveform of the SiC MOSFET and Si IGBT drive signals in switch mode I of the control method for the drive circuit of the hybrid device provided by the present invention.

[0054] Figure 12This is a waveform diagram of one embodiment of the simulated driving waveforms of SiC MOSFET and Si IGBT in switching mode I in the control method of the driving circuit of the hybrid device provided by the present invention.

[0055] Figure 13 This is a waveform diagram of one embodiment of the simulated driving waveforms of SiCMOSFET and Si IGBT in switch mode II in the control method of the driving circuit of the hybrid device provided by the present invention.

[0056] Figure 14 This is a waveform diagram of one embodiment of the simulated driving waveforms of SiCMOSFET and Si IGBT in switch mode II in the control method of the driving circuit of the hybrid device provided by the present invention.

[0057] Figure 15 This is a schematic diagram of the structure of a control device for the drive circuit of the hybrid device provided by the present invention. Detailed Implementation

[0058] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0059] Example 1

[0060] Please refer to Figure 1 The present invention provides a driving circuit for a hybrid device, comprising: a driving chip 101, a first switch 102, a second switch 103, a third switch 104, a fourth switch 105, an RC delay circuit 106, a SiC MOSFET device 107, a gate resistor of the SiC MOSFET device 108, a Si IGBT device 109, and a gate resistor of the Si IGBT device 110.

[0061] The RC delay circuit 106 includes a first RC delay circuit 1061 and a second RC delay circuit 1062.

[0062] The output terminal of the driver chip is connected to the input terminals of the first switch and the second switch, respectively.

[0063] The output terminals of the third switch and the fourth switch are both connected to the output terminal of the driver chip;

[0064] The output terminal of the first switch is connected to the input terminal of the first RC delay circuit;

[0065] The output terminal of the first RC delay circuit is connected to the input terminal of the second RC delay circuit and one end of the gate resistor, respectively, and the other end of the gate resistor is connected to the gate of the SiC MOSFET device.

[0066] The output of the second RC delay circuit is connected to the input of the third switch;

[0067] The output terminal of the second switch is connected to the input terminal of the fourth switch and one end of the gate resistor, respectively.

[0068] The output terminal of the driver chip is connected to one end of the gate resistor, and the other end of the gate resistor is connected to the gate of the Si IGBT device;

[0069] The drain of the SiC MOSFET device is connected to the collector of the Si IGBT device, and the source of the SiC MOSFET device is connected to the emitter of the Si IGBT device.

[0070] In this embodiment, due to the inherent characteristics of MOSFETs and IGBTs, there is a first parasitic capacitance between the gate and source of a SiC MOSFET device, a second parasitic capacitance between the gate and drain of a SiC MOSFET device, a third parasitic capacitance between the gate and collector of a Si IGBT device, and a fourth parasitic capacitance between the gate and emitter of a Si IGBT device.

[0071] Furthermore, the first RC delay circuit includes a first resistor and a first capacitor, and the second RC delay circuit includes a second resistor and a second capacitor;

[0072] Wherein, one end of the first resistor serves as the input terminal of the first RC delay circuit, and the other end of the first resistor serves as the output terminal of the first RC delay circuit;

[0073] One end of the second resistor serves as the input terminal of the second RC delay circuit, and the other end of the second resistor serves as the output terminal of the second RC delay circuit.

[0074] The output terminal of the first switch is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the first capacitor and one end of the second resistor respectively, and the other end of the first capacitor is grounded;

[0075] The other end of the second resistor is connected to one end of the second capacitor and the input terminal of the third switch, respectively; the other end of the second capacitor is grounded.

[0076] Furthermore, the driver chip outputs a high-voltage turn-on signal or a low-voltage turn-off signal;

[0077] The driver chip is a push-pull structure, a power amplifier with current limiting function, or a power amplifier circuit with current limiting function.

[0078] As a preferred implementation scheme, such as Figure 2 As shown, this embodiment provides a specific driving circuit for a hybrid device, including: a driving chip, anti-reverse diodes D1 to D4, a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, an RC delay circuit, a SiC MOSFET device, and a gate resistor R of the SiC MOSFET device. G_MOS The gate resistance R of Si IGBT devices and SiIGBT devices G_IGBT ;

[0079] The RC delay circuit includes a first RC delay circuit and a second RC delay circuit.

[0080] The output terminal of the driver chip is connected to the input terminals of the first switch S1 and the second switch S2, respectively.

[0081] The output terminals of the third switch S3 and the fourth switch S4 are both connected to the output terminal of the driver chip;

[0082] The output terminal of the first switch S1 is connected to the input terminal of the first RC delay circuit;

[0083] The output terminal of the first RC delay circuit is connected to the input terminal of the second RC delay circuit and the gate resistor R, respectively. G_MOS One end is connected to the gate resistor R. G_MOS The other end is connected to the gate of the SiC MOSFET device;

[0084] The output of the second RC delay circuit is connected to the input of the third switch S3;

[0085] The output terminal of the second switch is connected to the input terminal of the fourth switch S4 and the gate resistor R, respectively. G_MOS One end is connected;

[0086] The output terminal of the driver chip is connected to the gate resistor R. G_IGBT At one end, the gate resistor R G_IGBT The other end is connected to the gate of the Si IGBT device;

[0087] The drain of the SiC MOSFET device is connected to the collector of the Si IGBT device, and the source of the SiC MOSFET device is connected to the emitter of the Si IGBT device.

[0088] A first parasitic capacitance C exists between the gate and source of a SiC MOSFET device. GS_MOS A second parasitic capacitance C exists between the gate and drain of a SiC MOSFET device. GD_MOS ;

[0089] A third parasitic capacitance C exists between the gate and collector of a Si IGBT device. GC_IGBT A fourth parasitic capacitance C exists between the gate and emitter of a Si IGBT device. GC_IGBT .

[0090] In this embodiment, the first RC delay circuit includes a first resistor R1 and a first capacitor C1, and the second RC delay circuit includes a second resistor R2 and a second capacitor C2.

[0091] Wherein, one end of the first resistor R1 serves as the input terminal of the first RC delay circuit, and the other end of the first resistor R1 serves as the output terminal of the first RC delay circuit.

[0092] One end of the second resistor R2 serves as the input terminal of the second RC delay circuit, and the other end of the second resistor R2 serves as the output terminal of the second RC delay circuit.

[0093] The output terminal of the first switch S1 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to one end of the first capacitor C1 and one end of the second resistor R2, respectively. The other end of the first capacitor C1 is grounded.

[0094] The other end of the second resistor R2 is connected to one end of the second capacitor C2 and the input terminal of the third switch S3, respectively; the other end of the second capacitor C2 is grounded.

[0095] In this embodiment, the driver chip is a push-pull power amplifier, and the driver chip outputs a high-voltage high-level signal V. cc Or a negative voltage low-level signal V ee Its output is divided into two paths, the first of which passes through the gate resistor R of the Si IGBT device. G_IGBTThe first channel drives Si IGBT devices, and the second channel, after modulation, drives SiC MOSFET devices. S1-S4 are MOSFET switches; the drive signal for the hybrid device modulates the output of the second channel by controlling switches S1, S2, S3, and S4. D1-D4 are anti-reverse current diodes, used to ensure that the current direction of S1-S4 flows from the drain to the source. R1 and C1 form a pair of RC delay circuits; R2 and C2 form another pair of RC delay circuits, used to implement the gate drive delay of the SiC MOSFET. G_MOS It is the gate resistor of the SiC MOSFET, used to control the switching speed of the SiC MOSFET.

[0096] Implementing the embodiments of the present invention has the following effects:

[0097] The proposed driving circuit based on Si and SiC hybrid devices utilizes a single control signal and a single driving chip, simplifying the traditional hybrid device driving circuit structure. It offers advantages such as simple structure and low control complexity, effectively solving the problem of high control costs and complex structure caused by the need for two driving chips for switching in existing technologies. By selectively adding a delay branch to the SiC MOSFET driving circuit, this invention enables the hybrid device to approximately achieve both "Si IGBT zero-voltage switching" and "SiC MOSFET zero-voltage switching," providing two different switching modes for the hybrid device. This allows selection between two switching modes—one for high efficiency and one for high reliability—improving the flexibility of the hybrid device for complex engineering applications.

[0098] Example 2

[0099] Please refer to Figure 3 This invention provides a control method for a driving circuit of a hybrid device, applied to the driving circuit of the hybrid device as described in Embodiment 1, comprising steps S201-S203:

[0100] Step S201: Obtain the load current in real time; the load current is the sum of the drain-source current of the SiC MOSFET device and the collector-emitter current of the SiIGBT device;

[0101] In this embodiment, the multi-switching current of the hybrid device is determined according to the specific models of the Si IGBT and SiC MOSFET in the selected hybrid device. The maximum safe operating current in the SiC MOSFET datasheet is the switching current.

[0102] Step S202: When the load current is lower than the maximum safe operating current of the SiC MOSFET device, control the first switch and the fourth switch to remain off, and control the driver chip, the second switch and the third switch to work together to enable the SiC MOSFET device to be turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, thereby realizing zero-voltage turn-on and turn-off of the Si IGBT device.

[0103] Step S203: When the load current is higher than the maximum safe operating current of the SiC MOSFET device, control the second and third switches to remain off, and control the driver chip, the first switch and the fourth switch to work together to enable the SiC MOSFET device to be turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, thereby achieving zero-voltage turn-on or turn-off of the SiC MOSFET.

[0104] In this embodiment, when the load current is lower than the maximum safe operating current of the SiC MOSFET device, the first switch S1 and the fourth switch S4 are kept off, and the second switch S2 or the third switch S3 is turned on as needed. When the second switch S2 is turned on, the third switch S3 is turned off; when the third switch S3 is turned on, the second switch S2 is turned off.

[0105] The above two switching states implement switching mode I of the drive circuit based on Si and SiC hybrid devices. One switching state is: S1, S4, and S3 are off, and S2 is on, serving as the on state of switching mode I; the other switching state is: S1, S4, and S2 are off, and S3 is on, serving as the off state of switching mode I.

[0106] In this embodiment, in switch mode I, the turn-on voltage of S1, S2, S3 and S4 is 15V, and the turn-off voltage of S1, S2, S3 and S4 is -5V, controlled by a separate control circuit.

[0107] Furthermore, when the load current is lower than the maximum safe operating current of the SiC MOSFET device, the first and fourth switches are kept off, and the driver chip, the second switch, and the third switch are coordinated to ensure that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, including:

[0108] Keep the first and fourth switches off;

[0109] When the Si IGBT device requires zero-voltage turn-on, the control driver chip outputs a high-voltage turn-on signal. Simultaneously, it controls the second switch to turn on and the third switch to turn off, so that the SiC MOSFET device turns on when it receives the high-voltage turn-on signal through the second switch. The Si IGBT device also turns on when it receives the high-voltage turn-on signal through its gate resistor. Since the propagation delay and response speed of the Si IGBT device are slower than those of the SiC MOSFET device, the turn-on time of the Si IGBT device will be later than that of the SiC MOSFET device, thus achieving zero-voltage turn-on of the Si IGBT device.

[0110] In this embodiment, during the activation process of switch mode I: when the hybrid device drive signal is low level V... ee Switch to high level V cc High level (also represented as U) cc A low level can also be represented as U. ee The turn-on circuit of the drive circuit is as follows: Figure 4 As shown, the SiC MOSFET is connected sequentially through the output terminal of the driver chip, the second switch S2, and the gate resistor R of the SiC MOSFET device. G_MOS In the circuit leading to the gate of a SiC MOSFET device, the gate drive current in the SiC MOSFET flows through the gate resistor R. G_MOS Directly to the first parasitic capacitance C GS_MOS Charge until the SiC MOSFET gate voltage U is reached. GS_MOS Greater than the first turn-on voltage U TH_MOS At that time, the SiC MOSFET turns on;

[0111] Si IGBTs are connected sequentially from the output terminal of the driver chip and the gate resistor R of the Si IGBT device. G_IGBT In the circuit leading to the gate of the Si IGBT device, the gate drive current in the Si IGBT flows through the gate resistor R. G_IGBT Directly to the fourth parasitic capacitance C GE_IGBT Charge until the gate voltage U of the Si IGBT is reached. GE_IGBT Greater than the second turn-on voltage U TH_IGBT At that time, Si IGBTs were put into operation.

[0112] Furthermore, the step of controlling the first and fourth switches to remain off when the load current is lower than the maximum safe operating current of the SiC MOSFET device, and controlling the driver chip, the second switch, and the third switch to work together to enable the SiC MOSFET device to be turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, further includes:

[0113] Keep the first and fourth switches off;

[0114] When the Si IGBT device requires zero-voltage turn-off, the control driver chip outputs a low-voltage turn-off signal. Simultaneously, it controls the third switch to turn on and the second switch to turn off, so that the SiC MOSFET device turns off when it receives the low-voltage turn-off signal through the third switch and the second RC delay circuit. The Si IGBT device also turns off when it receives the low-voltage turn-off signal through its gate resistor. Due to the presence of the second RC delay circuit, the discharge rate of the gate parasitic capacitance of the SiC MOSFET device is slowed down, delaying the turn-off time of the SiC MOSFET device. This makes the turn-off time of the Si IGBT device earlier than that of the SiC MOSFET device, thereby achieving zero-voltage turn-off of the Si IGBT device.

[0115] During the shutdown process of Switch Mode I: When the hybrid device drive signal changes from a high level V... cc Switch to low level V ee At that time, the turn-off circuit of the drive circuit is as follows: Figure 5 As shown, in the branch where the SiC MOSFET is located, that is, sequentially from the output terminal of the driver chip, the third switch S3, the second RC delay circuit, and the gate resistor R of the SiC MOSFET device. G_MOS In the circuit leading to the gate of a SiC MOSFET device, the gate parasitic capacitance C in the SiC MOSFET... GS_MOS Through R1 and R G_MOS Discharge continues until the gate voltage U of the SiC MOSFET is reached. GS_MOS Below the first turn-on voltage U TH_MOS When this happens, the SiC MOSFET is turned off;

[0116] Starting from the output terminal of the driver chip, and then the gate resistor R of the Si IGBT device... G_IGBT In the circuit leading to the gate of the Si IGBT device, the gate drive current in the Si IGBT flows through the gate resistor R. G_IGBT Directly to the fourth parasitic capacitance C GE_IGBT Discharge continues until the gate voltage U of the Si IGBT is reached. GE_IGBT Below the second turn-on voltage U TH_IGBT At that time, the Si IGBT is turned off.

[0117] When the driving circuit is in switching mode I, the switching voltage U of the SiC MOSFET is... GMOS and the switching voltage U of the Si IGBT GIBGT like Figure 6 As shown, the vertical axis represents the voltage amplitude, and the horizontal axis represents time.

[0118] During the turn-on process in switch mode I, the Si IGBT turns on with the drive signal, as does the SiC MOSFET. The turn-on drive voltage delay time T for the SiC MOSFET and Si IGBT is... on_delay The voltage is 0, but since the turn-on speed of Si IGBT is slower than that of SiC MOSFET, SiC MOSFET bears most of the turn-on loss, and Si IGBT achieves near-zero voltage turn-on.

[0119] During the turn-off process in switching mode I, the Si IGBT is turned off with the drive signal, while the SiC MOSFET's drive signal is delayed by the second RC delay circuit, with a turn-off drive voltage delay time T. off_delay A value greater than 0 indicates zero-voltage switching of the Si IGBT, which reduces switching losses and improves the operating efficiency of the hybrid device.

[0120] In this embodiment, during the activation process of switch mode I:

[0121] In a SiC MOSFET, the gate drive current flows through R G_MOS Directly to parasitic capacitance C GS_MOS During charging, the expression for the charging current is:

[0122]

[0123] The gate voltage U of the SiC MOSFET GS_MOS for:

[0124]

[0125] In the formula, the time constant τ1=(C GS_MOS +C GD_MOS )·R G_MOS .

[0126] The charging time t of SiCMOSFET MOS for:

[0127]

[0128] In a Si IGBT, the gate drive current flows through the drive resistor R. G_IGBT Directly to parasitic capacitance C GC_IGBT With C GE_IGBT During charging, the expression for the charging current is:

[0129]

[0130] The gate voltage U of the Si IGBT GE_IGBT for:

[0131]

[0132] In the formula, the time constant τ2=(C GE_IGBT +C GC_IGBT )·R G_IGBT

[0133] Si IGBT charging time t IGBT for:

[0134]

[0135] During the shutdown process in switch mode I:

[0136] Gate parasitic capacitance C in SiC MOSFET GS_MOS Through R1 and R G_MOS Discharge occurs, and the expression for the discharge current is:

[0137]

[0138]

[0139] After Laplace transform, the gate voltage U of the SiC MOSFET during the turn-off process GS_MOS for:

[0140]

[0141] U is obtained by inverse Laplace transform GS_MOS (t):

[0142]

[0143] In the formula:

[0144]

[0145]

[0146]

[0147] Let U GS_MOS (t) equals the SiC MOSFET gate turn-on voltage U. TH_MOS Calculate the discharge time t of the SiC MOSFET. MOS2 :

[0148]

[0149] In a Si IGBT, the gate drive current passes through R... G_IGBT Directly to parasitic capacitance C GE_IGBT During discharge, the gate voltage of the Si IGBT is:

[0150]

[0151] In the formula, the time constant τ2=(C GE_IGBT +C GC_IGBT )·R G_IGBT ;

[0152] When the gate voltage of a Si IGBT is lower than the turn-on voltage U... TH_IGBT At that time, the Si IGBT is turned off, and the discharge time is t. IGBT2 for:

[0153]

[0154] In this embodiment, when the load current is higher than the maximum safe operating current of the SiC MOSFET device, the second switch S2 and the third switch S3 are kept off, and the first switch S1 or the fourth switch S4 is turned on as needed. When the first switch S1 is turned on, the fourth switch S4 is turned off; when the fourth switch S4 is turned on, the first switch S1 is turned off.

[0155] The above two switching states implement switching mode II of the drive circuit based on Si and SiC hybrid devices. One switching state is: S3, S4, and S2 are off, and S1 is on, serving as the on state of switching mode II; the other switching state is: S1, S2, and S3 are off, and S4 is on, serving as the off state of switching mode II.

[0156] In this embodiment, in switch mode II, the turn-on voltage of S1, S2, S3 and S4 is 15V, and the turn-off voltage of S1, S2, S3 and S4 is -5V, controlled by a separate control circuit.

[0157] Furthermore, when the load current exceeds the maximum safe operating current of the SiC MOSFET device, controlling the second and third switches to remain off, and controlling the driver chip, the first switch, and the fourth switch to work together to enable the SiC MOSFET device to turn on before the Si IGBT device turns on and turn off after the Si IGBT device turns off, thereby achieving zero-voltage turn-on or turn-off of the SiC MOSFET, includes:

[0158] Keep the second and third switches off;

[0159] When the SiC MOSFET device requires zero-voltage turn-on, the control driver chip outputs a high-voltage turn-on signal to control the first switch to turn on and the fourth switch to turn off, so that the SiC MOSFET device turns on when it receives the high-voltage turn-on signal through the first switch and the first RC delay circuit; the Si IGBT device turns on when it receives the high-voltage turn-on signal through the gate resistor at the same time; due to the presence of the first RC delay circuit, the charging speed of the gate parasitic capacitance of the SiC MOSFET device is slowed down, delaying the turn-on time of the SiC MOSFET device, so that the turn-on time of the Si IGBT device is earlier than that of the SiC MOSFET device, thereby realizing zero-voltage turn-on of the SiC MOSFET device.

[0160] In this embodiment, during the activation process of switch mode II: when the hybrid device drive signal is low level V ee Switch to high level V cc At that time, the turn-on circuit of the drive circuit is as follows: Figure 7 As shown, in the circuit sequentially running from the output terminal of the driver chip, through the gate resistor of the Si IGBT device, to the gate of the Si IGBT device, the gate drive current in the Si IGBT flows through the gate resistor R. G_IGBT Directly to parasitic capacitance C GE_IGBT Charge until the gate voltage of the Si IGBT is greater than the turn-on voltage U. TH_IGBT At that time, Si IGBTs began to be activated;

[0161] In the circuit that sequentially runs from the output of the driver chip, through the first switch, the first RC delay circuit, the gate resistor of the SiC MOSFET device, to the gate of the SiC MOSFET device, the gate current in the SiC MOSFET passes through R1 and R... G_MOS In the first RC delay circuit, C1 and parasitic capacitance C GS_MOS Charge until the gate voltage of the SiC MOSFET is greater than the turn-on voltage U. TH_MOS At that time, the parasitic capacitance C GS_MOS When the voltage exceeds the gate threshold voltage of the SiC MOSFET, the SiC MOSFET turns on.

[0162] Furthermore, when the load current exceeds the maximum safe operating current of the SiC MOSFET device, the second and third switches are kept off, and the driver chip, the first switch, and the fourth switch work together to enable the SiC MOSFET device to turn on before the Si IGBT device turns on and turn off after the Si IGBT device turns off, achieving zero-voltage turn-on or turn-off of the SiC MOSFET. This also includes:

[0163] Keep the second and third switches off;

[0164] When the SiC MOSFET device requires zero-voltage turn-off, the control driver chip outputs a low-voltage turn-off signal to control the first switch to turn off and the fourth switch to turn on, so that the SiC MOSFET device turns off when it receives the low-voltage turn-off signal through the fourth switch; the Si IGBT device also turns off when it receives the low-voltage turn-off signal through its gate resistor. Since the propagation delay and response speed of the Si IGBT device are slower than those of the SiC MOSFET device, the turn-off time of the Si IGBT device will be later than that of the SiC MOSFET device, thereby achieving zero-voltage turn-off of the SiC MOSFET device.

[0165] During the shutdown process of Switch Mode II: when the hybrid device drive signal changes from a high level V... cc Switch to low level V ee At that time, the turn-off circuit of the drive circuit is as follows: Figure 8 As shown, in the circuit sequentially from the output terminal of the driver chip, the gate resistor of the Si IGBT device, to the gate of the Si IGBT device, the parasitic capacitance C inside the Si IGBT is... GE_IGBT Through R G_IGBT Discharge until the gate voltage of the Si IGBT is lower than the turn-on voltage U. TH_IGBT When this happens, the Si IGBT is turned off;

[0166] In the circuit from the output of the driver chip, the fourth switch, the gate resistor of the SiC MOSFET device, to the gate of the SiC MOSFET device, the parasitic capacitance C within the SiC MOSFET is... GS_MOS Through R G_MOS Discharge until the parasitic capacitance C GS_MOS The voltage is lower than the turn-on voltage U of the SiC MOSFET. TH_MOS The SiC MOSFET is turned off.

[0167] When the drive circuit is in switching mode II, the switching voltage U of the SiC MOSFET is... GMOS and the switching voltage U of the Si IGBT GIBGT like Figure 9 As shown, the vertical axis represents the voltage amplitude, and the horizontal axis represents time.

[0168] During the turn-on process in switch mode II, the Si IGBT turns on with the drive signal, while the SiC MOSFET's drive signal is delayed by the first RC delay circuit. The turn-on drive voltage delay time T for the SiC MOSFET and Si IGBT is... on_delay A value greater than 0 indicates that zero-voltage turn-on of the SiC MOSFET is achieved.

[0169] During the turn-off process in Switching Mode II, the SiC MOSFET turns off with the drive signal, and the Si IGBT also turns off with the drive signal. The turn-off drive voltage delay time T off_delay The turn-off speed of Si IGBT is 0, but due to the material performance limitations of Si IGBT, the turn-off speed of Si IGBT is slower than that of SiC MOSFET. Therefore, Si IGBT bears most of the turn-off loss, while SiC MOSFET achieves near-zero voltage turn-off.

[0170] In this embodiment, during the activation process of switch mode II:

[0171] The gate voltage U of the Si IGBT GE_IGBT for:

[0172]

[0173] In the formula, the time constant τ2=(C GE_IGBT +C GC_IGBT )·R G_IGBT ;

[0174] When the gate voltage of a Si IGBT is greater than the turn-on voltage U... TH_IGBT At that time, the Si IGBT is activated, and the charging time is t. IGBT2 for:

[0175]

[0176] In a SiC MOSFET, the gate current flows through R1 and R2. G_MOS In the first RC delay circuit, C1 and parasitic capacitance C GS_MOS During charging, the expression for the charging current is:

[0177]

[0178]

[0179] U can be solved by Laplace transform. GS_MOS have to:

[0180]

[0181] U is obtained after inverse Laplace transform. GS_MOS (t), let U GS_MOS (t) equals the SiC MOSFET turn-on voltage U TH_MOS Calculate the charging time t of the SiC MOSFET. MOS3 .

[0182] During the shutdown process in Switch Mode II:

[0183] Si IGBT internal parasitic capacitance C GC_IGBT With C GE_IGBT Through R G_IGBT During discharge, the gate voltage of the Si IGBT is:

[0184]

[0185] In the formula, the time constant τ2=(C GE_IGBT +C GC_IGBT )·R G_IGBT ;

[0186] When the gate voltage of a Si IGBT is lower than the turn-on voltage U... TH_IGBT At that time, the Si IGBT is turned off, and the discharge time is t. IGBT4 for:

[0187]

[0188] SiC MOSFET internal parasitic capacitance C GS_MOS Through the gate drive resistor R G_MOS During discharge, the gate voltage of the SiC MOSFET is:

[0189]

[0190] In the formula, the time constant τ3=(C GS_MOS +C GD_MOS )·R G_MOS

[0191] Parasitic capacitance C GS_MOS The voltage is lower than the turn-on voltage U of the SiC MOSFET. TH_MOS SiC

[0192] MOSFET turn-off, discharge time t MOS4 for:

[0193]

[0194] To better illustrate this embodiment, the invention is further explained through the following experiments:

[0195] The more SiC MOSFETs connected in parallel in a hybrid switch, the lower its conduction and switching losses. However, due to the currently high price of SiC MOSFETs, lower power-rated SiC MOSFETs are typically used to limit the increased cost of hybrid devices caused by SiC devices. Therefore, the hybrid devices used in this embodiment include Si IGBT (IGW25N120H3, 1200V / 25A) and SiC MOSFET (C2M0160120D, 1200V / 12A), where the rated current ratio of SiC MOSFET to Si IGBT is approximately 1:2.

[0196] Based on the aforementioned hybrid device model, this embodiment built a relevant simulation model in LTspice software for simulation verification. The dual-pulse simulation test current was 10A, and the simulation test voltage U of the SiC MOSFET was... GMOS and simulation test current I MOS And the simulation test voltage U of Si IGBT GIGBT and simulation test current I IGBT The waveform is as follows Figure 10 As shown, the vertical axis represents the voltage amplitude, and the horizontal axis represents time. To simplify the analysis, this embodiment verifies the "switching mode I" and "switching mode II" of the designed drive circuit under a simulation test current of 10A.

[0197] (1) Switching mode I: Since the driving voltage of S2 and S3 in the simulation circuit is 15V and the driving voltage of S1 and S4 is -5V, the SiC MOSFET can approximately achieve "turn on first and then turn off", so the Si IGBT approximately achieves zero voltage switching.

[0198] In Mode I, the ideal waveforms of the drive signals for the SiC MOSFET and Si IGBT are as follows: Figure 11 As shown in the simulation waveform, under a test load current of 10A, the drive signals of the SiC MOSFET and Si IGBT simultaneously go high, T on_delay The value is 0, but since the switching speed of SiC MOSFET is greater than that of Si IGBT, T off_delay A value greater than 0 enables Si IGBTs to achieve near-zero voltage turn-on, reducing the switching losses of Si IGBT devices.

[0199] When the drive signal of the Si IGBT changes from high level to low level, the SiC MOSFET turns off after a preset RC delay time, realizing the zero-voltage turn-off of the Si IGBT.

[0200] Simulated voltage U of SiC MOSFET in Switching Mode I GMOS and simulated current IMOS And the simulated voltage U of Si IGBT GIGBT and simulated current I IGBT The simulated driving waveform is as follows Figure 12 As shown.

[0201] (2) Switching mode II: Since the driving voltage of S1 and S4 in the simulation circuit is 15V and the driving voltage of S2 and S3 is -5V, Si IGBT can approximately achieve "turn on first and then turn off", so SiC MOSFET approximately achieves zero voltage switching.

[0202] In Mode II, the simulated voltage U of SiC MOSFET and Si IGBT GMOS and simulated current I MOS And the simulated voltage U of Si IGBT GIGBT and simulated current I IGBT The driving waveform is as follows Figure 13 As shown. Under a test load current of 10A, the drive signals of both the SiCMOSFET and Si IGBT simultaneously go low, T off_delay The voltage is 0, but because the switching speed of SiC MOSFET is greater than that of Si IGBT, SiC MOSFET can achieve near-zero voltage turn-off. When the drive signal of Si IGBT changes from low to high, SiC MOSFET turns on after a preset RC delay time, T. on_delay A value greater than 0 enables zero-voltage turn-on of the SiC MSOFET.

[0203] Simulated voltage U of SiC MOSFET in Switching Mode II GMOS and simulated current I MOS And the simulated voltage U of Si IGBT GIGBT and simulated current I IGBT The simulated driving waveform is as follows Figure 14 As shown.

[0204] Implementing the embodiments of the present invention has the following effects:

[0205] The proposed driving circuit based on Si and SiC hybrid devices utilizes a single control signal and a single driving chip, simplifying the traditional hybrid device driving circuit structure. It offers advantages such as simple structure and low control complexity, effectively solving the problem of high control costs and complex structure caused by the need for two driving chips for switching in existing technologies. By selectively adding a delay branch to the SiC MOSFET driving circuit, this invention enables the hybrid device to approximately achieve both "Si IGBT zero-voltage switching" and "SiC MOSFET zero-voltage switching," providing two different switching modes for the hybrid device. This allows selection between high-efficiency and high-reliability switching modes, improving the flexibility of the hybrid device for complex engineering applications. Furthermore, this invention effectively implements both "SiC MOSFET turn-on-then-off" and "Si IGBT turn-on-then-off" switching modes, with the delay time adjustable via a time constant in the driving circuit, offering even greater flexibility.

[0206] Example 3

[0207] Please refer to Figure 15 This invention provides a control device for a driving circuit of a hybrid device, applied to the driving circuit based on a Si and SiC hybrid device described in Embodiment 1. The control device includes: a data acquisition module 301, a first control module 302, and a second control module 303.

[0208] The acquisition module is used to acquire the load current in real time; the load current is the sum of the drain-source current of the SiC MOSFET device and the collector-emitter current of the Si IGBT device.

[0209] The first control module is used to control the first switch and the fourth switch to remain off when the load current is lower than the maximum safe operating current of the SiC MOSFET device, and to control the driver chip, the second switch and the third switch to work together so that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, thereby realizing zero-voltage turn-on or turn-off of the SiIGBT device.

[0210] The second control module is used to control the second and third switches to remain off when the load current is higher than the maximum safe operating current of the SiC MOSFET device, and to control the driver chip, the first switch and the fourth switch to work together so that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, thereby realizing zero-voltage turn-on or turn-off of the SiC MOSFET.

[0211] The control device for the driving circuit of the hybrid device described above can implement the control method for the driving circuit of the hybrid device in the above method embodiments. The options in the above method embodiments are also applicable to this embodiment, and will not be detailed here. The remaining contents of this application embodiment can be referred to the contents of the above method embodiments, and will not be repeated in this embodiment.

[0212] Example 4

[0213] Accordingly, the present invention also provides a computer-readable storage medium comprising a stored computer program, wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium is located to perform the control method of the driving circuit based on the Si and SiC hybrid device as described in any of the above embodiments.

[0214] For example, the computer program may be divided into one or more modules / units, which are stored in the memory and executed by the processor to complete the present invention. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in the terminal device.

[0215] The terminal device may be a desktop computer, laptop, handheld computer, or cloud server, etc. The terminal device may include, but is not limited to, a processor and a memory.

[0216] The processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor. The processor is the control center of the terminal device, connecting all parts of the terminal device via various interfaces and lines.

[0217] The memory can be used to store the computer programs and / or modules. The processor implements various functions of the terminal device by running or executing the computer programs and / or modules stored in the memory and by calling data stored in the memory. The memory may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function, etc.; the data storage area may store data created based on the use of the mobile terminal, etc. In addition, the memory may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, RAM, plug-in hard disk, smart media card (SMC), secure digital card (SD), flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0218] Wherein, if the modules / units integrated in the terminal device are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc.

[0219] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention for those skilled in the art.

Claims

1. A driving circuit for a hybrid device, characterized in that, include: Driver chip, first switch, second switch, third switch, fourth switch, RC delay circuit, SiC MOSFET device, gate resistor of SiC MOSFET device, Si IGBT device and gate resistor of Si IGBT device; The RC delay circuit includes a first RC delay circuit and a second RC delay circuit. The output terminal of the driver chip is connected to the input terminals of the first switch and the second switch, respectively. The output terminals of the third switch and the fourth switch are both connected to the output terminal of the driver chip; The output terminal of the first switch is connected to the input terminal of the first RC delay circuit; The output terminal of the first RC delay circuit is connected to the input terminal of the second RC delay circuit and one end of the gate resistor, respectively, and the other end of the gate resistor is connected to the gate of the SiC MOSFET device. The output of the second RC delay circuit is connected to the input of the third switch; The output terminal of the second switch is connected to the input terminal of the fourth switch and one end of the gate resistor, respectively. The output terminal of the driver chip is connected to one end of the gate resistor, and the other end of the gate resistor is connected to the gate of the SiIGBT device. The drain of the SiC MOSFET device is connected to the collector of the Si IGBT device, and the source of the SiC MOSFET device is connected to the emitter of the Si IGBT device.

2. The driving circuit for a hybrid device as described in claim 1, characterized in that, The first RC delay circuit includes a first resistor and a first capacitor, and the second RC delay circuit includes a second resistor and a second capacitor; Wherein, one end of the first resistor serves as the input terminal of the first RC delay circuit, and the other end of the first resistor serves as the output terminal of the first RC delay circuit; One end of the second resistor serves as the input terminal of the second RC delay circuit, and the other end of the second resistor serves as the output terminal of the second RC delay circuit. The output terminal of the first switch is connected to one end of the first resistor, the other end of the first resistor is connected to one end of the first capacitor and one end of the second resistor, and the other end of the first capacitor is grounded.

3. The driving circuit for a hybrid device as described in claim 1, characterized in that: The driver chip outputs a high-voltage turn-on signal or a low-voltage turn-off signal. The driver chip is a push-pull structure, a power amplifier with current limiting function, or a power amplifier circuit with current limiting function.

4. A control method for a driving circuit of a hybrid device, characterized in that, The control method, applied to a drive circuit for a hybrid device as described in any one of claims 1-3, comprises: The load current is acquired in real time; the load current is the sum of the drain-source current of the SiC MOSFET device and the collector-emitter current of the Si IGBT device. When the load current is lower than the maximum safe operating current of the SiC MOSFET device, the first and fourth switches are kept off, and the driver chip, the second switch, and the third switch work together to enable the SiC MOSFET device to turn on before the SiIGBT device turns on and turn off after the SiIGBT device turns off, thereby achieving zero-voltage turn-on or turn-off of the SiIGBT device. When the load current is higher than the maximum safe operating current of the SiC MOSFET device, the second and third switches are kept off, and the driver chip, the first switch, and the fourth switch work together to enable the SiC MOSFET device to turn on before the SiIGBT device turns on and turn off after the SiIGBT device turns off, thereby achieving zero-voltage turn-on or turn-off of the SiC MOSFET device.

5. The control method for the driving circuit of a hybrid device as described in claim 4, characterized in that, When the load current is lower than the maximum safe operating current of the SiC MOSFET device, the first and fourth switches are kept off, and the driver chip, the second switch, and the third switch work together to ensure that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, including: Keep the first and fourth switches off; When the Si IGBT device requires zero-voltage turn-on, the control driver chip outputs a high-voltage turn-on signal. Simultaneously, it controls the second switch to turn on and the third switch to turn off, so that the SiC MOSFET device turns on when it receives the high-voltage turn-on signal through the second switch. The Si IGBT device also turns on when it receives the high-voltage turn-on signal through its gate resistor. Since the propagation delay and response speed of the Si IGBT device are slower than those of the SiC MOSFET device, the turn-on time of the Si IGBT device will be later than that of the SiC MOSFET device, thus achieving zero-voltage turn-on of the Si IGBT device.

6. The control method for the driving circuit of a hybrid device as described in claim 4, characterized in that, When the load current is lower than the maximum safe operating current of the SiC MOSFET device, the first and fourth switches are kept off, and the driver chip, the second switch, and the third switch work together to ensure that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off. The system also includes: Keep the first and fourth switches off; When the Si IGBT device requires zero-voltage turn-off, the control driver chip outputs a low-voltage turn-off signal. Simultaneously, it controls the third switch to turn on and the second switch to turn off, so that the SiC MOSFET device turns off when it receives the low-voltage turn-off signal through the third switch and the second RC delay circuit. The Si IGBT device also turns off when it receives the low-voltage turn-off signal through its gate resistor. Due to the presence of the second RC delay circuit, the discharge rate of the gate parasitic capacitance of the SiC MOSFET device is slowed down, delaying the turn-off time of the SiC MOSFET device. This makes the turn-off time of the Si IGBT device earlier than that of the SiC MOSFET device, thereby achieving zero-voltage turn-off of the Si IGBT device.

7. The control method for the driving circuit of a hybrid device as described in claim 4, characterized in that, When the load current exceeds the maximum safe operating current of the SiC MOSFET device, the second and third switches are kept off, and the driver chip, the first switch, and the fourth switch work together to enable the SiC MOSFET device to turn on before the Si IGBT device turns on and turn off after the Si IGBT device turns off, achieving zero-voltage turn-on or turn-off of the SiC MOSFET device, including: Keep the second and third switches off; When the SiC MOSFET device requires zero-voltage turn-on, the control driver chip outputs a high-voltage turn-on signal to control the first switch to turn on and the fourth switch to turn off, so that the SiC MOSFET device turns on when it receives the high-voltage turn-on signal through the first switch and the first RC delay circuit; the Si IGBT device turns on when it receives the high-voltage turn-on signal through the gate resistor at the same time; due to the presence of the first RC delay circuit, the charging speed of the gate parasitic capacitance of the SiC MOSFET device is slowed down, delaying the turn-on time of the SiC MOSFET device, so that the turn-on time of the Si IGBT device is earlier than that of the SiC MOSFET device, thereby realizing zero-voltage turn-on of the SiC MOSFET device.

8. The control method for the driving circuit of a hybrid device as described in claim 4, characterized in that, When the load current exceeds the maximum safe operating current of the SiC MOSFET device, the second and third switches are kept off, and the driver chip, the first switch, and the fourth switch work together to enable the SiC MOSFET device to turn on before the Si IGBT device turns on and turn off after the Si IGBT device turns off, achieving zero-voltage turn-on or turn-off of the SiC MOSFET device. The system also includes: Keep the second and third switches off; When the SiC MOSFET device needs to be turned off at zero voltage, the control driver chip outputs a low-voltage turn-off signal to turn off the first switch and turn on the fourth switch, so that the SiC MOSFET device turns off when it receives the low-voltage turn-off signal through the fourth switch; the Si IGBT device turns off when it receives the low-voltage turn-off signal through the gate resistor at the same time; since the propagation delay and response speed of the SiIGBT device are slower than those of the SiC MOSFET device, the turn-off time of the Si IGBT device will be later than that of the SiC MOSFET device, thereby achieving zero-voltage turn-off of the SiC MOSFET device.

9. A control device for a drive circuit of a hybrid device, characterized in that, The control device, applied to the driving circuit of the hybrid device as described in any one of claims 1-3, comprises: a data acquisition module, a first control module, and a second control module; The acquisition module is used to acquire the load current in real time; the load current is the sum of the drain-source current of the SiC MOSFET device and the collector-emitter current of the Si IGBT device. The first control module is used to control the first switch and the fourth switch to remain off when the load current is lower than the maximum safe operating current of the SiC MOSFET device, and to control the driver chip, the second switch and the third switch to work together so that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, thereby realizing zero-voltage turn-on or turn-off of the Si IGBT device. The second control module is used to control the second and third switches to remain off when the load current is higher than the maximum safe operating current of the SiC MOSFET device, and to control the driver chip, the first switch and the fourth switch to work together so that the SiC MOSFET device is turned on before the Si IGBT device is turned on and turned off after the Si IGBT device is turned off, thereby realizing zero-voltage turn-on or turn-off of the SiC MOSFET device.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored computer program; wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium is located to perform a control method for a drive circuit of a hybrid device as described in any one of claims 4 to 8.

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