Manufacturing method of a coreless substrate

Abstract

An embodiment of the present application relates to a manufacturing method of a coreless substrate, which includes providing a stack of a first separation core plate, a first prepreg, and a circuit layer. The first separation core plate includes a first core layer, a first inner copper foil, and a first outer copper foil that are sequentially laminated on the first core layer. The circuit layer is bonded to the first outer copper foil through the first prepreg; a second prepreg and a second separation core plate are laminated on the circuit layer. The second separation core plate includes a second core layer, a second inner copper foil, and a second outer copper foil that are sequentially laminated on the second core layer. The second outer copper foil is bonded to the second outer copper foil through the second prepreg; a first board separation is performed to separate the first inner copper foil and the first outer copper foil; and a second board separation is performed to separate the second inner copper foil and the second outer copper foil, obtaining a coreless substrate.

Description

Technical Field

[0001] This application relates to the technical field of circuit boards, and more particularly, to a method for manufacturing a coreless substrate. Background Art

[0002] In the existing method for manufacturing a coreless substrate, the obtained coreless substrate has a warpage problem, and the warpage of the coreless substrate will cause the subsequent process unable to produce or cause the coreless substrate to be damaged and scrapped. Summary of the Invention

[0003] An embodiment of this application provides a method for manufacturing a coreless substrate, and the method for manufacturing the coreless substrate includes:

[0004] Providing a stack of a first separation core board, a first prepreg, and a circuit layer, where the first separation core board includes a first core layer, a first inner copper foil, and a first outer copper foil that are sequentially stacked on the first core layer, and the circuit layer is bonded to the first outer copper foil through the first prepreg;

[0005] Pressing a second prepreg and a second separation core board on the circuit layer, where the second separation core board includes a second core layer, a second inner copper foil, and a second outer copper foil that are sequentially stacked on the second core layer, and the second outer copper foil is bonded to the second outer copper foil through the second prepreg;

[0006] Performing a first board separation to separate the first inner copper foil and the first outer copper foil; and

[0007] Performing a second board separation to separate the second inner copper foil and the second outer copper foil to obtain a coreless substrate; the coreless substrate includes the second outer copper foil, the second prepreg, the circuit layer, the first prepreg, and the first outer copper foil that are sequentially stacked.

[0008] In the manufacturing method of the coreless substrate according to the embodiments of the present application, the first outer copper foil of the first separation core plate and the second outer copper foil of the second separation core plate are both left in the subsequently obtained coreless substrate and used as the copper foil layer of the coreless substrate. Among them, the manufacturing method of the coreless substrate includes two board splitting processes. The first board splitting process separates the first inner copper foil of the first separation core plate from the first outer copper foil left in the subsequently obtained coreless substrate; the second board splitting process separates the second inner copper foil of the second separation core plate from the second outer copper foil left in the subsequently obtained coreless substrate. Specifically, by laminating the second separation core plate, the shrinkage force of the second prepreg can be inhibited, so as to fix the first prepreg and the second prepreg and balance the shrinkage forces of the first prepreg and the second prepreg, thereby enabling the coreless substrate obtained after board splitting to remain flat. In this way, the manufacturing method of the coreless substrate is beneficial to eliminating the phenomenon of uneven shrinkage force of the coreless substrate, and further beneficial to avoiding the warping problem of the coreless substrate caused by external force during board splitting and the problem that the subsequent process cannot be produced due to the warping of the coreless substrate or the coreless substrate is damaged and scrapped, so as to ensure the flatness and yield of the coreless substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 FIG. is a schematic structural diagram of a manufacturing method of a coreless substrate in the related art.

[0010] Figure 2 is Figure 1 a schematic diagram for analyzing the reason for the warping of the coreless substrate obtained in

[0011] Figure 3 FIG. is a flowchart of a manufacturing method of a coreless substrate according to an embodiment of the present application.

[0012] Figure 4 is Figure 3 a schematic structural diagram of step S1 in

[0013] Figure 5 is Figure 3 a schematic structural diagram of step S2 in

[0014] Figure 6 is Figure 3 a schematic structural diagram of step S3 in

[0015] Figure 7 is Figure 3 a schematic structural diagram of step S4 in

[0016] MAIN ELEMENT SYMBOL DESCRIPTION:

[0017] First separation core plate 10

[0018] First core layer 11

[0019] First surface 111

[0020] Second surface 112

[0021] First inner copper foil 12

[0022] First outer copper foil 13

[0023] First prepreg 20

[0024] Conductive layer 300

[0025] Circuit layers 30, 30’

[0026] Second prepreg 40

[0027] Second separator core board 50

[0028] Second core layer 51

[0029] Third surface 513

[0030] Fourth surface 514

[0031] Second inner copper foil 52

[0032] Second outer copper foil 53

[0033] Coreless substrates 100, 100’

[0034] Separator core board 10’

[0035] Core layer 11’

[0036] Inner copper foil 12’

[0037] Outer copper foil 13’

[0038] Inner prepreg 20’

[0039] Outer prepreg 40’

[0040] Copper foil layer for lamination 50’

[0041] Shrinking forces F1, F2

[0042] Restraining force F3

[0043] Warping directions D1, D2

[0044] Board separation positions P1, P2

[0045] Horizontal center line C

[0046] Steps S1, S2, S3, S4 Detailed implementation manners

[0047] Figure 1Schematic structural diagram of a manufacturing method of a coreless substrate in related art. As Figure 1 As shown in FIG. (a), the detachable core plate 10' includes a core layer 11', two inner copper foils 12' respectively located on opposite sides of the core layer 11', and two outer copper foils 13' respectively located on opposite sides of the core layer 11'. Each outer copper foil 13' is attached to the surface of a corresponding inner copper foil 12' away from the core layer 11'. Inner half-cured sheets 20' and circuit layers 30' are further provided on the surfaces of each outer copper foil 13' away from the core layer 11'.

[0048] As Figure 1 As shown in FIG. (b), through a lamination process, on opposite sides of the detachable core plate 10', an outer half-cured sheet 40' and a copper foil layer 50' for lamination are laminated to one side of a corresponding circuit layer 30' away from the inner half-cured sheet 20'.

[0049] As Figure 1 As shown in FIG. (c), through a board separation process, on opposite sides of the core layer 11', each inner copper foil 12' and the corresponding outer copper foil 13' are separated to obtain two coreless substrates 100'. Since the core layer 11' and the inner copper foils 12' of the detachable core plate 10' will be removed in the coreless substrate 100', the detachable core plate 10' is called a detachable core.

[0050] As Figure 1 As shown in FIG. (d), the coreless substrate 100' includes an outer copper foil 13', an inner half-cured sheet 20', a circuit layer 30', an outer half-cured sheet 40', and a copper foil layer 50' for lamination which are sequentially laminated. Since the coreless substrate 100' does not include a core layer, the coreless substrate 100' is called a coreless substrate.

[0051] Figure 1 In FIG. (d), the two ends of the coreless substrate 100' are warped in the same direction. Please refer to Figure 1 and Figure 2 , the inventors of the present application found that when implementing the present application, in the manufacturing method of the coreless substrate in related art, the main reason for the warping of the obtained coreless substrate 100' is that after the lamination process shown in FIG. (b), the outer half-cured sheet 40' is subjected to a contraction force F1. Due to the absence of other stress suppression, the contraction degree of the outer half-cured sheet 40' is large. The inner half-cured sheet 20' is subjected to a contraction force F2, and the inner half-cured sheet 20' is subjected to a restraining force F3 from the carrier plate 10'. In the board separation process shown in FIG. (c), in the regions adjacent to the board separation position P1 and the regions adjacent to the board separation position P2, the contraction force F1 is greater than the contraction force F2, and the inner half-cured sheet 20' is no longer restrained by the restraining force F3. Therefore, the two coreless substrates 100' obtained after board separation are respectively along Figure 1 As shown in FIG. (b), after the lamination process, the outer half-cured sheet 40' is subjected to a contraction force F1. Due to the absence of other stress suppression, the contraction degree of the outer half-cured sheet 40' is large. The inner half-cured sheet 20' is subjected to a contraction force F2, and the inner half-cured sheet 20' is subjected to a restraining force F3 from the carrier plate 10'. In the Figure 1 As shown in FIG. (c), in the board separation process, in the regions adjacent to the board separation position P1 and the regions adjacent to the board separation position P2, the contraction force F1 is greater than the contraction force F2, and the inner half-cured sheet 20' is no longer restrained by the restraining force F3. Therefore, the two coreless substrates 100' obtained after board separation are respectively along Figure 2Warp in the shown warping directions D1 and D2, i.e., warping presenting a smiling face trend.

[0052] In view of this, an embodiment of the present application provides a method for manufacturing a coreless substrate. The method for manufacturing the coreless substrate includes providing a stack of a first separation core board, a first prepreg, and a circuit layer. The first separation core board includes a first core layer, a first inner copper foil, and a first outer copper foil that are sequentially laminated on the first core layer. The circuit layer is bonded to the first outer copper foil through the first prepreg; a second prepreg and a second separation core board are laminated on the circuit layer. The second separation core board includes a second core layer, a second inner copper foil, and a second outer copper foil that are sequentially laminated on the second core layer. The second outer copper foil is bonded to the second outer copper foil through the second prepreg; a first board splitting is performed to separate the first inner copper foil and the first outer copper foil; and a second board splitting is performed to separate the second inner copper foil and the second outer copper foil, obtaining a coreless substrate. The coreless substrate includes the second outer copper foil, the second prepreg, the circuit layer, the first prepreg, and the first outer copper foil that are sequentially laminated.

[0053] In the method for manufacturing a coreless substrate according to the embodiment of the present application, the first outer copper foil of the first separation core board and the second outer copper foil of the second separation core board both remain in the coreless substrate obtained subsequently and are used as the copper foil layers of the coreless substrate. The method for manufacturing the coreless substrate includes two board splitting processes. The first board splitting process separates the first inner copper foil of the first separation core board from the first outer copper foil remaining in the coreless substrate obtained subsequently; the second board splitting process separates the second inner copper foil of the second separation core board from the second outer copper foil remaining in the coreless substrate obtained subsequently.

[0054] Specifically, by laminating the second separation core board, the shrinkage force of the second prepreg can be suppressed, achieving the purpose of fixing the first prepreg and the second prepreg and balancing the shrinkage forces of the first prepreg and the second prepreg, so that the coreless substrate obtained after board splitting can remain flat. Thus, the method for manufacturing the coreless substrate is beneficial to eliminating the phenomenon of uneven shrinkage force of the coreless substrate, and further beneficial to avoiding the warping problem of the coreless substrate caused by external force during board splitting and the problem that the coreless substrate cannot be produced or is damaged and scrapped due to warping in the subsequent process. That is, it is beneficial to ensure the flatness and yield of the obtained coreless substrate.

[0055] Next, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.

[0056] As Figure 3As shown, the manufacturing method of the coreless substrate according to an embodiment of the present application includes the following steps S1 to S4. According to different requirements, the order of some steps of the manufacturing method of the coreless substrate can be changed, and some steps can be omitted or combined.

[0057] Step S1: Provide a stack of a first separation core plate, a first prepreg, and a circuit layer.

[0058] In some embodiments, step S1 includes the following steps S11 to S13.

[0059] Step S11: Provide a first separation core plate.

[0060] As Figure 4 shown in FIG. (a), the first separation core plate 10 includes a first core layer 11, two first inner copper foils 12 respectively laminated on opposite sides of the first core layer 11, and two first outer copper foils 13 respectively laminated on opposite sides of the first core layer 11.

[0061] Specifically, the first core layer 11 includes opposite first surface 111 and second surface 112. A first inner copper foil 12 and a first outer copper foil 13 are sequentially laminated on the first surface 111 of the first core layer 11; a first inner copper foil 12 and a first outer copper foil 13 are also sequentially laminated on the second surface 112 of the first core layer 11. That is, in the thickness direction of the first separation core plate 10, the first outer copper foil 13, the first inner copper foil 12, the first core layer 11, another first inner copper foil 12, and another first outer copper foil 13 are sequentially laminated. The first outer copper foil 13 and the first inner copper foil 12 of the first separation core plate 10 are adhered together by pre-pressing, and the two can be separated by a panel cutting process later.

[0062] In some embodiments, the thickness of the first inner copper foil 12 is greater than the thickness of the first outer copper foil 13. Among them, the two first inner copper foils 12 and the first core layer 11 play a role of temporarily supporting and carrying the film layer located thereon, so the thickness of the first inner copper foil 12 can be set relatively thick. And the two first outer copper foils 13 are used to remain in the coreless substrate 100 (shown in Figure 7 ) later and are used as the conductive layer of the coreless substrate 100. To make the obtained coreless substrate thin and light, the thickness of the first outer copper foil 13 can be set relatively thin.

[0063] Specifically, the thickness of the first inner copper foil 12 is provided as 15 to 20 microns, and the thickness of the first outer copper foil 13 is provided as 2 to 5 microns. More specifically, the thickness of the first inner copper foil 12 is, for example, 18 microns, and the thickness of the first outer copper foil 13 is, for example, 3 microns, but not limited thereto.

[0064] Step S12: Press a first prepreg and a conductive layer on opposite sides of the first separation core board respectively.

[0065] As Figure 4 shown in Figure (b), a first prepreg 20 and a conductive layer 300 are respectively formed on opposite sides of the first separation core board 10. Each conductive layer 300 is pressed onto a corresponding first outer copper foil 13 through a corresponding first prepreg 20. Specifically, one conductive layer 300 is pressed onto the first outer copper foil 13 on one side of the first surface 111 of the first core layer 11 through a first prepreg 20, and the other conductive layer 300 is pressed onto the first outer copper foil 13 on one side of the second surface 112 of the first core layer 11 through another first prepreg 20.

[0066] The material of the first prepreg 20 includes, for example, resin and reinforcing material located within the resin. The reinforcing material is, for example, fiberglass cloth, but is not limited thereto. The material of the conductive layer 300 is, for example, copper foil, and the thickness is, for example, 3 microns to reduce the thickness of the subsequent obtained coreless substrate, but is not limited thereto.

[0067] Step S13: Pattern each conductive layer to obtain two circuit layers respectively located on opposite sides of the first core layer.

[0068] As Figure 4 shown in Figure (c), after each conductive layer 300 is patterned, a circuit layer 30 including a plurality of conductive circuits is formed. Each circuit layer 30 is bonded to a corresponding first outer copper foil 13 through a corresponding first prepreg 20. On opposite sides of the first core layer 11, a first inner copper foil 12, a first outer copper foil 13, a first prepreg 20, and a circuit layer 30 are sequentially stacked. Thus, a stack including the first separation core board 10, the first prepreg 20, and the circuit layer 30 is obtained, and along the thickness direction of the stack, the circuit layer 30, the first prepreg 20, the first outer copper foil 13, the first core layer 11, another first outer copper foil 13, another first prepreg 20, and another circuit layer 30 are sequentially stacked.

[0069] Specifically, the step of patterning each conductive layer 300 includes, for example, attaching a dry film, exposure, development, etching, removing the dry film, etc., but is not limited thereto.

[0070] In addition, the conductive layers 300 on both sides of the first separation core board 10 can be patterned simultaneously to simplify the manufacturing process; however, the conductive layers 300 on both sides of the first separation core board 10 can also be patterned separately.

[0071] Step S2: Press a second prepreg and a second separation core board on the circuit layer.

[0072] As Figure 5As shown, a second prepreg 40 and a second separating core board 50 are laminated on each of the circuit layers 30 on opposite sides of the first core layer 11. Each second separating core board 50 includes a second core layer 51, two second inner copper foils 52 respectively laminated on opposite sides of the second core layer 51, and two second outer copper foils 53 respectively laminated on opposite sides of the second core layer 51.

[0073] Specifically, each second core layer 51 includes opposite third surface 513 and fourth surface 514. A second inner copper foil 52 and a second outer copper foil 53 are sequentially laminated on the third surface 513 of each second core layer 51; a second inner copper foil 52 and a second outer copper foil 53 are also sequentially laminated on the fourth surface 514 of each second core layer 51. One second outer copper foil 53 of each second separating core board 50 is bonded to a corresponding circuit layer 30 through a second prepreg 40, and each circuit layer 30 on opposite sides of the first core layer 11 is embedded in a corresponding second prepreg 40.

[0074] After step S2, the order of each stack is: second separating core board 50, second prepreg 40, circuit layer 30, first prepreg 20, first separating core board 10, another first prepreg 20, another circuit layer 30, another second prepreg 40, and another second separating core board 50. That is, each stack is substantially symmetric about the horizontal center line C of the first core layer 11.

[0075] In addition, the first outer copper foil 13 and the first inner copper foil 12 of each second separating core board 50 are adhered together through pre-lamination, and the two can be separated through a panel cutting process subsequently.

[0076] In some embodiments, in the same lamination process, a second prepreg 40 and a second separating core board 50 are laminated on each of the circuit layers 30 on opposite sides of the first core layer 11. In this way, the process is simplified, the production efficiency is improved, and the stress balance of each film layer is also facilitated.

[0077] In some embodiments, the thickness of the second inner copper foil 52 is greater than the thickness of the second outer copper foil 53. Among them, the two second inner copper foils 52 and the second core layer 51 play a role of temporarily supporting and carrying the film layers located thereon. Therefore, the thickness of the second inner copper foil 52 can be set relatively thick; while the two second outer copper foils 53 are used to remain in the coreless substrate 100 (shown in Figure 7 ) and are used as the conductive layers of the coreless substrate 100. In order to make the obtained coreless substrate thin and light, the thickness of the second outer copper foil 53 can be set relatively thin.

[0078] Specifically, the thickness of the second inner-layer copper foil 52 is provided to be 15 to 20 micrometers, and the thickness of the second outer-layer copper foil 53 is provided to be 2 to 5 micrometers. More specifically, the thickness of the second inner-layer copper foil 52 is, for example, 18 micrometers, and the thickness of the second outer-layer copper foil 53 is, for example, 3 micrometers, but not limited thereto.

[0079] Step S3: The first board separation, separating the first inner-layer copper foil and the first outer-layer copper foil of the first separation core board.

[0080] As Figure 6 shown, in the first board separation process, on the side where the first surface 111 of the first core layer 11 is located, the first inner-layer copper foil 12 and the first outer-layer copper foil 13 of the first separation core board 10 are separated; on the side where the second surface 112 of the first core layer 11 is located, another first inner-layer copper foil 12 of the first separation core board 10 and the adjacent first outer-layer copper foil 13 are separated. That is, the first board separation separates the first inner-layer copper foils 12 and the first outer-layer copper foils 13 on the opposite sides of the first core layer 11. In this way, the first core layer 11 of the first separation core board 10 and the two first inner-layer copper foils 12 are removed, obtaining two laminates respectively composed of the second separation core board 50, the second prepreg 40, the circuit layer 30, the first prepreg 20, and the first outer-layer copper foil 13.

[0081] Specifically, the first board separation operation can be achieved by applying mechanical external force at the joint of the first inner-layer copper foil 12 and the first outer-layer copper foil 13, but not limited thereto.

[0082] Step S4: The second board separation, separating the second inner-layer copper foil and the second outer-layer copper foil of the second separation core board to obtain a coreless substrate.

[0083] As Figure 7 (a) As shown in the figure, in the second board separation process, on the side where the third surface 513 of each second core layer 51 is located, the second inner-layer copper foil 52 and the second outer-layer copper foil 53 of each second separation core board 50 are separated. In this way, the second core layer 51 of each second separation core board 50 and the two second inner-layer copper foils 52 are removed, obtaining two coreless substrates 100.

[0084] As Figure 7 (b) As shown in the figure, the coreless substrate 100 includes the first outer-layer copper foil 13, the first prepreg 20, the circuit layer 30, the second prepreg 40, and the second outer-layer copper foil 53 stacked in sequence. The circuit layer 30 is completely embedded in the second prepreg 40.

[0085] It can be understood that the second board separation operation can be achieved by applying mechanical external force at the joint of the second inner-layer copper foil 52 and the second outer-layer copper foil 53, but not limited thereto.

[0086] In addition, after obtaining the coreless substrate 100, the manufacturing method of the coreless substrate may further include other subsequent processes, such as patterning the first outer copper foil 13 and / or the second outer copper foil 53, setting a solder mask layer, etc., but not limited thereto.

[0087] In summary, in the manufacturing method of the coreless substrate according to the embodiment of the present application, by pressing the second separation core plate, the shrinkage force of the second prepreg can be suppressed, so that the coreless substrate obtained by final board separation is evenly stressed, has good flatness, and a high yield.

[0088] In addition, the first board separation can remove the first core layer of the first core plate and the two first inner copper foils to obtain a laminate including the first outer copper foil, the circuit layer, and the second separation core plate. The second board separation can remove the second core layer of the second core plate and the two second inner copper foils to obtain two coreless substrates without a core layer. Each coreless substrate includes a first outer copper foil, a circuit layer, a second outer copper foil, a first prepreg located between the first outer copper foil and the circuit layer, and a second prepreg located between the circuit layer and the second outer copper foil.

[0089] In the above manufacturing method of the coreless substrate, by performing processing on the opposite sides of the first core layer of the first separation core plate respectively to obtain two substantially identical coreless substrates, this way of double-sided simultaneous symmetric processing simplifies the process and improves the production efficiency.

[0090] It should be noted that the above takes the coreless substrate including three circuit layers (i.e., the first outer copper foil, the circuit layer, and the second outer copper foil) as an example for illustration, and the obtained coreless substrate is a coreless substrate with an asymmetric structure. In other embodiments, the laminate provided in step S1 may include more than two circuit layers, and adjacent circuit layers are spaced and electrically insulated by prepregs.

[0091] The above embodiments are only used to illustrate the technical solutions of the present application and not to limit them. Although the present application has been described in detail with reference to the above preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present application can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A manufacturing method of a coreless substrate, characterized in that, Comprising: Providing a stack of a first separating core board, a first prepreg, and a circuit layer, wherein the first separating core board includes a first core layer, a first inner copper foil, and a first outer copper foil that are sequentially stacked on the first core layer, and the circuit layer is bonded to the first outer copper foil through the first prepreg; Pressing a second prepreg and a second separating core board on the circuit layer, wherein the second separating core board includes a second core layer, a second inner copper foil, and a second outer copper foil that are sequentially stacked on the second core layer, and the second outer copper foil is bonded to the second outer copper foil through the second prepreg; Performing a first board separation to separate the first inner copper foil and the first outer copper foil; And Performing a second board separation to separate the second inner copper foil and the second outer copper foil, obtaining a coreless substrate; the coreless substrate includes the second outer copper foil, the second prepreg, the circuit layer, the first prepreg, and the first outer copper foil that are sequentially stacked.

2. The method for manufacturing a coreless substrate according to claim 1, wherein Providing the stack includes: forming on opposite sides of the first core layer the first inner copper foil, the first outer copper foil, the first prepreg, and the circuit layer that are sequentially stacked; Pressing the second prepreg and the second separating core board includes: pressing a second prepreg and a second separating core board on each of the circuit layers on opposite sides of the first core layer; The first board separation includes: separating both the first inner copper foil and the first outer copper foil located on opposite sides of the first core layer; The second board separation includes: separating both the second inner copper foil and the second outer copper foil of each second separating core board.

3. The manufacturing method of the coreless substrate according to claim 2, characterized in that, Providing the stack includes: Pressing a first prepreg and a conductive layer on opposite sides of the first separating core board respectively, the first separating core board includes two first inner copper foils respectively stacked on opposite sides of the first core layer and two first outer copper foils respectively stacked on opposite sides of the first core layer, and each conductive layer is pressed on a corresponding first outer copper foil through a corresponding first prepreg; and Patterning each conductive layer to obtain two circuit layers respectively located on opposite sides of the first core layer.

4. The manufacturing method of the coreless substrate according to claim 2, characterized in that, Pressing the second prepreg and the second separating core board includes, in the same pressing process, pressing a second prepreg and a second separating core board on each of the circuit layers on opposite sides of the first core layer.

5. The manufacturing method of the coreless substrate according to claim 2, characterized in that, Pressing the second prepreg and the second separating core board includes embedding each of the circuit layers on opposite sides of the first core layer into a corresponding second prepreg.

6. The manufacturing method of the coreless substrate according to claim 1, characterized in that, The first separating core board is provided such that the thickness of the first inner copper foil is greater than the thickness of the first outer copper foil.

7. The manufacturing method of the coreless substrate according to claim 6, characterized in that, The thickness of the first inner copper foil is provided to be 15 to 20 microns, and the thickness of the first outer copper foil is provided to be 2 to 5 microns.

8. The manufacturing method of the coreless substrate according to any one of claims 1 to 7, characterized in that, The second separation core board includes two of the second inner copper foils respectively laminated on opposite sides of the second core layer and two of the second outer copper foils respectively laminated on opposite sides of the second core layer.

9. The manufacturing method of the coreless substrate according to claim 8, wherein, The second separation core board is provided such that the thickness of the second inner copper foil is greater than the thickness of the second outer copper foil.

10. The manufacturing method of the coreless substrate according to claim 9, characterized in that, The thickness of the second inner copper foil is provided to be 15 to 20 micrometers, and the thickness of the second outer copper foil is provided to be 2 to 5 micrometers.

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