Gallium oxide device and method of manufacturing the same

Abstract

The application provides a gallium oxide device and a preparation method thereof, and the device comprises a Schottky device, an insulating high-thermal-conductivity layer and a heat dissipation substrate; the Schottky device comprises a substrate, an epitaxial layer, a dielectric layer, a Schottky contact metal layer, an ohmic contact metal layer and an electrode pin; the insulating high-thermal-conductivity layer is arranged on both sides of the electrode pin; and the heat dissipation substrate is connected with the electrode pin in the Schottky device through a soldering pad. The gallium oxide device provided by the application is covered with the insulating high-thermal-conductivity layer material on the electrode and the functional area of the device, and the device is connected on the packaging heat dissipation substrate in an inverted manner, and the external circuit is realized through the heat dissipation substrate. The heat dissipation capacity of the device is improved, the influence of temperature on the electron drift is reduced, the heat generated by the gallium oxide device is timely dissipated, the temperature of the device itself is reduced, and the voltage resistance performance, reliability and working stability of the gallium oxide device are improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor power device technology, and more specifically, to a gallium oxide device and its fabrication method. Background Technology

[0002] Gallium oxide (GaO), as one of the rapidly developing fourth-generation ultra-wide bandgap semiconductor materials in recent years, boasts a bandgap of 4.8–4.9 eV and a Baliga figure of merit of 3444, theoretically possessing extremely high breakdown field strength, giving it a significant advantage in power devices. Electronic devices such as Schottky diodes (SBDs) and MOSFETs made from GaO exhibit advantages such as high current handling, high voltage resistance, and high temperature resistance, and are currently a hot research topic.

[0003] However, gallium oxide (GaO) materials suffer from poor thermal conductivity. In currently fabricated GaO electronic devices, heat is mainly concentrated near the GaO material and electrodes, and traditional electronic devices do not effectively manage this heat. Under high voltage conditions, this heat accumulation severely affects device stability and reliability. Furthermore, current GaO epitaxial processes are not yet fully developed, highly doped homoepitaxial materials are expensive, and significant electron drift in the Schottky contact metal layer further contributes to low device performance and stability. Summary of the Invention

[0004] (a) Technical problems to be solved

[0005] This invention provides a gallium oxide device and a method for fabricating the same, which at least partially solves one of the above-mentioned technical problems.

[0006] (II) Technical Solution

[0007] One embodiment of the present invention provides a gallium oxide device, including: a Schottky device, an insulating high thermal conductivity stack, and a heat dissipation substrate; the Schottky device includes: a substrate, an epitaxial layer, a dielectric layer, a Schottky contact metal layer, an ohmic contact metal layer, and electrode leads; the insulating high thermal conductivity stack is disposed on both sides of the electrode leads; the heat dissipation substrate is connected to the electrode leads in the Schottky device through pads.

[0008] Optionally, the Schottky device includes: an epitaxial layer in contact with a first region of a substrate; an ohmic contact metal layer in contact with a second region of the substrate, wherein the second region is located on both sides of the first region and there is a gap between the second and the first region; a Schottky contact metal layer in contact with a portion of the surface of the epitaxial layer; and electrode leads in contact with portions of the ohmic contact metal layer and the Schottky contact metal layer.

[0009] Optionally, the substrate is a highly doped N-type gallium oxide substrate with a surface roughness of less than 100 nm, a thickness of 100–1000 μm, and a doping concentration of 1 × 10⁻⁶. 13 ~1×10 20 cm -3 .

[0010] Optionally, the epitaxial layer is a lightly doped N-type gallium oxide epitaxial layer with a thickness of 1–20 μm and a doping concentration of 1 × 10⁻⁶. 13 ~1×10 16 cm -3 .

[0011] Optionally, the material of the Schottky contact metal layer is one of Ni / Au, Ni / Al, or Pt / Au, and the thickness of the Schottky contact metal layer is 20–500 nm, and the width is 30–300 μm.

[0012] Optionally, the material of the insulating high thermal conductivity stack is a combination heat dissipation material or a stacked composite heat dissipation material composed of diamond, aluminum nitride, boron nitride, silicon carbide, thermally conductive resin and graphene; the thickness of the insulating high thermal conductivity stack is 100nm to 1mm, and the width of the insulating high thermal conductivity stack covers the operating range of the Schottky device.

[0013] Optionally, the electrode pins may be made of any one of the following materials: Ni / Au, Ni / Al, Ti / Al, Ti / Au, and Pt / Au.

[0014] Optionally, the heat dissipation substrate is made of any of the following materials: thick film ceramic substrate, low temperature co-fired multilayer ceramic, and thin film ceramic substrate. The heat dissipation substrate also includes a heat dissipation substrate anode and a heat dissipation substrate cathode, wherein the heat dissipation substrate anode and the scattering substrate cathode are respectively connected to the corresponding electrode pins through pads.

[0015] Another aspect of this invention provides a method for fabricating a gallium oxide device, comprising: fabricating a Schottky device, wherein the Schottky device includes a substrate, an epitaxial layer, a dielectric layer, a Schottky contact metal layer, an ohmic contact metal layer, and electrode leads; fabricating an insulating high thermal conductivity stack on both sides of the electrode leads; and connecting the electrode leads to a heat dissipation substrate via pads.

[0016] Optionally, fabricating a Schottky device includes: forming an epitaxial layer in a first region on a substrate surface; etching other regions on the substrate surface besides the first region to form steps; forming an ohmic contact metal layer in a second region on the etched substrate surface, wherein there is a gap between the ohmic contact metal layer and the epitaxial layer; forming a dielectric layer in other regions on the substrate surface and in a portion of the epitaxial layer surface; forming a Schottky contact metal layer in a region of the epitaxial layer not covered by the dielectric layer; and forming electrode leads in a portion of the ohmic contact metal layer and the Schottky contact layer.

[0017] (III) Beneficial Effects

[0018] The gallium oxide device and its fabrication method provided by this invention have at least the following beneficial effects:

[0019] The gallium oxide device provided by this invention has an insulating, highly thermally conductive multilayer material covering the electrodes and functional areas of the gallium oxide device. The device is connected to a heat dissipation substrate in a flip-chip manner, enabling external circuitry. The insulating, highly thermally conductive multilayer material covering the electrodes helps improve the device's heat dissipation capacity and reduces the impact of temperature on electron drift. The heat dissipation substrate connects the device's circuit pins and the insulating, highly thermally conductive multilayer material, allowing the heat generated by the gallium oxide device to be dissipated promptly, thereby reducing the device's temperature and further improving its withstand voltage performance, reliability, and operational stability. Attached Figure Description

[0020] Figure 1 A schematic diagram of a gallium oxide device provided in an embodiment of the present invention is shown.

[0021] Figure 2 The diagram schematically illustrates a top view of a heat dissipation substrate according to an embodiment of the present invention.

[0022] Figure 3 The diagram illustrates a method for fabricating a gallium oxide device according to an embodiment of the present invention.

[0023] Figure 4 The flowchart illustrating a gallium oxide device fabrication method in one embodiment of the present invention is shown in the schematic diagram.

[0024] Figure 5 A schematic diagram of a gallium oxide device provided in another embodiment of the present invention is shown.

[0025] Figure 6 A schematic diagram of the heat dissipation substrate in another embodiment of the present invention is shown.

[0026] Figure 7 The schematic diagram illustrates a method for fabricating a gallium oxide device according to another embodiment of the present invention;

[0027] Figure 8 A flowchart illustrating a method for fabricating a gallium oxide device according to another embodiment of the present invention is shown.

[0028] Figure label:

[0029] 1-Substrate; 2-Epipolar layer; 3-Dielectric layer; 4-Schottky contact metal layer; 5-Ohmic contact metal layer; 6-Insulating high thermal conductivity stack; 7-Electrode pin; 8-Pad; 9-Heat dissipation substrate; 10-Heat dissipation substrate anode; 101-First heat dissipation substrate anode; 102-Second heat dissipation substrate anode; 11-Cathode heat dissipation substrate cathode; 111-First heat dissipation substrate cathode; 112-Second heat dissipation substrate cathode; 113-Third heat dissipation substrate. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0031] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0032] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0033] In the description of this invention, it should be understood that the terms "longitudinal", "length", "circumferential", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the subsystem or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0034] Throughout the accompanying drawings, identical elements are represented by the same or similar reference numerals. Conventional structures or configurations may be omitted where they might cause confusion in understanding the invention. Furthermore, the shapes, sizes, and positional relationships of the components in the drawings do not reflect actual size, scale, or actual positional relationships. Additionally, any reference numerals placed between parentheses in the claims should not be construed as limiting the claims.

[0035] Similarly, to simplify the invention and aid in understanding one or more of the various disclosed aspects, in the above description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together into a single embodiment, figure, or description thereof. The use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicates that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0036] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0037] Figure 1 The diagram illustrates the structure of a gallium oxide device according to an embodiment of the present invention.

[0038] like Figure 1 As shown, a gallium oxide device provided in one embodiment of the present invention includes: a Schottky device, an insulating high thermal conductivity stack 6, and a heat dissipation substrate 9.

[0039] In some embodiments, a Schottky device includes: a substrate 1, an epitaxial layer 2, a dielectric layer 3, a Schottky contact metal layer 4, an ohmic contact metal layer 5, and an electrode pin 7.

[0040] In the specific implementation, substrate 1 is a highly N-doped gallium oxide substrate, used to provide overall structural support and electron transport channels. The highly N-doped gallium oxide substrate has a high carrier concentration and conductivity, which can effectively transport charge, reduce device resistance, and improve device efficiency. In this embodiment, the highly N-doped gallium oxide substrate has a surface roughness of less than 100 nm, a thickness of 100–1000 μm, and a doping concentration of 1 × 10⁻⁶. 13 ~1×10 20cm -3 .

[0041] The substrate 1 surface includes a first region, a second region and other regions. The first region is used to form an epitaxial layer 2 and the second region is used to form an ohmic contact metal layer 5.

[0042] In the specific implementation, epitaxial layer 2 is a lightly doped N-type gallium oxide epitaxial layer, which is in contact with the first region in substrate 1. The lightly doped N-type gallium oxide epitaxial layer is used to form the active region of the Schottky junction. The thickness of epitaxial layer 2 is 1–20 μm, and the doping concentration is 1 × 10⁻⁶. 13 ~1×10 16 cm -3 .

[0043] In practical implementation, dielectric layer 3 is used to isolate the electrical connection between different layers, preventing current leakage and charge drift. Dielectric layer 3 covers a portion of the epitaxial layer 3 and other areas of the substrate 1 except for the first and second regions. The material of dielectric layer 3 can be, for example, silicon oxide (SiO2), aluminum oxide (Al2O3), hafnium dioxide (HfO2), titanium dioxide (TiO2), zirconium dioxide (ZrO2), etc., and the thickness of dielectric layer 3 can be 10–200 nm.

[0044] In specific implementation, the ohmic contact metal layer 5 contacts the second region of the substrate 1 to provide current injection or current collection functions, effectively injecting or collecting electrons. In this embodiment, the ohmic contact metal layer is made of titanium / gold (i.e., Ti / Au), where Ti is the lower layer of the contact metal layer and gold is the upper layer with better conductivity to form a good ohmic contact with low contact resistance, effectively reducing energy loss and improving device efficiency and response speed. The thickness of the ohmic contact metal layer 5 should be greater than the thickness of the dielectric layer 3, and the thickness of the ohmic contact metal layer 5 can be 20–500 nm, with a width of 30–300 μm.

[0045] The second region includes a second region a and a second region b, which are located on opposite sides of the first region, symmetrically arranged along the centerline of the substrate 1, and have a gap with the first region of the substrate 1. Correspondingly, the ohmic contact metal layer 5 also includes ohmic contact metal layer a and ohmic contact metal layer b, located in the second region a and the second region b, respectively.

[0046] In the specific implementation process, the Schottky contact metal layer 4 contacts the area on the surface of the epitaxial layer 2 that is not covered by the dielectric layer 3, and is used to form the anode of the Schottky junction. The material of the Schottky contact metal layer 4 can be one of Ni / Au, Ni / Al, or Pt / Au, with a thickness of 20–500 nm and a width of 30–300 μm.

[0047] In specific implementation, electrode pin 7 includes a first electrode pin, a second electrode pin, and a third electrode pin. The first and second electrode pins are in contact with ohmic contact metal layer a and ohmic contact metal layer b, respectively, while the third electrode pin is in contact with a portion of the surface of Schottky contact metal layer 4. Electrode pin 7 provides electrical connection and fixed support for the device, and the material can be any one of Ni / Au, Ni / Al, Ti / Al, Ti / Au, and Pt / Au.

[0048] In some embodiments, an insulating high thermal conductivity stack 6 is disposed on both sides of the electrode pins 7, covering the operating range of the Schottky device. The insulating high thermal conductivity stack can be a single crystal material, powder, combined heat dissipation material, or stacked composite heat dissipation material such as diamond, aluminum nitride (AlN), boron nitride (BN), silicon carbide (SiC), thermally conductive resin, and graphene, with a thickness of 100 nm-1 mm. The insulating high thermal conductivity stack 6 forms a heterojunction barrier in contact with the metal electrode. The insulating high thermal conductivity stack 6 is an insulating material, effectively isolating current paths between different parts and preventing unnecessary leakage current in the device. The insulating material has high resistance, effectively blocking electron drift and reducing the free movement of electrons in the device, thereby reducing leakage current. Furthermore, the insulating material typically has high resistance and low carrier concentration, reducing thermal excitation effects and decreasing carrier generation in the device, thus reducing leakage current. The thermal conductivity of the high thermal conductivity insulating layer also helps to quickly dissipate heat generated inside the device, reducing thermal excitation effects.

[0049] In some embodiments, the heat dissipation substrate 9 is used to dissipate the heat generated by the gallium oxide device in a timely manner. After the Schottky device and the insulating high thermal conductivity stack 6 are fabricated, they are flip-chip connected to the heat dissipation substrate, and the external circuit is realized through the heat dissipation substrate.

[0050] In the specific implementation process, the material of the heat dissipation substrate 9 is any one of the following: thick film ceramic substrate, low temperature co-fired multilayer ceramic, and thin film ceramic substrate.

[0051] This invention, through the fabrication of an insulating, highly thermally conductive multilayer material on the electrodes and the adoption of a flip-chip structure, allows for significant dissipation of Joule heat generated at the electrodes, improving device stability and effectively enhancing the operating voltage and output power of the gallium oxide device. Furthermore, integrating the insulating, highly thermally conductive multilayer with the electrode leads further facilitates heat dissipation and package integration.

[0052] Figure 2 The diagram illustrates a top view of a heat dissipation substrate according to an embodiment of the present invention.

[0053] like Figure 2 As shown, the heat dissipation substrate also includes a heat dissipation substrate anode 10 and a heat dissipation substrate cathode 11.

[0054] The heat dissipation substrate anode 10 includes a first heat dissipation substrate anode 101 and a second heat dissipation substrate anode 102. The heat dissipation substrate cathode 11 includes a first heat dissipation substrate cathode 111, a second heat dissipation substrate cathode 112, and a third heat dissipation substrate cathode 113. The first heat dissipation substrate anode 101 is connected to the second heat dissipation substrate anode 102, and the first heat dissipation substrate cathode 111, the second heat dissipation substrate cathode 112, and the third heat dissipation substrate cathode 113 are connected.

[0055] The first heat dissipation substrate cathode 111 and the second scattering substrate cathode 112 are connected to the first electrode pin and the second electrode pin, respectively, and the first heat dissipation substrate anode 101 is connected to the third electrode pin. The connection between the scattering substrate and the electrode pin is achieved based on the pad 8.

[0056] The gallium oxide device provided in this invention covers the electrodes and functional areas of the gallium oxide device with an insulating heat-dissipating layer or an insulating high thermal conductivity stacked material, and is connected to a packaging heat-dissipating substrate in a flip-chip manner, thereby realizing external circuitry through the heat-dissipating substrate. The electrodes are covered with an insulating high thermal conductivity stacked material, which helps to improve the heat dissipation capacity of the device and reduce the influence of temperature on electron drift. The heat-dissipating substrate connects the circuit pins of the device and the insulating high thermal conductivity stacked material, allowing the heat generated by the gallium oxide device to be dissipated in a timely manner, thereby reducing the device's own temperature and further improving the withstand voltage performance, reliability, and operational stability of the gallium oxide device.

[0057] Figure 3 The diagram illustrates a method for fabricating a gallium oxide device according to an embodiment of the present invention.

[0058] Figure 4 The flowchart illustrating a method for fabricating a gallium oxide device according to an embodiment of the present invention is shown.

[0059] like Figure 3 , Figure 4 As shown, the gallium oxide device fabrication method in this embodiment includes operations S110 to S130.

[0060] In operation S110, a Schottky device is fabricated, wherein the Schottky device includes a substrate 1, an epitaxial layer 2, a dielectric layer 3, a Schottky contact metal layer 4, an ohmic contact metal layer 5, and electrode leads 7.

[0061] In some embodiments, the fabrication process of a Schottky device includes: forming an epitaxial layer on the surface of a substrate 1; etching the epitaxial layer and the substrate 1 to form steps and obtain an epitaxial layer 2; forming a dielectric layer 3 in other regions of the etched substrate surface except for the second region and in a portion of the surface of the epitaxial layer 22; depositing metal in the second region to form an ohmic contact metal layer 5, wherein there is a gap between the ohmic contact metal layer and the epitaxial layer 2; depositing metal in the region of the epitaxial layer 2 not covered by the dielectric layer 3 to form a Schottky contact metal layer 4; and forming electrode pins 7 in the ohmic contact metal layer 5 and a portion of the Schottky contact metal layer.

[0062] In the specific implementation process, substrate 1 is a highly N-doped gallium oxide substrate. After substrate 1 is formed, it needs to be immersed in acetone, ethanol and deionized water for ultrasonic cleaning for 5 to 15 minutes each, at a temperature of 50 to 70°C.

[0063] Epitaxial layer 2 is a lightly doped N-type gallium oxide epitaxial layer. The growth method of epitaxial layer 2 can be one or more of the following: halide vapor phase epitaxy (HVPE), molecular beam deposition (MBE), magnetron sputtering, metal-organic vapor deposition (MOCVD), mist-chemical vapor deposition (mist-CVD), and low-pressure chemical vapor deposition (LPCVD).

[0064] Etching the epitaxial layer and substrate 1 to form steps and obtain epitaxial layer 2 includes: coating the surface of the lightly doped N-type gallium oxide epitaxial layer with photoresist and electron beam resist, and exposing it using one or more of photolithography and / or electron beam exposure. After exposure, etching is performed, followed by cleaning to remove the resist and form steps. The etching process may employ one or more of ICP, wet etching, and laser ablation.

[0065] The ohmic contact layer and the Schottky contact layer are prepared using one or more processes such as thermal evaporation, magnetron sputtering, and electron beam evaporation. The ohmic contact layer and the substrate 1 surface are made into ohmic contact using rapid thermal annealing at a temperature of 400–500°C. The Schottky contact layer and the epitaxial layer 2 surface are made into Schottky contact using rapid thermal annealing at a temperature of 400–500°C. The electrode leads 7 are prepared by metal vapor deposition.

[0066] In operation S120, an insulating, highly thermally conductive stack 6 is prepared on both sides of the electrode pin 7.

[0067] In some embodiments, the insulating high thermal conductivity stack can be prepared by one or more of the following methods: spin coating, inkjet printing, smearing, electroplating, halide vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), magnetron sputtering, metal-organic vapor deposition (MOCVD), and low-pressure chemical vapor deposition (LPCVD).

[0068] In operation S130, electrode pin 7 is connected to heat sink substrate 9 via solder pads.

[0069] In some embodiments, the device prepared by operations S110 to S120 is connected to the heat dissipation substrate 9 via pads 8. The heat dissipation substrate further includes a heat dissipation substrate anode 10 and a heat dissipation substrate cathode 11. The heat dissipation substrate anode 10 includes a first heat dissipation substrate anode 101 and a second heat dissipation substrate anode 102. The heat dissipation substrate cathode 11 includes a first heat dissipation substrate cathode 111, a second heat dissipation substrate cathode 112, and a third heat dissipation substrate cathode 113. The first heat dissipation substrate cathode 111 and the second scattering substrate cathode 112 are connected to a first electrode pin and a second electrode pin, respectively, and the first heat dissipation substrate anode 101 is connected to a third electrode pin. The heat dissipation substrate anode 102 and the heat dissipation substrate cathode 113 are the packaged electrode pins. In the gallium oxide device provided by this invention, heat is mainly concentrated on the Schottky contact metal side. The flip-chip structure connects the Schottky contact metal side to the heat dissipation substrate, maximizing heat transfer to the heat dissipation substrate through the insulating high thermal conductivity stack 6, thus ensuring the thermal stability of the device.

[0070] Figure 5 A schematic diagram of a gallium oxide device provided in another embodiment of the present invention is shown.

[0071] like Figure 5 As shown, another embodiment of the present invention provides a gallium oxide device including: a Schottky device, an insulating high thermal conductivity stack 6, and a heat dissipation substrate 9.

[0072] In some embodiments, the Schottky device comprises, from top to bottom: an ohmic contact metal layer 3, a highly doped N-type gallium oxide substrate 1, a lightly doped N-type gallium oxide epitaxial layer 2, a dielectric layer 4, a Schottky contact metal layer 5, and an electrode pin 7.

[0073] In this design, substrate 1 is a highly N-doped gallium oxide substrate, and epitaxial layer 2 is a lightly N-doped gallium oxide epitaxial layer. Substrate 2 is stepped, and a dielectric layer covers a portion of substrate 2. The Schottky contact metal layer contacts the area of ​​substrate 2 not covered by the dielectric layer and a portion of the dielectric layer. Electrode pin 7 is in contact with a portion of the surface of the Schottky contact metal layer.

[0074] In some embodiments, an insulating, highly thermally conductive stack is located on both sides of the electrode pin 7, covering the operating range of the Schottky device.

[0075] Figure 6 The diagram illustrates the structure of a heat dissipation substrate according to another embodiment of the present invention.

[0076] like Figure 6As shown, the heat dissipation substrate 9 includes a first heat dissipation substrate anode 101 and a second heat dissipation substrate anode 102. The first heat dissipation substrate anode 101 is connected to the electrode pin 7 via a pad 8, serving as the anode contact point for the flip-chip device. The second heat dissipation substrate anode 102 serves as the external package anode.

[0077] Figure 7 The diagram illustrates a method for fabricating a gallium oxide device according to another embodiment of the present invention.

[0078] Figure 8 A flowchart illustrating a method for fabricating a gallium oxide device according to another embodiment of the present invention is shown.

[0079] like Figure 8 As shown, the gallium oxide device fabrication method in this embodiment includes operations S210 to S230.

[0080] In operation S210, a Schottky device is fabricated, wherein the Schottky device includes a substrate 1, an epitaxial layer 2, a dielectric layer 3, a Schottky contact metal layer 4, an ohmic contact metal layer 5, and electrode leads 7.

[0081] In some embodiments, the fabrication process of a Schottky device includes: fabricating an epitaxial layer 2 on the upper surface of a substrate 1; depositing a metal electrode on the lower surface of the substrate 1 to create an ohmic contact and form an ohmic contact metal layer; fabricating a step on the surface of the epitaxial layer 2 based on an etching process, and epitaxially depositing a dielectric layer on the etched epitaxial layer surface; depositing metal on the dielectric layer to create a Schottky contact and form a Schottky contact metal layer 5; and forming an electrode pin 7 in a portion of the Schottky contact metal layer.

[0082] In operation S220, an insulating, highly thermally conductive stack 6 is prepared on both sides of the electrode pin 7.

[0083] In some embodiments, the insulating high thermal conductivity stack can be prepared by one or more of the following methods: spin coating, inkjet printing, smearing, electroplating, halide vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), magnetron sputtering, metal-organic vapor deposition (MOCVD), and low-pressure chemical vapor deposition (LPCVD).

[0084] In operation S230, electrode pin 7 is connected to heat sink substrate 9 via pads.

[0085] In some embodiments, the device prepared by operations S110 to S120 is connected to the heat dissipation substrate 9 via pads 8. The heat dissipation substrate further includes a first heat dissipation substrate anode 101 and a second heat dissipation substrate anode 102. The insulating high thermal conductivity stacked electrode leads 7 are connected to the heat dissipation substrate anode 101 via pads. Since the heat of the gallium oxide device is mainly concentrated on the Schottky contact metal side, the flip-chip Schottky device allows the Schottky contact metal side to be connected to the heat dissipation substrate, maximizing heat transfer to the heat dissipation substrate through the insulating high thermal conductivity stacked layer 6, thus ensuring the thermal stability of the device.

[0086] The specific embodiments described above provide a more detailed explanation of the technical solution of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A gallium oxide device, characterized in that, include: Schottky device, insulating high thermal conductivity stack (6) and heat dissipation substrate (9); The Schottky device includes: a substrate (1), an epitaxial layer (2), a dielectric layer (3), a Schottky contact metal layer (4), an ohmic contact metal layer (5), and electrode pins (7). The epitaxial layer (2) is in contact with a first region of the substrate (1); the ohmic contact metal layer (5) has a gap with the first region and is in contact with a second region of the substrate (1), the second region being located on both sides of the first region; the dielectric layer (3) covers the other regions of the substrate (1) except for the first and second regions, and a portion of the epitaxial layer (2); the Schottky contact metal layer (4) is in contact with the region of the surface of the epitaxial layer (2) not covered by the dielectric layer (3); and the electrode pins (7) are in contact with a portion of the ohmic contact metal layer (5) and the Schottky contact metal layer (4). An insulating high thermal conductivity stack (6) is disposed on both sides of the electrode pin (7). The material of the insulating high thermal conductivity stack (6) is a combination heat dissipation material or a stacked composite heat dissipation material composed of diamond, aluminum nitride, boron nitride, silicon carbide, thermally conductive resin and graphene. The heat dissipation substrate (9) is connected to the electrode pin (7) in the Schottky device via the pad (8). The material of the heat dissipation substrate (9) is any one of the following: thick film ceramic substrate, low temperature co-fired multilayer ceramic, and thin film ceramic substrate.

2. The gallium oxide device according to claim 1, characterized in that, The substrate (1) is a highly doped N-type gallium oxide substrate, the surface roughness of the substrate (1) is less than 100 nm, the thickness is 100~1000 μm, and the doping concentration is 1×10⁻⁶. 13 ~1×10 20 cm -3 .

3. The gallium oxide device according to claim 1, characterized in that, The epitaxial layer (2) is a lightly doped N-type gallium oxide epitaxial layer with a thickness of 1–20 μm and a doping concentration of 1 × 10⁻⁶. 13 ~1×10 16 cm -3 .

4. The gallium oxide device according to claim 1, characterized in that, The material of the Schottky contact metal layer (4) is one of Ni / Au, Ni / Al, or Pt / Au. The thickness of the Schottky contact metal layer (4) is 20~500 nm and the width is 30~300 μm.

5. The gallium oxide device according to claim 1, characterized in that, The thickness of the insulating high thermal conductivity stack (6) is 100 nm to 1 mm, and the width of the insulating high thermal conductivity stack (6) covers the operating range of the Schottky device.

6. The gallium oxide device according to claim 1, characterized in that, The electrode pin (7) is made of any one of the following materials: Ni / Au, Ni / Al, Ti / Al, Ti / Au, and Pt / Au.

7. The gallium oxide device according to claim 1, characterized in that, The heat dissipation substrate includes a heat dissipation substrate anode (10) and a heat dissipation substrate cathode (11), wherein the heat dissipation substrate anode (10) and the scattering substrate cathode (11) are respectively connected to the corresponding electrode pins (7) through pads (8).

8. A method for fabricating a gallium oxide device as described in any one of claims 1 to 7, characterized in that, include: Fabricating a Schottky device, wherein the Schottky device includes a substrate (1), an epitaxial layer (2), a dielectric layer (3), a Schottky contact metal layer (4), an ohmic contact metal layer (5), and electrode leads (7), the fabrication of the Schottky device includes: forming an epitaxial layer on the surface of the substrate (1); etching the epitaxial layer and the substrate (1) to form steps and obtain the epitaxial layer (2); forming a dielectric layer (3) in other areas of the etched substrate surface except for a second region and in a portion of the surface of the epitaxial layer (2); forming an ohmic contact metal layer (5) in the second region, wherein there is a gap between the ohmic contact metal layer and the epitaxial layer (2); forming a Schottky contact metal layer (4) in the area of ​​the epitaxial layer (2) not covered by the dielectric layer (3); and forming electrode leads (7) in the ohmic contact metal layer (5) and a portion of the Schottky contact metal layer. An insulating, highly thermally conductive laminate (6) is prepared on both sides of the electrode pin (7). The electrode pins (7) are connected to the heat sink substrate (9) via solder pads.

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