A dual-phase series dual-switch flyback converter and control method thereof

Abstract

The present invention discloses a dual-phase series dual-tube flyback converter and a control method thereof, belonging to the field of power electronics technology, including a power unit, a sampling unit, a control unit and an isolation drive unit; the control unit takes the voltage and current signals of the sampling unit as input, combines the voltage outer loop and the current inner loop as feedback control, and outputs two PWM signals for the isolation drive unit input; the isolation drive unit outputs the corresponding PWM wave to control the on and off of the controller switch tube in the dual-tube series flyback circuit to perform power level voltage conversion; when the sampling voltage is lower than the reference voltage value, the error amplifier output voltage increases, the drive waveform output duty cycle increases, causing the power level output voltage to increase, and realizing the closed-loop control of the dual-phase interleaved dual-tube flyback converter. The present invention solves the problem that the existing high-voltage auxiliary power supply cannot meet the direct power supply demand of the 2500V DC bus, and achieves the effect of improving conversion efficiency and power density.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a dual-phase series dual-tube flyback converter and a control method thereof. Background Art

[0002] With the development of new energy technologies, the power of power electronic systems such as photovoltaic systems and energy storage systems has been continuously improved. The voltage resistance level of main power devices such as IGBT has reached a maximum of 4500V, and the system bus voltage has also reached around 2500V.

[0003] The existing high-voltage auxiliary power supply is divided into two types: a switching power supply that directly draws power from the high voltage and a power supply that performs a secondary DC-DC conversion after the voltage is stepped down by an isolation transformer.

[0004] The switching power supply that directly draws power from high voltage is generally based on the flyback converter. The current mainstream forms are primary-side series flyback and dual-tube flyback converter.

[0005] The existing primary-side series flyback converter cannot fully utilize the withstand voltage of the primary power tube, which will result in a large number of primary-side flyback windings in series. The leakage inductance energy of the primary side is absorbed by the RCD absorption circuit, which reduces the conversion efficiency.

[0006] The dual-tube flyback converter can almost completely utilize the voltage resistance of the switching tube, but it is only suitable for high-voltage auxiliary power supplies of 1500V and below, and it cannot meet the needs of higher voltage applications.

[0007] The auxiliary power supply that undergoes secondary DC-DC conversion after voltage reduction through an isolation transformer has a large size due to the existence of industrial frequency voltage conversion and is only suitable for AC input scenarios.

[0008] In the prior art, patent CN 207652316 U discloses a high-voltage flyback converter circuit based on IGBT series connection, including two filter capacitors C1 and C2 connected in series, two voltage-equalizing resistors R1 and R2 connected in series, filter capacitors C1 and C2 connected in parallel with resistors R1 and R2; an absorption circuit composed of a diode D1, a resistor R3, a capacitor C3, and a diode D2; two switch transistors Q1 and Q2 connected in series, and a freewheeling diode D4 used to transfer the energy stored in T1 to the next stage; two dummy load resistors R7 and R8 connected in series, a filter capacitor C4 connected in parallel with resistors R7 and R8; a filter capacitor C5 connected in parallel with the filter capacitor C4; and a filter inductor L1 arranged between the filter capacitor C4 and the filter capacitor C5. In the patent, the energy absorbed by the RCD absorption circuit composed of R3, C3, and D2 in the main circuit is exponentially related to the output current. When the power supply needs a larger current output, the RCD absorption circuit will increase the volume of the power supply and reduce the efficiency. In addition, since the capacitor C in the RCD absorption circuit stores energy, it will have a voltage of hundreds of volts when working, which will cause the device's withstand voltage to not be fully utilized. For example, a 1700V MOS tube, due to the existence of the voltage across the absorption capacitor and the voltage spike when the power tube is turned off, this series structure power supply can only be used in a DC bus of about 1500V. Summary of the invention

[0009] The present invention aims to solve the above problems existing in the prior art and proposes a dual-phase series dual-tube flyback converter and a control method thereof.

[0010] In order to achieve the above-mentioned object of the invention, the technical solution of the present invention is as follows:

[0011] A two-phase series dual-tube flyback converter, characterized in that it includes a power unit, a sampling unit, a control unit and an isolation drive unit; the power unit includes at least two identical dual-tube series flyback circuits, the primary DC bus voltage is evenly divided by the capacitors in the at least two dual-tube series flyback circuits, the sampling unit is used to appropriately transform the output voltage of the power unit and the primary inductor peak current, and then output a signal that can be used by the control unit; the control unit is used to output two drive signals with a phase difference of 180° after internal calculation based on the signal input by the sampling unit as input signals of the isolation drive unit; the isolation drive unit is used to provide isolation drive capability to the controller switch tube in the dual-tube series flyback circuit, and each drive signal input corresponds to an isolation drive signal output of two switch tubes of a dual-tube flyback converter.

[0012] Furthermore, the first dual-tube flyback converter includes a voltage-dividing capacitor C1, a voltage-equalizing resistor R1, primary switch tubes Q1 and Q2, a transformer T1, primary freewheeling diodes D1 and D2, and a secondary freewheeling diode D5; the voltage-equalizing resistor R1 is connected in parallel at both ends of the voltage-dividing capacitor C1, the drain of the primary switch tube Q1 is connected to the positive end of the voltage-dividing capacitor C1, the source of the primary switch tube Q1 is connected to the opposite end of the primary winding of the transformer T1, the drain of the primary switch tube Q2 is connected to the same end of the primary winding of T1, the source of Q2 is connected to the negative end of C1, the anode of D1 is connected to the drain of Q2, the cathode of D1 is connected to the drain of the primary switch tube Q1, the anode of D2 is connected to the source of Q2, the cathode of D2 is connected to the source of the primary switch tube Q1, the anode of D5 is connected to the same end of the secondary winding of the transformer T1, the cathode of D5 is connected to the positive end of the output capacitor C3, and the negative end of the output capacitor C3 is connected to the opposite end of the secondary winding of the transformer T1.

[0013] Furthermore, the second dual-tube flyback converter includes a voltage-dividing capacitor C2, a voltage-equalizing resistor R2, primary switch tubes Q3 and Q4, a transformer T2, primary freewheeling diodes D3 and D4, and a secondary freewheeling diode D6; the voltage-equalizing resistor R2 is connected in parallel at both ends of C2, the drain of Q3 is connected to the positive end of C2, the source of Q3 is connected to the opposite end of the primary winding of T2, the drain of Q4 is connected to the same end of the primary winding of T2, the source of Q4 is connected to the negative end of C2, the anode of D3 is connected to the drain of Q4, the cathode of D3 is connected to the drain of Q3, the anode of D4 is connected to the source of Q4, the cathode of D4 is connected to the source of Q3, the anode of D6 is connected to the same end of the secondary winding of T2, the cathode of D6 is connected to the positive end of the output capacitor C3, and the negative end of the output capacitor C3 is connected to the opposite end of the secondary winding of T2.

[0014] Furthermore, the control unit includes an error amplifier, a peak current control comparator and a PWM modulation circuit; the error amplifier takes a reference voltage signal and a sampling voltage input signal as input, and its output signal is connected to the inverting input port of the peak current control comparator as a reference for the peak current; the non-phase input of the peak current control comparator is the value of the output voltage signal after the primary winding current is sampled and processed, and when the amplitude of the signal at the non-phase end of the comparator is greater than the amplitude of the signal at the inverting end, the comparator outputs a high level as the input of the subsequent PWM modulation circuit.

[0015] Furthermore, the PWM modulation circuit includes an oscillator OSC, a JK trigger, an SR trigger, an inverter, and a three-input single-output AND gate. The oscillator OSC is used to generate a narrow pulse width signal with a frequency of twice the switching frequency fs, and input the JK trigger, the SR trigger and the inverter; the JK trigger is used to output a flip level at the rising edge of each oscillator output, thereby generating a symmetrical square wave signal with a frequency of fs to the upper and lower AND gates; the inverter is used to invert the oscillator output pulse as the AND gate input, increase the dead zone of the upper and lower AND gate output signals, and ensure that the upper and lower dual-tube flyback converter switch tubes cannot be turned on at the same time; the SR trigger is used to set the output high when the oscillator outputs a high level, and then maintain it until the peak current control comparator output is high, the output flips to a low level, and the low level output of the SR trigger directly pulls the AND gate output low, thereby realizing duty cycle adjustment of the symmetrical drive waveform.

[0016] Based on the above-mentioned two-phase series dual-switch flyback converter, the present invention also proposes a control method for the two-phase series dual-switch flyback converter, including:

[0017] The sampling unit collects voltage and current signals of the double-tube series flyback circuit;

[0018] The control unit takes voltage and current signals as input, and uses the voltage outer loop and current inner loop as feedback control, outputting two PWM signals with a maximum duty cycle of less than 50% and a phase difference of 180° for isolating the drive unit input;

[0019] The isolation drive unit outputs the corresponding PWM wave to control the on and off of the controller switch tube in the double-tube series flyback circuit to perform power-level voltage conversion;

[0020] When the sampling voltage is lower than the reference voltage value, the error amplifier output voltage increases, the output duty cycle of the drive waveform increases, causing the power stage output voltage to increase, thus realizing closed-loop control of the dual-phase interleaved dual-switch flyback converter.

[0021] Furthermore, a voltage outer loop is used as feedback control, including: an error amplifier uses a reference voltage signal generated by a control unit as a reference value for the output voltage, combined with a sampled voltage input signal after the output voltage is transformed by a sampling unit, and its output signal serves as an inverting input of a peak current control comparator.

[0022] Furthermore, the current inner loop is used as feedback control, including: the peak current control comparator uses the output signal of the error amplifier as the inverting input, and the output voltage signal after the primary winding current sampling is processed as the non-inverting input, and outputs a high level when the signal amplitude at the non-inverting end of the comparator is greater than the signal amplitude at the inverting end, and sends it to the subsequent PWM modulation circuit.

[0023] Furthermore, the control unit outputs a PWM signal for isolating the input of the drive unit, including:

[0024] The oscillator OSC generates a narrow pulse width signal with a frequency twice the switching frequency fs, and inputs the signal into the JK flip-flop, SR flip-flop and inverter;

[0025] The JK flip-flop outputs a flip-flop level at each rising edge of the oscillator output, thereby generating a symmetrical square wave signal with a frequency of fs to the upper and lower AND gates;

[0026] The inverter inverts the oscillator output pulse as the AND gate input, increasing the dead zone of the upper and lower AND gate output signals to ensure that the upper and lower dual-tube flyback converter switch tubes cannot be turned on at the same time;

[0027] The SR trigger output is set high when the oscillator outputs a high level, and then remains high until the peak current control comparator output is high, and the output flips to a low level;

[0028] The low level output of the SR trigger will directly pull down the AND gate output, thereby achieving duty cycle adjustment of the symmetrical drive waveform.

[0029] In summary, the present invention has the following advantages:

[0030] 1. Without RCD absorption circuit, the leakage inductance energy is fed back to the power input through the diode, which improves system efficiency, reduces power supply heating and reduces power supply size.

[0031] 2. Use a dual transformer structure to reduce the voltage and power requirements for a single transformer, use the transformers in the existing low-voltage system for design and manufacturing, and obtain cost gains from mass production.

[0032] 3. The dual transformer structure disperses transformer heat and improves the reliability of the power supply system.

[0033] 4. The input voltage reaches twice the breakdown voltage of the power switch. For a 1500V power tube, it can withstand a maximum input voltage of 3000V, which is more suitable for high-voltage systems.

[0034] 5. By adopting interleaved control, the output capacitor ripple current is reduced. When the output power remains unchanged, the output capacitance is reduced exponentially, which is conducive to miniaturization. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a system structure diagram of the present invention;

[0036] Figure 2 A circuit topology of a power and sampling loop of a dual-phase series dual-transistor flyback converter of the present invention;

[0037] Figure 3A circuit topology diagram of a dual-phase series dual-tube flyback converter control unit of the present invention;

[0038] Figure 4 The figure is a working waveform diagram of a two-phase series dual-transistor flyback converter according to the present invention. DETAILED DESCRIPTION

[0039] In order to explain the present invention more clearly, the present invention is further described below in conjunction with preferred embodiments and drawings. It should be understood by those skilled in the art that the content described below is illustrative rather than restrictive, and should not be used to limit the scope of protection of the present invention.

[0040] Example 1

[0041] The present invention provides a dual-phase series dual-transistor flyback converter, such as Figure 1 As shown, it includes a power unit, a sampling unit, a control unit and an isolation drive unit.

[0042] Among them, the power unit is composed of two double-tube series flyback circuits, the device parameters of these two flyback series flyback circuits are completely consistent, and they are divided into an upper double-tube flyback circuit and a lower double-tube flyback circuit.

[0043] The primary DC bus voltage VBUS is evenly divided by capacitors C1 and C2, with each capacitor accounting for half of the bus voltage. For a 2500V DC bus, half of the voltage is 1250V, which serves as the input of the dual-switch flyback converter.

[0044] The upper double-tube flyback converter is composed of a voltage-dividing capacitor C1, a voltage-equalizing resistor R1, primary switch tubes Q1 and Q2, a transformer T1, primary freewheeling diodes D1 and D2, and a secondary freewheeling diode D5. The voltage-equalizing resistor R1 is connected in parallel to both ends of the voltage-dividing capacitor C1, the drain of the primary switch tube Q1 is connected to the positive end of the voltage-dividing capacitor C1, the source of the primary switch tube Q1 is connected to the opposite end of the primary winding of the transformer T1, the drain of the primary switch tube Q2 is connected to the same end of the primary winding of T1, the source of Q2 is connected to the negative end of C1, the anode of D1 is connected to the drain of Q2, the cathode of D1 is connected to the drain of the primary switch tube Q1, the anode of D2 is connected to the source of Q2, the cathode of D2 is connected to the source of the primary switch tube Q1, the anode of D5 is connected to the same end of the secondary winding of T1, the cathode of D5 is connected to the positive end of the output capacitor C3, and the negative end of the output capacitor C3 is connected to the opposite end of the secondary winding of T1.

[0045] The lower double-tube flyback converter consists of a voltage-dividing capacitor C2, a voltage-equalizing resistor R2, primary-side switch tubes Q3 and Q4, a transformer T2, primary-side freewheeling diodes D3 and D4, and a secondary-side freewheeling diode D6. The voltage-equalizing resistor R2 is connected in parallel across the voltage-dividing capacitor C2, the drain of the primary switch tube Q3 is connected to the positive end of the voltage-dividing capacitor C2, the source of the primary switch tube Q3 is connected to the opposite-name end of the primary winding of the transformer T2, the drain of the primary switch tube Q4 is connected to the same-name end of the primary winding of T2, the source of the primary switch tube Q4 is connected to the negative end of the voltage-dividing capacitor C2, the anode of the primary freewheeling diode D3 is connected to the drain of Q4, the cathode of the primary freewheeling diode D3 is connected to the drain of the primary switch tube Q3, the anode of D4 is connected to the source of the primary switch tube Q4, the cathode of D4 is connected to the source of the primary switch tube Q3, the anode of the secondary freewheeling diode D6 is connected to the same-name end of the secondary winding of the transformer T2, the cathode of the secondary freewheeling diode D6 is connected to the positive end of the output capacitor C3, and the negative end of the output capacitor C3 is connected to the opposite-name end of the secondary winding of the transformer T2.

[0046] The sampling unit includes voltage sampling and current sampling. Its function is to provide a signal for the control unit after appropriately transforming the output voltage and the peak current of the primary inductor. The voltage gain of the voltage sampling channel is kv_sample, and the gain of the current sampling channel is ki_sample. Voltage sampling can be done by direct sampling with resistor divider or isolated sampling, depending on the specific application scenario. Current sampling can be done by using a current sensor or a voltage divider resistor through an isolated op amp, which also depends on the specific application scenario.

[0047] The control unit inputs voltage and current sampling signals kv_sample and ki_sample, and after internal calculation, outputs two driving signals DRV_1 and DRV_2 with a phase difference of 180° as input signals of the isolation driving unit.

[0048] like Figure 3 As shown, the control unit includes an error amplifier, a peak current control comparator and a PWM modulation circuit; the error amplifier takes a reference voltage signal and a sampling voltage input signal as input, and its output signal is connected to the inverting input port of the peak current control comparator as a reference for the peak current; the in-phase input of the peak current control comparator is the value of the output voltage signal after the primary winding current is sampled and processed, and when the amplitude of the signal at the in-phase end of the comparator is greater than the amplitude of the signal at the inverting end, the comparator outputs a high level as the input of the subsequent PWM modulation circuit.

[0049] like Figure 2As shown, the isolation drive unit provides isolation drive capability for the upper and lower dual-tube series flyback controller switch tubes. Each drive signal input corresponds to the isolation drive signal output of the two switch tubes of a dual-tube flyback converter, where the DRV_1 input signal corresponds to the G1_H and G1_L isolation drive signal outputs, and the DRV_2 input signal corresponds to the G2_H and G2_L isolation drive signal outputs.

[0050] The dual-tube flyback converter of the present invention does not have the traditional high-voltage flyback power supply RCD absorption circuit, and can directly feed back the leakage inductance energy to the power input terminal through the diode. On the one hand, it helps to improve the conversion efficiency and reduce the heat generation of the power supply; on the other hand, it makes more full use of the withstand voltage of the power tube. The present invention achieves a high input voltage, small volume, and high-efficiency two-phase interleaved control method, reduces the number of output capacitors, and helps miniaturization of the device. At the same time, the series connection of the flyback converter can increase the withstand voltage of the system. The dual-tube flyback converter can make full use of the advantages of the withstand voltage of the switch tube. The two dual-tube flyback converters are connected in series up and down, and each dual-tube flyback converter bears half of the bus voltage.

[0051] Example 2

[0052] Another aspect of the present invention is to provide a control method for a two-phase interleaved series two-switch flyback converter based on the two-phase series two-switch flyback converter proposed in Example 1.

[0053] The control method in the present invention can be implemented using analog or digital hardware, or by software. In this example, analog control is used for explanation, and the following functions are implemented in the control unit.

[0054] The control of the two-phase interleaved series dual-tube flyback converter takes voltage and current signals as input, uses the voltage outer loop and the current inner loop as feedback control, and outputs two PWM signals with a maximum duty cycle of less than 50% and a phase difference of 180° for the input of the isolation drive unit. The isolation drive unit outputs the corresponding PWM wave to control the on and off of the switch tube to perform voltage conversion at the power level. When the sampling voltage is lower than the reference voltage value, the error amplifier output voltage Vo_err increases, the output duty cycle of the drive waveform increases, causing the output voltage of the power level to increase, and the closed-loop control of the two-phase interleaved dual-tube flyback converter is realized.

[0055] In this embodiment, the voltage outer loop is composed of the error amplifier EA and its input and output signals. The reference voltage signal Vref is generated by the control unit as a reference value of the output voltage. The sampled voltage input signal Vout_Sample is a signal obtained after the output voltage Vout is transformed by the sampling unit. Vo_err is the output after the sampled voltage input signal Vout_Sample and the reference voltage signal Vref are amplified by the error amplifier EA.

[0056] The inner current loop consists of a peak current control comparator CMP and its input and output signals, which are divided into non-inverting input and inverting input. Vo_err is the inverting input port of the comparator and serves as the reference for the peak current. The non-inverting input of the comparator is the value of the output voltage signal ipk_sample after processing the sampled current of the primary winding. When the signal amplitude at the non-inverting terminal of the comparator CMP is greater than that at the inverting terminal, the comparator outputs a high level and sends it to the subsequent PWM modulation circuit.

[0057] In this embodiment, the PWM modulation circuit is composed of an oscillator OSC, a JK flip-flop, an SR flip-flop, an inverter, and a three-input single-output AND gate.

[0058] The oscillator OSC generates a narrow pulse-width signal with a frequency of 2 times the switching frequency fs and inputs it to the JK flip-flop, SR flip-flop, and inverter.

[0059] The JK flip-flop outputs a toggling level at the rising edge of each oscillator output, thereby generating a symmetric square wave signal with a frequency of fs to the upper and lower AND gates.

[0060] The inverter inverts the oscillator output pulse and serves as an input to the AND gate, increasing the dead zone of the output signal of the upper and lower AND gates to ensure that the switching transistors of the upper and lower dual-switch flyback converters cannot conduct simultaneously.

[0061] The SR flip-flop is set high when the oscillator outputs a high level and then remains so until the peak current control comparator outputs a high level, at which point the output toggles to a low level. The low level output by the SR flip-flop directly pulls down the output of the AND gate, thereby achieving the duty cycle adjustment of the symmetric drive waveform.

[0062] Specific drive waveform timing is shown in the Figure 4 waveform diagram as shown.

[0063] When the output of the SR flip-flop is constantly high, the AND gate outputs the maximum duty cycle Do_max, and the width of this duty cycle is:

[0064] ;

[0065] When the output of the SR flip-flop is not constantly high, the output duty cycle depends on the smaller value between the high-level width D of the SR flip-flop output and Do_max. When D < Do_max, the control loop intervenes.

[0066] According to existing research, the power stage transfer function of the dual-switch flyback converter is:

[0067] ;

[0068] where Vin is the input voltage of the dual-switch flyback converter, D is the duty cycle, Nps is the turns ratio of the primary to secondary sides, and Vo is the output voltage.

[0069] The reference voltage Vref of the control unit and the output voltage sampling value Vout_Sample are used as the input of the error amplifier EA. After EA, the output is Vo_err as the reference voltage of the peak current controller. Its transfer function is:

[0070] ;

[0071] Where kv is positive, Vref is a fixed value, Vout_sample is proportional to the output voltage, and assuming the ratio between Vout_sample and Vout is 1, then:

[0072] ;

[0073] The smaller Vo is, the larger Vo_err is, and the larger Vo is, the smaller Vo_err is. Due to the limitations of the actual system, the value of Vo_err is 0~Vref.

[0074] The current comparator CMP outputs the voltage level by comparing the ratio of Vo_err to Ipk_Sample. Its transfer function is as follows:

[0075] ;

[0076] Assuming the current sampling gain is 1, we have:

[0077] ;

[0078] In addition, according to the inductor current formula:

[0079] ;

[0080] When Vo_err=Ipk, we get:

[0081] ;

[0082] Where: Lm is the inductance of the primary winding of the transformer, VL is the voltage across the primary winding, that is, the voltage across the voltage divider capacitor, and ton is the time required for the inductor current to rise to the Vo_err reference value. When Lm and VL remain unchanged, ton is proportional to Vo_err. As mentioned above, the SR trigger output high level width is:

[0083] ;

[0084] In summary, the transfer function of the control stage is:

[0085] ;

[0086] It can be deduced from the previous formula that when the converter output voltage Vo decreases, the increase of Vo_err causes the increase of ton, and the increase of ton causes the duty cycle D of the control stage output to increase. Combined with the previous flyback inverter power stage transfer function:

[0087] ;

[0088] It can be seen that the increase of duty cycle D will increase the output voltage Vo. When the converter output voltage Vo increases, Vo_err decreases, the duty cycle D output by the control stage decreases, resulting in a decrease in the output voltage Vo, thus realizing the closed-loop control function.

[0089] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Any simple modification or equivalent change made to the above embodiment based on the technical essence of the present invention shall fall within the protection scope of the present invention.

Claims

1. A two-phase series dual-transistor flyback converter, characterized in that: It comprises a power unit, a sampling unit, a control unit and an isolation drive unit; the power unit comprises at least two identical two-tube series flyback circuits, the primary DC bus voltage is evenly divided by the capacitors in the at least two two-tube series flyback circuits, the sampling unit is used to appropriately transform the output voltage of the power unit and the peak current of the primary inductor, and then output a signal that can be used by the control unit; the control unit is used to output two drive signals with a phase difference of 180° after internal calculation based on the signal input by the sampling unit as the input signal of the isolation drive unit; The isolation driving unit is used to provide isolation driving capability to the controller switch tube in the double-tube series flyback circuit, and each drive signal input corresponds to an isolation driving signal output of two switch tubes of a double-tube flyback converter; The control unit includes an error amplifier, a peak current control comparator and a PWM modulation circuit; the error amplifier takes a reference voltage signal and a sampling voltage input signal as input, and its output signal is connected to the inverting input port of the peak current control comparator; The non-inverting input of the peak current control comparator is the value of the output voltage signal after the primary winding current sampling is processed. When the amplitude of the signal at the non-inverting end of the comparator is greater than the amplitude of the signal at the inverting end, the comparator outputs a high level as the input of the subsequent PWM modulation circuit; The PWM modulation circuit includes an oscillator OSC, a JK trigger, an SR trigger, an inverter, and a three-input single-output AND gate. The oscillator OSC is used to generate a narrow pulse width signal with a frequency of twice the switching frequency fs, and input the JK trigger, the SR trigger and the inverter; the JK trigger is used to output a flip level at the rising edge of each oscillator output, thereby generating a symmetrical square wave signal with a frequency of fs to the upper and lower AND gates; the inverter is used to invert the oscillator output pulse as the AND gate input, increase the dead zone of the upper and lower AND gate output signals, and ensure that the upper and lower dual-tube flyback converter switch tubes cannot be turned on at the same time; the SR trigger is used to output high when the oscillator outputs a high level, and then maintain it until the peak current control comparator output is high, the output flips to a low level, and the low level output by the SR trigger directly pulls down the AND gate output, thereby realizing the duty cycle adjustment of the symmetrical drive waveform.

2. A two-phase series two-transistor flyback converter according to claim 1, characterized in that: The first dual-tube flyback converter includes a voltage-dividing capacitor C1, a voltage-equalizing resistor R1, primary switch tubes Q1 and Q2, a transformer T1, primary freewheeling diodes D1 and D2, and a secondary freewheeling diode D5; the voltage-equalizing resistor R1 is connected in parallel to both ends of the voltage-dividing capacitor C1, the drain of the primary switch tube Q1 is connected to the positive end of the voltage-dividing capacitor C1, the source of the primary switch tube Q1 is connected to the opposite-name end of the primary winding of the transformer T1, the drain of the primary switch tube Q2 is connected to the same-name end of the primary winding of T1, the source of Q2 is connected to the negative end of C1, the anode of D1 is connected to the drain of Q2, the cathode of D1 is connected to the drain of the primary switch tube Q1, the anode of D2 is connected to the source of Q2, the cathode of D2 is connected to the source of the primary switch tube Q1, the anode of D5 is connected to the same-name end of the secondary winding of the transformer T1, the cathode of D5 is connected to the positive end of the output capacitor C3, and the negative end of the output capacitor C3 is connected to the opposite-name end of the secondary winding of the transformer T1.

3. A two-phase series two-transistor flyback converter according to claim 2, characterized in that: The second dual-tube flyback converter includes a voltage-dividing capacitor C2, a voltage-equalizing resistor R2, primary switch tubes Q3 and Q4, a transformer T2, primary freewheeling diodes D3 and D4, and a secondary freewheeling diode D6; the voltage-equalizing resistor R2 is connected in parallel at both ends of C2, the drain of Q3 is connected to the positive end of C2, the source of Q3 is connected to the opposite end of the primary winding of T2, the drain of Q4 is connected to the same end of the primary winding of T2, the source of Q4 is connected to the negative end of C2, the anode of D3 is connected to the drain of Q4, the cathode of D3 is connected to the drain of Q3, the anode of D4 is connected to the source of Q4, the cathode of D4 is connected to the source of Q3, the anode of D6 is connected to the same end of the secondary winding of T2, the cathode of D6 is connected to the positive end of the output capacitor C3, and the negative end of the output capacitor C3 is connected to the opposite end of the secondary winding of T2.

4. The dual-phase series dual-transistor flyback converter according to claim 1, characterized in that: The sampling unit performs voltage sampling by using resistor voltage division direct sampling or isolated sampling, and performs current sampling by using a current sensor or a voltage division resistor via an isolated operational amplifier.

5. A control method for a two-phase series dual-switch flyback converter, according to any one of claims 1 to 4, characterized in that: include: The sampling unit collects the voltage and current signals of the double-tube series flyback circuit and inputs them into the control unit after appropriate transformation; The control unit uses the sampled voltage and current signals as input, combines the voltage outer loop and the current inner loop as feedback control, and outputs two PWM signals with a maximum duty cycle of less than 50% and a phase difference of 180° for isolating the drive unit input; The isolation drive unit outputs the corresponding PWM wave to control the on and off of the controller switch tube in the double-tube series flyback circuit to perform power-level voltage conversion; When the sampling voltage is lower than the reference voltage, the error amplifier output voltage increases, the output duty cycle of the driving waveform increases, causing the power stage output voltage to increase, thus achieving closed-loop control of the two-phase interleaved dual-switch flyback converter. The control unit uses the current inner loop as feedback control, including: the peak current control comparator uses the output signal of the error amplifier as the inverting input, uses the output voltage signal of the primary winding current sampling after processing as the inverting input, and outputs a high level when the amplitude of the signal at the inverting end of the comparator is greater than the amplitude of the signal at the inverting end, and sends it to the subsequent PWM modulation circuit; The PWM modulation circuit works as follows: An oscillator OSC is used to generate a narrow pulse width signal with a frequency twice the switching frequency fs, and input into the JK flip-flop, SR flip-flop and inverter; The JK flip-flop outputs a flip-flop level at each rising edge of the oscillator output, thereby generating a symmetrical square wave signal with a frequency of fs to the upper and lower AND gates; The inverter inverts the oscillator output pulse as the AND gate input, increases the dead zone of the upper and lower AND gate output signals, and ensures that the two dual-tube flyback converter switch tubes cannot be turned on at the same time; The SR trigger output is set high when the oscillator outputs a high level, and then remains high until the peak current control comparator output is high, and the output flips to a low level; The low level output of the SR trigger will directly pull down the AND gate output, thereby achieving duty cycle adjustment of the symmetrical drive waveform.

6. The control method of a two-phase series two-transistor flyback converter according to claim 5, characterized in that: The control unit uses a voltage outer loop as feedback control, including: an error amplifier uses a reference voltage signal generated by the control unit as a reference value for the output voltage, combined with a sampled voltage input signal after the output voltage is transformed by a sampling unit, and its output signal is used as an inverting input of a peak current control comparator.

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