High frequency planar matrix transformer optimization method and system

Abstract

The present invention belongs to the field of high-frequency planar transformer optimization, and provides a high-frequency planar matrix transformer optimization method and system, including determining the shape and size of the magnetic core with the goal of minimizing the core loss according to the relationship between the core loss and the core volume and the core magnetic flux density; comprehensively considering the total loss of the magnetic core and winding, with the goal of minimizing the total loss of the high-frequency planar transformer, determining the shape of the magnetic column and the winding layout; comprehensively analyzing the winding loss and the size of the parasitic capacitance, so that the winding loss is within an acceptable range under the premise of minimizing the parasitic capacitance, and performing secondary optimization design on the winding. The present invention minimizes the comprehensive loss of the magnetic core and the winding and reduces the parasitic capacitance between the winding layers through the optimized design of the magnetic core and the winding.

Description

Technical Field

[0001] The present invention belongs to the technical field of high-frequency planar transformer optimization, and in particular relates to a high-frequency planar matrix transformer optimization method and system. Background Art

[0002] The statements in this section merely provide background information related to the present invention and do not necessarily constitute prior art.

[0003] Large-ratio step-up and step-down transformers are core components widely used in various types of isolated DC converters. Promoting the high frequency of transformers is an effective way to improve the power density of converters.

[0004] However, the high transformation ratio and high current characteristics of large-ratio buck-boost transformers bring certain challenges to the promotion of high frequency. Specifically, the magnetic core and winding are adversely affected by the high-frequency effect, which will lead to increased losses; it is difficult to accommodate a large number of turns on the high-voltage side of the transformer in a miniaturized magnetic core; the large parasitic capacitance caused by the overlapping of interlayer conductors of planar transformers will significantly affect its high-frequency performance.

[0005] In order to alleviate the above problems, the prior art improves the structure of the transformer and proposes the concept of a matrix transformer for the first time. On this basis, based on the principle of flux cancellation, multiple discrete planar transformers are integrated into a single magnetic core, which significantly reduces the volume of the magnetic core and improves the power density of the converter. In view of the large copper loss and termination loss caused by the large current on the low-voltage side of the transformer, the prior art places the low-voltage winding on the bottom and top layers of the PCB, and integrates the corresponding rectifier / inverter circuit and filter capacitor on the low-voltage winding to minimize the AC loop of the low-voltage winding and disperse the AC current at the termination. At the same time, the prior art studies and analyzes the parasitic capacitance problem of the planar transformer, and designs 6 PCB wiring methods to obtain an optimized structure that simultaneously reduces parasitic capacitance and AC resistance. There is also a prior art that proposes a series input and parallel output structure of a transformer to construct multiple groups of noise static points, so that the amplitude of the common-mode noise is only 1 / 8 of the initial value.

[0006] Planar matrix transformers can improve power density and increase current capacity by means of flux cancellation and multi-core shunting. However, under high-frequency working conditions, the core and winding are adversely affected by high-frequency effects, which will lead to increased losses. Large interlayer parasitic capacitance will also affect the high-frequency performance of the transformer. Existing technologies are also reducing losses, but there are still shortcomings and the loss reduction is limited. Summary of the invention

[0007] In order to solve the above problems, the present invention proposes a high-frequency planar matrix transformer optimization method and system. The present invention minimizes the comprehensive loss of the magnetic core and winding and reduces the parasitic capacitance between winding layers through the optimized design of the magnetic core and winding, which can better reduce the loss of the magnetic core and winding of the planar matrix transformer and minimize the combined loss of the two.

[0008] According to some embodiments, a first solution of the present invention provides a high-frequency planar matrix transformer optimization method, which adopts the following technical solution:

[0009] A high frequency planar matrix transformer optimization method, comprising:

[0010] According to the relationship between core loss, core volume and core flux density, the shape and size of the core are determined with the goal of minimizing core loss.

[0011] Comprehensively consider the total loss of the magnetic core and winding, and determine the shape of the magnetic column and the winding layout with the goal of minimizing the total loss of the high-frequency planar transformer;

[0012] A comprehensive analysis of winding loss and parasitic capacitance is performed to ensure that the winding loss is within an acceptable range while minimizing parasitic capacitance, and the winding is then redesigned for secondary optimization.

[0013] Furthermore, according to the relationship between the core loss, the core volume and the core flux density, the shape and size of the core are determined with the goal of minimizing the core loss, specifically:

[0014] Use the core area method to estimate the core size;

[0015] The core base is round or square, based on the principle that both sides of the core base are extended to the width of the single magnetic column window to reduce the magnetic flux density of the core base and thus reduce the magnetic flux loss.

[0016] Furthermore, the principle of reducing the magnetic flux density of the magnetic core base and thus reducing the magnetic flux loss by extending the two sides of the magnetic core base to the width of the single magnetic column window is specifically as follows:

[0017] Under the same core window area, the edge of any one of the four magnetic columns is at equal distance from the center of another magnetic column in the horizontal and vertical directions, and the cross section of the magnetic column parallel to the base is designed to be square or circular.

[0018] Furthermore, the total loss of the magnetic core and winding is comprehensively considered, and the total loss of the high-frequency planar transformer is minimized to determine the shape of the magnetic column and the winding layout, specifically:

[0019] When the AP value of the magnetic core and the height of the magnetic column are determined, the core loss and winding loss are calculated, and the sum of the core loss and winding loss is taken as the total loss of the high-frequency planar transformer;

[0020] With the goal of minimizing the total loss of the high-frequency planar transformer, the shape of the core base is determined, and then the shape of the magnetic column is determined;

[0021] The winding layout is determined by the shape of the core base.

[0022] Furthermore, the winding loss is specifically:

[0023] The equivalent resistance of the primary and secondary sides of a square winding and a single-layer circular winding can be expressed as:

[0024]

[0025]

[0026] Where ρ is the resistivity of the copper foil; Assume that the effective value of the primary current of the transformer is I o , then the total winding loss P corresponding to the square magnetic column and the circular magnetic column ws and P wc They are:

[0027]

[0028] In the formula, F R_p With F R_s are the AC equivalent resistance coefficients of the primary winding and secondary winding of the transformer respectively.

[0029] Furthermore, the core loss is specifically:

[0030] Volume of square magnetic core V cs And the volume V of the circular magnetic core cc They are:

[0031]

[0032] The height h of the magnetic column is determined by the thickness and quantity of the winding PCB.

[0033] Core loss P c and the core volume V c And the core loss density P v related,

[0034] P c =P v ·V c .

[0035] Furthermore, the winding loss and parasitic capacitance are comprehensively analyzed so that the winding loss is within an acceptable range under the premise of minimizing the parasitic capacitance, and the winding is subjected to secondary optimization design, specifically:

[0036] While ensuring that the winding loss is within an acceptable range, the purpose of reducing the interlayer capacitance is achieved by reducing the area of ​​the winding facing each other;

[0037] After reducing the inner diameter of the winding, the corresponding winding distance is adjusted according to the reduced width to meet the minimum overall resistance of the adjusted winding;

[0038] The area optimization interval is defined at two intersection points to ensure that the parasitic capacitance is optimized while the winding loss is increased within an acceptable range.

[0039] According to some embodiments, a second solution of the present invention provides a high-frequency planar matrix transformer optimization system, which adopts the following technical solution:

[0040] High frequency planar matrix transformer optimization system, including:

[0041] An appearance optimization module is configured to determine the shape and size of the magnetic core with the goal of minimizing the core loss according to the relationship between the core loss and the core volume and the core magnetic flux density;

[0042] The layout optimization module is configured to comprehensively consider the total loss of the magnetic core and winding, and determine the shape of the magnetic column and the winding layout with the goal of minimizing the total loss of the high-frequency planar transformer;

[0043] The secondary optimization module is configured to comprehensively analyze the winding loss and the parasitic capacitance, so that the winding loss is within an acceptable range under the premise of minimizing the parasitic capacitance, and the winding is secondary optimized.

[0044] According to some embodiments, a third aspect of the present invention provides a computer-readable storage medium.

[0045] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps in the high-frequency planar matrix transformer optimization method as described in the first aspect above.

[0046] According to some embodiments, a fourth aspect of the present invention provides a computer device.

[0047] A computer device comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps in the high-frequency planar matrix transformer optimization method as described in the first aspect above are implemented.

[0048] Compared with the prior art, the present invention has the following beneficial effects:

[0049] The present invention aims at the problem that under high-frequency working conditions, the magnetic core and winding are adversely affected by the high-frequency effect, which will lead to increased losses, and the large interlayer parasitic capacitance will also affect the high-frequency performance of the transformer. The magnetic core and winding of the transformer are optimized and designed by magnetic integration technology to meet the high-frequency working requirements. First, the shape of the magnetic core is optimized to minimize the magnetic flux density and reduce the core loss; then, the total loss of the magnetic core and winding is comprehensively considered, and the shape of the magnetic column, the size of the magnetic core and the winding layout are optimized to meet the minimization of the total loss of the transformer; finally, the winding loss and the size of the parasitic capacitance are comprehensively analyzed, and the winding is optimized for a second time, so that the winding loss is within an acceptable range under the main optimization direction of reducing the parasitic capacitance. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The accompanying drawings in the specification, which constitute a part of the present invention, are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0051] Figure 1 It is a flow chart of a high-frequency planar matrix transformer optimization method according to an embodiment of the present invention;

[0052] Figure 2 is a circuit diagram of a matrix transformer according to an embodiment of the present invention;

[0053] Figure 3 It is the magnetic core integration solution described in the embodiment of the present invention;

[0054] Figure 4 It is a schematic diagram of the shape of the magnetic column and the magnetic core chassis according to an embodiment of the present invention;

[0055] Figure 5 is a schematic diagram of the structure of a matrix transformer according to an embodiment of the present invention;

[0056] Figure 6 is a schematic diagram of a four-layer winding method according to an embodiment of the present invention;

[0057] FIG. 7( a ) is a schematic diagram of a square magnetic column winding according to an embodiment of the present invention;

[0058] FIG7( b ) is a schematic diagram of a circular magnetic column winding according to an embodiment of the present invention;

[0059] Figure 8 is a top view of a magnetic core according to an embodiment of the present invention;

[0060] Fig. 9 is a schematic diagram of a winding area optimization solution according to an embodiment of the present invention;

[0061] Fig.10 Schematic diagram of comparison of parasitic capacitance and winding loss in an embodiment of the present invention. DETAILED DESCRIPTION

[0062] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0063] It should be noted that the following detailed descriptions are all illustrative and intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present invention belongs.

[0064] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0065] In the absence of conflict, the embodiments of the present invention and the features of the embodiments may be combined with each other.

[0066] Embodiment 1

[0067] like Figure 1 As shown, this embodiment provides a high-frequency planar matrix transformer optimization method. This embodiment uses the method applied to a server as an example. It can be understood that the method can also be applied to a terminal, and can also be applied to a terminal, a server, and a system, and is implemented through the interaction between the terminal and the server. The server can be an independent physical server, or a server cluster or a distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network servers, cloud communications, middleware services, domain name services, security services CDN, and big data and artificial intelligence platforms. The terminal can be a smart phone, a tablet computer, a laptop computer, a desktop computer, a smart speaker, a smart watch, etc., but is not limited to this. The terminal and the server can be directly or indirectly connected via wired or wireless communication, and this application is not limited here. In this embodiment, the method includes the following steps:

[0068] According to the relationship between core loss, core volume and core flux density, the shape and size of the core are determined with the goal of minimizing core loss.

[0069] Comprehensively consider the total loss of the magnetic core and winding, and determine the shape of the magnetic column and the winding layout with the goal of minimizing the total loss of the high-frequency planar transformer;

[0070] A comprehensive analysis of winding loss and parasitic capacitance is performed to ensure that the winding loss is within an acceptable range while minimizing parasitic capacitance, and the winding is then redesigned for secondary optimization.

[0071] According to the relationship between the core loss, the core volume and the core flux density, the shape and size of the core are determined with the goal of minimizing the core loss, specifically:

[0072] Use the core area method to estimate the core size;

[0073] The core base is round or square, based on the principle that both sides of the core base are extended to the width of the single magnetic column window to reduce the magnetic flux density of the core base and thus reduce the magnetic flux loss.

[0074] The above-mentioned comprehensive consideration of the total loss of the magnetic core and winding, with the goal of minimizing the total loss of the high-frequency planar transformer, determines the shape of the magnetic column and the winding layout, specifically:

[0075] When the AP value of the magnetic core and the height of the magnetic column are determined, the core loss and winding loss are calculated, and the sum of the core loss and winding loss is taken as the total loss of the high-frequency planar transformer;

[0076] With the goal of minimizing the total loss of the high-frequency planar transformer, the shape of the core base is determined, and then the shape of the magnetic column is determined;

[0077] The winding layout is determined by the shape of the core base.

[0078] The winding loss is specifically:

[0079] The equivalent resistance of the primary and secondary sides of a square winding and a single-layer circular winding can be expressed as:

[0080]

[0081]

[0082] Where ρ is the resistivity of the copper foil; Assume that the effective value of the primary current of the transformer is I o , then the total winding loss P corresponding to the square magnetic column and the circular magnetic column ws and P wc They are:

[0083]

[0084] In the formula, F R_p With F R_s are the AC equivalent resistance coefficients of the primary winding and secondary winding of the transformer respectively.

[0085] The core loss is specifically:

[0086] Volume of square magnetic core Vcs And the volume V of the circular magnetic core cc They are:

[0087]

[0088] The height h of the magnetic column is determined by the thickness and quantity of the winding PCB.

[0089] Core loss P c and the core volume V c And the core loss density P v related,

[0090] P c =P v ·V c .

[0091] The comprehensive analysis of winding loss and parasitic capacitance makes the winding loss within an acceptable range under the premise of minimizing parasitic capacitance, and performs secondary optimization design on the winding, specifically:

[0092] While ensuring that the winding loss is within an acceptable range, the purpose of reducing the interlayer capacitance is achieved by reducing the area of ​​the winding.

[0093] After reducing the inner diameter of the winding, the corresponding winding distance is adjusted according to the reduced width to meet the minimum overall resistance of the adjusted winding;

[0094] The area optimization interval is defined at two intersection points to ensure that the parasitic capacitance is optimized while the winding loss is increased within an acceptable range.

[0095] The key point of this embodiment is that the losses of the magnetic core and the winding are combined to minimize the combined loss of the two, which does not mean that the magnetic core loss is simply minimized or the winding loss is minimized; another technical key point is to reduce the inter-layer parasitic capacitance by reducing the facing area between the winding layers. The position of the reduced winding is relatively unique, which can greatly reduce the inter-layer parasitic capacitance while minimizing the increase in winding loss.

[0096] In order to better illustrate the specific process of the method of the present invention, this embodiment analyzes and designs in detail a planar transformer with a voltage of 380V / 12V and an operating frequency of 1MHz. By optimizing the design of the magnetic core and the winding, the comprehensive loss of the magnetic core and the winding is minimized and the parasitic capacitance between the winding layers is reduced.

[0097] 1) Transformer core optimization. The primary and secondary voltages of the designed transformer are 380V and 12V respectively, so its transformation ratio is 32:1. The concept of matrix transformer is used for design [7-8]. The circuit diagram is shown in the figure. Figure 2 As shown, Ls1-Ls8 are leakage inductances of eight sub-transformers, and Lm1-Lm8 are magnetizing inductances of eight sub-transformers.

[0098] Core material and size design: ferrite has a higher "performance factor" (PF) value at high frequencies and is an ideal core material. Through a comprehensive comparison of the PF values ​​of the three ferrite cores 3C95, 3C94, and 3F36 in the data sheet, 3F36 has a more superior performance at a working frequency of 1MHz, so this material is selected as the core material of the matrix transformer. It is understandable that the selection of materials includes but is not limited to the above types, and the optimal material should be selected based on factors such as the power and frequency of the designed transformer.

[0099] The core size can be estimated using the area product AP method. The final expression for the transformer area product AP is:

[0100]

[0101] In the formula, A w is the core window area, A e is the effective cross-sectional area of ​​the core, P in is the transformer input power, η is the transformer efficiency, K f is the primary current waveform factor, K w is the core window area utilization, B m is the maximum magnetic flux density. Substituting the relevant parameters into formula (1), it can be calculated that the theoretical value of AP is about 0.0928cm4.

[0102] Magnetic integration solutions, magnetic core integration solutions such as Figure 3 As shown in the figure, after the four magnetic columns are integrated, although the magnetic flux in the column remains unchanged, the magnetic flux density in the rest of the core is reduced by half, and the magnetic flux distribution in each area of ​​the core is more uniform, which greatly reduces the core loss. Compared with before the core integration, the core loss can be reduced by about 40%.

[0103] Specifically, core integration is the design of the core shape. To make the magnetic flux distribution in the core more uniform, under the same core window area Aw, the edge of any one of the four magnetic columns should be at equal distance from the center of another magnetic column in the horizontal and vertical directions. Therefore, the cross section parallel to the base can be designed to be square or circular. Extending both sides of the core base to the width of the single magnetic column window can further reduce the magnetic flux density of the core base, thereby reducing the magnetic flux loss. The core base can be designed as Figure 4 The square or circular magnetic column shown, where Figure 4 (a) The side length of the square magnetic column is 2a, and the distance between the centers of the magnetic columns is 2L s , therefore, the length of the single-column window is L s -a, let the height of the magnetic column be h, then the single magnetic column A e and Aw They are:

[0104] A e =2a·2a=4a 2 (2)

[0105] A w =(L s -a)·h (3)

[0106] The transformer area product AP is

[0107] AP=A w A e =4a 2 (L s -a)·h (4)

[0108] Similarly, the AP value of a circular magnetic column is:

[0109] AP=A w A e =πr 2 (L c -r)·h (5)

[0110] Assume that the AP value of the required magnetic core is a constant value C. At this time, the bottom area of ​​the magnetic core can be obtained as:

[0111]

[0112] Similarly, the bottom area of ​​the circular magnetic core is:

[0113]

[0114] Assume that the overall height of the core is H, which includes the height of the magnetic column h and the height of the core base and the core top plate h t , the relationship between H and h is:

[0115] H=h+2h t (8)

[0116] The magnetic flux transmitted by each magnetic column through the magnetic core base and the top plate is 1 / 2 of the magnetic flux of a single magnetic column. Therefore, the effective cross-sectional area of ​​the transmission path of the base and the top plate should not be less than half of the effective cross-sectional area of ​​the magnetic column, that is:

[0117]

[0118] Combining equations (5)-(8), the volume of the square magnetic core Vcs and the volume of the circular magnetic core Vcc are respectively:

[0119]

[0120] It should be noted that the volume reduction caused by the air gap of the magnetic column is ignored in the calculation of formula (10). The height h of the magnetic column is determined by the thickness and number of the winding PCB. Since the winding is designed with a double-layer PCB stack, h is 3.2 mm.

[0121] Core loss Pc and core volume V c And the core loss density P v Related to, among which P v It can be found in the core material data sheet:

[0122] P c =P v ·V c (11)

[0123] 2) Transformer winding optimization, combined with Figure 2 Matrix transformer circuit diagram and Figure 3 In the core integration solution, the primary side of the transformer is a 32-turn winding connected in series on 4 magnetic columns, and the secondary side is 16 1-turn windings connected in parallel on 4 magnetic columns. Therefore, each magnetic column has 8 turns of primary winding in series and 4 turns of secondary winding in parallel. The design is completed using two 4-layer PCBs. The top layer (1st layer) and the bottom layer (4th layer) of the PCB are used as secondary windings, and the 2nd and 3rd layers are used as primary windings. The secondary winding has 1 turn per layer, and different layers are connected in parallel. The primary winding has 2 turns per layer, and the layers are connected in series and through vias. The final designed matrix transformer is as follows: Figure 5 shown.

[0124] Each layer of winding on the PCB needs to be wound according to the purpose of magnetic cancellation, so that the magnetic flux on the left and right sides of the same layer of winding cancels each other, and the magnetic flux generated between the upper and lower layers of winding also cancels each other, thus reducing the magnetic flux density as much as possible. The specific winding method is as follows Figure 6 As shown: The dotted arrow in the figure indicates the direction of current flow. This winding method reduces the core loss by magnetic cancellation to reduce the total loss. In addition, this design of port misalignment also reduces the coupling between layers.

[0125] 3) Overall optimization of transformer

[0126] The transformer loss is minimized in the design. The winding models corresponding to the square and circular magnetic columns are as follows: Figure 7(a) and 7(b) As shown, where h p With h s are the copper thickness of the primary and secondary windings respectively. At an operating frequency of 1MHz, when h p When the copper thickness is 2 oz and hs is 3 oz, the AC equivalent resistance is the smallest. o ,therefore:

[0127]

[0128] For the two-turn winding shown in Figure 7(a) and the right side of Figure 7(b), when (square magnetic column) or (circular magnetic column), the equivalent resistance of the winding is the smallest. At this time, the equivalent resistance of the primary and secondary sides of the square winding and the circular winding single layer can be expressed as:

[0129]

[0130] In the designed matrix transformer, the primary side is 32 turns of windings in series in the 16-layer PCB, and the secondary side is 16 turns of windings in parallel in the 16-layer PCB. Assume that the effective value of the primary current of the transformer is I o , then the total winding loss P corresponding to the square magnetic column and the circular magnetic column ws and P wc They are:

[0131]

[0132] In the formula, F R_p With F R_s are the AC equivalent resistance coefficients of the primary winding and secondary winding of the transformer respectively.

[0133] Combining equations (4), (5), (10), (11) and (15), the total loss P of the matrix transformer corresponding to the square magnetic column is s And the total loss P of the matrix transformer corresponding to the circular magnetic column c They are:

[0134]

[0135] When the AP value of the magnetic core and the height h of the magnetic column are determined, the total loss of the matrix transformer is only related to a or r. Therefore, a or r can be determined by the method of finding the maximum value, so as to obtain the minimum loss of the matrix transformer. The AP value of the transformer is set to 0.13cm4 and h = 3.2mm with a certain margin based on theoretical calculation. It can be seen from the calculation that the total loss of the matrix transformer using circular magnetic columns is smaller, and when r ≈ 4mm, the total loss of the transformer is the smallest. When r is determined, Lc = 12mm can be calculated according to formula (5).

[0136] The final designed core is as follows Figure 8 As shown, the base size is 48mm*36mm*3mm, and the magnetic column is a cylinder with a radius of 4mm. For each magnetic column, the window width is 8mm, and the window height is about 3.2mm to accommodate the thickness of 2 PCB boards. Therefore, the window area of ​​the magnetic core Aw = 0.256cm2, and the cross-sectional area of ​​the magnetic core A e =0.503cm2, the AP value of the core is:

[0137] AP=A w A e =0.1287cm 4 (17)

[0138] The actual transformer AP value is about 1.4 times the theoretical value, which meets the design requirements.

[0139] The winding area design can achieve the effect of reducing the interlayer capacitance by appropriately reducing the area of ​​the winding. However, the reduction of the winding area will inevitably lead to an increase in the current density, which in turn leads to an increase in the winding loss. Therefore, there is a mutually restrictive relationship between the parasitic capacitance and the AC loss of the winding, so that the size of the winding area is ultimately limited to a certain range. In order to achieve a relatively balanced state between the parasitic capacitance and the AC loss, a comprehensive analysis and comparison of the two is required. The winding area is further optimized to reduce the interlayer capacitance of the winding.

[0140] Since the parasitic capacitance is proportional to the area of ​​the winding, and has nothing to do with the actual area of ​​each layer of winding, the area of ​​the primary and secondary windings of each layer of the transformer does not need to be reduced at the same time to keep the area of ​​each layer of winding exactly the same. On the contrary, reducing the winding area will increase the AC loss of the winding and make the eddy current effect more serious. Therefore, the optimization plan must first ensure that the number of layers of windings to be optimized is as small as possible, so that the AC loss is not too large. Figure 5 It can be seen that by only changing the area of ​​the second and third winding layers, it is possible to reduce the interlayer parasitic capacitance between the primary sides and the parasitic capacitance between the primary side and the secondary side, while ensuring that the increase in AC loss is minimized.

[0141] Fig. 9 The following are two winding area reduction schemes. Scheme 1 reduces the center area of ​​the winding, and scheme 2 reduces the area of ​​the edge area. The reduced area is shown in Fig. 9 Shown in the shaded area.

[0142] The reduction in area under the two shapes is ΔS1 and ΔS2, respectively, and their expressions are shown in formula (18):

[0143]

[0144] Where r is the inner diameter of the winding.

[0145] After the winding is reduced, x is adjusted accordingly according to the reduced widths d1 and d2 to ensure that the overall resistance of the winding is minimized after adjustment. Therefore, after adjustment according to Schemes 1 and 2, the equivalent resistance of the primary single-layer winding can be expressed as:

[0146]

[0147] In the formula, Rp1 and R p2 Respectively represent the primary side single layer equivalent resistance of scheme 1 and scheme 2 after adjustment. Let R p1 =R p2 , that is, the increase in equivalent resistance of the two schemes is the same, then the relationship between d1 and d2 is:

[0148]

[0149] When d1 is less than 8mm, ΔS2>ΔS1. This means that when the same equivalent resistance is added, the winding area of ​​Scheme 2 is reduced more. Since the parasitic capacitance is proportional to the area facing the winding, Scheme 2 is more conducive to reducing the parasitic capacitance under the premise of increasing the same equivalent resistance. By changing the size of d2 in Scheme 2, the increase in the primary single-layer parasitic resistance and the decrease in the parasitic capacitance between the primary and secondary sides can be obtained. Setting the area optimization interval at two intersections can ensure that while the parasitic capacitance is optimized, the winding loss is also increased within an acceptable range, and the winding loss is not greatly increased in order to optimize the parasitic capacitance. When d2 changes from 0 to 1mm, the increase in the primary equivalent resistance and the decrease in the parasitic capacitance in Scheme 2 can be calculated. When d2=0.506mm, there is an intersection between the single pair of primary and secondary parasitic capacitance and the single-layer primary equivalent resistance. At this time, the increase in equivalent resistance is 10.28% and the decrease in parasitic capacitance is 9.17%.

[0150] Simulation and experimental analysis

[0151] Parasitic capacitance simulation results

[0152] The parasitic capacitance simulation value of Scheme 2 in the second quadrant of the matrix transformer is obtained through Maxwell electrostatic field simulation. (In order to facilitate the simulation operation, when simulating parasitic capacitance and winding loss, Figure 6 The winding in the second quadrant is simulated and analyzed. The final parasitic capacitance simulation value and the increase in the equivalent resistance of the primary winding are shown in Table 1;

[0153] Table 1 Simulation results of parasitic capacitance of scheme 2

[0154] d2(mm) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 <![CDATA[C ps (pF)]]> 23.00 22.59 22.25 21.94 21.56 21.20 20.84 20.48 20.16 19.80 <![CDATA[R dc_p (%)]]> 101.85 103.80 105.84 107.99 110.27 112.67 115.22 117.93 120.80 123.86

[0155] By processing the data in Table 1, we can get Fig.10 The line graph shown is the reduction in parasitic capacitance and the increase in primary winding resistance.

[0156] Fig.10C% is the percentage of parasitic capacitance reduction in Scheme 2, and R% is the percentage of winding loss increase in Scheme 2. The intersection of C% and R% in the figure is the best optimization point that takes into account both parasitic capacitance reduction and winding resistance increase. It can be seen from the figure that the best optimization point is at d2=0.46mm, at which time the parasitic capacitance is reduced by about 10.83% and the winding resistance is increased by about 9.17%, which is basically consistent with the theoretical analysis results.

[0157] In order to verify the above optimization effect, an experimental prototype was built. The specific parameters of the prototype are shown in Table 2.

[0158] Table 2 Experimental prototype parameters

[0159] parameter Numeric Rated power Pn 200W Primary rated voltage up 380V Secondary rated voltage us 12V Operating frequency 1MHz Core material 3F36 Core volume 11.01cm3 Primary winding copper thickness 2oz Secondary winding copper thickness 3oz Primary winding width 4.75mm,2.79mm Secondary winding width 7.75mm

[0160] Under rated working conditions, the efficiency of the matrix transformer is 98.14%, of which the core loss accounts for the largest proportion, accounting for about 37.89% of the total loss. Due to the shunting effect of the current, the secondary winding loss is slightly less than the core loss. The primary winding loss has the smallest loss, accounting for about 24.13% of the total loss. The parasitic capacitance of the primary and secondary sides of the transformer and the AC equivalent resistance of the primary and secondary sides can be measured using an LCR meter at an operating frequency of 1MHz. The parasitic capacitance between the primary and secondary sides is about 108.9pF (because the solution domain set in Maxwell is air, that is, it is assumed that the filling between each layer of windings is air, and in fact the PCB board is filled with FR-4 material, whose dielectric constant relative to air is about 5.5, so the measured parasitic capacitance parameters are about 5.2-5.5 times the simulation value), the primary AC equivalent resistance is about 3.19Ω, and the secondary AC equivalent resistance is about 0.08Ω.

[0161] This embodiment takes a 1-MHz 380-V / 12-V 200-W matrix transformer as an example to introduce in detail the design process and optimization method of a large-scale buck-boost matrix transformer. The total minimization of the core and winding losses is comprehensively considered, the shape and size of the core chassis and the magnetic column are optimized, and the shape and layout of the primary and secondary windings are designed, so that the total loss of the matrix transformer is minimized while meeting the design requirements. In order to take into account the influence of the parasitic capacitance between the winding layers of the matrix transformer and the winding loss, the primary winding positive area is optimized twice, so that the increase in winding loss and the reduction of parasitic capacitance between winding layers are balanced, so as to further improve the overall performance of the transformer. The optimized transformer simulation model is built using Maxwell to verify the effectiveness of the above-mentioned optimization design method. A matrix transformer experimental prototype is built to verify the rationality and feasibility of the above-mentioned optimization design method. The rated efficiency of the prototype can reach 98.14%.

[0162] Embodiment 2

[0163] This embodiment provides a high-frequency planar matrix transformer optimization system, including:

[0164] An appearance optimization module is configured to determine the shape and size of the magnetic core with the goal of minimizing the core loss according to the relationship between the core loss and the core volume and the core magnetic flux density;

[0165] The layout optimization module is configured to comprehensively consider the total loss of the magnetic core and winding, and determine the shape of the magnetic column and the winding layout with the goal of minimizing the total loss of the high-frequency planar transformer;

[0166] The secondary optimization module is configured to comprehensively analyze the winding loss and the parasitic capacitance, so that the winding loss is within an acceptable range under the premise of minimizing the parasitic capacitance, and the winding is secondary optimized.

[0167] The examples and application scenarios implemented by the above modules and corresponding steps are the same, but are not limited to the contents disclosed in the above embodiment 1. It should be noted that the above modules as part of the system can be executed in a computer system such as a set of computer executable instructions.

[0168] The description of each embodiment in the above embodiments has different emphases. For parts not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0169] The proposed system can be implemented in other ways. For example, the system embodiment described above is only illustrative, and the division of the modules is only a logical function division. In actual implementation, there may be other division methods, such as multiple modules can be combined or integrated into another system, or some features can be ignored or not executed.

[0170] Embodiment 3

[0171] This embodiment provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the steps in the high-frequency planar matrix transformer optimization method described in the above-mentioned embodiment 1 are implemented.

[0172] Embodiment 4

[0173] This embodiment provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, the steps in the high-frequency planar matrix transformer optimization method described in the above-mentioned embodiment 1 are implemented.

[0174] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of hardware embodiments, software embodiments, or embodiments combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) containing computer-usable program code.

[0175] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0176] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0177] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0178] A person skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0179] Although the above describes the specific implementation mode of the present invention in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without creative work are still within the scope of protection of the present invention.

Claims

1. A high frequency planar matrix transformer optimization method, characterized in that: include: According to the relationship between core loss, core volume and core flux density, the shape and size of the core are determined with the goal of minimizing core loss. According to the relationship between the core loss, the core volume and the core flux density, the shape and size of the core are determined with the goal of minimizing the core loss, specifically: Use the core area method to estimate the core size; The core base is determined to be round or square by using the principle that the two sides of the core base are extended to the width of the single magnetic column window to reduce the magnetic flux density of the core base and thus reduce the magnetic flux loss; Comprehensively consider the total loss of the magnetic core and winding, and determine the shape of the magnetic column and the winding layout with the goal of minimizing the total loss of the high-frequency planar transformer; The above-mentioned comprehensive consideration of the total loss of the magnetic core and winding, with the goal of minimizing the total loss of the high-frequency planar transformer, determines the shape of the magnetic column and the winding layout, specifically: When the AP value of the magnetic core and the height of the magnetic column are determined, the core loss and winding loss are calculated, and the sum of the core loss and winding loss is taken as the total loss of the high-frequency planar transformer; With the goal of minimizing the total loss of the high-frequency planar transformer, the shape of the core base is determined, and then the shape of the magnetic column is determined; Determine the winding layout according to the shape of the core base; Comprehensively analyze the winding loss and parasitic capacitance to ensure that the winding loss is within an acceptable range while minimizing the parasitic capacitance, and perform secondary optimization design on the winding; The comprehensive analysis of winding loss and parasitic capacitance makes the winding loss within an acceptable range under the premise of minimizing parasitic capacitance, and performs secondary optimization design on the winding, specifically: While ensuring that the winding loss is within an acceptable range, the purpose of reducing the interlayer capacitance is achieved by reducing the area of ​​the winding. After reducing the inner diameter of the winding, the corresponding winding distance is adjusted according to the reduced width to meet the minimum overall resistance of the adjusted winding; The area optimization interval is defined at two intersection points to ensure that the parasitic capacitance is optimized while the winding loss is increased within an acceptable range.

2. The high-frequency planar matrix transformer optimization method according to claim 1, characterized in that: The principle of using the two sides of the core base to extend to the width of the single magnetic column window to reduce the magnetic flux density of the core base and thus reduce the magnetic flux loss is specifically: Under the same core window area, the edge of any one of the four magnetic columns is at equal distance from the center of another magnetic column in the horizontal and vertical directions, and the cross section of the magnetic column parallel to the base is designed to be square or circular.

3. The high-frequency planar matrix transformer optimization method according to claim 1, characterized in that: The winding loss is specifically: The equivalent resistance of the primary and secondary sides of a square winding and a single-layer circular winding can be expressed as: Where ρ is the resistivity of the copper foil; Assume that the effective value of the primary current of the transformer is I o , then the total winding loss P corresponding to the square magnetic column and the circular magnetic column ws and P wc They are: In the formula, F R_p With F R_s are the AC equivalent resistance coefficients of the primary winding and secondary winding of the transformer respectively.

4. The high-frequency planar matrix transformer optimization method according to claim 1, characterized in that: The core loss is specifically: Volume of square magnetic core V cs And the volume V of the circular magnetic core cc They are: The height h of the magnetic column is determined by the thickness and quantity of the winding PCB; Core loss P c and the core volume V c And the core loss density P v related, P c =P v ·V c 。 5. High frequency planar matrix transformer optimization system, characterized in that: include: An appearance optimization module is configured to determine the shape and size of the magnetic core with the goal of minimizing the core loss according to the relationship between the core loss and the core volume and the core magnetic flux density; According to the relationship between the core loss, the core volume and the core flux density, the shape and size of the core are determined with the goal of minimizing the core loss, specifically: Use the core area method to estimate the core size; The core base is determined to be round or square by using the principle that the two sides of the core base are extended to the width of the single magnetic column window to reduce the magnetic flux density of the core base and thus reduce the magnetic flux loss; The layout optimization module is configured to comprehensively consider the total loss of the magnetic core and winding, and determine the shape of the magnetic column and the winding layout with the goal of minimizing the total loss of the high-frequency planar transformer; The above-mentioned comprehensive consideration of the total loss of the magnetic core and winding, with the goal of minimizing the total loss of the high-frequency planar transformer, determines the shape of the magnetic column and the winding layout, specifically: When the AP value of the magnetic core and the height of the magnetic column are determined, the core loss and winding loss are calculated, and the sum of the core loss and winding loss is taken as the total loss of the high-frequency planar transformer; With the goal of minimizing the total loss of the high-frequency planar transformer, the shape of the core base is determined, and then the shape of the magnetic column is determined; Determine the winding layout according to the shape of the core base; The secondary optimization module is configured to comprehensively analyze the winding loss and the parasitic capacitance, so that the winding loss is within an acceptable range under the premise of minimizing the parasitic capacitance, and perform secondary optimization design on the winding; The comprehensive analysis of winding loss and parasitic capacitance makes the winding loss within an acceptable range under the premise of minimizing parasitic capacitance, and performs secondary optimization design on the winding, specifically: While ensuring that the winding loss is within an acceptable range, the purpose of reducing the interlayer capacitance is achieved by reducing the area of ​​the winding. After reducing the inner diameter of the winding, the corresponding winding distance is adjusted according to the reduced width to meet the minimum overall resistance of the adjusted winding; The area optimization interval is defined at two intersection points to ensure that the parasitic capacitance is optimized while the winding loss is increased within an acceptable range.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps in the high-frequency planar matrix transformer optimization method as described in any one of claims 1 to 3 are implemented.

7. A computer-readable storage medium as claimed in claim 6, wherein a computer program is stored thereon, characterized in that: When the program is executed by a processor, the steps of the high-frequency planar matrix transformer optimization method as described in claim 4 are implemented.

8. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the steps in the high-frequency planar matrix transformer optimization method as described in any one of claims 1-4 are implemented.

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