Multi-chip packaging structure and manufacturing method thereof

Abstract

The present application discloses a multi-chip packaging structure and a manufacturing method thereof, wherein the first surface of the first chip is connected to a first metal connection device, and the first surface of the second chip is connected to a second metal connection device; the second surface of the first chip is connected to a first lead frame by means of a mounting adhesive; the first surface of the isolation material is pressed onto a predetermined first position on the first surface of the first chip; the metal connection device of the second chip is connected to a second lead frame by means of a reflow process and the second chip is pressed onto the second surface of the isolation device, the second surface of the isolation device being the surface corresponding to the first surface thereof, and finally the whole is plastic-sealed to form the multi-chip packaging structure. The isolation device of the packaging structure of the present application has good coupling, a simple overall packaging structure, and good chip connectivity.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and more particularly to a multi-chip packaging structure and a manufacturing method thereof. Background Art

[0002] In the packaging of integrated circuits, the high-voltage die needs to be isolated from the low-voltage die to improve the stability and safety of the circuit. Common high- and low-voltage isolation technologies mainly include PN junction isolation, optocoupler isolation, magnetic isolation, capacitive isolation, and inductive isolation.

[0003] like Figure 1 As shown, two tube cores (such as the first tube core 10 and the second tube core 20) made of silicon substrates are stacked and packaged, and the two stacked tube cores are connected by an isolation material (such as a dielectric layer 30), and the conductive layers on the two tube cores and the organic material form an isolator, thereby achieving high and low voltage isolation. However, a dielectric pre-impregnated resin glass fiber cloth (such as PP material) is used as an insulating material in the middle. In addition to the insulating material, there is also the substrate of the tube core between the two isolated substrates, so the coupling degree is relatively poor.

[0004] Therefore, it is necessary to provide an improved technical solution to overcome the above technical problems existing in the prior art. Summary of the invention

[0005] In view of this, an object of the present invention is to provide a chip packaging structure and a manufacturing method thereof, so as to solve the technical problem of insufficient coupling degree caused by the chip packaging structure and the manufacturing method thereof existing in the prior art.

[0006] A manufacturing method for a multi-chip packaging structure according to the present application includes: connecting the first surface of a first chip to a first metal connecting device, and connecting the first surface of a second chip to a second metal connecting device; connecting the second surface of the first chip to a first lead frame by means of a die bonding adhesive; pressing the first surface of an isolation material to a predetermined first position on the first surface of the first chip; connecting the metal connecting device of the second chip to the second lead frame by means of a reflow process and pressing the second chip to the second surface of the isolation device, the second surface of the isolation device being a surface corresponding to the first surface thereof; connecting the second surface of the second chip to a third lead frame by means of a die bonding adhesive; connecting the metal connecting device of the first chip to a fourth lead frame by means of a reflow process; and sealing the first chip, the second chip, and gaps between the first to fourth lead frames by means of a sealing material to form the multi-chip packaging structure.

[0007] Preferably, it also includes: the first metal connecting device includes a copper connecting column and a tin metal layer, and the first metal connecting device of the metal layer of the first chip is connected to the fourth lead frame in a flip-chip manner; the second metal connecting device includes a copper connecting column and a tin metal layer, and the second metal connecting device of the metal layer of the second chip is connected to the second lead frame in a flip-chip manner.

[0008] Preferably, it also includes: the first chip includes a semiconductor layer and a metal layer located on the semiconductor, and the second chip includes a semiconductor layer and a metal layer located on the semiconductor; the metal layer of the first chip, the metal layer of the second chip and the isolation material constitute an isolation device, and the isolation device is at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

[0009] Preferably, a first conductive layer is provided on the metal layer of the first chip, and a second conductive layer is provided on the metal layer of the second chip, and at least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

[0010] Preferably, it also includes: the metal connecting device is arranged at the first end of the second chip, the second end of the second chip is pressed to the second surface of the isolation material, and the connection position of the metal connecting device and the connection position of the isolation material are at a certain distance.

[0011] Preferably, the thickness of the metal connection means connecting the second chip to the second lead frame is equal to the sum of the thickness of the first chip and the isolation material.

[0012] Preferably, the isolation material comprises at least one of glass, glass fiber cloth pre-impregnated with resin, and an adhesive film.

[0013] Preferably, the die-mounting adhesive is a conductive die-mounting adhesive having an adhesive function, so as to realize electrical connection between the first chip and the first lead frame and electrical connection between the second chip and the third lead frame.

[0014] In a second aspect, a multi-chip packaging structure is provided, comprising: a first chip, a second chip, an isolation material and a lead frame, wherein the second surface of the first chip is connected to the first lead frame by means of a die bonding adhesive, and the first surface is connected to a fourth lead frame by means of a flip-chip method, and the isolation material is arranged at a predetermined first position of the first chip, and its contact surface is the first surface of the isolation material; the first surface of the second chip is connected to the second lead frame by means of a flip-chip method, and the second surface is connected to the third lead frame by means of a die bonding adhesive, and one end of the second chip is arranged on the second surface of the isolation material, and the second surface of the isolation material is a surface corresponding to its first surface.

[0015] Preferably, the first chip includes a top metal layer, the second chip includes a top metal layer,

[0016] The top metal layer of the first chip, the top metal layer of the second chip and the isolation material constitute an isolation device.

[0017] Preferably, a first conductive layer is provided on the metal layer of the first chip, and a second conductive layer is provided on the metal layer of the second chip, and at least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

[0018] Preferably, a copper conductive column and a tin conductive metal, a first end of the first surface of the first chip is connected to the fourth lead frame through the copper conductive column and the tin conductive metal, and a second end is connected to the isolation material;

[0019] A first end of the first surface of the second chip is connected to the second lead frame through a copper conductive column and a tin conductive metal, and a second end is connected to the isolation material.

[0020] Preferably, the first to fourth lead frames are connected into one lead frame.

[0021] Preferably, a portion of the first end of the first surface of the first chip close to the edge is connected to the fourth lead frame by flip-chip, and the isolation material is disposed on the second end of the first surface of the first chip, and one end of the isolation material is flush with the edge of the second end.

[0022] Preferably, a portion of the first end of the first surface of the second chip close to an edge is connected to the second lead frame by flip-chip, and one end of the isolation material is flush with the second end of the first surface of the second chip.

[0023] Preferably, the thickness of the metal connection device connecting the first chip to the fourth lead frame is equal to the sum of the thickness of the second chip and the isolation material; the thickness of the metal connection device connecting the second chip to the second lead frame is equal to the sum of the thickness of the first chip and the isolation material.

[0024] The control scheme of the chip packaging structure of the present invention is adopted to connect the first surface of the first chip to the first lead frame by means of bonding wires; the first surface of the isolation material is pressed onto the predetermined first position of the first chip; the first surface of the second chip is connected to the second lead frame by means of flip-chip; the first surface of the second chip is pressed onto the second surface of the isolation device, the second surface of the isolation device being the surface corresponding to the first surface thereof; the first chip, the second chip and the gaps between the first lead frame and the second lead frame are plastic-sealed by plastic-sealing material to form the multi-chip packaging structure. The isolation device of the packaging structure of the present application has good coupling, a simple overall packaging structure and good chip connectivity. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A schematic diagram of a multi-chip packaging structure in the prior art is shown;

[0026] Figure 2 A schematic structural diagram of a multi-chip packaging structure according to a first embodiment of the present disclosure is shown;

[0027] Figures 3 to 8 A schematic cross-sectional view showing a portion of a method for manufacturing an electrical isolation structure according to a first embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0028] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitution, modification, equivalent method and scheme made within the spirit and scope of the present invention.

[0029] In order to make the public have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, but those skilled in the art can fully understand the present invention without these detailed descriptions.

[0030] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the accompanying drawings are all simplified and not in exact proportion, and are only used for the purpose of conveniently and clearly assisting in explaining the embodiments of the present invention.

[0031] Figure 2 A schematic structural diagram of a multi-chip packaging structure according to a first embodiment of the present disclosure is shown; Figures 3 to 8 The cross-sectional schematic diagram shows a part of the stages in the method for manufacturing the multi-chip package structure according to the first embodiment of the present disclosure.

[0032] like Figure 2As shown, a multi-chip packaging structure of the first embodiment of the present disclosure includes: a first chip 10, a second chip 20, an isolation material 30 and a lead frame, the second surface (such as the lower surface) of the first chip 10 is connected to the first lead frame 40-1 by means of a chip bonding adhesive, and the first surface is connected to the fourth lead frame 40-4 by means of a flip-chip method (such as a metal connection device composed of a copper conductive column 50-2 and a tin conductive metal 60-2), the isolation material 30 is arranged at a predetermined first position of the first chip, and its contact surface is the first surface of the isolation material (such as the lower surface), specifically, the first end of the first surface of the first chip is connected to the fourth lead frame by means of a copper conductive column and a tin conductive metal, and the second end is connected to the isolation material, through the above-mentioned arrangement, the surface area of ​​the first chip is utilized as reasonably as possible, so that the flip-chip installation and isolation coupling functions are used separately without interfering with each other.

[0033] Continue to refer Figure 2 The first surface (such as the lower surface) of the second chip 20 is connected to the second lead frame 40-2 by a flip-chip method (such as a metal connecting device composed of a copper conductive column 50-1 and a tin conductive metal 60-1), and the second surface (such as the upper surface) is connected to the third lead frame 40-3 by a mounting adhesive. One end of the second chip is set on the second surface (such as the upper surface) of the isolation material, and the second surface of the isolation material is a surface corresponding to its first surface. Specifically, the first end of the first surface of the second chip is connected to the second lead frame through a copper conductive column and a tin conductive metal, and the second end is connected to the isolation material. In this way, both function and area are reasonably allocated.

[0034] The first chip 100 includes a semiconductor layer and a metal conductive layer located on the semiconductor layer, wherein the semiconductor layer is, for example, a Si, SiC substrate or a laminated structure composed of a substrate and an epitaxial layer, wherein a CMOS circuit is formed by processes such as doping, etc.; the first surface (such as the lower surface) of the second chip 20 is connected to the lead frame 40-2 by flip-chip, and one end of the second chip is set on the second surface of the isolation material (such as the upper surface of 30), the second surface of the isolation material is a surface corresponding to its first surface, and the isolation material has a predetermined thickness so that the first surface and the second surface can form a certain distance. The second chip 200 includes a semiconductor layer and a metal conductive layer located on the semiconductor layer, wherein the semiconductor layer is, for example, a Si, SiC substrate or a laminated structure composed of a substrate and an epitaxial layer, wherein a functional circuit structure is formed by processes such as doping, etc. In this embodiment, the first lead frame to the fourth lead frame are finally connected and sealed into a lead frame, of course, it can also be a plurality of separate lead frames.

[0035] In one embodiment, the first chip includes a top metal layer, the second chip includes a top metal layer, and the top metal layer of the first chip, the top metal layer of the second chip and the isolation material constitute an isolation device. In some specific embodiments, the top metal layer of the first chip and the top metal layer of the second chip are two plates of an isolation capacitor, or the top metal layer of the first chip and the top metal layer of the second chip are two inductance coils of an isolation transformer. In this embodiment, the isolation material includes at least one of glass, pre-impregnated resin glass fiber cloth, and an adhesive film, and the adhesive film is usually made of polyimide and / or other high-temperature adhesives. It is known to those skilled in the art that a connecting layer is also provided between the metal layer and the isolation material to fix the metal layer to the isolation material, and the connecting material may be a metal of a titanium compound.

[0036] In another embodiment, a first conductive layer is disposed on the metal layer of the first chip, and a second conductive layer is disposed on the metal layer of the second chip, and at least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer. Similarly, a connection layer of a metal compound is also disposed between the conductive layer and the isolation material to fixedly connect the conductive layer and the isolation material.

[0037] Preferably, in this embodiment, the portion of the first end of the first surface of the first chip 10 close to the edge is connected to the fourth lead frame 40-1 by flip-chip method, the isolation material is set on the second end of the first surface of the first chip, and one end of the isolation material is flush with the edge of the second end; the portion of the first end of the first surface of the second chip 20 close to the edge is connected to the second lead frame 40-2 by flip-chip method, and one end of the isolation material is flush with the second end of the first surface of the second chip. Therefore, by setting the edge of the isolation material, the position of the isolation material can be fixed, and the installation is convenient, and the isolation device formed has good isolation and is not affected by the circuit connection.

[0038] Preferably, the thickness of the metal connection device connecting the first chip to the fourth lead frame (i.e., the sum of the thickness of the metal connection devices 50-2 and 60-2) is equal to the sum of the thickness of the second chip and the isolation material; the thickness of the metal connection device connecting the second chip to the second lead frame (i.e., the sum of the thickness of the metal connection devices 50-1 and 60-1) is equal to the sum of the thickness of the first chip and the isolation material. In this way, by setting the thickness of the isolation material, the upper surface and the lower surface of the entire packaging structure are flush, and the overall thickness is optimized to the greatest extent, so that the overall consistency of the system is good.

[0039] The embodiments of the present disclosure are not limited thereto, and those skilled in the art may make other arrangements for the connection layer, the conductive metal layer, and the isolation material as required.

[0040] Figures 3 to 8 The cross-sectional schematic diagram shows a part of the stages in the method for manufacturing the multi-chip package structure according to the first embodiment of the present disclosure.

[0041] In the first step, the first surface (upper surface) of the first chip 10 is connected to the first metal connection device (copper metal column 50-2 and tin metal layer 60-2), and the first surface of the second chip 29 is connected to the second metal connection device (copper metal column 50-1 and tin metal layer 60-1), and the metal column is used to prepare for the subsequent flip-chip installation, such as Figure 3 Status shown.

[0042] Furthermore, if Figure 4 As shown, the second surface (lower surface) of the first chip 10 is connected to the first lead frame through a die bonding adhesive. Here, the die bonding adhesive is a conductive die bonding adhesive with an adhesive function to achieve electrical connection between the first chip and the first lead frame 40-1.

[0043] Afterwards, the first surface (lower surface) of the isolation material 30 is pressed onto a predetermined first position of the first surface of the first chip; here, the predetermined first position is an end of the first chip, such as the left end, so that the isolation material can be well positioned. Here, the pressing can be achieved by masking and patterning, such as Figure 5 shown.

[0044] Next, the metal connection device of the second chip 20 is connected to the second lead frame 40-2 through a reflow process and the second chip is pressed onto the second surface of the isolation device, the second surface of the isolation device being the surface corresponding to the first surface thereof, and the projection areas thereof may overlap or overlap mostly. As shown in FIG6 , in this step, by setting the thickness of the metal connection device 50-1 and 60-1 equal to the sum of the thickness of the first chip and the isolation material, the second chip is pressed onto the second surface of the isolation device simultaneously during the process of connecting the metal connection device of the second chip 20 to the second lead frame 40 through a reflow process, and both can be installed in alignment.

[0045] Then, the second surface of the second chip 20 is connected to the third lead frame by die bonding adhesive, as shown in FIG. Figure 7 As shown, here, the die-mounting adhesive is a conductive die-mounting adhesive with an adhesive function to achieve electrical connection between the first chip and the first lead frame 40 - 1 .

[0046] Then, the metal connection device of the first chip 10 is connected to the fourth lead frame 40-4 through a reflow process; the first chip, the second chip and the gaps between the first to fourth lead frames are encapsulated by a plastic encapsulation material to form the multi-chip packaging structure. The reflow process can be an existing process method, and the plastic encapsulation material 70 can be an epoxy plastic encapsulation material. Figure 8 shown.

[0047] To sum up, the present application can improve the coupling degree of the isolation device through face-to-face stacking. If two opposite chips are isolated by different isolation materials, good voltage resistance, service life or different coupling functions can be achieved. In addition, through the flip-chip packaging method, the chip connection method can be small in size and the electrical performance connection is stable, which can be applied in different occasions.

[0048] It should be noted that the specific implementation and corresponding illustrations given are merely a way of describing the implementation method of the present invention, and do not limit the specific structure of the implementation scheme of the present invention. Various changes or modifications can be made to these implementation schemes without departing from the principle and essence of the present invention, but these changes and modifications fall within the scope of protection of the present invention.

[0049] Although the embodiments are described and illustrated separately above, some common technologies are involved. It is the opinion of ordinary technicians in this field that the embodiments can be replaced and integrated. If the content is not clearly recorded in one of the embodiments, reference can be made to another recorded embodiment.

[0050] The above-described implementation methods do not constitute a limitation on the protection scope of the technical solution. Any modification, equivalent replacement and improvement made within the spirit and principle of the above-described implementation methods shall be included in the protection scope of the technical solution.

Claims

1. A method for manufacturing a multi-chip packaging structure, comprising: Connecting the first surface of the first chip to the first metal connection device, and connecting the first surface of the second chip to the second metal connection device; Connecting the second surface of the first chip to the first lead frame through die bonding adhesive; Pressing the first surface of the isolation material onto a predetermined first position of the first surface of the first chip; Connecting the metal connection device of the second chip to the second lead frame through a reflow process and pressing the second chip to the second surface of the isolation material, the second surface of the isolation material being a surface corresponding to the first surface thereof, wherein the second end of the second chip is pressed to the second surface of the isolation material, and the connection position of the second metal connection device and the connection position of the isolation material are at a certain distance; Connecting the second surface of the second chip to the third lead frame by die bonding adhesive; Connecting the metal connection device of the first chip to the fourth lead frame through a reflow process; The first chip, the second chip and the gaps between the first to fourth lead frames are sealed with a sealing material to form the multi-chip packaging structure.

2. The manufacturing method according to claim 1, further comprising: The first metal connection device comprises a copper connection column and a tin metal layer, the first chip is connected to the copper connection column, and the copper connection column is connected to the fourth lead frame through the tin metal layer; The second metal connection device includes a copper connection column and a tin metal layer, the second chip is connected to the copper connection column, and the copper connection column is connected to the second lead frame through the tin metal layer.

3. The manufacturing method according to claim 1, further comprising: The first chip comprises a semiconductor layer and a metal layer located on the semiconductor, and the second chip comprises a semiconductor layer and a metal layer located on the semiconductor; The metal layer of the first chip, the metal layer of the second chip and the isolation material constitute an isolation device, and the isolation device is at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

4. The manufacturing method according to claim 1, further comprising: Disposing a first conductive layer on the metal layer of the first chip, Disposing a second conductive layer on the metal layer of the second chip, At least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

5. The manufacturing method according to claim 1, wherein: The thickness of the second metal connection means connecting the second chip to the second lead frame is equal to the sum of the thickness of the first chip and the isolation material.

6. The manufacturing method according to claim 1, wherein: The isolation material includes at least one of glass, pre-impregnated resin glass fiber cloth, and adhesive film.

7. The manufacturing method according to claim 2, further comprising: The die-mounting adhesive is a conductive die-mounting adhesive with an adhesive function to achieve electrical connection between the first chip and the first lead frame and electrical connection between the second chip and the third lead frame.

8. A multi-chip packaging structure, comprising: a first chip, a second chip, an isolation material and a lead frame, The second surface of the first chip is connected to the first lead frame by die bonding adhesive, and the first surface is connected to the fourth lead frame by a first metal connection device composed of a copper conductive column and a tin conductive metal in a reflow manner, and the isolation material is arranged at a predetermined first position of the first chip, and its contact surface is the first surface of the isolation material; The first surface of the second chip is connected to the second lead frame in a reflow manner through a second metal connecting device composed of a copper conductive column and a tin conductive metal, and the second surface is connected to the third lead frame through a mounting adhesive. One end of the second chip is set on the second surface of the isolation material, and the second surface of the isolation material is a surface corresponding to its first surface, wherein the second end of the second chip is pressed onto the second surface of the isolation material, and the connection position of the second metal connecting device and the connection position of the isolation material are a certain distance apart.

9. The chip packaging structure according to claim 8, further comprising: The first chip includes a top metal layer, the second chip includes a top metal layer, The top metal layer of the first chip, the top metal layer of the second chip and the isolation material constitute an isolation device.

10. The chip packaging structure according to claim 8, further comprising: A first conductive layer is provided on the metal layer of the first chip, and a second conductive layer is provided on the metal layer of the second chip, At least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

11. The chip packaging structure according to claim 8, further comprising: a copper conductive column and a tin conductive metal, A first end of the first surface of the first chip is connected to the fourth lead frame through a copper conductive column and a tin conductive metal, and a second end is connected to the isolation material; A first end of the first surface of the second chip is connected to the second lead frame through a copper conductive column and a tin conductive metal, and a second end is connected to the isolation material. 12 . The chip packaging structure according to claim 8 , further comprising: the first lead frame to the fourth lead frame are connected into one lead frame.

13. The chip packaging structure according to claim 8, further comprising: a portion of the first end of the first surface of the first chip close to an edge is connected to the fourth lead frame by a reflow method, The isolation material is disposed on the second end of the first surface of the first chip, and one end of the isolation material is flush with the edge of the second end.

14. The chip packaging structure according to claim 8 further includes: a portion of the first end of the first surface of the second chip close to an edge is connected to the second lead frame by reflow, and one end of the isolation material is flush with the second end of the first surface of the second chip.

15. The chip packaging structure according to claim 8, further comprising: a thickness of the metal connection device connecting the first chip to the fourth lead frame is equal to a sum of thicknesses of the second chip and the isolation material; The thickness of the metal connection means connecting the second chip to the second lead frame is equal to the sum of the thickness of the first chip and the isolation material.

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