Manufacturing method of power module assembly and power module assembly

Abstract

The present invention discloses a manufacturing method for a power module assembly and a power module assembly. The manufacturing method includes: providing a first substrate, setting a DC positive conductive area and a DC negative conductive area on the first substrate; providing a second substrate, setting an AC conductive area on the second substrate, the multiple AC conductive areas including a first AC conductive area, a second AC conductive area, and a third AC conductive area; setting a first chip on the first substrate; setting a second chip on the second substrate; electrically connecting the first chip to the AC conductive area of ​​the second substrate; electrically connecting the second chip to the DC negative conductive area of ​​the first substrate; according to the manufacturing method of the present invention, the first substrate and the second substrate are electrically connected through the first chip and the second chip, and a full-bridge structure is formed between the first substrate and the second substrate by partitioning the first substrate and the second substrate. According to the manufacturing method of the present invention, the processing efficiency is high, the product stability is good, and the yield rate is high.

Description

Technical Field

[0001] The present invention relates to the field of power modules, and in particular to a manufacturing method of a power module assembly and a power module assembly. Background Art

[0002] With the rapid development of fields such as electric vehicles and the development of power modules, higher performance requirements are placed on power modules. Wire bonding is used in related technologies to achieve complex internal interconnections in the structure, which results in larger parasitic inductances and may increase losses. Furthermore, the heat dissipation of power modules is mostly done on one side or through thermal silicone grease, which has low heat dissipation efficiency and affects the performance and reliability of the power modules. Therefore, optimizing the heat dissipation performance of power modules has become an urgent issue to be addressed in this field. Summary of the Invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one object of the present invention is to provide a method for manufacturing a power module assembly. According to the manufacturing method of the present invention, a first substrate and a second substrate are electrically connected via a first chip and a second chip. By partitioning the first and second substrates, a full-bridge structure is formed between the first and second substrates. The manufacturing method of the present invention achieves high processing efficiency, good product stability, and a high yield rate.

[0004] The present invention also provides a power module assembly manufactured using the above manufacturing method.

[0005] The method for manufacturing a power module assembly according to the present invention comprises:

[0006] Providing a first substrate, and disposing a plurality of DC positive conductive areas and a plurality of DC negative conductive areas arranged at intervals on the first substrate, wherein the plurality of DC positive conductive areas include a first DC positive conductive area and a second DC positive conductive area, and the plurality of DC negative conductive areas include a first DC negative conductive area and a second DC negative conductive area;

[0007] Providing a second substrate, and disposing a plurality of alternating current conductive regions arranged at intervals on the second substrate, wherein the plurality of alternating current conductive regions include a first alternating current conductive region, a second alternating current conductive region, and a third alternating current conductive region;

[0008] Disposing a first chip on the first substrate;

[0009] Disposing a second chip on the second substrate;

[0010] electrically connecting the first chip to the AC conductive area of ​​the second substrate;

[0011] electrically connecting the second chip to the DC negative conductive area of ​​the first substrate;

[0012] The first DC positive conductive region is electrically connected to the first AC conductive region through the first chip, and the second DC positive conductive region is electrically connected to the second AC conductive region and the third AC conductive region through the first chip respectively.

[0013] The first AC conductive region is electrically connected to the first DC negative conductive region through the second chip, the second AC conductive region is electrically connected to the first DC negative conductive region through the second chip, and the third AC conductive region is electrically connected to the second DC negative conductive region through the second chip.

[0014] The manufacturing method of the present invention electrically connects the first and second substrates via the first and second chips. The power module utilizes a stacked arrangement of the first and second substrates, reducing the manufacturing complexity of the power module. By partitioning the first and second substrates, a full-bridge structure is formed between the first and second substrates. The manufacturing method of the present invention achieves high processing efficiency, excellent product stability, and a high yield rate.

[0015] According to one embodiment of the present invention, the first chip is located between the DC positive conductive area and the AC conductive area and is installed in the DC positive conductive area, and the second chip is located between the DC negative conductive area and the AC conductive area and is installed in the AC conductive area.

[0016] According to one embodiment of the present invention, the manufacturing method further includes:

[0017] A first buffer layer is provided on a side of the first chip facing away from the first substrate, and the first chip is electrically connected to the AC conductive area through the first buffer layer;

[0018] A second buffer layer is provided on a side of the second chip facing away from the second substrate, and the second chip is electrically connected to the DC negative conductive area through the second buffer layer.

[0019] According to one embodiment of the present invention, the manufacturing method further includes:

[0020] Bonding the leads of the source and gate of the first chip to the positive conductive area of ​​the first substrate;

[0021] Bonding the leads of the source and gate of the second chip to the AC conductive region.

[0022] According to one embodiment of the present invention, the lead bonding the first chip to the DC positive conductive area is located between a first plane and the first substrate, and the first plane is the plane where the surface of the first buffer layer opposite to the first chip is located; the lead bonding the second chip to the AC conductive area is located between a second plane and the second substrate, and the second plane is the plane where the surface of the second buffer layer opposite to the second chip is located.

[0023] According to one embodiment of the present invention, the manufacturing method further includes:

[0024] Disposing a first heat dissipation plate on a surface of the first substrate opposite to the first chip;

[0025] A second heat dissipation plate is provided on a surface of the second substrate opposite to the second chip.

[0026] According to one embodiment of the present invention, the manufacturing method further includes:

[0027] A first positive terminal, a second positive terminal, a first negative terminal, and a second negative terminal are provided on the edge of the first substrate, the first positive terminal is connected to the first DC positive conductive area, the second positive terminal is connected to the second DC positive conductive area, the first negative terminal is connected to the first DC negative conductive area, and the second negative terminal is connected to the second DC negative conductive area;

[0028] A first AC terminal, a second AC terminal and a third AC terminal are provided at the edge of the second substrate, the first AC terminal is connected to the first AC conductive area, the second AC terminal is connected to the second AC conductive area, and the third AC terminal is connected to the third AC conductive area.

[0029] According to one embodiment of the present invention, the power module assembly includes a first side and a second side, the first positive terminal, the second positive terminal, the first negative terminal and the second negative terminal are located on the first side; the first AC terminal, the second AC terminal and the third AC terminal are located on the second side.

[0030] According to one embodiment of the present invention, the manufacturing method further includes:

[0031] The first substrate, the second substrate, the first chip and the second chip are encapsulated by a plastic encapsulation member, and at least a portion of the first heat dissipation plate and at least a portion of the second heat dissipation plate are exposed from the plastic encapsulation member.

[0032] The following briefly describes a power module assembly according to another embodiment of the present invention.

[0033] The power module assembly according to the present invention is manufactured using the manufacturing method described in any one of the above embodiments. Since the power module assembly according to the present invention is manufactured using the manufacturing method described in any one of the above embodiments, the power module assembly according to the present invention has a compact structure and a small size, and can realize a full-bridge circuit. At the same time, the power module has high power density and good reliability.

[0034] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:

[0036] Figure 1 is a flow chart of a method for manufacturing a power module assembly according to one embodiment of the present invention;

[0037] Figure 2 is a flow chart of a method for manufacturing a power module assembly according to another embodiment of the present invention;

[0038] Figure 3 1 is a schematic diagram of chip bonding in a method for manufacturing a power module assembly according to an embodiment of the present invention;

[0039] Figure 4 1 is a schematic diagram of buffer layer welding in a method for manufacturing a power module assembly according to an embodiment of the present invention;

[0040] Figure 5 1 is a schematic diagram of wire bonding of a method for manufacturing a power module assembly according to an embodiment of the present invention;

[0041] Figure 6 2. It is a schematic diagram of heat sink welding in a method for manufacturing a power module assembly according to an embodiment of the present invention;

[0042] Figure 7 2. A schematic diagram of welding terminals in a method for manufacturing a power module assembly according to an embodiment of the present invention;

[0043] Figure 8 2. A schematic diagram of welding a first substrate and a second substrate in a method for manufacturing a power module assembly according to an embodiment of the present invention;

[0044] Figure 9 1 is a schematic diagram of a method for manufacturing a power module assembly according to an embodiment of the present invention;

[0045] Figure 10 is a schematic structural diagram of a power module assembly according to an embodiment of the present invention;

[0046] Figure 11 is a side view of a power module assembly according to one embodiment of the present invention;

[0047] Figure 12 is a diagram showing a connection structure between a first substrate and a second substrate of a power module assembly according to one embodiment of the present invention;

[0048] Figure 13 is a schematic diagram of buffer layer connection of a power module assembly according to one embodiment of the present invention;

[0049] Figure 14 is a top view of a first substrate of a power module assembly according to one embodiment of the present invention;

[0050] Figure 15 is a top view of a second substrate of a power module assembly according to one embodiment of the present invention;

[0051] Figure 16 is a structural diagram of a housing of a power module assembly according to one embodiment of the present invention;

[0052] Figure 17 FIG. 4 is a structural diagram of a housing of a power module assembly according to an embodiment of the present invention.

[0053] Reference numerals:

[0054] Power module assembly 1;

[0055] The first substrate 11,

[0056] The first DC positive conductive area 111, the first positive terminal 1111,

[0057] The second DC positive conductive area 112, the second positive terminal 1121,

[0058] The first DC negative conductive area 113, the first negative terminal 1131,

[0059] The second DC negative conductive area 114, the second negative terminal 1141,

[0060] First chip 115;

[0061] The second substrate 12,

[0062] The first AC conductive area 121, the first AC terminal 1211,

[0063] The second AC conductive area 122, the second AC terminal 1221,

[0064] The third AC conductive area 123, the third AC terminal 1231,

[0065] Second chip 124;

[0066] First buffer layer 131, second buffer layer 132; lead 14; first plane 151, second plane 152;

[0067] First heat dissipation plate 161 , first heat conducting portion 1611 , first welding surface 1612 ; second heat dissipation plate 162 , second heat conducting portion 1621 , second welding surface 1622 ;

[0068] Plastic sealing part 17; shell 18; heat exchange flow channel 19. DETAILED DESCRIPTION

[0069] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0070] With the rapid development of fields such as electric vehicles and the development of power modules, higher performance requirements are placed on power modules. Wire bonding is used in related technologies to achieve complex internal interconnections in the structure, which results in larger parasitic inductances and may increase losses. Furthermore, the heat dissipation of power modules is mostly done on one side or through thermal silicone grease, which has low heat dissipation efficiency and affects the performance and reliability of the power modules. Therefore, optimizing the heat dissipation performance of power modules has become an urgent issue to be addressed in this field.

[0071] The following is based on Figures 1-9 A method for manufacturing the power module assembly 1 according to an embodiment of the present invention will be described.

[0072] like Figure 1 As shown, the manufacturing method of the power module assembly 1 according to the present invention includes:

[0073] A first substrate 11 is provided, and a plurality of DC positive conductive regions and a plurality of DC negative conductive regions are arranged at intervals on the first substrate 11. The plurality of DC positive conductive regions include a first DC positive conductive region 111 and a second DC positive conductive region 112. The plurality of DC negative conductive regions include a first DC negative conductive region 113 and a second DC negative conductive region 114.

[0074] A second substrate 12 is provided, and a plurality of alternating current conductive regions are arranged at intervals on the second substrate 12 , wherein the plurality of alternating current conductive regions include a first alternating current conductive region 121 , a second alternating current conductive region 122 , and a third alternating current conductive region 123 ;

[0075] A first chip 115 is provided on the first substrate 11;

[0076] A second chip 124 is provided on the second substrate 12;

[0077] electrically connecting the first chip 115 to the AC conductive area of ​​the second substrate 12;

[0078] The second chip 124 is electrically connected to the DC negative conductive area of ​​the first substrate 11;

[0079] The first DC positive conductive region 111 is electrically connected to the first AC conductive region 121 via the first chip 115, and the second DC positive conductive region 112 is electrically connected to the second AC conductive region 122 and the third AC conductive region 123 via the first chip 115, respectively. The first AC conductive region 121 is electrically connected to the first DC negative conductive region 113 via the second chip 124, the second AC conductive region 122 is electrically connected to the first DC negative conductive region 113 via the second chip 124, and the third AC conductive region 123 is electrically connected to the second DC negative conductive region 114 via the second chip 124.

[0080] According to the manufacturing method of the power module of the present invention, a first DC positive conductive area 111, a second DC positive conductive area 112, a first DC negative conductive area 113, and a second DC negative conductive area 114 are provided on a first substrate 11, wherein the DC positive conductive area and the DC negative conductive area are arranged at intervals on the first substrate 11; a first AC conductive area 121, a second AC conductive area 122, and a third AC conductive area 123 are provided on the second substrate 12, wherein the multiple AC conductive areas are arranged at intervals; a first chip 115 is provided on the first substrate 11 and is electrically connected to the DC positive conductive area and the AC conductive area, respectively.

[0081] In some embodiments, the first chip 115 is constructed in multiple forms and is disposed on the first substrate 11, at least one of the multiple first chips 115 is connected between the first DC positive conductive region 111 and the first AC conductive region 121; at least another of the multiple first chips 115 is connected between the second DC positive conductive region 112 and the second AC conductive region 122; and at least another of the multiple first chips 115 is connected between the second DC positive conductive region 112 and the third AC conductive region 123.

[0082] In some embodiments, the second chip 124 is constructed in multiple forms and is disposed on the second substrate 12, at least one of the multiple second chips 124 is connected between the DC negative conductive area and the AC conductive area; at least another one of the multiple second chips 124 is connected between the first DC negative conductive area 113 and the second AC conductive area 122; and at least one of the multiple second chips 124 is connected between the third AC conductive area 123 and the second negative conductive area.

[0083] By providing a first substrate 11, a second substrate 12, and respectively providing a first chip 115 and a second chip 124 between the first substrate 11 and the second substrate 12, a full-bridge structure for AC / DC conversion is formed, thereby achieving conversion between DC current and AC current between the first substrate 11 and the second substrate 12.

[0084] According to the manufacturing method of the present invention, the first substrate 11 and the second substrate 12 are electrically connected via the first chip 115 and the second chip 124. The power module employs a stacked arrangement of the first and second substrates 11, 12, reducing the manufacturing difficulty of the power module. By partitioning the first and second substrates 11, 12, a full-bridge structure is formed between the first and second substrates 11, 12. The manufacturing method of the present invention achieves high processing efficiency, good product stability, and a high yield rate.

[0085] According to one embodiment of the present invention, the first chip 115 is located between the DC positive conductive area and the AC conductive area and is installed in the DC positive conductive area, and the second chip 124 is located between the DC negative conductive area and the AC conductive area and is installed in the AC conductive area.

[0086] The first chip 115 can be welded to the DC positive conductive area through a welding process, and the second chip 124 can be welded to the AC conductive area through a welding process. The first chip 115 and the second chip 124 are welded to the first substrate 11 and the second substrate 12 through a welding process, which reduces the bonding lines between the first chip 115 and the second chip 124 and the first substrate 11 and the second substrate 12, improves the integration of the power module, simplifies the structure of the power module, and is conducive to reducing the size of the power module in the thickness direction of the first substrate 11 and the second substrate 12, thereby reducing the volume of the power module.

[0087] According to one embodiment of the present invention, the manufacturing method further includes: setting a first buffer layer 131 on the side of the first chip 115 away from the first substrate 11, and the first chip 115 is electrically connected to the AC conductive area through the first buffer layer 131; setting a second buffer layer 132 on the side of the second chip 124 away from the second substrate 12, and the second chip 124 is electrically connected to the DC negative conductive area through the second buffer layer 132.

[0088] One side of the first chip 115 is electrically connected to the DC positive conductive area. A first buffer layer 131 is provided on the side of the first chip 115 facing away from the first substrate 11. A first buffer surface and a first welding surface 1612 are formed on both sides of the first buffer layer 131 in the thickness direction. The first buffer surface is electrically connected to the surface of the first chip 115 facing away from the first substrate 11. The first welding surface 1612 is electrically connected to the AC conductive area. The first chip 115 achieves electrical communication between the positive conductive area and the AC conductive area through the first buffer layer 131. One side of the second chip 124 is electrically connected to the AC conductive area. A second buffer layer 132 is provided on the side of the second chip 124 facing away from the second substrate 12. The second buffer layer 132 has a second buffer surface and a second welding surface 1622 formed on both side surfaces in the thickness direction. The second buffer surface is electrically connected to the side surface of the second chip 124 facing away from the second substrate 12. The second welding surface 1622 is electrically connected to the DC negative conductive area. The second chip 124 realizes electrical connectivity between the positive conductive area and the AC conductive area through the second buffer layer 132.

[0089] According to the manufacturing method of the present invention, by providing the first buffer layer 131 and the second buffer layer 132 as an electrical transmission path between the first substrate 11 and the second substrate 12 , the circuit connection of the power module is achieved and the internal electrical connection lines of the power module are simplified.

[0090] In some embodiments, the material of the first buffer member and the second buffer member can be molybdenum, which is beneficial to improve the thermal stress of the first chip 115 and the second chip 124, and protect the first chip 115 and the second chip 124 respectively. At the same time, since the first buffer layer 131 and the second buffer layer 132 themselves have a certain height, space can be reserved for the bonding of the low-voltage lead 14, reducing the processing difficulty of the first substrate 11 and the second substrate 12.

[0091] According to one embodiment of the present invention, the manufacturing method further includes: bonding the source and gate leads 14 of the first chip 115 to the positive conductive area of ​​the first substrate 11; and bonding the source and gate leads 14 of the second chip 124 to the AC conductive area.

[0092] According to the manufacturing method of the present invention, the source and gate leads 14 of the first chip 115 are bonded to the positive conductive area of ​​the first substrate 11, and the source and gate leads 14 of the second chip 124 are bonded to the AC conductive area. By bonding the source and gate leads 14 of the first chip 115 to the positive conductive area of ​​the first substrate 11, the first chip 115 forms an upper half-bridge circuit on the first substrate 11, enabling control and voltage sampling of the first chip 115. Meanwhile, by bonding the source and gate leads 14 of the second chip 124 to the AC conductive area, the second chip 124 forms a lower half-bridge circuit on the second substrate 12, enabling control and voltage sampling of the second chip 124. This completes the full-bridge circuit structure between the first substrate 11 and the second substrate 12.

[0093] It should be noted that the source and gate leads 14 of the first chip 115 extend toward the first substrate 11, while the source and gate leads 14 of the second chip 124 extend toward the second substrate 12. The short span of the leads 14 eliminates the need for high current diversion, as current diversion can be achieved through buffer blocks. Furthermore, the source and gate leads 14 are of the same length, resulting in low inductance. Furthermore, the use of buffer blocks for current diversion between the first and second substrates 11, 12 shortens the diversion distance and effectively achieves current sharing.

[0094] The source lead 14 and gate lead 14 of the first chip 115 cannot cross-interfere with the source lead 14 and gate lead 14 of the second chip 124, thereby avoiding short circuit inside the power module and ensuring the safety of the circuit between the first substrate 11 and the second substrate 12.

[0095] According to one embodiment of the present invention, the lead 14 bonding the first chip 115 to the DC positive conductive area is located between the first plane 151 and the first substrate 11, and the first plane 151 is the plane where the surface of the first buffer layer 131 opposite to the first chip 115 is located; the lead 14 bonding the second chip 124 to the AC conductive area is located between the second plane 152 and the second substrate 12, and the second plane 152 is the plane where the surface of the second buffer layer 132 opposite to the second chip 124 is located.

[0096] A first buffer layer 131 is provided on the first chip 115, and a second buffer layer 132 is provided on the second chip 124. The first buffer layer 131 enables electrical communication between the DC positive conductive area and the AC conductive area of ​​the first chip 115, while the second buffer layer 132 enables electrical communication between the AC conductive area and the DC / AC conductive area of ​​the second chip 124. Because the first and second buffer layers 131 and 132 have a certain height, they separate the first and second substrates 11 and 12 in the thickness direction. In the process of bonding the source lead 14 and the gate lead 14 of the first chip 115 to the DC positive conductive area and bonding the source lead 14 and the gate lead 14 of the second chip 124 to the AC conductive area, the first substrate 11 and the second substrate 12 are separated due to the presence of the buffer component. In order to avoid interference between the leads 14 of the first chip 115 and the leads 14 of the second chip 124, the leads 14 of the first chip 115 are set not to exceed the height of the first buffer layer 131, and the leads 14 of the second chip 124 are set to exceed the height of the second buffer layer 132. This can avoid cross-interference between the leads 14 of the first chip 115 and the leads 14 of the second chip 124, thereby ensuring circuit safety during the processing. The power module assembly 1 manufactured according to the processing method of the present invention has a high yield and good reliability.

[0097] According to one embodiment of the present invention, the manufacturing method further includes: disposing a first heat dissipation plate 161 on a surface of the first substrate 11 opposite to the first chip 115 ; and disposing a second heat dissipation plate 162 on a surface of the second substrate 12 opposite to the second chip 124 .

[0098] According to the manufacturing method of the present invention, a first heat dissipation plate 161 is provided on the surface of the first substrate 11 facing away from the first chip 115, and a second heat dissipation plate 162 is provided on the surface of the second substrate 12 facing away from the second chip 124, wherein the first heat dissipation plate 161 may include a first heat conducting portion 1611 and a first welding surface 1612, the first heat conducting portion 1611 may be configured in the form of a heat dissipation needle or a heat dissipation fin, etc., the first heat dissipation plate 161 is welded to the first substrate 11 through the first welding surface 1612, the second heat dissipation plate 162 may include a second heat conducting portion 1621 and a second welding surface 1622, the second heat conducting portion 1621 may be configured in the form of a heat dissipation needle or a heat dissipation fin, etc., the second heat dissipation plate 162 is welded to the first substrate 11 through the second welding surface 1622, the first heat dissipation plate 161 is directly connected to the first substrate 11 by welding, thereby reducing the thermal resistance between the first substrate 11 and the first heat dissipation plate 161; the second heat dissipation plate 162 is directly connected to the second substrate 12 by welding, thereby reducing the thermal resistance between the second heat dissipation plate 162 and the second substrate 12. The heat of the first substrate 11 and the second substrate 12 can be better conducted away through the first heat conducting portion 1611 and the second heat conducting portion 1621, and the heat dissipation of the power module is more uniform, thereby improving the heat dissipation capacity of the power module, so that the heat dissipation capacity of the power module assembly 1 can match a higher power density, thereby improving the stability of the power module assembly 1.

[0099] According to one embodiment of the present invention, the manufacturing method further includes:

[0100] A first positive terminal 1111, a second positive terminal 1121, a first negative terminal 1131, and a second negative terminal 1141 are provided at the edge of the first substrate 11. The first positive terminal 1111 is connected to the first DC positive conductive region 111, the second positive terminal 1121 is connected to the second DC positive conductive region 112, the first negative terminal 1131 is connected to the first DC negative conductive region 113, and the second negative terminal 1141 is connected to the second DC negative conductive region 114.

[0101] A first AC terminal 1211 , a second AC terminal 1221 , and a third AC terminal 1231 are provided at the edge of the second substrate 12 . The first AC terminal 1211 is connected to the first AC conductive region 121 , the second AC terminal 1221 is connected to the second AC conductive region 122 , and the third AC terminal 1231 is connected to the third AC conductive region 123 .

[0102] The first positive terminal 1111 and the second positive terminal 1121 can be connected to the high-voltage positive pole of the power supply, the first negative terminal 1131 and the second negative terminal 1141 can be connected to the high-voltage negative pole of the power supply, the first AC terminal 1211, the second AC terminal 1221 and the third AC terminal 1231 can be respectively connected to the three-phase terminals of the three-phase motor, the first positive terminal 1111 and the second positive terminal 1121 correspond to the first DC positive conductive area 111 and the second DC positive conductive area 112, respectively, and the high-voltage DC current can flow into the first DC positive conductive area 111 and the second DC positive conductive area 112 through the first positive terminal 1111 and the second positive terminal 1121, and be transmitted to the AC conductive area through the first chip 115 to form a current path in one direction; the AC current can flow into the AC conductive area through the first AC terminal 1211, the second AC terminal 1221 and the third AC terminal 1231, and be transmitted to the DC negative conductive area through the second chip 124 to form a current path in the other direction.

[0103] According to the manufacturing method of the present invention, the first positive terminal 1111, the second positive terminal 1121, the first negative terminal 1131, and the second negative terminal 1141 are connected to the first DC positive conductive region 111, the second DC positive conductive region 112, the first DC negative conductive region 113, and the second DC negative conductive region 114, respectively; the first AC terminal 1211, the second AC terminal 1221, and the third AC terminal 1231 are connected to the first AC conductive region 121, the second AC conductive region 122, and the third AC conductive region 123, respectively. Currents flowing in opposite directions are generated between the first substrate 11 and the second substrate 12, and magnetic flux cancellation is generated between the currents in different directions, which is beneficial to reducing stray inductance in the current loop.

[0104] According to one embodiment of the present invention, a power module assembly 1 includes a first side and a second side. A first positive terminal 1111, a second positive terminal 1121, a first negative terminal 1131, and a second negative terminal 1141 are located on the first side; a first AC terminal 1211, a second AC terminal 1221, and a third AC terminal 1231 are located on the second side. The first positive terminal 1111, the second positive terminal 1121, the first negative terminal 1131, and the second negative terminal 1141 are alternately arranged on the first side of the power module, while the first AC terminal 1211, the second AC terminal 1221, and the third AC terminal 1231 are arranged on the second side of the power module. The first positive terminal 1111, the second positive terminal 1121, the first negative terminal 1131, and the second negative terminal 1141 are arranged on one side of the power module. The second positive terminal 1121 and the first negative terminal 1131 correspond to two full-bridge circuits, respectively. This achieves integrated DC terminals, reduces the number of terminals, improves the integration of the power module, and further reduces the size of the power module.

[0105] The first AC terminal 1211, the second AC terminal 1221 and the third AC terminal 1231 are arranged on the other side of the power module. The interference between the AC terminal and the DC terminal ensures the safety of the power module, and at the same time makes it more convenient to connect the power module and helps to optimize the layout of the electrical circuit.

[0106] like Figure 14 and Figure 15 As shown, the above four DC terminals (the first positive terminal 1111, the second positive terminal 1121, the first negative terminal 1131 and the second negative terminal 1141) will not interfere with the above three AC terminals (the first AC terminal 1211, the second AC terminal 1221 and the third AC terminal 1231), thereby ensuring the reliability of the electrical connection and facilitating the connection of the above DC terminals to the positive and negative poles of the DC power supply and the above AC terminals to the three-phase terminals of the three-phase motor to realize three-phase control of the three-phase motor.

[0107] According to some specific embodiments of the present invention, Figure 14 As shown, there are multiple DC positive conductive areas and at least include a first DC positive conductive area 111 and a second DC positive conductive area 112, and there are multiple DC negative conductive areas and at least include a first DC negative conductive area 113 and a second DC negative conductive area 114. The first DC positive conductive area 111, the second DC positive conductive area 112, the first DC negative conductive area 113 and the second DC negative conductive area 114 are arranged at intervals on the first substrate 11.

[0108] like Figure 15 As shown, there are multiple AC conductive regions including at least a first AC conductive region 121 , a second AC conductive region 122 and a third AC conductive region 123 . The first AC conductive region 121 , the second AC conductive region 122 and the third AC conductive region 123 are arranged at intervals on the second substrate 12 .

[0109] The first DC positive conductive region 111 is connected to the first AC conductive region 121 via the first chip 115, and the second DC positive conductive region 112 is connected to the second AC conductive region 122 and the third AC conductive region 123 via the first chip 115, respectively. The first AC conductive region 121 is connected to the first DC negative conductive region 113 via the second chip 124, the second AC conductive region 122 is connected to the first DC negative conductive region 112 via the second chip 124, and the third AC conductive region 123 is connected to the second DC negative conductive region 114 via the second chip 124.

[0110] In this way, the power module assembly 1 can integrate six half-bridges by only providing the first DC positive conductive area 111, the second DC positive conductive area 112, the first DC negative conductive area 113 and the second DC negative conductive area 114. That is, only two DC positive conductive areas 110 and two DC negative conductive areas 120 are needed in the power module assembly 1. While achieving AC / DC conversion, the power module assembly 1 can reduce the volume of the power module assembly 1.

[0111] According to one embodiment of the present invention, the manufacturing method further includes: using a plastic package 17 to plastic package the first substrate 11, the second substrate 12, the first chip 115 and the second chip 124, and at least a portion of the first heat sink 161 and at least a portion of the second heat sink 162 are exposed from the plastic package 17.

[0112] The material of the plastic encapsulation 17 can be epoxy resin or other materials. The plastic encapsulation 17 can achieve insulation and protection for the circuits in the first substrate 11 and the second substrate 12. At the same time, the plastic encapsulation 17 can achieve integrated packaging of the first substrate 11, the second substrate 12, the first chip 115 and the second chip 124. The plastic encapsulation 17 is coated on at least part of the periphery of the first substrate 11 and the second substrate 12, protecting the internal circuit of the power module. The plastic encapsulation 17 has good high temperature resistance, which improves the safety and insulation effect of the power module. At least a portion of the first heat sink 161 and at least a portion of the second heat sink 162 are exposed from the plastic encapsulation 17, making it easier for the heat of the power module to be discharged through the first heat sink 161 and the second heat sink 162, thereby ensuring the heat dissipation performance of the power module.

[0113] According to one embodiment of the present invention, the power module assembly 1 further includes a housing 18, in which a housing cavity and a heat exchange channel 19 communicating with the housing cavity are formed, and the first substrate 11, the second substrate 12 and the plastic package 17 are accommodated in the housing cavity. The housing 18 serves as the base structure of the power module assembly 1, and accommodates the first substrate 11, the second substrate 12 and the plastic package 17 in the housing cavity, so as to fully utilize the housing 18 to protect the electrical components in the housing cavity. The heat exchange channel 19 provided in the housing 18 is communicated with the housing cavity, and the coolant can flow in the heat exchange channel and dissipate heat from the first heat sink 161 and the second heat sink 162 exposed to the plastic package 17 when passing through the housing cavity, thereby cooling the first substrate 11 and the second substrate 12, and ensuring the heat dissipation performance of the power module assembly 1.

[0114] In some embodiments, a first heat conducting portion 1611 is formed on the first heat dissipation plate 161, extending in a direction away from the first substrate 11, and a second heat conducting portion 1621 is formed on the second heat dissipation plate 162, extending in a direction away from the second substrate 12. The first heat conducting portion 1611 and the second heat conducting portion 1621 can be used to expand the contact surface with the heat exchange medium and improve the heat exchange efficiency.

[0115] In some embodiments, the first heat conducting portion 1611 and the second heat conducting portion 1621 are both configured as heat dissipation fins or heat dissipation pins spaced apart from each other.

[0116] The manufacturing method according to the present invention is described below based on a specific embodiment.

[0117] like Figure 3 As shown, the first chip 115 is welded to the metal layer of the first substrate 11, and the second chip 124 is welded to the metal layer of the second substrate 12; the first chip 115 can be welded to the metal layer of the first substrate 11 by reflow soldering or metal sintering, and the second chip 124 can be welded to the metal layer of the second substrate 12 by reflow soldering or metal sintering.

[0118] It should be noted here that the first substrate 11 and the second substrate 12 respectively include a ceramic layer, a first metal layer and a second metal layer, and the first metal layer and the second metal layer are respectively arranged on both sides of the ceramic layer in the thickness direction. After processing according to this method is completed, the first metal layer of the first chip 115 and the first metal layer of the second chip 124 are opposite to each other in the thickness direction, and the first chip 115 and the second chip 124 are respectively connected to the first metal layer of the first chip 115 and the second metal layer of the second chip 124.

[0119] In other embodiments, an isolation groove is formed on the first metal layer of the first substrate 11 to form a first DC positive conductive region 111, a first DC negative conductive region 113, a second DC positive conductive region 112, and a second DC negative conductive region 114 that are isolated from each other on the first substrate 11; an isolation groove is formed on the second metal layer of the second substrate 12 to form a first AC conductive region 121, a second AC conductive region 122, and a third AC conductive region 123 that are isolated from each other on the second substrate 12.

[0120] After the welding of the first chip 115 and the first substrate 11 is completed, a buffer block is further set on the first chip 115, and the buffer block is welded to the first chip 115, and the buffer block is welded to the first chip 115 through the welding layer; after the welding of the second chip 124 and the second substrate 12, a buffer block is further set on the second chip 124, and the buffer block is welded to the second chip 124, and the buffer block is welded to the second chip 124 through the welding layer.

[0121] After the buffer block is soldered, the source and gate leads 14 of the first chip 115 are bonded to the first substrate 11. During the bonding process, the source and gate leads 14 must be no taller than the thickness of the buffer layer. The leads 14 connect the copper layer on the first substrate 11 to the source and gate of the first chip 115, respectively, enabling control of the first chip 115 and voltage sampling.

[0122] The source lead 14 and the gate lead 14 of the second chip 124 are bonded to the second substrate 12. During the bonding process, the source lead 14 and the gate lead 14 must not be higher than the thickness of the buffer layer. The leads 14 connect the copper layer on the second substrate 12 to the source and gate of the second chip 124, respectively, to achieve control of the second chip 124 and voltage sampling.

[0123] After completing the bonding of the first chip 115 and the second chip 124, a first heat sink 161 and a second heat sink 162 are respectively set on the first substrate 11 and the second substrate 12, and the first heat sink 161 is welded to the second metal layer of the first substrate 11, and the second heat sink 162 is welded to the second metal layer of the second substrate 12.

[0124] After completing the welding of the first heat sink 161 of the first substrate 11 and the second heat sink 162 of the second substrate 12, the four DC terminals are welded to the corresponding first DC positive conductive area 111, second DC positive conductive area 112, first DC negative conductive area 113 and second DC negative conductive area 114 on the first substrate 11, and the three AC terminals are welded to the corresponding first AC conductive area 121, second AC conductive area 122 and third AC conductive area 123 on the second substrate 12.

[0125] After the DC terminals and AC terminals are welded, the first substrate 11 and the second substrate 12 are overlapped and the buffer layers on the first chips 115 are connected to the first AC conductive area 121 , the second AC conductive area 122 and the third AC conductive area 123 on the second substrate 12 .

[0126] Before connection, the first substrate 11 and the second substrate 12 are positioned in the thickness direction by a positioning fixture, and the connection between the first substrate 11 and the second substrate 12 is achieved by reflow soldering or silver sintering.

[0127] After the connection between the first substrate 11 and the second substrate 12 is completed, the first substrate 11 and the second substrate 12 are plastic-sealed to form a plastic sealing member 17 on the outer surfaces of the first substrate 11 and the second substrate 12. At least part of the first heat dissipation base plate and the second heat dissipation base plate are exposed from the plastic sealing member 17.

[0128] Reference below Figure 2 A manufacturing method according to a specific embodiment of the present invention is described, the manufacturing method comprising:

[0129] S1: Solder the first chip to the first substrate and solder the second chip to the second substrate;

[0130] S2: welding the first chip to the first buffer layer, and welding the second chip to the second buffer layer;

[0131] S3: bonding the source electrode and gate lead of the first chip to the first substrate, and bonding the source electrode and gate lead of the second chip to the second substrate;

[0132] S4: welding the first substrate to the first heat dissipation plate, and welding the second substrate to the second heat dissipation plate;

[0133] S5: Welding the positive terminal and the negative terminal to the first substrate, and welding the AC terminal to the second substrate;

[0134] S6: Connecting the first substrate 11 and the second substrate 12;

[0135] S7: Using a plastic packaging member to plasticize the first substrate, the second substrate, the first chip, and the second chip, and at least partially exposing the first heat sink and the second heat sink from the plastic packaging member.

[0136] In step S1, the first chip 115 is welded to the metal layer of the first substrate 11, and the second chip 124 is welded to the metal layer of the second substrate 12; the first chip 115 can be welded to the metal layer of the first substrate 11 by reflow soldering or metal sintering, and the second chip 124 can be welded to the metal layer of the second substrate 12 by reflow soldering or metal sintering.

[0137] In step S2, a buffer block is set on the first chip 115, and the buffer block is welded to the first chip 115, and the buffer block is welded to the first chip 115 through the welding layer; after the second chip 124 is welded to the second substrate 12, a buffer block is further set on the second chip 124, and the buffer block is welded to the second chip 124, and the buffer block is welded to the second chip 124 through the welding layer.

[0138] Step S3 bonds the source and gate leads of the first chip 115. During the bonding process, the source and gate leads must be no taller than the thickness of the buffer layer. Leads 14 connect the copper layer on the first substrate 11 to the source and gate of the first chip 115, respectively, to enable control of the first chip 115 and voltage sampling.

[0139] Step S4: a first heat sink 161 and a second heat sink 162 are arranged on the first substrate 11 and the second substrate 12; the first heat sink 161 is welded to the second metal layer of the first substrate 11; and the second heat sink 162 is welded to the second metal layer of the second substrate 12.

[0140] In step S5, the four DC terminals are welded to the corresponding first DC positive conductive area 111, the second DC positive conductive area 112, the first DC negative conductive area 113, and the second DC negative conductive area 114 on the first substrate 11, and the three AC terminals are welded to the corresponding first AC conductive area 121, the second AC conductive area 122, and the third AC conductive area 123 on the second substrate 12.

[0141] In step S6, the first substrate 11 and the second substrate 12 can be arranged in an overlapping manner, and the buffer layers provided on the multiple first chips 115 are respectively connected to the first AC conductive area 121, the second AC conductive area 122 and the third AC conductive area 123 on the second substrate 12 to achieve connection between the first substrate 11 and the second substrate 12.

[0142] In step S7 , the first substrate 11 and the second substrate 12 are plastic-sealed to form a plastic sealing member 17 on the outer surfaces of the first substrate 11 and the second substrate 12 . At least a portion of the first heat dissipation base plate and the second heat dissipation base plate is exposed from the plastic sealing member 17 .

[0143] The power module assembly 1 according to the present invention is briefly described below.

[0144] The power module assembly 1 according to the present invention is manufactured using the manufacturing method described in any of the aforementioned embodiments. The specific structural implementation of the power module assembly 1 can be found in the relevant descriptions of the aforementioned manufacturing method embodiments. The power module assembly 1 of the present invention has a compact structure and a small size, can implement a full-bridge circuit, and simultaneously has high power density and excellent reliability.

[0145] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like to indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0146] In the description of the present invention, "first feature" or "second feature" may include one or more of the features.

[0147] In the description of the present invention, "plurality" means two or more.

[0148] In the description of the present invention, a first feature being “on” or “under” a second feature may include the first and second features being in direct contact with each other, or the first and second features not being in direct contact with each other but being in contact with each other via another feature therebetween.

[0149] In the description of the present invention, “on”, “above” and “above” a first feature of a second feature include the first feature being directly above and obliquely above the second feature, or simply means that the first feature is horizontally higher than the second feature.

[0150] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, illustrative uses of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0151] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to the embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the claims and their equivalents.

Claims

1. A method for manufacturing a power module assembly (1), characterized in that: include: Providing a first substrate (11), and arranging a plurality of DC positive conductive areas and a plurality of DC negative conductive areas arranged at intervals on the first substrate (11), wherein the plurality of DC positive conductive areas include a first DC positive conductive area (111) and a second DC positive conductive area (112), and the plurality of DC negative conductive areas include a first DC negative conductive area (113) and a second DC negative conductive area (114); Providing a second substrate (12), and arranging a plurality of alternating current conductive areas arranged at intervals on the second substrate (12), the plurality of alternating current conductive areas comprising a first alternating current conductive area (121), a second alternating current conductive area (122), and a third alternating current conductive area (123); A first chip (115) is provided on the first substrate (11); Disposing a second chip (124) on the second substrate (12); electrically connecting the first chip (115) to the AC conductive area of ​​the second substrate (12); electrically connecting the second chip (124) to the DC negative conductive area of ​​the first substrate (11); The first DC positive conductive area (111) is electrically connected to the first AC conductive area (121) via the first chip (115), and the second DC positive conductive area (112) is electrically connected to the second AC conductive area (122) and the third AC conductive area (123) via the first chip (115). The first AC conductive area (121) is electrically connected to the first DC negative conductive area (113) via the second chip (124), the second AC conductive area (122) is electrically connected to the first DC negative conductive area (113) via the second chip (124), and the third AC conductive area (123) is electrically connected to the second DC negative conductive area (114) via the second chip (124).

2. The method according to claim 1, characterized in that The first chip (115) is located between the DC positive conductive area and the AC conductive area and is installed in the DC positive conductive area, and the second chip (124) is located between the DC negative conductive area and the AC conductive area and is installed in the AC conductive area.

3. The method according to claim 1 or 2, characterized in that The manufacturing method further comprises: A first buffer layer (131) is provided on a side of the first chip (115) facing away from the first substrate (11), and the first chip (115) is electrically connected to the AC conductive area via the first buffer layer (131); A second buffer layer (132) is provided on the side of the second chip (124) facing away from the second substrate (12), and the second chip (124) is electrically connected to the DC negative conductive area via the second buffer layer (132).

4. The method according to claim 3, characterized in that The manufacturing method further comprises: Bonding the source and gate leads (14) of the first chip (115) to the positive conductive area of ​​the first substrate (11); The leads (14) of the source and gate of the second chip (124) are bonded to the AC conductive region.

5. The method according to claim 4, characterized in that A lead bonding the first chip (115) to the DC positive conductive area is located between a first plane (151) and the first substrate (11), the first plane (151) being the plane where the surface of the first buffer layer (131) opposite to the first chip (115) is located; The leads bonding the second chip (124) to the AC conductive area are located between a second plane (152) and the second substrate (12), and the second plane (152) is a plane where a surface of the second buffer layer (132) opposite to the second chip (124) is located.

6. The method according to claim 1, characterized in that The manufacturing method further comprises: A first heat dissipation plate (161) is provided on a surface of the first substrate (11) opposite to the first chip (115); A second heat dissipation plate (162) is provided on a surface of the second substrate (12) opposite to the second chip (124).

7. The method according to claim 1, characterized in that The manufacturing method further comprises: A first positive terminal (1111), a second positive terminal (1121), a first negative terminal (1131) and a second negative terminal (1141) are provided on the edge of the first substrate (11), the first positive terminal (1111) is connected to the first DC positive conductive area (111), the second positive terminal (1121) is connected to the second DC positive conductive area (112), the first negative terminal (1131) is connected to the first DC negative conductive area (113), and the second negative terminal (1141) is connected to the second DC negative conductive area (114); A first AC terminal (1211), a second AC terminal (1221), and a third AC terminal (1231) are provided at the edge of the second substrate (12); the first AC terminal (1211) is connected to the first AC conductive area (121); the second AC terminal (1221) is connected to the second AC conductive area (122); and the third AC terminal (1231) is connected to the third AC conductive area (123).

8. The method according to claim 7, characterized in that The power module assembly (1) comprises a first side and a second side, wherein the first positive terminal (1111), the second positive terminal (1121), the first negative terminal (1131) and the second negative terminal (1141) are located on the first side; The first AC terminal (1211), the second AC terminal (1221) and the third AC terminal (1231) are located on the second side.

9. The method according to claim 6, characterized in that The manufacturing method further comprises: The first substrate (11), the second substrate (12), the first chip (115) and the second chip (124) are encapsulated by a plastic encapsulation member (17), and at least a portion of the first heat sink (161) and at least a portion of the second heat sink (162) are exposed from the plastic encapsulation member (17).

10. A power module assembly (1), characterized in that: The power module assembly (1) is manufactured using the manufacturing method according to any one of claims 1 to 9.

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