Circuit design method, device, terminal and storage medium

Abstract

The present application discloses a circuit design method, device, terminal and storage medium, wherein the method includes: obtaining a function setting file, collecting function setting information in the function setting file; obtaining a complete netlist file, obtaining a netlist template according to the complete netlist file; obtaining information to be adjusted according to the netlist template and the function setting information; obtaining complete circuit information from the complete netlist file, and obtaining template circuit information from the netlist template; adjusting the netlist template accordingly according to the information to be adjusted and the complete circuit information to obtain an updated final netlist result, wherein the final netlist result includes several final netlist files with different functions. The method of the present application can greatly reduce the workload of designers and significantly improve the overall efficiency and accuracy of circuit design.

Description

Technical Field

[0001] The present application relates to the field of electronic design automation, and in particular to a circuit design method, device, terminal and storage medium. Background Art

[0002] In memory design, an instance usually refers to a specific, independent entity or unit in memory. It represents a specific area in memory and is created and configured according to specific requirements to store data or perform specific functions. A netlist file is a text file that describes circuit components and their connections.

[0003] When designing memory, it is usually necessary to measure the time of a certain section of the circuit. The measurement process requires the use of netlist files, that is, designers need to generate different simplified netlist files according to the functional settings of the example. At the beginning of the design, designers only need to generate a small number of netlist files, but as the process becomes more and more advanced, the number of netlist files that need to be generated has increased from a maximum of a dozen to thousands. This process often takes a lot of time for designers and is prone to errors, so a method is needed to reduce this work.

[0004] Therefore, how to quickly and effectively generate the required circuit during circuit design, reduce the workload of designers and reduce the probability of errors is an urgent problem to be solved by technical personnel in this field. Summary of the invention

[0005] In order to improve the work efficiency of designers and reduce their workload, the present application provides a circuit design method, device, terminal and storage medium.

[0006] In a first aspect, the present application provides a circuit design method, which adopts the following technical solution:

[0007] A circuit design method comprises the following steps:

[0008] Acquire a function setting file and collect function setting information in the function setting file; acquire a complete netlist file and obtain a netlist template according to the complete netlist file;

[0009] Obtaining information to be adjusted according to the netlist template and the function setting information;

[0010] Acquire complete circuit information from the complete netlist file, and acquire template circuit information from the netlist template;

[0011] The netlist template is adjusted accordingly according to the information to be adjusted and the complete circuit information to obtain an updated final netlist result, wherein the final netlist result includes a plurality of final netlist files with different functions.

[0012] By adopting the above technical solution, an automated method is used to obtain the required instance information from the complete netlist file through the set function setting file, and automatically adjust it to efficiently and accurately generate a large number of final netlist files that meet the specific function settings, thereby greatly reducing the workload of designers and significantly improving the overall efficiency and accuracy of circuit design.

[0013] Preferably, the step of obtaining a function setting file, collecting function setting information in the function setting file, obtaining a complete netlist file, and obtaining a netlist template according to the complete netlist file specifically includes the following steps:

[0014] Obtaining a function setting file, wherein the function setting file is created and generated according to a preset rule file, wherein the rule file defines instance functions of all instances and file functions of all final netlist files to be generated, wherein each instance includes a plurality of component units;

[0015] A preset complete netlist file is obtained, wherein the complete netlist file includes all circuit components and their connection relationships, and a netlist template for generating a plurality of the final netlist files is obtained from the complete netlist file according to a preset capture rule.

[0016] By adopting the above technical solution, all the files required for designing the circuit are collected, and then a netlist template is extracted, which is used as the basic framework for subsequently generating multiple final netlist files, providing data support for the subsequent creation of the required final netlist files.

[0017] Preferably, obtaining the information to be adjusted according to the netlist template and the function setting information specifically comprises the following steps:

[0018] The function setting file includes function setting information, which is the content that needs to be adjusted to implement each of the instance functions. The function setting information and the netlist template are combined to determine the content that needs to be adjusted in the netlist template when implementing the instance function, including interfaces that need to be deleted and interfaces that need to be replaced, and the adjustment information that needs to be adjusted to implement each of the instance functions is summarized.

[0019] By adopting the above technical solution, intelligent analysis is performed based on the netlist template and function setting information to determine the specific adjustments that need to be made to the template when implementing each memory instance function, providing clear guidance for subsequent modification processes.

[0020] Preferably, after obtaining the information to be adjusted according to the netlist template and the function setting information, the following steps are also included:

[0021] Integrate the instance functions according to the file functions to obtain the instance functions corresponding to each of the final netlist files, each of the instance functions has a corresponding file function, and each of the file functions corresponds to a final netlist file;

[0022] Integrate the adjustment-required information of all the instance functions corresponding to each of the final netlist files to obtain the adjustment-required information of each of the final netlist files,

[0023] A file name list is generated according to the final netlist file, wherein the file name list includes the file names of all the final netlist files that are finally generated.

[0024] By adopting the above technical solution, the number of final netlist files that need to be generated is obtained through the file function, and a complete list containing the names of all final netlist files is obtained, so as to achieve the purpose of naming the final netlist file after it is finally generated, which is convenient for subsequent management.

[0025] Preferably, the step of obtaining the complete circuit information from the complete netlist file and obtaining the template circuit information from the netlist template specifically includes the following steps:

[0026] Acquire complete circuit information of all component units from the complete netlist file, wherein the complete circuit information includes circuit connection relationships and pin relationships in all the component units;

[0027] The template circuit information of the top-level component unit is obtained from the netlist template, wherein the template circuit information includes the template pin relationship of the top-level component unit in the netlist template.

[0028] By adopting the above technical solution, complete circuit information and circuit information in the template are obtained. Subsequent modifications need to revolve around the core of the complete circuit information and the top-level design of the netlist template. This information will serve as the basic data for subsequent netlist adjustment work.

[0029] Preferably, the step of adjusting the netlist template accordingly according to the information to be adjusted and the complete circuit information to obtain an updated final netlist result specifically includes the following steps:

[0030] According to the information to be adjusted, the corresponding component units and pin names are captured from the complete circuit information, each of the netlist templates is replaced accordingly with the captured component units and pin names, and redundant component units in the netlist template are deleted according to the information to be adjusted, so as to obtain an adjusted first netlist file;

[0031] The template pin relationship in the template circuit information is compared with the pin relationship in the complete circuit information to obtain a comparison result. When the comparison results are inconsistent, the template pin relationship in the first netlist file is adjusted according to the connection sequence of the pin relationship to obtain an adjusted second netlist file, and the second netlist file is the final netlist file. All the final netlist files are summarized to obtain a final netlist result.

[0032] By adopting the above technical solution, the netlist template is modified based on the complete circuit information, the missing functions in the netlist template are captured from the complete circuit information to supplement the netlist template, and then corresponding adjustments are made so that the final netlist file expanded based on the netlist template has the required functions.

[0033] Preferably, after obtaining the updated final netlist result, the following steps are also included:

[0034] All the final netlist files in the final netlist result correspond one-to-one to the file names in the file name list, and the final netlist result is name-replaced according to the file name list, and each file name is replaced into the corresponding final netlist file.

[0035] By adopting the above technical solution, all these final netlist files are uniformly replaced with new names to ensure that the naming of each file complies with the preset specifications. This not only ensures the standardization and consistency of the file name, but also brings great convenience to subsequent file management and use.

[0036] In a second aspect, the present application provides a circuit design device, which adopts the following technical solution:

[0037] A circuit design device, comprising the following modules:

[0038] The initial file acquisition module is used to acquire a function setting file and collect function setting information in the function setting file; acquire a complete netlist file and obtain a netlist template according to the complete netlist file;

[0039] An adjustment information generating module, used for obtaining the information to be adjusted according to the netlist template and the function setting information;

[0040] A circuit information acquisition module, used to acquire complete circuit information from the complete netlist file and acquire template circuit information from the netlist template;

[0041] The final netlist result generating module is used to adjust the netlist template accordingly according to the information to be adjusted and the complete circuit information to obtain an updated final netlist result, wherein the final netlist result includes a plurality of final netlist files with different functions.

[0042] By adopting the above technical solutions, a complete circuit design system has been built, which provides the necessary software technical support for improving the efficiency of circuit design. It can not only significantly improve the efficiency and accuracy of netlist file generation, but also effectively reduce the workload and error probability of designers in the complex circuit design process, thereby contributing substantially to the progress and development of the entire circuit design industry and meeting the requirements of technological progress.

[0043] In a third aspect, the present application provides a smart terminal, which adopts the following technical solution:

[0044] An intelligent terminal includes a memory and a processor, wherein the memory stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by the processor to implement the circuit design method as described above.

[0045] In a fourth aspect, the present application provides a computer-readable storage medium, which adopts the following technical solution:

[0046] A computer-readable storage medium stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor to implement the circuit design method as described above.

[0047] In summary, this application has at least the following beneficial effects:

[0048] 1. This application can automatically replace and delete the component units and pins of the netlist template through the complete netlist file of the function setting file, automatically layout the connection sequence of the pins, and batch generate all the circuits required for the design according to the function settings of the netlist template and the instance, which significantly improves the efficiency of netlist file generation and reduces the workload of designers.

[0049] 2. This application can be applied to memory instances of different sizes and architectures, and can quickly generate a simplified final netlist file. It has high flexibility and applicability. By integrating instance functions and file functions, and accurately adjusting netlist templates, it can flexibly generate netlist files that meet different functional requirements, thereby improving the flexibility and intelligence level of circuit design. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 is a flow chart of a circuit design method according to an embodiment of the present application;

[0051] Figure 2 It is a schematic diagram of the structure of the circuit design device of an embodiment of the present application. DETAILED DESCRIPTION

[0052] The present application provides a circuit design method, device, terminal and storage medium. In order to make the purpose, technical solution and advantages of the present application clearer, the implementation method of the present application will be further described in detail below.

[0053] Before describing the method of the present application in detail, some terms that appear in the circuit design process of this embodiment are provided:

[0054] An instance usually refers to a specific, independent entity or unit in memory. It represents a specific area in memory for storing data or performing specific functions. When designing a circuit, the designer will first define the structure and function of the circuit, and then these definitions will be converted into specific instance modules. Each instance consists of multiple component units.

[0055] A netlist is a text file that describes circuit components and their connections. The netlist contains information about instances and their connections to other circuit elements, ensuring the correct connection and functionality of the entire circuit.

[0056] The cell is the most basic unit of memory. In a complex memory design, a large number of cells are arranged in an array in a specific way to store a large amount of data.

[0057] Pins are the input and output ports of a cell, which are used to connect and exchange data with other circuit elements. The netlist file defines the overall behavior of the circuit by describing the connection relationship between pins.

[0058] Normally, in a circuit design, two different netlist files often have common parts. When generating these different netlist files, we only need to retain the common parts and replace the circuits of different parts, so that we can generate the required circuits quickly and efficiently.

[0059] The following is a further detailed description of an embodiment of a circuit design method of the present application in conjunction with the accompanying drawings.

[0060] A circuit design method of the present application is mainly used in memory design to automatically generate a netlist file that meets specific function settings. The process is as follows: Figure 1 As shown, the following steps are included:

[0061] S1. Obtain a function setting file and collect function setting information in the function setting file; obtain a complete netlist file and preprocess the complete netlist file to obtain a netlist template. This step specifically includes the following process.

[0062] S11. Obtain a function setting file, where the function setting file is created and generated based on a preset rule file.

[0063] When designing a circuit, the designer will first define the structure and function of the circuit that needs to be generated in the end, and then these definitions will be converted into specific instances. The rule file in this embodiment is the definition content. The rule file comprehensively defines the instance functions that all instances should have and the file functions that the final netlist file that needs to be generated should have. In other words, it describes in detail the various functional characteristics that the memory instance needs to have.

[0064] Create a function setting file based on the set rule file. The function setting file here is actually an input file. The purpose of creating a function setting file is to convert the rules in the rule file into a computer language that the computer can understand so that it can be converted into several specific instances. The circuit design contains multiple instances, and each instance includes several component units.

[0065] S12, collecting function setting information of all instances in the function setting file, wherein the function setting information indicates the component units to be deleted, the component units to be replaced, and the pins to be replaced for each instance function;

[0066] S13. Obtain a preset complete netlist file, where the complete netlist file includes all circuit components and their connection relationships.

[0067] In this embodiment, the complete netlist file contains detailed information of all circuit components and the complex connection relationships between them, covering all functions that need to be implemented in all circuit designs. This file is equivalent to a database, from which the required instance functions can be retrieved and added to the current circuit design.

[0068] S14. Obtain a netlist template for generating multiple final netlist files from the complete netlist file according to a preset capture rule. The netlist template is a common part between different netlist files, and the template will serve as a basic framework for subsequently generating multiple final netlist files.

[0069] In this embodiment, the method of obtaining a netlist template by crawling rules is: analyzing the structure of the complete netlist file, identifying which parts are necessary for the core functions, and which parts are optional or can be simplified. According to the results of the analysis, determine which elements the netlist template should contain, such as some specific component units and connection relationships. The netlist template finally captured can retain the core functions, which is equivalent to a framework or starting point. This netlist template contains some fixed parts or interface requirements of most circuit designs. Of course, the netlist template can also be created and generated by the designer himself. The designer captures the structure of the core functions from the complete netlist file based on design experience and generates a netlist template.

[0070] S2. Obtain the information to be adjusted based on the netlist template and function setting information. This step specifically includes the following process.

[0071] S21. The function setting file includes function setting information, which is the content that needs to be adjusted to realize each instance function. The content that needs to be adjusted here is the general content, such as component unit name, pin name, etc., and precise integration will be carried out later.

[0072] S22. Determine the content that needs to be adjusted in the netlist template when implementing the instance function by combining the function setting information and the netlist template, and summarize the adjustment information that needs to be adjusted to implement each instance function.

[0073] Compare the content in the function setting information with the netlist template, and integrate the information such as the component unit name and pin name to obtain the content that needs to be adjusted. The content that needs to be adjusted specifically includes the interfaces that need to be deleted and the interfaces that need to be replaced. These interfaces can realize the replacement and deletion of component units and pins.

[0074] The function setting information and the netlist template together determine which circuits and interfaces are needed, which are not needed or need to be replaced. After careful processing of this step, a complete and detailed list of all adjustments required to implement each instance function can be summarized to prepare for subsequent netlist template modifications.

[0075] S23. Integrate the instance functions according to the file functions to obtain the instance functions corresponding to each final netlist file. Each instance function has a corresponding file function, and each file function corresponds to a final netlist file.

[0076] A file function may contain multiple instance functions, and a final netlist file may also contain multiple file functions. From the previous steps, we can see that the rule file and the function setting file generated by it have already defined the file functions of all the final netlist files that need to be generated, so it is possible to obtain the instance functions corresponding to each final netlist file.

[0077] S24 , integrating the adjustment-required information of all instance functions corresponding to each final netlist file to obtain the adjustment-required information of each final netlist file.

[0078] The above step S22 has obtained the adjustment information that needs to be adjusted for each instance function, so the adjustment information for each final netlist file can be obtained.

[0079] S25, generating a file name list according to the final netlist file, the file name list including the file names of all the final netlist files generated finally. Here, the file name of each final netlist file is generated, so that the name of each final netlist file generated can be directly replaced by the file name.

[0080] S3. Obtain complete circuit information from the complete netlist file, and obtain template circuit information from the netlist template. This step specifically includes the following process.

[0081] S31. Obtain complete circuit information of all component units from the complete netlist file, where the complete circuit information includes circuit connection relationships and pin relationships in all component units.

[0082] For example, the circuit connection relationship in the component unit and the pin list of the component unit, these information can be used to replace the old ones later.

[0083] S32. Acquire template circuit information of the top-level component unit from the netlist template, where the template circuit information includes the template pin relationship of the top-level component unit in the netlist template.

[0084] For ease of understanding, the top-level component unit is regarded as a box. There are many small boxes inside this box, that is, many component units. Generally, the component units that need to be replaced are called through the top-level component unit. When calling, it is also necessary to clarify the connection relationship of the pins in the top-level component unit, that is, the template pin relationship, so that the pins can be sorted later.

[0085] S33. Analyze the netlist template to determine the instance information contained in the top-level component unit. The instance information is used to implement subsequent editing and integration of the netlist file.

[0086] S4. Adjust the netlist template accordingly based on the information to be adjusted and the complete circuit information to obtain an updated final netlist result. This step specifically includes the following process.

[0087] S41. Capture corresponding component units and pin names from the complete circuit information according to the information to be adjusted. The captured component units contain instance information.

[0088] S42, correspondingly replacing each netlist template with the captured component units and pin names, and deleting redundant component units in the netlist template according to the information to be adjusted, to obtain an adjusted first netlist file containing instance information.

[0089] The above steps actually obtain the corresponding instance information in the complete netlist file through the information that needs to be adjusted obtained previously, and replace and fill the content obtained from the complete netlist file into the netlist template. For example, replace the component units that need to be replaced in the netlist template, and delete the redundant component units in the netlist template. Some component units do not need to be replaced as a whole, only part of the content needs to be adjusted, and the pin names are replaced. After the pin names are replaced, different functions can be achieved.

[0090] S43, comparing the template pin relationship in the template circuit information with the pin relationship in the complete circuit information to obtain a comparison result. When the comparison results are consistent, there is no need to adjust the pin connection sequence, and the final netlist file is directly obtained.

[0091] When the comparison results are inconsistent, the template pin relationship in the first netlist file is adjusted according to the connection sequence of the pin relationship in the complete netlist file to obtain an adjusted second netlist file, which is the final netlist file.

[0092] The reason for adjusting the pin connection sequence is that the pin connection sequence in the complete netlist file is correct. These sequences have specific requirements and cannot be changed. When the netlist template is generated, the pin connection sequence may be disordered. The pin connection sequence of the final netlist file generated by the netlist template must be completely correct, that is, it must be the same as the pin connection sequence in the complete netlist file.

[0093] S44, summarizing all final netlist files to obtain a final netlist result, where the final netlist result includes several final netlist files with different functions.

[0094] S5. All final netlist files in the final netlist result correspond one to one with the file names in the file name list, and the final netlist result is name-replaced according to the file name list, and each file name is replaced into the corresponding final netlist file.

[0095] Each final netlist file is obtained by splitting the framework of the top-level component unit in the initial netlist template. Therefore, after the final netlist file is generated, the name of each final netlist file is the same as the name of the top-level component unit, that is, the names of all final netlist files are the same. At this time, it is necessary to replace the file names in the previously generated file name list with the final netlist one by one.

[0096] The final netlist result with name replacement is output and can be directly used in subsequent circuit manufacturing and testing.

[0097] Based on the same inventive concept as above, the present application also discloses a circuit design device, the structure of which is as follows: Figure 2 As shown, the device includes the following modules:

[0098] The initial file acquisition module is used to acquire the function setting file, collect the function setting information in the function setting file; acquire the complete netlist file, and obtain the netlist template according to the complete netlist file;

[0099] An adjustment information generation module is used to obtain the information to be adjusted according to the netlist template and the function setting information;

[0100] A circuit information acquisition module is used to obtain complete circuit information from a complete netlist file and obtain template circuit information from a netlist template;

[0101] The final netlist result generation module is used to adjust the netlist template accordingly according to the information to be adjusted and the complete circuit information to obtain the updated final netlist result. The final netlist result includes several final netlist files with different functions.

[0102] In a specific implementation scheme, the initial file acquisition module includes the following units:

[0103] A first initial file acquisition unit is used to acquire a function setting file, the function setting file is created and generated according to a preset rule file, the rule file defines the instance functions of all instances and the file functions of all final netlist files that need to be generated, each instance includes a number of component units;

[0104] The second initial file acquisition unit is used to acquire a preset complete netlist file, which includes all circuit components and their connection relationships, and obtain a netlist template for generating multiple final netlist files from the complete netlist file according to preset capture rules.

[0105] In a specific implementation scheme, the adjustment information generation module includes the following units:

[0106] An adjustment information generation unit is used for a function setting file including function setting information. The function setting information is the content that needs to be adjusted to implement each instance function. The function setting information and the netlist template are combined to determine the content that needs to be adjusted in the netlist template when implementing the instance function, including the interfaces that need to be deleted and the interfaces that need to be replaced, and the adjustment information that needs to be adjusted to implement each instance function is summarized.

[0107] In a specific implementation scheme, the circuit information acquisition module includes the following units:

[0108] The circuit information acquisition unit is used to obtain the complete circuit information of all component units from the complete netlist file, and the complete circuit information includes the circuit connection relationship and pin relationship in all component units; and obtain the template circuit information of the top-level component unit from the netlist template, and the template circuit information includes the template pin relationship of the top-level component unit in the netlist template.

[0109] In a specific implementation scheme, the final netlist result generation module includes the following units:

[0110] A first final netlist result generating unit is used to capture corresponding component units and pin names from the complete circuit information according to the information to be adjusted, replace each netlist template with the captured component units and pin names, and delete redundant component units in the netlist template according to the information to be adjusted to obtain an adjusted first netlist file;

[0111] The second final netlist result generating unit is used to compare the template pin relationship in the template circuit information with the pin relationship in the complete circuit information to obtain a comparison result. When the comparison results are inconsistent, the template pin relationship in the first netlist file is adjusted according to the connection sequence of the pin relationship to obtain an adjusted second netlist file. The second netlist file is the final netlist file. All the final netlist files are summarized to obtain the final netlist result.

[0112] In a specific implementation scheme, the circuit design device further includes the following modules:

[0113] The file name list generation module is used to integrate the instance functions according to the file functions to obtain the instance functions corresponding to each final netlist file, each instance function has a corresponding file function, and each file function corresponds to a final netlist file; the adjustment information of all instance functions corresponding to each final netlist file is integrated to obtain the adjustment information of each final netlist file; a file name list is generated according to the final netlist file, and the file name list includes the file names of all the final netlist files generated in the end.

[0114] In a specific implementation scheme, the circuit design device further includes the following modules:

[0115] The file name replacement module is used to make a one-to-one correspondence between all the final netlist files in the final netlist result and the file names in the file name list, replace the names of the final netlist result according to the file name list, and replace each file name into the corresponding final netlist file.

[0116] From the above functional introduction, it can be seen that a circuit design device in this application has built a complete circuit automation design system, which improves the work efficiency of staff, simplifies the workload of staff, reduces the probability of errors, improves the intelligence and automation level in the field of circuit automation design, and promotes the sustained, rapid and healthy development of the economy and society.

[0117] Based on the same inventive concept mentioned above, an embodiment of the present application also discloses a computer-readable storage medium, which stores at least one instruction, at least one program, code set or instruction set, and at least one instruction, at least one program, code set or instruction set can be loaded and executed by a processor to implement the circuit design method provided by the above method embodiment.

[0118] Also based on the same inventive concept mentioned above, an embodiment of the present application also discloses a computer-readable storage medium, in which at least one instruction, at least one program, code set or instruction set is stored, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor to implement the circuit design method as described above.

[0119] Those skilled in the art will appreciate that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in the computer-readable storage medium, which may include, for example, various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0120] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A circuit design method, characterized in that: The steps include: Acquire a function setting file and collect function setting information in the function setting file, wherein the function setting file is created and generated according to a preset rule file, wherein the rule file defines instance functions of all instances and file functions of all final netlist files to be generated, wherein each instance includes a plurality of component units, and the function setting file includes function setting information, wherein the function setting information is content that needs to be adjusted to implement each instance function; Obtaining a complete netlist file, and obtaining a netlist template according to the complete netlist file; Obtaining information to be adjusted based on the netlist template and the function setting information, specifically comprising the following steps: comparing the content in the function setting information with the netlist template, combining the function setting information and the netlist template, determining the content in the netlist template that needs to be adjusted when implementing the instance function, including interfaces that need to be deleted and interfaces that need to be replaced, and summarizing the information to be adjusted for implementing each instance function; Acquiring complete circuit information from the complete netlist file, and acquiring template circuit information from the netlist template, specifically comprising the following steps: acquiring complete circuit information of all component units from the complete netlist file, wherein the complete circuit information includes circuit connection relationships and pin relationships in all the component units, and acquiring template circuit information of top-level component units from the netlist template, wherein the template circuit information includes template pin relationships of the top-level component units in the netlist template; According to the information to be adjusted and the complete circuit information, the netlist template is adjusted accordingly to obtain an updated final netlist result, which specifically includes the following steps: according to the information to be adjusted, the corresponding component units and pin names are captured from the complete circuit information, each of the netlist templates is replaced accordingly with the captured component units and pin names, and the redundant component units in the netlist template are deleted according to the information to be adjusted to obtain an adjusted first netlist file; The template pin relationship in the template circuit information is compared with the pin relationship in the complete circuit information to obtain a comparison result. When the comparison results are inconsistent, the template pin relationship in the first netlist file is adjusted according to the connection sequence of the pin relationship to obtain an adjusted second netlist file, which is the final netlist file. All the final netlist files are summarized to obtain a final netlist result, which includes several final netlist files with different functions.

2. The circuit design method according to claim 1, characterized in that: The step of obtaining a complete netlist file and obtaining a netlist template according to the complete netlist file specifically includes the following steps: A preset complete netlist file is obtained, wherein the complete netlist file includes all circuit components and their connection relationships, and a netlist template for generating a plurality of the final netlist files is obtained from the complete netlist file according to a preset capture rule.

3. The circuit design method according to claim 2, characterized in that: After obtaining the information to be adjusted according to the netlist template and the function setting information, the following steps are also included: Integrate the instance functions according to the file functions to obtain the instance functions corresponding to each of the final netlist files, each of the instance functions has a corresponding file function, and each of the file functions corresponds to a final netlist file; Integrate the adjustment-required information of all the instance functions corresponding to each of the final netlist files to obtain the adjustment-required information of each of the final netlist files; A file name list is generated according to the final netlist file, wherein the file name list includes the file names of all the final netlist files that are finally generated.

4. The circuit design method according to claim 3, characterized in that: After obtaining the updated final netlist result, the following steps are also included: All the final netlist files in the final netlist result correspond one-to-one to the file names in the file name list, and the final netlist result is name-replaced according to the file name list, and each file name is replaced into the corresponding final netlist file.

5. A circuit design device, characterized in that: Includes the following modules: An initial file acquisition module, used to acquire a function setting file and collect function setting information in the function setting file, wherein the function setting file is created and generated according to a preset rule file, wherein the rule file defines the instance functions of all instances and the file functions of all final netlist files to be generated, wherein each instance includes a number of component units, and the function setting file includes function setting information, wherein the function setting information is the content that needs to be adjusted to realize the function of each instance; Obtaining a complete netlist file, and obtaining a netlist template according to the complete netlist file; An adjustment information generation module is used to obtain the information to be adjusted based on the netlist template and the function setting information, specifically comprising the following steps: comparing the content in the function setting information with the netlist template, combining the function setting information and the netlist template, determining the content in the netlist template that needs to be adjusted when implementing the instance function, including the interface that needs to be deleted and the interface that needs to be replaced, and summarizing the information to be adjusted for implementing each instance function; A circuit information acquisition module, used to acquire complete circuit information from the complete netlist file, and to acquire template circuit information from the netlist template, specifically comprising the following steps: acquiring complete circuit information of all component units from the complete netlist file, wherein the complete circuit information includes circuit connection relationships and pin relationships in all the component units, and acquiring template circuit information of top-level component units from the netlist template, wherein the template circuit information includes template pin relationships of the top-level component units in the netlist template; The final netlist result generating module is used to adjust the netlist template accordingly according to the information to be adjusted and the complete circuit information to obtain an updated final netlist result, specifically comprising the following steps: capturing the corresponding component units and pin names from the complete circuit information according to the information to be adjusted, replacing each of the netlist templates with the captured component units and pin names, and deleting the redundant component units in the netlist template according to the information to be adjusted, to obtain an adjusted first netlist file; The template pin relationship in the template circuit information is compared with the pin relationship in the complete circuit information to obtain a comparison result. When the comparison results are inconsistent, the template pin relationship in the first netlist file is adjusted according to the connection sequence of the pin relationship to obtain an adjusted second netlist file, which is the final netlist file. All the final netlist files are summarized to obtain a final netlist result, which includes several final netlist files with different functions.

6. An intelligent terminal, characterized in that: It comprises a memory and a processor, wherein the memory stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by the processor to implement the circuit design method as described in any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that: The readable storage medium stores at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor to implement the circuit design method as described in any one of claims 1 to 4.

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