Processor communication method, device, equipment, system and storage medium

Abstract

The present invention relates to the field of server technology, and discloses a processor communication method, device, equipment, system and storage medium, the method comprising: determining the target interface module selected by the switching switch, and determining the processor protocol type corresponding to the target interface module; when obtaining device data from a first processor, performing protocol conversion on the device data according to the processor protocol type, obtaining data to be uploaded, and uploading the data to be uploaded to a second processor; when receiving data to be received from a second processor, performing protocol conversion on the data to be received according to the processor protocol type, obtaining data to be processed, and transmitting the data to be processed to the first processor. The method solves the problem that direct data transmission between processors is impossible, large-scale processor communication is difficult to achieve, and computing power requirements are not met.

Description

Technical Field

[0001] The present invention relates to the field of server technology, and in particular to a processor communication method, device, equipment, system and storage medium. Background Art

[0002] With the booming development of the digital economy, the proportion of structured data, mainly text and graphics, continues to decrease, while the proportion of unstructured data continues to surge, the scale of computing power continues to expand, and the demand for computing power continues to rise. Setting up only a single CPU (Central Processing Unit) in the server can no longer meet the computing power requirements of unstructured data. Currently, multiple processors are set up in the server to make the server a multi-way server. Processors such as CPU, GPU (graphics processing unit), DSP (Digital Signal Processor), etc., in addition to using the CPU, can accelerate data processing speed through other dedicated processors, so that the server has more efficient processing capabilities.

[0003] The key technology in multi-way servers is multi-processor communication technology, which enables multiple processors in a multi-way server to communicate with each other, and can efficiently transmit data to jointly process data. Currently, due to the limited number of processor interfaces, various interface types, and multiple protocols, multi-processor communication technology cannot directly transmit data between processors, making it difficult to achieve large-scale processor communication and not meeting computing power requirements.

[0004] Therefore, related technologies have problems such as inability to directly transmit data between processors, difficulty in achieving large-scale processor communication, and failure to meet computing power requirements. Summary of the invention

[0005] In view of this, the present invention provides a processor communication method, device, equipment, system and storage medium to solve the problems that direct data transmission between processors is impossible, large-scale processor communication is difficult to achieve, and computing power requirements are not met.

[0006] In a first aspect, the present invention provides a processor communication method, which is applied to a data transmission module, and the method includes:

[0007] Determine the target interface module to be switched on by the switch, and determine the processor protocol type corresponding to the target interface module;

[0008] When the device data from the first processor is obtained, the device data is converted into a protocol according to the processor protocol type to obtain data to be uploaded, and the data to be uploaded is uploaded to the second processor;

[0009] When receiving the data to be received from the second processor, protocol conversion is performed on the data to be received according to the processor protocol type to obtain the data to be processed, and the data to be processed is transmitted to the first processor.

[0010] The processor communication method provided in this embodiment determines the processor protocol type by determining the target interface module. According to the processor protocol type, the device data or the data to be received is converted into a protocol, and the data transmission between the first processor and the second processor is realized through the data transmission module, so as to avoid the problems such as the limited number of processor interfaces, the diverse interface types, and the multiple types of protocols, which lead to the inability to directly transmit data between processors. In addition, the problem of many connection hops between any two processors is solved by the data transmission module, thereby reducing the communication delay, realizing large-scale processor communication, and significantly improving the scale of the processor interconnection system. The larger the scale and the more processor types, the better the effect of using this method. It solves the problem that direct data transmission between processors is impossible, large-scale processor communication is difficult to realize, and computing power requirements are not met.

[0011] In an optional implementation manner, determining a target interface module for switching on a switch includes:

[0012] Obtaining a preset order, and determining a candidate interface module from a second preset number of interface modules according to the preset order;

[0013] Control the switching switch to be connected to the candidate interface module, and determine whether response data is received from the candidate interface module;

[0014] If the response data is received, the candidate interface module is the target interface module;

[0015] If no response data is received, a candidate interface module is reselected from the unselected interface modules according to a preset order, and subsequent steps are performed starting from controlling the switching switch to connect to the candidate interface module until the target interface module is determined, and then the process ends.

[0016] In this embodiment, the interface modules in the second preset number of interface modules are sequentially selected as candidate interface modules according to a preset order, and whether the candidate interface module is the target interface module is determined by judging whether the response data is received. By determining the target interface module, the processor protocol type is determined, so that the device data or the data to be received can be subsequently converted to a protocol according to the processor protocol type, thereby realizing data transmission between the first processor and the second processor.

[0017] In an optional implementation, before performing protocol conversion on the received data according to the processor protocol type, the method further includes:

[0018] Initialize the protocol stack, obtain protocol parameters of the protocol stack, and run the data transmission system, wherein the protocol stack, protocol parameters and data transmission system are used to upload the data to be uploaded;

[0019] Get device data from the target interface module.

[0020] In this implementation, the protocol stack is initialized, protocol parameters of the protocol stack are obtained, and the data transmission system is run to facilitate obtaining device data from the target interface module.

[0021] In an optional implementation, before performing protocol conversion on the received data according to the processor protocol type, the method further includes:

[0022] Initialize the protocol stack, obtain protocol parameters of the protocol stack, and run the data transmission system, wherein the protocol stack, the protocol parameters, and the data transmission system are used to obtain data to be received;

[0023] Determine whether the data to be received is received based on the protocol stack, protocol parameters and data transmission system;

[0024] If the data to be received is not received, the target interface module selected by the switching switch is re-determined, the switching switch is controlled to be connected to the new target interface module, and subsequent steps are executed from judging whether the data to be received is received based on the protocol stack, protocol parameters and data transmission system, until the data to be received is received, and then the process ends.

[0025] In a second aspect, the present invention provides an interface expansion device, the interface expansion device comprising: a first preset number of interface modules, a switch, and a data transmission module;

[0026] The interface module is used to connect to the first processor, obtain device data from the first processor and transmit data to be processed to the first processor;

[0027] The data transmission module is connected to the switch and is used to control the switch to select the target interface module, wherein the target interface module is an interface module connected to the first processor;

[0028] The data transmission module is also used to execute the processor communication method of the above-mentioned first aspect or any corresponding embodiment thereof.

[0029] The interface expansion device provided in this embodiment determines the target interface module in the first preset number of interface modules, connects to the processor, and determines the processor protocol type according to the target interface module. The data transmission module is connected to the first processor through the target interface module to realize data transmission between the first processor and the second processor, avoiding the problems of limited number of processor interfaces, diverse interface types, and multiple types of protocols, which lead to the inability to directly transmit data between processors. In addition, the problem of many connection hops between any two processors is solved by the data transmission module, thereby reducing communication delay, realizing large-scale processor communication, and significantly improving the scale of the processor interconnection system. The larger the scale and the more processor types, the better the effect of using this method. It solves the problem that direct data transmission between processors is impossible, large-scale processor communication is difficult to realize, and computing power requirements are not met.

[0030] In an optional implementation, after acquiring the device data from the first processor, the interface module is further configured to:

[0031] obtaining a communication requirement of the first processor;

[0032] According to the communication requirement, it is determined whether it is necessary to disconnect the connection between the interface expansion device and the first processor, and if necessary, disconnect the connection.

[0033] In this embodiment, full interconnection of multiple processors is achieved through an interface expansion device, and in actual applications, the first processor can be connected or disconnected according to the communication needs of the first processor. When the first processor does not need to communicate, it can be temporarily disconnected, effectively reducing server power consumption.

[0034] In an optional implementation, the interface module includes: a physical layer circuit and a first connector;

[0035] The physical layer circuit is connected to the first processor and is used to obtain device data from the first processor and transmit data to be processed to the first processor;

[0036] The physical layer circuit is connected to the switch via a first connector, and is used to obtain data to be processed from the data transmission module, or to transmit device data to the data transmission module.

[0037] In an optional implementation, the physical layer circuit includes: a power circuit unit and a processor interface unit;

[0038] The power circuit unit is used to connect to an external power source, convert the external voltage of the external power source into an adaptation voltage of the interface expansion device, and supply power to the interface expansion device;

[0039] The processor interface unit is connected to a processor with the same interface, and is used to obtain device data from the processor with the same interface, or to transmit data to be processed to the processor with the same interface.

[0040] In an optional implementation, the physical layer circuit further includes: a circuit protection unit and a debug interface unit;

[0041] The circuit protection unit is used to provide electrostatic protection for the interface module;

[0042] The debugging interface unit is used to burn the control program of the interface module into the interface module and debug the control program, wherein the control program is used to detect whether the interface module is connected to the first processor and is also used to control the transmission of device data and data to be processed.

[0043] In this embodiment, a circuit protection unit is provided to provide electrostatic protection for the interface module to ensure the safe use of the interface expansion device. The control program of the interface module is burned into the interface module through the debugging interface unit, and the control program is debugged so that the interface expansion device can execute the steps in the processor communication method.

[0044] In an optional implementation manner, the physical layer circuit further includes: a status display unit; the status display unit is used to:

[0045] Acquire a first working state of a data transmission module, a second working state of a processor interface unit, and a third working state of a power supply circuit unit in an interface expansion device;

[0046] The first working state, the second working state and the third working state are displayed.

[0047] In this embodiment, a status display unit is provided to display the first working status, the second working status and the third working status, so that the user can understand the working status of the data transmission module, the processor interface unit and the power supply circuit unit, and can quickly determine whether the status is normal, thereby quickly locating the fault and performing equipment maintenance.

[0048] In an optional implementation, the data transmission module includes: a second connector, a microcontroller, and a standard bus;

[0049] The microcontroller is connected to the switch via the second connector, and is used to control the switch to connect to the target interface module;

[0050] The microcontroller is connected to a standard bus, and the standard bus is used to connect to an interface expansion device of a second processor;

[0051] The microcontroller is used for obtaining device data from the first processor through the switching switch, the second connector and the target interface module when the first processor sends data, performing protocol conversion on the device data according to the processor protocol type of the first processor to obtain data to be uploaded, and uploading the data to be uploaded to the interface expansion device of the second processor through the standard bus;

[0052] The microcontroller is used to obtain the data to be received from the interface expansion device of the second processor through the standard bus when the first processor receives data, perform protocol conversion on the data to be received according to the processor protocol type, obtain the data to be processed, and transmit the data to be processed to the processor through the switching switch, the second connector and the target interface module.

[0053] In this embodiment, a microcontroller is used to perform protocol conversion on received data or device data according to the processor protocol type, converting it into a protocol type supported by a standard bus, and data is transmitted through the standard bus, thereby simplifying the system topology and solving problems such as a limited number of processor interfaces, a variety of interface types, and a variety of protocols.

[0054] In a third aspect, the present invention provides a processor communication system, the system comprising: a second preset number of processors and a third preset number of interface expansion devices, wherein the interface expansion device is the interface expansion device of the second aspect or any corresponding embodiment thereof;

[0055] The processors are interconnected via an interface expansion device, wherein the processors include a first processor and a second processor.

[0056] The processor communication system provided in this embodiment realizes interconnection between processors through interface expansion devices, simplifies system topology, solves problems such as limited number of processor interfaces, diverse interface types, and multiple types of protocols, and solves the problem of many connection hops between any two processors, thereby reducing communication delay. The scale of the processor interconnection system is increased, and the larger the scale and the more processor types, the better the effect of interconnection through interface expansion devices. The problem of inability to directly transmit data between processors, difficulty in realizing large-scale processor communication, and failure to meet computing power requirements is solved.

[0057] In a fourth aspect, the present invention provides a processor communication device, applied to a processor communication unit, comprising:

[0058] A determination unit, used to determine a target interface module to be switched on by the switch, and to determine a processor protocol type corresponding to the target interface module;

[0059] A first protocol conversion unit is used to, when acquiring device data from the first processor, perform protocol conversion on the device data according to the processor protocol type to obtain data to be uploaded, and upload the data to be uploaded to the second processor;

[0060] The second protocol conversion unit is used to, when receiving the data to be received from the second processor, perform protocol conversion on the data to be received according to the processor protocol type to obtain the data to be processed, and transmit the data to be processed to the first processor.

[0061] In a fifth aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the processor communication method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0062] In a sixth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the processor communication method of the first aspect or any corresponding embodiment thereof.

[0063] In a seventh aspect, the present invention provides a computer program product, comprising computer instructions for causing a computer to execute the processor communication method of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0065] Figure 1 is a schematic diagram of a 4-way server interconnection system according to an embodiment of the present invention;

[0066] Figure 2 is a schematic diagram of an 8-way server interconnection system according to an embodiment of the present invention;

[0067] Figure 3 is a flowchart of a processor communication method according to an embodiment of the present invention;

[0068] Figure 4 is a schematic diagram of the structure of an interface expansion device according to an embodiment of the present invention;

[0069] Figure 5 is a schematic diagram of a flow chart of a first processor uploading data to be uploaded to a second processor according to an embodiment of the present invention;

[0070] Figure 6is a schematic diagram of a process of a first processor acquiring to-be-processed data from a second processor according to an embodiment of the present invention;

[0071] Figure 7 is a schematic diagram of the structure of a physical layer circuit according to an embodiment of the present invention;

[0072] Figure 8 is a schematic diagram of the structure of a processor communication system according to an embodiment of the present invention;

[0073] Fig. 9 is a structural block diagram of a processor communication device according to an embodiment of the present invention;

[0074] Fig.10 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0075] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0076] The key technology of multi-way servers is multi-processor interconnection technology. Due to the limited number of processor interfaces, diverse interface types, and multiple protocol types, in order to ensure information exchange between different processors, there are problems such as the processor interconnection system topology is too complex, the number of connection hops between processors is too large, and large-scale processor interconnection cannot be achieved.

[0077] At present, multi-processor interconnection technology mainly includes two implementation schemes: scheme (1) agentless method, which does not use additional controllers or switching chips, but this scheme can only implement 8-way servers at most, and there is a problem of small interconnection scale, for example: Figure 1As shown in the figure, there are 4 CPUs, namely CPU0, CPU1, CPU2 and CPU3. Each CPU has only 3 protocol channels. The maximum interconnection mode that can be realized for a 4-way system server is direct communication between any two CPUs. For multi-way servers with 8 or more channels, direct communication between any two CPUs cannot be guaranteed, which will greatly reduce the information transmission speed of the system. For different types of processors, direct connection between different types of processors cannot be achieved due to different transmission protocols and interface types of each processor. Solution (2) has a proxy method, which requires the use of a controller or a switching chip to achieve a higher specification interconnection system. However, the existing technology has the problem that the system topology is too complex or the number of connection hops between the two processors is too large, and it cannot solve the problems of diverse interface types and multiple protocol types. For example: Figure 2 As shown, Figure 2 An 8-way server is shown, including CPU0, CPU1, CPU2, CPU3, CPU4, CPU5, CPU6 and CPU7. If CPU0 is connected to CPU6, the optimal route is CPU0-CPU1-CPU6, and the number of connection hops is 2. If the interconnection in the 16-way and above multi-way servers is done without an agent, there will be a problem of too many connection hops between the two processors, which will cause data transmission delay, so an agent method is needed. Most of the existing agent methods use an interface expansion method, but this interface expansion method still faces the problem of many connection hops and complex interconnection topology, and cannot realize the interconnection between different types of processors. The interface expansion device proposed in the present invention can realize the interconnection of multiple types and numbers of processors based on the unification of the physical interface and the data transmission protocol.

[0078] Based on the above content, an embodiment of the present invention provides a processor communication method, in which processors are connected to each other using an interface expansion device, which has a unified hardware physical interface and data transmission protocol and can be connected to any other interface expansion device, thereby achieving full interconnection of multiple processors. This simplifies the system topology, solves the problems of limited number of processor interfaces, diverse interface types, and multiple protocol types, solves the problem of many connection hops between any two processors, and reduces the effect of communication delay.

[0079] According to an embodiment of the present invention, a processor communication method embodiment is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a data transmission module with data processing capabilities, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0080] In this embodiment, a processor communication method is provided, which is applied to a data transmission module. Figure 3is a flowchart of a processor communication method according to an embodiment of the present invention. Figure 3 As shown, the process includes the following steps:

[0081] Step S301, determining a target interface module to be switched on by a switch, and determining a processor protocol type corresponding to the target interface module.

[0082] Specifically, combined Figure 4 This embodiment is described. Figure 4 As shown, the data transmission module is included in the interface expansion device. In the interface expansion device, the data transmission module is connected to the diversified interface module through a switching switch. The diversified interface module includes multiple interface modules. Each interface module includes a physical layer circuit and a standard connector. The standard connector is a connector whose interface protocol type is a unified standard protocol. The data transmission module includes a standard connector, a microprocessor, and a standard bus, and is connected to the data transmission module in the interface expansion device of other processors through the standard bus.

[0083] There is a target interface module connected to the processor among the multiple interface modules. The data transmission module can be connected to each interface module in turn through a switching switch, and judge whether it is the target interface module by judging whether the response data is received. The data transmission module is connected to the target interface module through a switching switch, and the target interface module is connected to the processor, so that the data transmission module is connected to the processor. The data transmission module determines the processor protocol type corresponding to the target interface module, and the processor protocol type is the communication protocol supported by the processor connected to the target interface module.

[0084] Step S302, when the device data from the first processor is obtained, the device data is converted into a protocol according to the processor protocol type to obtain data to be uploaded, and the data to be uploaded is uploaded to the second processor.

[0085] Specifically, the first processor is a processor connected to the target interface module, such as a CPU, GPU, DSP, etc. The first processor sends device data to the data transmission module through the target interface module and the switch, such as structured data or unstructured data mainly including text and charts to be processed.

[0086] When the data transmission module obtains the device data from the first processor, it performs protocol conversion on the device data according to the processor protocol type, and converts the device data into a unified standard protocol, such as PCIE (Peripheral Component Interconnect Express, serial expansion bus standard) protocol. After the device data protocol is converted, the data to be uploaded is obtained.

[0087] The standard bus in the data transmission module is connected to the interface expansion device of the second processor to achieve connection with the second processor. The data transmission module uploads the data to be uploaded to the interface expansion device of the second processor, and then the interface expansion device of the second processor uploads the data to be uploaded to the second processor.

[0088] Step S303, when receiving the data to be received from the second processor, performing protocol conversion on the data to be received according to the processor protocol type to obtain the data to be processed, and transmitting the data to be processed to the first processor.

[0089] Specifically, the second processor uploads the data to be received to the data transmission module in the interface expansion device of the first processor through its interface expansion device. At this time, the protocol type of the data to be received is the above-mentioned unified standard protocol. When the data transmission module receives the data to be received from the second processor, it converts the protocol type of the data to be received from the unified standard protocol to the processor protocol type to obtain the data to be processed. The data transmission module transmits the data to be processed to the first processor by switching the switch and the target interface module.

[0090] The processor communication method provided in this embodiment determines the processor protocol type by determining the target interface module. According to the processor protocol type, the device data or the data to be received is converted into a protocol, and the data transmission between the first processor and the second processor is realized through the data transmission module, so as to avoid the problems such as the limited number of processor interfaces, the diverse interface types, and the multiple types of protocols, which lead to the inability to directly transmit data between processors. In addition, the problem of many connection hops between any two processors is solved by the data transmission module, thereby reducing the communication delay, realizing large-scale processor communication, and significantly improving the scale of the processor interconnection system. The larger the scale and the more processor types, the better the effect of using this method. It solves the problem that direct data transmission between processors is impossible, large-scale processor communication is difficult to realize, and computing power requirements are not met.

[0091] In some optional implementations, determining a target interface module to be switched on by a switch includes:

[0092] Obtaining a preset order, and determining a candidate interface module from a second preset number of interface modules according to the preset order;

[0093] Control the switching switch to be connected to the candidate interface module, and determine whether response data is received from the candidate interface module;

[0094] If the response data is received, the candidate interface module is the target interface module;

[0095] If no response data is received, a candidate interface module is reselected from the unselected interface modules according to a preset order, and subsequent steps are performed starting from controlling the switching switch to connect to the candidate interface module until the target interface module is determined, and then the process ends.

[0096] Specifically, the software of the interface expansion device can be divided into two parts: the processor interface software part and the custom unified interface protocol software part. The main processes of the processor interface software part include connection detection, device enumeration, effective data transmission and function control. The processor interface software part is used to control the data transmission module to determine the target interface module. Figure 4 As shown, the diversified interface module includes multiple interface modules, each of which includes a physical layer circuit and a standard connector. In this embodiment, a preset order is set for each interface module, and the preset order is used to determine the order of connection with the switch when enumerating interface module devices, for example: interface module a is the first, interface module b is the second, ..., interface module n is the xth, and x is an integer.

[0097] The data transmission module determines a candidate interface module from a second preset number of interface modules according to a preset order, for example, if interface module a is the first in the preset order, interface module a is selected as the candidate interface module. The data transmission module controls the switch to connect to the candidate interface module, determines whether response data sent by the first processor is received from the candidate interface module, and if the response data is received, determines that the current candidate interface module is the interface module connected to the first processor, and selects the candidate interface module as the target interface module.

[0098] If no response data is received, a candidate interface module is reselected from the unselected interface modules according to a preset sequence. For example, if interface module b is the second one in the preset sequence, interface module b is selected as the candidate interface module. The above step "connecting the slave control switch to the candidate interface module" and subsequent steps are re-executed until the target interface module is determined, and the process ends.

[0099] The above process is as follows Figure 5 As shown, the system is initialized, the device access is detected, and it is determined whether the interface expansion device is connected to the processor interface. If not, the device access is re-detected. If yes, the device is enumerated to determine the device type. By enumerating the device, the type of the external processor and the protocol type are confirmed. This step corresponds to the connection between the switching switch of the hardware part and the corresponding physical layer circuit module in the diversified interface module. Here, the switching switch is first connected to the standard connector of the physical layer circuit 1 module. If data is detected on the right side, it proves that the external processor type is 1 and the data transmission is successful; if no data is detected on the right side, the switching switch is connected to the standard connector of the physical layer circuit 2 module..., and the device is enumerated in this way until data is detected, proving that the enumeration is successful.

[0100] In this embodiment, the interface modules in the second preset number of interface modules are sequentially selected as candidate interface modules according to a preset order, and whether the candidate interface module is the target interface module is determined by judging whether the response data is received. By determining the target interface module, the processor protocol type is determined, so that the device data or the data to be received can be subsequently converted to a protocol according to the processor protocol type, thereby realizing data transmission between the first processor and the second processor.

[0101] In some optional implementations, before performing protocol conversion on the received data according to the processor protocol type, the method further includes:

[0102] Initialize the protocol stack, obtain protocol parameters of the protocol stack, and run the data transmission system, wherein the protocol stack, protocol parameters and data transmission system are used to upload the data to be uploaded;

[0103] Get device data from the target interface module.

[0104] Specifically, the interface expansion device can be divided into two parts: the processor interface software part and the custom unified interface protocol software part. The custom unified interface protocol software part is used to initialize the protocol stack, run the system, and upload data. Figure 5 As shown, the custom unified interface protocol software controls the data transmission module to initialize the wireless protocol stack, configure wireless protocol stack parameters, and run the data transmission system, including:

[0105] Initialize the protocol stack, obtain the protocol parameters of the protocol stack, and run the data transmission system, wherein the protocol stack, protocol parameters and data transmission system are used to upload the data to be uploaded; obtain the device data from the target interface module. Figure 5 As shown, after running the system, waiting for the switch to connect to the target interface module, and enumerating the device to determine the device type, the device data is obtained from the target interface module to determine whether the device data is received. If received, the data uploading step in step S102 is performed. Figure 5 The flowchart of the first processor uploading the data to be uploaded to the second processor includes: after the system is operating normally, the interface expansion device will be initialized, and the processor interface end will be connected to the external processor device. When the device is connected, the device type is determined by switching the switch, and the device class command is issued to obtain the device data; the customized unified interface protocol end runs the system for data transmission.

[0106] In this implementation, the protocol stack is initialized, protocol parameters of the protocol stack are obtained, and the data transmission system is run to facilitate obtaining device data from the target interface module.

[0107] In some optional implementations, before performing protocol conversion on the received data according to the processor protocol type, the method further includes:

[0108] Initialize the protocol stack, obtain protocol parameters of the protocol stack, and run the data transmission system, wherein the protocol stack, the protocol parameters, and the data transmission system are used to obtain data to be received;

[0109] Determine whether the data to be received is received based on the protocol stack, protocol parameters and data transmission system;

[0110] If the data to be received is not received, the target interface module selected by the switching switch is re-determined, the switching switch is controlled to be connected to the new target interface module, and subsequent steps are executed from judging whether the data to be received is received based on the protocol stack, protocol parameters and data transmission system, until the data to be received is received, and then the process ends.

[0111] Specifically, the software of the interface expansion device can be divided into two parts: the processor interface software part and the custom unified interface protocol software part. The custom unified interface protocol software part is used to initialize the protocol stack, run the system, and upload data. Figure 6 As shown, the custom unified interface protocol software controls the data transmission module to initialize the wireless protocol stack, configure the wireless protocol stack parameters, run the data transmission system, and wait for the switch to connect, including:

[0112] Initialize the protocol stack, obtain the protocol parameters of the protocol stack, and run the data transmission system, wherein the protocol stack, protocol parameters and data transmission system are used to obtain the data to be received; determine whether the data to be received sent by the second host is received based on the protocol stack, protocol parameters and data transmission system; if the data to be received is not received, re-determine the target interface module selected by the switching switch, control the switching switch to connect to the new target interface module, and start executing subsequent steps from determining whether the data to be received is received based on the protocol stack, protocol parameters and data transmission system, until the data to be received is received, then end. The above process is as follows Figure 6 As shown, after completing the steps of "enumerating devices to determine device type" and "waiting for the switch to be connected", the second host uploads data, and the data transmission module in the interface expansion device of the first host determines whether data is received. If so, the data to be received is received, and the data to be received includes device data; if not, the step of "enumerating devices to determine device type" is re-executed. Figure 6The present invention is a flow chart of the process of the first processor obtaining the data to be processed from the second processor, which includes: when receiving data, the interface expansion device is first initialized, and the processor interface end is connected to the external processor device. When the device is connected, the switching switch determines the device type by enumeration and issues a device class command; based on the custom unified interface protocol and the obtained device type, the command format and data format that can be received are determined, and the data received from the standard bus is transmitted, and data extraction, parsing, reorganization and forwarding are completed, thereby completing data reception.

[0113] In addition, the process of initializing the protocol stack includes, for example, steps A1 to A3.

[0114] Step A1, when the protocol stack is initialized, the protocol stack's own memory is created to ensure that the data transmission system can operate.

[0115] Specifically, the memory occupied by the protocol stack itself is within 4Kb, so a 4Kb memory needs to be created when the protocol stack is initialized. At the same time, in order to facilitate memory management, a dynamic memory allocation table is created when the protocol stack is initialized to store business module memory information. The dynamic memory allocation table includes memory requirement size, number, priority, and status; the priority reflects the priority of the business program, and the program can be managed according to the priority to ensure that high-priority programs can quickly allocate memory and execute; the memory usage status uses reference counting to identify the memory usage, so that the protocol stack management program can be better deployed.

[0116] Step A2, when the data transmission module initializes the protocol stack, it counts its own memory usage according to demand and creates corresponding memory, injects the created memory into the protocol stack, and is managed uniformly by the protocol stack.

[0117] Specifically, the protocol stack is compatible with the standard socket interface, and the original software logic functions can be directly transplanted. The protocol stack provides a business demand memory calculation interface. This access interface calculates the required memory size based on the number of sockets required by the business and the message processing performance requirements. The protocol stack provides a business memory injection interface, which classifies the memory injected by business data according to business needs and stores it in different system memory pools. If the injected memory is insufficient, a system error is returned, which is adjusted by the user during the development stage.

[0118] Step A3: When the data transmission module uses the memory, the protocol stack allocates the injected memory according to the memory required by the data transmission module.

[0119] Specifically, the protocol stack performs unified memory management scheduling. The protocol stack memory management includes memory allocation and recovery, and performs corresponding memory locking mechanism according to the application situation to avoid business crash caused by cross-use of memory. The protocol stack memory management also includes management according to task priority. When a task with a higher priority requests memory, the memory request amount is calculated. When the available memory is insufficient, the low-priority task is removed from occupying the memory to provide it for use by the high-priority task, ensuring that the high-priority task can quickly allocate memory and execute it.

[0120] This embodiment only provides basic data global memory when the protocol stack is initialized to ensure that the data transmission system can run; the data transmission module injects the memory actually used by itself into the protocol stack according to the demand during initialization, and the protocol stack manages and schedules it uniformly, which can not only meet the standardization of the protocol stack interface, fully compatible with the original standard Socket interface, but also simplify the memory to the maximum extent, and the memory occupied by the protocol stack itself is within 4Kb. It can better solve the problem of difficult adaptation of the protocol stack memory scale and task requirements on the basis of maintaining the standardized interface of the protocol stack.

[0121] In this embodiment, an interface expansion device is provided, the interface expansion device comprising: a first preset number of interface modules, a switch and a data transmission module;

[0122] The interface module is used to connect to the first processor, obtain device data from the first processor and transmit data to be processed to the first processor;

[0123] The data transmission module is connected to the switch and is used to control the switch to select the target interface module, wherein the target interface module is an interface module connected to the first processor;

[0124] The data transmission module is also used to execute the processor communication method of the above steps S301 to S303 or any corresponding implementation manner thereof.

[0125] Specifically, combined Figure 4 This embodiment is described. Figure 4 As shown, the data transmission module is included in the interface expansion device. In the interface expansion device, the data transmission module is connected to the diversified interface module through a switching switch. The diversified interface module includes a first preset number of interface modules. The first preset number represents a plurality of interfaces, and no specific quantity limit is imposed here. Each interface module includes a physical layer circuit and a standard connector. The data transmission module includes a standard connector, a microprocessor, and a standard bus, and is connected to the data transmission module in the interface expansion device of other processors through the standard bus.

[0126] Each interface module can be connected to a first processor with the same protocol interface, and obtain device data from the first processor and transmit data to be processed to the first processor. The data transmission module can control the switch to be connected to a first preset number of interface modules respectively, and determine a target interface module from the first preset number of interface modules, and the target interface module is the interface module connected to the first processor.

[0127] The data transmission module is also used to execute the processor communication method of the above steps S301 to S303 or any corresponding implementation method thereof. For specific contents, please refer to the above embodiments and will not be repeated here.

[0128] The interface expansion device provided in this embodiment determines the target interface module in the first preset number of interface modules, connects to the processor, and determines the processor protocol type according to the target interface module. The data transmission module is connected to the first processor through the target interface module to realize data transmission between the first processor and the second processor, avoiding the problems of limited number of processor interfaces, diverse interface types, and multiple types of protocols, which lead to the inability to directly transmit data between processors. In addition, the problem of many connection hops between any two processors is solved by the data transmission module, thereby reducing communication delay, realizing large-scale processor communication, and significantly improving the scale of the processor interconnection system. The larger the scale and the more processor types, the better the effect of using this method. It solves the problem that direct data transmission between processors is impossible, large-scale processor communication is difficult to realize, and computing power requirements are not met.

[0129] In some optional implementations, after acquiring the device data from the first processor, the interface module is further configured to:

[0130] obtaining a communication requirement of the first processor;

[0131] According to the communication requirement, it is determined whether it is necessary to disconnect the connection between the interface expansion device and the first processor, and if necessary, disconnect the connection.

[0132] Specifically, after the interface module obtains the device data from the first processor, the interface expansion device will obtain the communication requirements of the first processor, and determine whether the first processor needs to output device data or receive data to be processed next based on the communication requirements. If neither is required, the connection between the interface expansion device and the first processor can be disconnected to reduce the power consumption of the device. If necessary, it indicates that the first processor still needs to communicate with other processors during operation, and the connection between the interface expansion device and the first processor is not disconnected. The above process is as follows Figure 5 As shown, get device data, transmit data, determine whether there is data, if yes, upload data, if not, re-execute "enumerate devices to determine device type". After the above steps are completed, the device is disconnected.

[0133] In this embodiment, full interconnection of multiple processors is achieved through an interface expansion device, and in actual applications, the first processor can be connected or disconnected according to the communication needs of the first processor. When the first processor does not need to communicate, it can be temporarily disconnected, effectively reducing server power consumption.

[0134] In some optional implementations, the interface module includes: a physical layer circuit and a first connector;

[0135] The physical layer circuit is connected to the first processor and is used to obtain device data from the first processor and transmit data to be processed to the first processor;

[0136] The physical layer circuit is connected to the switch via a first connector, and is used to obtain data to be processed from the data transmission module, or to transmit device data to the data transmission module.

[0137] Specifically, combined Figure 4 In the interface expansion device, the data transmission module is connected to the diversified interface module through a switching switch, the diversified interface module includes a first preset number of interface modules, each interface module is composed of a physical layer circuit of multiple types of processor interfaces and a standard connector corresponding to the physical layer circuit, the standard connector is the first connector, and the standard connector is a connector whose interface protocol type is a unified standard protocol.

[0138] The physical layer circuit is connected to the first processor, and is used to obtain device data from the first processor, transmit the device data to the data transmission module through the switching switch, and transmit the to-be-processed data sent by the data transmission module to the first processor to which it is connected.

[0139] The physical layer circuit is connected to the switching switch through the first connector. Since the switching switch is connected to the data transmission module, the physical layer circuit is connected to the data transmission module through the switching switch and can obtain the data to be processed from the data transmission module, or transmit the device data to the data transmission module.

[0140] In some optional implementations, the physical layer circuit includes: a power circuit unit and a processor interface unit;

[0141] The power circuit unit is used to connect to an external power source, convert the external voltage of the external power source into an adaptation voltage of the interface expansion device, and supply power to the interface expansion device;

[0142] The processor interface unit is connected to a processor with the same interface, and is used to obtain device data from the processor with the same interface, or to transmit data to be processed to the processor with the same interface.

[0143] Specifically, Figure 7As shown, the physical layer circuit includes: a power circuit unit and a processor interface unit.

[0144] The power circuit unit is connected to an external power supply, converts the external voltage of the external power supply into the adaptation voltage of the interface expansion device, and supplies power to the interface expansion device. For example, the voltage required by the physical layer circuit is 3.3V, that is, the adaptation voltage is 3.3V, and the external voltage provided by the external power supply is 220V. The power circuit module converts the external voltage from 220V to 3.3V and supplies power to the physical layer circuit. The external power supply can be provided by a server or other power supply. The adaptation voltage is set according to actual needs.

[0145] The processor interface unit includes a system external interface, which is connected to a processor with the same interface through the system external interface to obtain device data from the processor with the same interface, or to transmit data to be processed to the processor with the same interface.

[0146] In some optional implementations, the physical layer circuit further includes: a circuit protection unit and a debug interface unit;

[0147] The circuit protection unit is used to provide electrostatic protection for the interface module;

[0148] The debugging interface unit is used to burn the control program of the interface module into the interface module and debug the control program, wherein the control program is used to detect whether the interface module is connected to the first processor and is also used to control the transmission of device data and data to be processed.

[0149] Specifically, Figure 7 As shown, the physical layer circuit includes: a circuit protection unit and a debugging interface unit.

[0150] The circuit protection unit is, for example, an ESD (Electro-Static discharge) protection circuit. Since the processor interface unit is connected to the processor and needs to be protected from electrostatic discharge, the present embodiment sets an ESD protection circuit as the circuit protection unit for electrostatic discharge protection.

[0151] The debugging interface unit is, for example, an SWD (Serial Wire Debug) interface circuit. The SWD interface circuit module supports online downloading and program simulation, and SWD burning or simulation can be completed through wch-link. Therefore, the control program of the interface module can be burned into the interface module through the debugging interface unit, and the control program can be debugged. The control program in this embodiment is divided into two parts: a processor interface software part and a custom unified interface protocol software part. The processor interface software part is mainly used for connection detection, device enumeration, effective data transmission and function control. The custom unified interface protocol software part is mainly used for three functions: initializing the protocol stack, running the system and uploading data.

[0152] It should be noted that the internal structures of different physical layer circuits are different in the processor interface module. Different processor interfaces correspond to different types of processors and can be externally connected to corresponding processors. Therefore, the diversified interface module includes multiple physical layer circuits.

[0153] In this embodiment, a circuit protection unit is provided to provide electrostatic protection for the interface module to ensure the safe use of the interface expansion device. The control program of the interface module is burned into the interface module through the debugging interface unit, and the control program is debugged so that the interface expansion device can execute the steps in the processor communication method.

[0154] In some optional implementations, the physical layer circuit further includes: a status display unit; the status display unit is used to:

[0155] Acquire a first working state of a data transmission module, a second working state of a processor interface unit, and a third working state of a power supply circuit unit in an interface expansion device;

[0156] The first working state, the second working state and the third working state are displayed.

[0157] Specifically, Figure 7 As shown, the physical layer circuit includes: a status display unit.

[0158] The status display unit is, for example, an LED (light-emitting diode) circuit. Three LED display lights may be provided in the LED circuit, namely, a power light, a processor interface module operation status light, and a data transmission module operation status light.

[0159] Obtain the first working state of the data transmission module, the second working state of the processor interface unit, and the third working state of the power supply circuit unit in the interface expansion device. The first working state is, for example, the running state of the data transmission module, the second working state is, for example, the connection state between the processor interface unit and the processor, and the third working state is, for example, the current system power state.

[0160] The third working state is displayed by the power light, the second working state is displayed by the processor interface module operating state light, and the first working state is displayed by the data transmission module operating state light, so as to provide an intuitive display to the user.

[0161] In this embodiment, a status display unit is provided to display the first working status, the second working status and the third working status, so that the user can understand the working status of the data transmission module, the processor interface unit and the power supply circuit unit, and can quickly determine whether the status is normal, thereby quickly locating the fault and performing equipment maintenance.

[0162] In some optional implementations, the data transmission module includes: a second connector, a microcontroller, and a standard bus;

[0163] The microcontroller is connected to the switch via the second connector, and is used to control the switch to connect to the target interface module;

[0164] The microcontroller is connected to a standard bus, and the standard bus is used to connect to an interface expansion device of a second processor;

[0165] The microcontroller is used for obtaining device data from the first processor through the switching switch, the second connector and the target interface module when the first processor sends data, performing protocol conversion on the device data according to the processor protocol type of the first processor to obtain data to be uploaded, and uploading the data to be uploaded to the interface expansion device of the second processor through the standard bus;

[0166] The microcontroller is used to obtain the data to be received from the interface expansion device of the second processor through the standard bus when the first processor receives data, perform protocol conversion on the data to be received according to the processor protocol type, obtain the data to be processed, and transmit the data to be processed to the processor through the switching switch, the second connector and the target interface module.

[0167] Specifically, Figure 4 As shown, the data transmission module includes: a second connector, a microcontroller and a standard bus. The second connector is, for example, a standard connector. The standard connector is a connector whose interface protocol type is a unified standard protocol. The standard bus is based on a custom unified interface protocol and is used to connect to the data transmission devices of other processors in a multi-way server. The data transmission module is a unified external interface and also realizes physical interconnection with other interface expansion devices. For different types of processors, the protocol type is also different. The data transmission module realizes the conversion of multiple protocols into a custom unified interface protocol, thereby realizing interconnection with other processors and realizing standardization, unification and intelligence of interface devices.

[0168] The microcontroller controls the switching switch to connect to the first preset number of interface modules in sequence, determines the target interface module from them, and controls the switching switch to connect to the target interface module, so as to interconnect the data transmission module with the physical layer circuit in the corresponding target interface module, and realize the switching and multiplexing of the physical layer hardware circuits of different types of interfaces.

[0169] The microcontroller is connected to the first processor through a switching switch, a second connector and a target interface module. When the first processor sends data, the device data is obtained from the first processor through the switching switch, the second connector and the target interface module. For different types of processors, the protocol type is also different. The data transmission module converts multiple protocols into a custom unified interface protocol to achieve interconnection with other processors, which specifically includes: the microcontroller determines the processor protocol type of the first processor according to the target interface module, performs protocol conversion on the device data according to the processor protocol type to obtain data to be uploaded, uploads the data to be uploaded to the interface expansion device of the second processor through the standard bus, and the interface expansion device of the second processor performs protocol conversion on the data to be uploaded, and then transmits the data to the second processor.

[0170] The microcontroller is connected to the standard bus, and is also used to control the standard bus to be connected to the standard bus of the interface expansion device of the second processor to realize data transmission.

[0171] When the first processor receives data, the microcontroller obtains the data to be received from the interface expansion device of the second processor through the standard bus, performs protocol conversion on the data to be received according to the processor protocol type, converts the data to be received into the processor protocol type supported by the first processor, obtains the data to be processed, and enables the first processor to identify and process the data to be received. The data to be processed is transmitted to the processor through the switching switch, the second connector and the target interface module.

[0172] In this embodiment, a microcontroller is used to perform protocol conversion on received data or device data according to the processor protocol type, converting it into a protocol type supported by a standard bus, and data is transmitted through the standard bus, thereby simplifying the system topology and solving problems such as a limited number of processor interfaces, a variety of interface types, and a variety of protocols.

[0173] In this embodiment, a processor communication system is provided, the system comprising: a second preset number of processors and a third preset number of interface expansion devices, wherein the interface expansion device is an interface expansion device of any of the above implementation modes;

[0174] The processors are interconnected via an interface expansion device, wherein the processors include a first processor and a second processor.

[0175] Specifically, the processor communication system includes: a second preset number of processors and a third preset number of interface expansion devices, the second preset number and the third preset number both represent a plurality, and the values ​​of the second preset number and the third preset number may be the same or different, for example: the second preset number is equal to 16, the third preset number is equal to 16, such as Figure 8As shown, the processors correspond to the interface expansion devices one by one, and the processors are interconnected through the interface expansion devices. The interface expansion device is an interface expansion device of any of the above-mentioned implementation modes, and the specific contents are referred to the above-mentioned embodiments, which will not be described in detail here. The data transmission module in the interface expansion device is used to perform the processor communication method of any of the above-mentioned steps S301 to S303 or its corresponding implementation modes, and the specific contents are referred to the above-mentioned embodiments, which will not be described in detail here.

[0176] The processor communication system provided in this embodiment realizes interconnection between processors through interface expansion devices, simplifies system topology, solves problems such as limited number of processor interfaces, diverse interface types, and multiple types of protocols, and solves the problem of many connection hops between any two processors, thereby reducing communication delay. The scale of the processor interconnection system is increased, and the larger the scale and the more processor types, the better the effect of interconnection through interface expansion devices. The problem of inability to directly transmit data between processors, difficulty in realizing large-scale processor communication, and failure to meet computing power requirements is solved.

[0177] In this embodiment, a processor communication device is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0178] This embodiment provides a processor communication device, such as Fig. 9 As shown, the device comprises:

[0179] A determination unit 901 is used to determine a target interface module to be switched on by the switch, and to determine a processor protocol type corresponding to the target interface module;

[0180] The first protocol conversion unit 902 is used to, when obtaining device data from the first processor, perform protocol conversion on the device data according to the processor protocol type to obtain data to be uploaded, and upload the data to be uploaded to the second processor;

[0181] The second protocol conversion unit 903 is used to, when receiving the data to be received from the second processor, perform protocol conversion on the data to be received according to the processor protocol type to obtain the data to be processed, and transmit the data to be processed to the first processor.

[0182] In some optional implementations, the determining unit 901 determines the target interface module to be switched on by the switch, including:

[0183] Obtaining a preset order, and determining a candidate interface module from a second preset number of interface modules according to the preset order;

[0184] Control the switching switch to be connected to the candidate interface module, and determine whether response data is received from the candidate interface module;

[0185] If the response data is received, the candidate interface module is the target interface module;

[0186] If no response data is received, a candidate interface module is reselected from the unselected interface modules according to a preset order, and subsequent steps are performed starting from controlling the switching switch to connect to the candidate interface module until the target interface module is determined, and then the process ends.

[0187] In some optional implementations, before performing protocol conversion on the received data according to the processor protocol type, the apparatus is further configured to:

[0188] Initialize the protocol stack, obtain protocol parameters of the protocol stack, and run the data transmission system, wherein the protocol stack, protocol parameters and data transmission system are used to upload the data to be uploaded;

[0189] Get device data from the target interface module.

[0190] In some optional implementations, before performing protocol conversion on the received data according to the processor protocol type, the apparatus is further configured to:

[0191] Initialize the protocol stack, obtain protocol parameters of the protocol stack, and run the data transmission system, wherein the protocol stack, the protocol parameters, and the data transmission system are used to obtain data to be received;

[0192] Determine whether the data to be received is received based on the protocol stack, protocol parameters and data transmission system;

[0193] If the data to be received is not received, the target interface module selected by the switching switch is re-determined, the switching switch is controlled to be connected to the new target interface module, and subsequent steps are executed from judging whether the data to be received is received based on the protocol stack, protocol parameters and data transmission system, until the data to be received is received, and then the process ends.

[0194] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0195] The processor communication device in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0196] The embodiment of the present invention also provides a computer device having the above Fig. 9 The processor communication device shown.

[0197] See also Fig.10 , Fig.10 is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present invention, such as Fig.10 As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Fig.10 A processor 10 is taken as an example.

[0198] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0199] The memory 20 stores instructions executable by at least one processor 10, so that at least one processor 10 executes the method shown in the above embodiment.

[0200] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0201] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0202] The computer device further comprises a communication interface 30 for the computer device to communicate with other devices or a communication network.

[0203] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0204] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.

[0205] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A processor communication method, characterized in that: The method is applied to a data transmission module, and the method comprises: Determine a target interface module to be switched on by the switch, and determine a processor protocol type corresponding to the target interface module; The determining of the target interface module to be selected by the switching switch comprises: obtaining a preset sequence, and determining a candidate interface module from a second preset number of interface modules according to the preset sequence; controlling the switching switch to be connected to the candidate interface module, and determining whether response data is received from the candidate interface module; if the response data is received, the candidate interface module is the target interface module; if the response data is not received, reselecting the candidate interface module from the interface modules that have not been selected according to the preset sequence, and executing subsequent steps from the step of controlling the switching switch to be connected to the candidate interface module until the target interface module is determined, and then ending; In the case of acquiring device data from the first processor, performing protocol conversion on the device data according to the processor protocol type to obtain data to be uploaded, and uploading the data to be uploaded to the second processor, wherein the data transmission module is included in an interface expansion device, and the first processor and the second processor are interconnected through the interface expansion device; Initializing a protocol stack, obtaining protocol parameters of the protocol stack, and running the data transmission module, wherein the protocol stack, the protocol parameters, and the data transmission module are used to obtain data to be received; Determining whether the to-be-received data is received based on the protocol stack, the protocol parameters and the data transmission module; If the data to be received is not received, the target interface module selected by the switching switch is re-determined, the switching switch is controlled to be connected to a new target interface module, and subsequent steps are performed from the judgment based on the protocol stack, the protocol parameters and the data transmission module whether the data to be received is received, until the data to be received is received, and then the process ends; When the data to be received is received from the second processor, protocol conversion is performed on the data to be received according to the processor protocol type to obtain data to be processed, and the data to be processed is transmitted to the first processor.

2. The method according to claim 1, characterized in that Before performing protocol conversion on the to-be-received data according to the processor protocol type, the method further includes: Initializing a protocol stack, obtaining protocol parameters of the protocol stack, and running a data transmission module, wherein the protocol stack, the protocol parameters, and the data transmission module are used to upload the data to be uploaded; The device data is obtained from the target interface module.

3. An interface expansion device, characterized in that: The interface expansion device comprises: a first preset number of interface modules, a switch and a data transmission module; The interface module is used to connect to the first processor, obtain device data from the first processor and transmit data to be processed to the first processor; The data transmission module is connected to the switch and is used to control the switch to select a target interface module, wherein the target interface module is an interface module connected to the first processor; The data transmission module is also used to execute the processor communication method according to any one of claims 1 to 2.

4. The interface expansion device according to claim 3, characterized in that: After acquiring the device data from the first processor, the interface module is further configured to: Obtaining a communication requirement of the first processor; According to the communication requirement, it is determined whether it is necessary to disconnect the interface expansion device from the first processor, and if necessary, disconnect the connection.

5. The interface expansion device according to claim 3, characterized in that: The interface module includes: a physical layer circuit and a first connector; The physical layer circuit is connected to the first processor, and is used to obtain the device data from the first processor and transmit the data to be processed to the first processor; The physical layer circuit is connected to the switch via the first connector, and is used to obtain the data to be processed from the data transmission module, or to transmit the device data to the data transmission module.

6. The interface expansion device according to claim 5, characterized in that: The physical layer circuit comprises: a power circuit unit and a processor interface unit; The power circuit unit is used to connect to an external power source, convert the external voltage of the external power source into the adaptation voltage of the interface expansion device, and supply power to the interface expansion device; The processor interface unit is connected to a processor with the same interface, and is used to obtain the device data from the processor with the same interface, or to transmit the data to be processed to the processor with the same interface.

7. The interface expansion device according to claim 6, characterized in that: The physical layer circuit also includes: a circuit protection unit and a debugging interface unit; The circuit protection unit is used to provide electrostatic protection for the interface module; The debugging interface unit is used to burn the control program of the interface module into the interface module and debug the control program, wherein the control program is used to detect whether the interface module is connected to the first processor and is also used to control the transmission of the device data and the data to be processed.

8. The interface expansion device according to claim 6, characterized in that: The physical layer circuit further comprises: a status display unit; the status display unit is used for: Acquire a first working state of a data transmission module in the interface expansion device, a second working state of the processor interface unit, and a third working state of the power supply circuit unit; The first working state, the second working state and the third working state are displayed.

9. The interface expansion device according to claim 3, characterized in that: The data transmission module includes: a second connector, a microcontroller and a standard bus; The microcontroller is connected to the switch via the second connector, and is used to control the switch to connect to the target interface module; The microcontroller is connected to the standard bus, and the standard bus is used to connect to the interface expansion device of the second processor; The microcontroller is used for acquiring the device data from the first processor through the switching switch, the second connector and the target interface module when the first processor sends data, performing protocol conversion on the device data according to the processor protocol type of the first processor to obtain the data to be uploaded, and uploading the data to be uploaded to the interface expansion device of the second processor through the standard bus; The microcontroller is used to obtain the data to be received from the interface expansion device of the second processor through the standard bus when the first processor receives data, perform protocol conversion on the data to be received according to the processor protocol type to obtain the data to be processed, and transmit the data to be processed to the processor through the switching switch, the second connector and the target interface module.

10. A processor communication system, characterized in that: The system comprises: a second preset number of processors and a third preset number of interface expansion devices, wherein the interface expansion device is the interface expansion device according to any one of claims 3 to 9; The processors are interconnected via the interface expansion device, wherein the processors include a first processor and a second processor.

11. A processor communication device, characterized in that: The device comprises: A determination unit, used to determine a target interface module to be switched on by the switch, and to determine a processor protocol type corresponding to the target interface module; The determination unit determines the target interface module to be selected by the switching switch, including: obtaining a preset sequence, and determining a candidate interface module from a second preset number of interface modules according to the preset sequence; controlling the switching switch to be connected to the candidate interface module, and determining whether response data is received from the candidate interface module; if the response data is received, the candidate interface module is the target interface module; if the response data is not received, reselecting the candidate interface module from the interface modules that have not been selected according to the preset sequence, and executing subsequent steps from controlling the switching switch to be connected to the candidate interface module until the target interface module is determined, and then ending; a first protocol conversion unit, configured to, when acquiring device data from the first processor, perform protocol conversion on the device data according to the processor protocol type to obtain data to be uploaded, and upload the data to be uploaded to the second processor, wherein the data transmission module is included in the interface expansion device, and the first processor and the second processor are interconnected through the interface expansion device; Initializing a protocol stack, obtaining protocol parameters of the protocol stack, and running the data transmission module, wherein the protocol stack, the protocol parameters, and the data transmission module are used to obtain data to be received; Determining whether the data to be received is received based on the protocol stack, the protocol parameters and the data transmission module; If the data to be received is not received, the target interface module selected by the switching switch is re-determined, the switching switch is controlled to be connected to a new target interface module, and subsequent steps are performed from the judgment based on the protocol stack, the protocol parameters and the data transmission module whether the data to be received is received, until the data to be received is received, and then the process ends; The second protocol conversion unit is used to, when receiving the data to be received from the second processor, perform protocol conversion on the data to be received according to the processor protocol type to obtain data to be processed, and transmit the data to be processed to the first processor.

12. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the processor communication method according to any one of claims 1 to 2 by executing the computer instructions.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the processor communication method according to any one of claims 1 to 2.

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