Multiphase full-bridge drive system and method for driving a motor

Abstract

The present application discloses a multiphase full-bridge drive system for driving a motor and a method for driving a motor. The multiphase full-bridge drive system for driving a motor includes: a multiphase full-bridge circuit including at least three identical half-bridge circuits, where each half-bridge circuit includes a first transistor and a second transistor, and the switching loss of the first transistor is less than the switching loss of the second transistor; and a controller configured to control the multiphase full-bridge circuit to generate a target multiphase drive voltage for driving the motor, where the controller is configured to select a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the target multiphase drive voltage, and reduce the effective switching times of the second transistor of the selected half-bridge circuit. In addition, the present application also discloses a method for driving a motor using the disclosed multiphase full-bridge drive system.

Description

Technical Field

[0001] The present disclosure relates to the field of power semiconductors and motor drives. Specifically, it relates to a multiphase full-bridge drive system for driving a motor and a method for driving a motor. Background Art

[0002] In the field of motor drives, a three-phase full-bridge circuit composed of power semiconductors is required to convert direct current and alternating current into each other. The so-called three-phase full-bridge circuit is composed of three half-bridge circuits, and the so-called half-bridge circuit is usually implemented by a switching element composed of a power semiconductor. The flow and transformation of current are achieved by controlling the on and off of the switching element.

[0003] Currently, the main power semiconductor transistors commonly used in the field of motor drives include IGBT, MOSFET, silicon carbide MOFSET, silicon carbide JFET, gallium nitride HEMT, etc. Among them, the most commonly used power semiconductor transistor is IGBT, which has excellent performance and low price. Due to the existence of tail current, the switching speed of IGBT is generally relatively slow and the switching loss is relatively large. In applications with a relatively high switching frequency, the efficiency of a three-phase full-bridge motor drive circuit composed of IGBT is relatively low. Summary of the Invention

[0004] In view of the above problems, the present application discloses a multiphase full-bridge drive system for driving a motor using low-switching-loss power semiconductor transistors and high-switching-loss power semiconductor transistors, and a method for driving a motor. The multiphase full-bridge drive circuit in the multiphase full-bridge drive system includes at least three half-bridge circuits, which adopt a combination of hybrid devices composed of low-switching-loss power semiconductor transistors and high-switching-loss power semiconductor transistors. At the same time, through the control method of DPWM (discontinuous pulse width modulation), the effective switching times of the high-switching-loss power semiconductor transistors are reduced, thereby reducing the switching loss of the high-switching-loss power semiconductor transistors. Among them, DPWM means that within any one or more vector control cycles, in a three-phase full-bridge circuit, the switching elements / transistors of the upper arm and the lower arm of a half-bridge circuit do not perform switching actions, but remain on or off. By this means, the advantages of two different types of power semiconductor transistors can be fully utilized. Especially in a multiphase full-bridge drive system including a half-bridge circuit formed by combining IGBT and other types of transistors, the advantages of IGBT can be exerted, and at the same time, its switching loss can be reduced, thereby expanding its application range and extending its service life.

[0005] In one aspect, the present application discloses a multiphase full-bridge drive system for driving a motor, including: a multiphase full-bridge circuit including at least three identical half-bridge circuits, where each half-bridge circuit includes a first transistor and a second transistor, and the switching loss of the first transistor is less than that of the second transistor; and a controller configured to control the multiphase full-bridge circuit to generate a target multiphase drive voltage for driving the motor, where the controller is configured to select a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the target multiphase drive voltage, and reduce the effective switching times of the second transistor of the selected half-bridge circuit. The effective switching times mentioned in the present application refer to the number of switches at the moment of turn-on or turn-off of a power semiconductor transistor when switching loss occurs. The ineffective switching times mentioned in the present application refer to the number of switches at the moment of turn-on or turn-off of a power semiconductor transistor when no switching loss occurs, as further explained below with reference to the drawings.

[0006] In one embodiment, the terminal of the first transistor of each half-bridge circuit for connecting to the power supply is connected to the positive pole of the DC power supply, the terminal of the second transistor of each half-bridge circuit for connecting to the power supply is connected to the negative pole of the DC power supply, and selecting a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the target multiphase drive voltage includes: in response to the power factor of the motor being greater than zero, i.e., the current phase lags the voltage by less than 90 degrees, selecting the half-bridge circuit associated with the phase having the minimum instantaneous voltage value in the target multiphase drive voltage from at least three half-bridge circuits; and in response to the power factor of the motor being less than zero, i.e., the current phase lags the voltage by more than 90 degrees, selecting the half-bridge circuit associated with the phase having the maximum instantaneous voltage value in the target multiphase drive voltage from at least three half-bridge circuits.

[0007] In one embodiment, reducing the effective switching times of the second transistor of the selected half-bridge circuit includes: the controller clamping the first transistor or the second transistor of the selected half-bridge circuit according to the power factor of the motor so that it remains in the on state. In one embodiment, reducing the effective switching times of the second transistor of the selected half-bridge circuit includes: in response to the power factor of the motor being greater than zero, clamping the second transistor of the selected half-bridge circuit so that it remains in the on state; or in response to the power factor of the motor being less than zero, clamping the first transistor of the selected half-bridge circuit so that it remains in the on state. In this case, the effective switching times and the ineffective switching times of the second transistor with a larger switching loss can be reduced simultaneously.

[0008] In one embodiment, reducing the effective switching times of the second transistor of the selected half-bridge circuit includes: the controller further determines the direction of current flow, and clamps or performs CPWM control on the first transistor or the second transistor of the selected half-bridge circuit according to the power factor of the motor and the direction of current flow. This control strategy can, on the one hand, reduce the switching times of the transistor with greater switching power consumption, and on the other hand, optimize the harmonic performance of the multi-phase full-bridge drive system. In one embodiment, reducing the effective switching times of the second transistor of the selected half-bridge circuit includes: in response to the power factor of the motor being greater than zero and in response to the current flowing from the motor to the DC power supply, clamping the second transistor of the selected half-bridge circuit so that it remains in the on state, and in response to the current flowing from the DC power supply to the motor, controlling the first transistor and the second transistor of the selected half-bridge circuit to perform switching actions according to the CPWM control method; or in response to the power factor of the motor being less than zero and in response to the current flowing from the motor to the DC power supply, clamping the first transistor of the selected half-bridge circuit so that it remains in the on state, and in response to the current flowing from the DC power supply to the motor, controlling the first transistor and the second transistor of the selected half-bridge circuit to perform switching actions according to the CPWM control method. When the current flows from the DC power supply to the motor, the current may flow from the positive pole of the DC power supply to the motor via the first transistor, or may flow from the negative pole of the DC power supply to the motor via the diode of the lower arm, and no current flows through the second transistor with greater switching power consumption located in the lower arm. Therefore, even if the second transistor is turned on or off, no actual switching loss will be generated. Therefore, when the current flows from the DC power supply to the motor, no clamping control is required for the first transistor or the second transistor. In one embodiment, when the current flows from the DC power supply to the motor, within the corresponding plurality of vector control cycles, the first transistor and the second transistor can be turned on or off timely as in the conventional CPWM (continuous pulse width modulation) control method to further optimize the harmonic performance of the multi-phase full-bridge drive system. In this case, the effective switching times of the second transistor are reduced without reducing the ineffective switching times of the second transistor.

[0009] In one embodiment, the short-circuit resistance of the first transistor is weaker than that of the second transistor.

[0010] In one embodiment, the first transistor is selected from the group including silicon carbide JEFT, gallium nitride HEMT, IGBT, and silicon carbide MOSFET, and the second transistor is selected from the group including IGBT, silicon carbide MOSFET, and silicon carbide JEFT.

[0011] In one embodiment, the first transistor and the second transistor belong to the same transistor type, or the first transistor and the second transistor belong to different device types. The controller is further configured to, in response to the first transistor and the second transistor belonging to the same transistor type, configure the first transistor and the second transistor of each half-bridge circuit respectively by adjusting the transistor driving components connected to the control terminals of the first transistor and the second transistor of each half-bridge circuit such that: the switching loss of the first transistor is less than the switching loss of the second transistor and / or the short-circuit resistance of the first transistor is weaker than the short-circuit resistance of the second transistor.

[0012] In one embodiment, the first transistor is a MOSFET or a silicon carbide JEFT, and the second transistor is an IGBT.

[0013] In one embodiment, the first transistor is a normally-open transistor and the second transistor is a normally-closed transistor, or the first transistor is a normally-closed transistor and the second transistor is a normally-open transistor.

[0014] In one embodiment, in response to the three-phase full-bridge drive system losing control, the normally-open transistors in each half-bridge circuit are turned on simultaneously to put the motor into an active short-circuit state.

[0015] In one embodiment, the first transistor is a silicon carbide JEFT or a gallium nitride HEMT, and the second transistor is an IGBT.

[0016] In one embodiment, each half-bridge circuit further includes a first diode connected in anti-parallel with the first transistor, and a second diode connected in anti-parallel with the second transistor.

[0017] In one embodiment, the first diode and the second diode are selected from the group including diodes with a Schottky structure and fast-recovery diodes made of silicon carbide. Generally, the diode for commutation with an IGBT can be configured as a fast-recovery diode or a silicon carbide diode with a Schottky structure. The diode for commutation with a silicon carbide JFET, a silicon carbide MOSFET, or a gallium nitride HEMT is configured as a silicon carbide diode with a Schottky structure. Optionally, it may not be configured either.

[0018] In another aspect, the present application also discloses a method for driving a motor, including: configuring a multiphase full-bridge circuit such that it includes at least three identical half-bridge circuits, where each half-bridge circuit includes a first transistor and a second transistor, and the switching loss of the first transistor is less than the switching loss of the second transistor; and using a controller to control the multiphase full-bridge circuit to generate a target multiphase driving voltage for driving the motor, including using the controller to select a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the target multiphase driving voltage, and reducing the effective switching times of the second transistor of the selected half-bridge circuit.

[0019] In one embodiment, the terminal of the first transistor of each half-bridge circuit for connecting to the power supply is connected to the positive pole of the DC power supply, the terminal of the second transistor of each half-bridge circuit for connecting to the power supply is connected to the negative pole of the DC power supply, and selecting a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the target multiphase driving voltage includes: in response to the power factor of the motor being greater than zero, selecting the half-bridge circuit associated with the phase having the minimum instantaneous voltage value in the target multiphase driving voltage from at least three half-bridge circuits; and in response to the power factor of the motor being less than zero, selecting the half-bridge circuit associated with the phase having the maximum instantaneous voltage value in the target multiphase driving voltage from at least three half-bridge circuits.

[0020] In one embodiment, reducing the effective switching times of the second transistor of the selected half-bridge circuit includes: the controller clamping the first transistor or the second transistor of the selected half-bridge circuit according to the power factor of the motor so that it remains in the on state. In one embodiment, reducing the effective switching times of the second transistor of the selected half-bridge circuit includes: in response to the power factor of the motor being greater than zero, clamping the second transistor of the selected half-bridge circuit so that it remains in the on state; or in response to the power factor of the motor being less than zero, clamping the first transistor of the selected half-bridge circuit so that it remains in the on state. In this case, the effective switching times and the ineffective switching times of the second transistor with a larger switching loss can be reduced simultaneously.

[0021] In one embodiment, reducing the effective switching times of the second transistor of the selected half-bridge circuit includes: the controller further determines the direction of current flow, and clamps or performs CPWM control on the first transistor or the second transistor of the selected half-bridge circuit according to the power factor of the motor and the direction of current flow. This control strategy can, on the one hand, reduce the switching times of the transistor with larger switching power consumption, and on the other hand, optimize the harmonic performance of the multi-phase full-bridge drive system. In one embodiment, reducing the effective switching times of the second transistor of the selected half-bridge circuit includes: in response to the power factor of the motor being greater than zero and in response to the current flowing from the motor to the DC power supply, clamping the second transistor of the selected half-bridge circuit so that it remains in the on state, and in response to the current flowing from the DC power supply to the motor, controlling the first transistor and the second transistor of the selected half-bridge circuit to perform switching actions according to the CPWM control method; or in response to the power factor of the motor being less than zero and in response to the current flowing from the motor to the DC power supply, clamping the first transistor of the selected half-bridge circuit so that it remains in the on state, and in response to the current flowing from the DC power supply to the motor, controlling the first transistor and the second transistor of the selected half-bridge circuit to perform switching actions according to the CPWM control method. When the current flows from the DC power supply to the motor, the current may flow from the positive pole of the DC power supply to the motor through the first transistor, or may flow from the negative pole of the DC power supply to the motor through the diode of the lower arm, and no current flows through the second transistor with larger switching power consumption located in the lower arm. Therefore, even if the second transistor is turned on or off, no actual switching loss will occur. Therefore, when the current flows from the DC power supply to the motor, no clamping control needs to be performed on the first transistor or the second transistor. In one embodiment, when the current flows from the DC power supply to the motor, within the corresponding plurality of vector control periods, the first transistor and the second transistor can be turned on or off timely as in the conventional CPWM control method to further optimize the harmonic performance of the multi-phase full-bridge drive system. In this case, the effective switching times of the second transistor can be reduced without reducing the ineffective switching times of the second transistor.

[0022] In one embodiment, the short-circuit resistance of the first transistor is weaker than that of the second transistor.

[0023] In one embodiment, the first transistor is selected from the group including silicon carbide JEFT, gallium nitride HEMT, IGBT, and silicon carbide MOSFET, and the second transistor is selected from the group including IGBT, silicon carbide MOSFET, and silicon carbide JEFT.

[0024] In one embodiment, where the first transistor and the second transistor belong to the same transistor type, or the first transistor and the second transistor belong to different device types, the method further includes: using the controller to, in response to the first transistor and the second transistor belonging to the same transistor type, configure the first transistor and the second transistor of each half-bridge circuit respectively by adjusting the transistor driving components connected to the control terminals of the first transistor and the second transistor of each half-bridge circuit such that: the switching loss of the first transistor is less than the switching loss of the second transistor and / or the short-circuit withstand ability of the first transistor is weaker than the short-circuit withstand ability of the second transistor.

[0025] In one embodiment, where the first transistor is a MOSFET or a silicon carbide JEFT, and the second transistor is an IGBT.

[0026] In one embodiment, where the first transistor is a normally-on transistor and the second transistor is a normally-off transistor, or the first transistor is a normally-off transistor and the second transistor is a normally-on transistor.

[0027] In one embodiment, the method further includes, in response to the three-phase full-bridge drive system losing control, simultaneously turning on the normally-on transistors in each half-bridge circuit to cause the motor to enter an active short-circuit state.

[0028] In one embodiment, where the first transistor is a silicon carbide JEFT or a gallium nitride HEMT, and the second transistor is an IGBT.

[0029] In one embodiment, where each half-bridge circuit further includes a first diode connected in anti-parallel with the first transistor, and a second diode connected in anti-parallel with the second transistor.

[0030] In one embodiment, where the first diode and the second diode are selected from the group including diodes with a Schottky structure and fast-recovery diodes including silicon carbide.

[0031] In the embodiments of the above-mentioned multiphase full-bridge drive system and the method for driving a motor, the first transistor and the second transistor can be arranged conversely. Therefore, in another embodiment, the terminal of the second transistor of each half-bridge circuit for connecting to the power supply is connected to the positive pole of the DC power supply, and the terminal of the first transistor of each half-bridge circuit for connecting to the power supply is connected to the negative pole of the DC power supply. Correspondingly, a control strategy opposite to that in the above embodiment is used to achieve the target multiphase drive voltage for driving the motor. Specifically, the controller is configured to / use the controller to: in response to the power factor of the motor being greater than zero, select the half-bridge circuit associated with the phase having the maximum instantaneous voltage value in the target multiphase control voltage from at least three half-bridge circuits; and in response to the power factor of the motor being less than zero, select the half-bridge circuit associated with the phase having the minimum instantaneous voltage value in the target multiphase control voltage from at least three half-bridge circuits. Regarding the clamping control of the first transistor and the second transistor, in one embodiment, in response to the power factor of the motor being greater than zero, the second transistor of the selected half-bridge circuit is clamped so as to remain in the on state; and in response to the power factor of the motor being less than zero, the first transistor of the selected half-bridge circuit is clamped so as to remain in the on state. In another embodiment, in response to the power factor of the motor being greater than zero, the current direction is further judged, and only in response to the current flowing from the DC power supply to the motor, the second transistor of the selected half-bridge circuit is clamped so as to remain in the on state; and in response to the power factor of the motor being less than zero, the current direction is further judged, and only in response to the current flowing from the DC power supply to the motor, the first transistor of the selected half-bridge circuit is clamped so as to remain in the on state. In the opposite current direction, that is, when the current flows from the motor to the DC power supply, since the current will not flow from the motor to the DC power supply through the second transistor, that is, turning on or off the second transistor with greater switching losses will not generate switching losses, therefore, regardless of the power factor, no clamping control is required for the first transistor or the second transistor. In one embodiment, when the current flows from the motor to the DC power supply, within the corresponding multiple vector control periods, the first transistor or the second transistor can be controlled to turn on and off in a timely manner as in the conventional CPWM control method, so as to further optimize the harmonic performance of the entire multiphase full-bridge drive system. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Specific exemplary embodiments of the present disclosure will now be described with reference to the accompanying drawings. The features, aspects, and advantages of the present disclosure will be apparent from reading the following detailed description in conjunction with the drawings. In the drawings:

[0033] Figure 1 A schematic diagram showing a conventional CPWM control method for driving a motor;

[0034] Figure 2 A schematic diagram showing a three - phase full - bridge drive system for driving a motor according to an embodiment of the present application;

[0035] Figure 3a and Figure 3b Schematic diagrams respectively showing control methods for driving a motor in cases where the power factor is greater than 0 and less than 0 according to an embodiment of the present application.

[0036] Figure 4 A schematic diagram showing a three - phase full - bridge drive system for driving a motor according to an embodiment of the present application;

[0037] Figure 5 A schematic diagram showing a three - phase full - bridge drive system for driving a motor according to an embodiment of the present application;

[0038] Figure 6 A schematic diagram showing a three - phase full - bridge drive system for driving a motor according to an embodiment of the present application;

[0039] Figure 7 A schematic diagram showing a three - phase full - bridge drive system for driving a motor according to an embodiment of the present application;

[0040] Figure 8 A schematic diagram showing a three - phase full - bridge drive system for driving a motor according to an embodiment of the present application; and

[0041] Figure 9 A schematic diagram showing a three - phase full - bridge drive system for driving a motor according to an embodiment of the present application. Detailed implementation manners

[0042] Some implementations of the present disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which some but not all implementations of the present application are shown. In fact, the various implementations of the present application may be embodied in many different forms and should not be construed as limited to the implementations set forth herein; rather, these example implementations are provided to better convey the scope of the present disclosure to those skilled in the art.

[0043] Figure 1 A schematic diagram showing a conventional CPWM control method for driving a motor. Specifically, Figure 1Shows the switching actions of each phase bridge arm of the continuous CPWM control method. 221, 222, and 223 respectively represent the switching actions of the x, y, and z phases. Conventionally, two switching elements or transistors of the upper and lower bridge arms of the three half-bridges of a three-phase full-bridge circuit are respectively controlled by a continuous pulse width modulation (CPWM) method to drive the motor. CPWM means that within each vector control period, the switching elements of the upper and lower bridge arms of each half-bridge act once. This application adopts a discontinuous DPWM control method to reduce the effective switching times of transistors with large switching losses, thereby reducing the switching losses of the entire multi-phase full-bridge drive system. In one embodiment, CPWM control can also be combined to further optimize the harmonic performance of the system while reducing the switching losses of the entire multi-phase full-bridge drive system.

[0044] Figure 2 Shows a schematic diagram of a three-phase full-bridge drive system 2 for driving a motor according to an embodiment of the present application. In Figure 2 this, a DC power supply 1 supplies direct current to the three-phase full-bridge drive system 2. In one embodiment, the DC power supply 1 is a rechargeable battery. The three-phase full-bridge drive system 2 outputs a target three-phase drive voltage for driving a synchronous motor or an asynchronous motor 3. The three-phase full-bridge drive system 2 includes a three-phase full-bridge circuit 5 and a controller 6. In another embodiment, the three-phase full-bridge drive system 2 further includes a smoothing capacitor 4.

[0045] The three-phase full-bridge circuit 5 is a DC-AC conversion circuit that can convert the DC voltage applied by the DC power supply 1 into three-phase alternating current for driving the motor 3, or convert the three-phase alternating current generated by the motor into direct current. The three-phase full-bridge circuit is composed of three half-bridge circuits 51, 52, and 53. Each half-bridge circuit is respectively connected to the three terminals 31, 32, and 33 of the motor 3.

[0046] The controller 6 is used to transmit control signals to the transistor drive components 511a, 521a, 531a, 513a, 523a, and 533a in the motor drive circuit 2 through signal terminals 611, 612, 621, 622, 631, and 632 to control the three-phase full-bridge circuit 5. The controller 6 can be implemented in the form of a programmable logic device, a processor, a microprocessor, etc. The transistor drive components 511a, 521a, 531a, 513a, 523a, and 533a are respectively connected to the control terminals of the transistors of the upper and lower bridge arms of each half-bridge circuit to drive the corresponding transistors to turn on or off. In one embodiment, each transistor drive component can also configure the performance of the connected transistor, such as configuring its switching loss, short-circuit resistance, etc.

[0047] The three half-bridge circuits 51, 52, and 53 are identical. For clarity, only the half-bridge circuit 51 will be described in detail here. The half-bridge circuit 51 consists of an upper arm and a lower arm. The upper arm is connected to the positive pole of the DC power supply 1 and the motor terminal 31. The lower arm is connected to the negative pole of the DC power supply 1 and the motor terminal 31. Figure 2 The upper arm shown in Figure 2 includes a switching element 511 and a power semiconductor diode 512 connected in anti-parallel therewith. The switching element 511 includes a power semiconductor transistor 511b and a transistor driving component 511a connected to the control terminal of the power semiconductor transistor 511b for driving or other configurations thereof. The transistor driving component 511a receives the control signal 611 from the controller 6, thereby enabling the controller 6 to control the upper arm. The lower arm includes a switching element 513 and a power semiconductor diode 514 connected in anti-parallel therewith. The switching element 513 includes a power semiconductor transistor 513b and a transistor driving component 513a of the transistor driving component connected to the control terminal of the power semiconductor transistor 513b for driving or other configurations thereof. The transistor driving component 513a receives the control signal 612 from the controller 6, thereby enabling the controller 6 to control the lower arm. The switching loss of the power semiconductor transistor 511b of the upper arm is less than the switching loss of the power semiconductor transistor 513b of the lower arm. It should be noted that Figure 2 the switching elements shown in Figure 2 are illustrated as including transistors and corresponding transistor driving circuits. Among them, the two can be integrated together. Alternatively, the two can be discrete devices. In another embodiment, the transistor driving circuit can be integrated in the controller 6.

[0048] The power semiconductor transistor 511b is composed of a silicon carbide JFET, and the power semiconductor diode 514 forming a commutation circuit therewith is composed of a silicon carbide diode or a fast recovery diode. The power semiconductor transistor 513b is composed of an IGBT, and the power semiconductor diode 512 forming a commutation circuit therewith includes a silicon carbide diode or a fast recovery diode. Among them, the silicon carbide diode includes a silicon carbide Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), and a merged pin Schottky diode (MPS). The fast recovery diode is generally silicon-based, has good forward conduction performance, and has a lower cost compared to the silicon carbide diode with a Schottky structure. Therefore, when optionally setting an antiparallel diode, setting the diode in the three-phase full-bridge drive system 2 to a fast recovery diode can facilitate the use of its good forward conduction performance. Since the power semiconductor transistor 511b has a certain reverse conduction ability, the power semiconductor diode 512 may not be configured in the circuit. If the diode 512 is not configured, reverse recovery will occur on the power semiconductor transistor 511b. Then, when the power semiconductor transistor 513b is turned on, the reverse recovery loss on the power semiconductor transistor 511b will be relatively large. However, since a set of diodes is saved, the cost of the entire three-phase full-bridge drive system can be reduced. In addition, when the transistor in the lower arm is an IGBT, the diode antiparallel thereto can also be integrated into the IGBT module and presented as a whole to the outside. When using such an IGBT with an integrated diode, an additional externally connected antiparallel diode may not be configured outside it.

[0049] The transistor control circuit 511a can control the power semiconductor transistor 511b to enter the on state and connect the corresponding motor terminal 31 to the positive pole of the DC power supply. The transistor control circuit 513a can control the power semiconductor transistor 513b to enter the on state and connect the corresponding motor terminal 31 to the negative pole of the DC power supply. When the transistor control circuit 511a of the upper arm controls the power semiconductor transistor 511b to be in the on state, the transistor control circuit 513a of the corresponding lower arm should control the power semiconductor transistor 513b to be in the off state; when the transistor control circuit 513a of the lower arm controls the power semiconductor transistor 513b to be in the on state, the transistor control circuit 511a of the corresponding upper arm should control the corresponding power semiconductor transistor 511b to be in the off state. When the switching elements of the upper and lower arms switch the switching state, a certain dead time is generally set. During the dead time, the switching elements of the upper and lower arms are both in the off state to ensure that the current does not flow directly from the upper arm to the lower arm.

[0050] Figure 3a and Figure 3b respectively show schematic diagrams of control methods for driving a motor in the case where the power factor is greater than 0 and less than 0 according to embodiments of the present application. Among them Figure 3a and Figure 3b the x, y, and z coordinate axes in represent the switching actions of the upper and lower arms of three bridge arms respectively. When the ordinate is 1, it means that the upper arm of the half-bridge circuit associated with this phase is turned on and the lower arm is turned off. When the ordinate is 0, it means that the lower arm of the half-bridge circuit associated with this phase is turned on and the upper arm is turned off. Figure 3a and Figure 3b The x, y, and z phases shown in can all be generated by any one of the half-bridge circuits 51, 52, or 53 in Figure 2 . For example, the three-phase full-bridge drive system 2 can be configured such that the half-bridge circuits 51, 52, or 53 are respectively used to generate the voltages of the x, y, and z phases. In this case, it can be said that the half-bridge circuits 51, 52, or 53 are respectively associated with the x, y, and z phases. In other embodiments, there can also be other configuration combinations.

[0051] Figure 3a shows the switching action waveforms of the three-phase bridge arms when the power factor of the three-phase full-bridge drive system is greater than 0. 231 is the control waveform of the x phase, 232 is the switching action waveform of the y phase, and 233 is the switching action waveform of the z phase. That is, within a single vector control period, the lower arm of the half-bridge circuit associated with the phase ([[]] Figure 3a shown as the z phase in) with the minimum vector instantaneous phase voltage among the three phases is kept turned on, that is, the transistor in the lower arm of this phase is clamped to the negative pole of the DC power supply 1. At this time, since the power semiconductor transistor in the lower arm of the half-bridge circuit associated with the z phase does not have a switching action but remains turned on, as shown in the control waveform of the z phase in Figure 3a . Therefore, the switching loss of the power semiconductor transistor in the lower arm is reduced. At this time, in one embodiment, this control strategy can be adopted within each vector control period of multiple corresponding vector control periods, so as to reduce the switching loss of the entire three-phase full-bridge drive system.

[0052] At this time, if the current in the Z-phase flows from the DC power supply to the motor, specifically, the current flows from the positive pole of the DC power supply 1 to the motor through the upper arm of the half-bridge circuit associated with the Z-phase (for example, transistor 531b), or the current flows from the negative pole of the DC power supply 1 to the motor through the diode of the lower arm associated with the Z-phase (for example, diode 534). Since no current flows through the power semiconductor transistor in the lower arm of the half-bridge circuit associated with the Z-phase (for example, transistor 533b), the transistor in the lower arm is in an ineffective conduction state. At this time, instead of keeping the power semiconductor transistor in the lower arm of the half-bridge circuit associated with the Z-phase in the conduction state, the CPWM control method can be used to turn it off or turn it on again in a timely manner. And since no current flows through this power semiconductor transistor in the lower arm at this time, even if the CPWM control method is used for switching operations, no actual switching loss will be generated in this power semiconductor transistor in the lower arm, which belongs to ineffective switching. In one embodiment, when the power factor is greater than 0, the controller 6 can further determine the direction of the current, and only when the current flows from the motor to the DC power supply, the transistor in the lower arm is clamped. When it is determined that the current flows from the DC power supply to the motor, the transistor in the lower arm is not clamped. For example, the transistor in the lower arm can be controlled to perform switching operations in a timely manner according to the conventional CPWM control method to further optimize the harmonic performance of the three-phase full-bridge drive system.

[0053] It should be noted that Figure 3a only the switching operation waveforms of controlling three half-bridges are shown. Actually, before obtaining these switching operation waveforms, the controller 6 needs to select a specific half-bridge circuit based on the target three-phase drive voltage of the motor. In one embodiment, the target three-phase drive voltage is directly given by the user or other inputs. In Figure 2 the embodiment of the drive system configuration shown, the controller 6, in response to the power factor of the motor being greater than zero, selects the half-bridge circuit associated with the phase having the minimum instantaneous voltage value among the target three-phase drive voltages of the motor from the three half-bridge circuits, and clamps the second transistor of the selected half-bridge circuit - that is, the transistor with greater switching loss - to the negative pole of the DC power supply 1. In Figure 3aIn the embodiment, the controller 6 compares and concludes that the vector instantaneous voltage value of the z-phase is the smallest, and thus selects the half-bridge circuit associated with the z-phase, that is, the half-bridge circuit for generating the target voltage of the z-phase, such as the half-bridge circuit 53. In other embodiments, the half-bridge circuit associated with the z-phase may also be other half-bridge circuits. Then, the second transistor of the selected half-bridge circuit (for example, the transistor 533b of the lower arm of the half-bridge circuit 53) is clamped to the negative pole of the DC power supply 1. In one embodiment, the control terminal of the second transistor (for example, the transistor 533b of the lower arm of the half-bridge circuit 53) is driven to the corresponding voltage by using the corresponding transistor driving component to turn on the transistor, so as to clamp it to the negative pole of the DC power supply 1.

[0054] Figure 3b Shows the switching action waveforms of the three-phase bridge arms when the power factor of the three-phase full-bridge drive system is less than 0. 211 is the control waveform of the x-phase, 212 is the control waveform of the y-phase, and 213 is the control waveform of the z-phase. That is, within a single vector control period, the upper arm of the half-bridge circuit associated with the phase ([ Figure 3b shown as the x-phase) with the largest vector instantaneous phase voltage among the three phases is kept in the on state, that is, the transistor in the upper arm of this phase is clamped to the positive pole of the DC power supply 1. At this time, since the power semiconductor transistor of the lower arm of the half-bridge circuit associated with the x-phase also has no switching action but remains in the off state, as Figure 3b shown in the control waveform of the x-phase. Therefore, the switching loss of the power semiconductor transistor of the lower arm is reduced. In one embodiment, this control strategy can be adopted in each vector control period within multiple vector control periods, so as to reduce the switching loss of the entire three-phase full-bridge drive system.

[0055] At this time, if the x-phase current flows from the DC power supply to the motor, specifically, the current flows from the positive pole of the DC power supply 1 to the motor via the upper arm of the half-bridge circuit associated with the x-phase (for example, transistor 511b), or the current flows from the negative pole of the DC power supply 1 to the motor via the diode of the lower arm associated with the x-phase (for example, diode 514). Even if the upper arm of the x-phase is not kept on - that is, the transistor of the upper arm is not clamped to the positive pole of the DC power supply, no current will flow through the power transistor of the lower arm of the half-bridge circuit associated with the x-phase (for example, transistor 513b), and no switching loss will be generated in the transistor of the lower arm. At this time, within the corresponding multiple vector control cycles, the transistor of the upper arm (for example, transistor 511b) can be controlled by CPWM to perform switching actions in a timely manner without clamping it. Therefore, in one embodiment, when the power factor is less than 0, the controller 6 can further determine the direction of the current, and only clamp the transistor of the upper arm when the current flows from the motor to the DC power supply. When it is determined that the current flows from the DC power supply to the motor, the transistor of the upper arm is not clamped. For example, the transistor of the lower arm can be controlled to perform switching actions in a timely manner according to the conventional CPWM control method to further optimize the harmonic performance of the three-phase full-bridge drive system.

[0056] It should be noted that Figure 3b only shows the switching action waveforms for controlling three half-bridges. In fact, before obtaining the illustrated switching action waveforms, the controller 6 needs to select a specific half-bridge circuit based on the target three-phase drive voltage of the motor. In one embodiment, the target three-phase drive voltage is directly given by the user or other inputs. In Figure 2 the illustrated embodiment of the drive system configuration, the controller 6, in response to the power factor of the motor being less than zero, selects the half-bridge circuit associated with the phase having the largest instantaneous voltage value among the target three-phase drive voltages from the three half-bridge circuits, and clamps the first transistor of the selected half-bridge circuit - that is, the transistor with smaller switching loss, to the positive pole of the DC power supply 1. In Figure 3b the embodiment, the controller 6 compares and obtains that the vector instantaneous voltage value of the x-phase is the largest, so it selects the half-bridge circuit associated with the x-phase - that is, the half-bridge circuit for generating the x-phase voltage, such as half-bridge circuit 51. In other embodiments, the half-bridge circuit associated with the x-phase can be other half-bridge circuits. Then, the first transistor of the selected half-bridge circuit (for example, transistor 511b of the upper arm of half-bridge circuit 51) is clamped to the positive pole of the DC power supply 1. Among them, the control terminal of this first transistor (for example, transistor 511b of the upper arm of half-bridge circuit 51) is driven to the corresponding voltage by using the corresponding transistor driving component to turn on the transistor, so as to clamp it to the positive pole of the DC power supply 1.

[0057] As described above regardingFigure 2 and Figure 3a and Figure 3b as explained, and as shown in the appendix Figure 3a and Figure 3b as shown, when the transistor in the lower arm of a certain phase is clamped, the transistor in the upper arm also does not switch, and vice versa. That is to say, in the embodiments regarding Figure 2 and Figure 3a and Figure 3b as explained, while reducing the switching times of the transistors in the lower arm with greater switching losses, the switching times of the transistors in the upper arm are also reduced. However, the reduction of the switching times of the transistors in the lower arm with greater switching losses includes the reduction of the effective switching times and optionally the reduction of the ineffective switching times. And the reduction of the switching times of the transistors in the upper arm with smaller switching losses only includes the reduction of the ineffective switching times. In addition, the reduction of the effective switching times of the transistors with greater switching losses refers to a partial reduction rather than a complete elimination of their effective switching times. For example, the reduced effective switching times account for approximately 10% to 50%, such as 30%, of the total effective switching times in the original CPWM control method. The above three-phase full-bridge drive system can achieve the target three-phase drive voltage for the motor, and can considerably reduce the effective switching times of the transistors with greater switching losses without increasing the switching losses of the transistors with smaller switching losses, thereby reducing the switching losses of the entire three-phase full-bridge drive system and improving the efficiency of the system.

[0058] In this embodiment, the IGBT has low cost, stable performance and high reliability. The silicon carbide JFET has good switching performance, that is, low switching losses. In addition, its cost is relatively lower than that of the silicon carbide MOSFET, and due to the absence of a gate oxide layer, its reliability is also relatively good. During the switching process of the power semiconductor transistor IGBT in the lower arm, when current flows from the collector to the emitter of the power semiconductor transistor IGBT, the power semiconductor transistor IGBT will generate switching losses, which is called the effective switching process. When the current does not flow through the power semiconductor transistor IGBT but through the anti-parallel diode, the power semiconductor transistor IGBT will not generate switching losses, which is called the ineffective switching process. Since in each vector control cycle among multiple vector control cycles, compared with the conventional CPWM control method, the effective switching times of the IGBT are reduced, the switching losses of the entire three-phase full-bridge drive system can be reduced, and the efficiency of the system can be improved. At the same time, due to the introduction of DPWM, in addition to optimizing the switching losses, it can further reduce the common-mode current of the system, thus optimizing the shaft current corrosion problem of the motor.

[0059] In this embodiment, the silicon carbide JFET is a normally-on device. When Figure 2When the control voltage of the three-phase full-bridge drive system shown is lost, the power semiconductor transistors 511b, 521b, and 531b composed of silicon carbide JFETs are all in the on state. This causes the motor to enter the active short circuit (ASC) state. In the ASC state, in the three-phase bridge arms, all the upper bridge arms or all the lower bridge arms are turned on simultaneously. Implementing the active short circuit state has many advantages for motor drive, especially for motor drive in new energy vehicles, including: when the vehicle is out of control, implementing ASC can generate reverse torque to achieve safe parking; when the power battery fails, implementing ASC can isolate the motor, motor controller, and power battery to ensure the high-voltage safety of the whole vehicle; when a switching transistor in the inverter circuit of the motor controller fails, implementing ASC can avoid damage to other devices or the power battery caused by uncontrollable rectified current. Existing control methods for making the upper and lower bridges of an IGBT or other normally-off transistors-based drive system enter ASC in case of a fault are relatively complex and difficult to implement reliably. And regarding Figure 2 the three-phase full-bridge drive system shown adopts a combination of normally-on transistors and normally-off transistors, so that in case of a drive system fault or other faults, the normally-on transistors in the three-phase full-bridge circuit can automatically turn on simultaneously, thus short-circuiting all the three-phase terminals of the motor through the upper bridge arms, and the motor enters the ASC state without the need for additional complex control methods. Therefore, regarding Figure 2 and Figure 3a and 3b the embodiments described have great practicality and benefits when applied to the field of electric vehicles.

[0060] Figure 4 FIG. shows a schematic diagram of a three-phase full-bridge drive system for driving a motor according to an embodiment of the present application. Figure 4 The embodiment shown in FIG. can be referred to as the second embodiment. This embodiment is based on the first embodiment. In this embodiment, the power semiconductor transistors 511b, 521b, and 531b composed of silicon carbide JFETs in the first embodiment are replaced with power semiconductor transistors 511c, 521c, and 531c composed of depletion-mode gallium nitride HEMTs. The short-circuit saturation current of the depletion-mode gallium nitride HEMTs in this embodiment is higher than the circuit saturation current of IGBTs.

[0061] In this embodiment, the IGBT has a low cost, stable performance, and high reliability. The depletion-mode gallium nitride HEMT has better switching performance, that is, low switching loss, and in addition, its cost is relatively low. Since the IGBT reduces the effective number of switching times, the overall switching loss can be reduced, and the efficiency of the system can be improved. At the same time, due to the introduction of DPWM, in addition to optimizing the loss, it can further reduce the common-mode current of the system, thereby optimizing the shaft current corrosion problem of the motor. Since the depletion-mode gallium nitride HEMT is a normally-on device, when the system drive loses the control voltage, the power semiconductor transistors 511c, 521c, and 531c composed of the depletion-mode gallium nitride HEMT are all in the on state, and the motor 3 can also enter the ASC state. This is a great advantage for motor drives, especially for motor drives in new energy vehicles. Therefore, this embodiment also has the benefits related to ASC as described above regarding Figure 2 the benefits related to ASC as described above.

[0062] In this embodiment, additionally, since the depletion-mode gallium nitride HEMT has a weak short-circuit resistance. However, in this embodiment, when an inter-phase short circuit or a bridge-arm short circuit occurs in the drive system, the IGBT can bear most of the bus voltage. At this time, the IGBT can be used to turn off the short-circuit current. And, since the IGBT itself has a strong short-circuit resistance, the short-circuit current can be turned off reliably and stably. Alternatively or additionally, the depletion-mode gallium nitride HEMT can also be used to turn off the short-circuit current. Since the voltage across the depletion-mode gallium nitride HEMT is very low and the actual short-circuit energy is also very small, the short-circuit current can also be turned off reliably.

[0063] Figure 5 A schematic diagram of a three-phase full-bridge drive system for driving a motor according to an embodiment of the present application is shown. Figure 5 The embodiment shown in can be referred to as the third embodiment. This embodiment is based on the first embodiment. In this embodiment, the power semiconductor transistors 511b, 521b, and 531b composed of silicon carbide JFETs in the first embodiment are replaced with the power semiconductor transistors 511d, 521d, and 531d composed of silicon carbide MOSFETs.

[0064] In this embodiment, the IGBT has a low cost, stable performance, and high reliability. The silicon carbide MOSFET has better switching performance and low switching losses. Since the effective switching actions of the IGBT are reduced to a certain extent, the switching losses of the IGBT are decreased, and the switching losses of the silicon carbide MOSFET are not additionally increased. Therefore, the switching losses of the entire three-phase full-bridge drive system can be reduced, and the efficiency of the system can be improved. At the same time, due to the introduction of DPWM, in addition to optimizing the losses, the common-mode current of the system can be further reduced, thereby optimizing the shaft current corrosion problem of the motor. At the same time, since the switching speed of the IGBT is relatively slow, the crosstalk problem generated by the IGBT switching process on the silicon carbide MOSFET will also be alleviated.

[0065] In this embodiment, additionally, the silicon carbide MOSFET can be configured to optimize the conduction performance at the expense of the short-circuit withstand capability. In this embodiment, when an inter-phase short circuit or a bridge-arm short circuit occurs in the drive system, the IGBT can bear most of the bus voltage. At this time, the IGBT can be used to turn off the short-circuit current. Since the IGBT itself has a strong short-circuit withstand capability, the short-circuit current can be reliably and stably turned off. Alternatively or additionally, the silicon carbide MOSFET can also be used to turn off the short-circuit current. Since the voltage across the silicon carbide MOSFET is very low and the actual short-circuit energy is also very small, the short-circuit current can also be reliably turned off.

[0066] Figure 6 A schematic diagram of a three-phase full-bridge drive system for driving a motor according to an embodiment of the present application is shown. Figure 6The embodiment shown can be referred to as the fourth embodiment. This embodiment is based on the first embodiment. In this embodiment, the power semiconductor transistors 511b, 521b, 531b composed of silicon carbide JFETs in the first embodiment are replaced with power semiconductor transistors 511e, 521e, 531e composed of IGBTs. The switching loss of the upper arm switching elements including the power semiconductor transistors 511e, 521e, 531e and their respective transistor driving components 511a, 521a, 531a is less than that of the lower arm switching elements including the power semiconductor transistors 513b, 523b, 533b and their respective transistor driving components 513a, 523a, 533a. The IGBTs constituting the power semiconductor transistors 513b, 523b, 533b are designed to have a lower on-state voltage drop. At this time, the transistor types of both the upper arm and the lower arm are IGBTs. The performance of the IGBT or other transistors connected thereto, such as their switching loss and on-state voltage drop, can be adjusted by adjusting the transistor driving components, so that the IGBT or other transistors of the upper arm exhibit different device performances from those of the IGBT or other transistors of the lower arm. Since the IGBT does not have reverse conduction ability, the power semiconductor diodes 512, 522, 532 must be configured. In this embodiment, the power semiconductor transistors and power semiconductor diodes of the upper arm can also be integrated together. That is, 511b and 512, 521b and 522, 531b and 532 are respectively integrated on a single chip, generally referred to as RC-IGBT (reverse conduct IGBT).

[0067] In this embodiment, both the upper and lower arms are composed of IGBTs, and the system cost is relatively low. On the one hand, the effective switching times of the IGBTs of the lower arm with larger switching losses are reduced, thereby reducing the switching loss. On the other hand, the IGBTs with large switching losses have a lower on-state voltage drop, which can reduce the conduction loss. In this way, the system loss can be further reduced and the efficiency can be improved.

[0068] Figure 7 The figure shows a schematic diagram of a three-phase full-bridge drive system for driving a motor according to an embodiment of the present application. Figure 7 The embodiment shown can be referred to as the fifth embodiment. This embodiment is based on the third embodiment. In this embodiment, the power semiconductor transistors 513b, 523b, 533b composed of IGBTs in the third embodiment are replaced with power semiconductor transistors 513c, 523c, 533c composed of silicon carbide JFETs.

[0069] In this embodiment, the silicon carbide JFET has a low cost and has no problem with the reliability of the gate oxide layer. The silicon carbide MOSFET has better switching performance and low switching losses. Since the effective switching times of the silicon carbide JFET are reduced, the overall switching losses can be reduced, and the efficiency of the system can be improved. At the same time, due to the introduction of DPWM, in addition to optimizing the losses, the common-mode current of the system can be further reduced, thereby optimizing the shaft current corrosion problem of the motor.

[0070] In this embodiment, additionally, the silicon carbide MOSFET can be configured to sacrifice its short-circuit resistance to optimize the on-state performance, and the silicon carbide JFET is configured / designed to have stronger short-circuit resistance and a lower short-circuit saturation current relative to the silicon carbide MOSFET. When an inter-phase short circuit or a short circuit of the bridge arm occurs in the drive system, the silicon carbide JFET can be used to turn off the short-circuit current. And since the silicon carbide JFET has relatively strong short-circuit resistance, the short-circuit current can be turned off reliably and stably. Alternatively or additionally, the silicon carbide MOSFET can be used to turn off the short-circuit current. Since the voltage across the silicon carbide MOSFET is very low and the actual short-circuit energy is also very small, the short-circuit current can also be turned off reliably. At the same time, since the silicon carbide JFET is a normally-on device, when the control voltage of the system drive is lost, the power semiconductor transistors 513c, 523c, 533c composed of the silicon carbide JFET are all in the on state, causing the motor to enter the ASC state. This is a great advantage for motor drives, especially for motor drives in new energy vehicles. Therefore, this embodiment also has the advantages related to ASC as described above for other embodiments.

[0071] Figure 8 A schematic diagram of a three-phase full-bridge drive system for driving a motor according to an embodiment of the present application is shown. Figure 8 The embodiment shown in can be referred to as the sixth embodiment. This embodiment is based on the second embodiment. In this embodiment, the power semiconductor transistors 513b, 523b, 533b composed of IGBTs in the second embodiment are replaced by the power semiconductor transistors 513d, 523d, 533d composed of silicon carbide MOSFETs. The saturation currents of the semiconductor transistors 511d, 521d, 531d are higher than those of the power semiconductor transistors 513d, 523d, 533d. And the silicon carbide MOSFET is configured or designed to be of a type with relatively strong short-circuit resistance and a low short-circuit saturation current.

[0072] In this embodiment, due to the introduction of DPWM, in addition to optimizing the losses, it can further reduce the common-mode current of the system, thereby optimizing the shaft current corrosion problem of the motor. Since the depletion-mode gallium nitride HEMT is a normally-on device, when the system drive loses the control voltage, the power semiconductor transistors 511c, 521c, and 531c composed of the depletion-mode gallium nitride HEMT are all in the on state, causing the motor to enter the ASC state. This is a great advantage for motor drives, especially for motor drives in new energy vehicles. Therefore, this embodiment also has the advantages related to ASC as described above for other embodiments.

[0073] In this embodiment, the silicon carbide MOSFET is configured or designed to have a strong short-circuit resistance and has a lower short-circuit saturation current compared to the gallium nitride HEMT. When an inter-phase short circuit or a bridge-arm short circuit occurs in the drive system, the silicon carbide MOSFET can be selected to turn off the short-circuit current. Since the silicon carbide MOSFET has relatively strong short-circuit resistance, it can reliably and stably turn off the short-circuit current. Alternatively or additionally, the gallium nitride HEMT can be selected to turn off the short-circuit current. Since the voltage across the gallium nitride HEMT is very low and the actual short-circuit energy is also very small, it can also reliably turn off the short-circuit current.

[0074] Figure 9 A schematic diagram of a three-phase full-bridge drive system for driving a motor according to an embodiment of the present application is shown. Figure 9 The embodiment shown in can be referred to as the seventh embodiment. This embodiment is based on the third embodiment. In this embodiment, the power semiconductor transistors 513b, 523b, and 533b composed of IGBTs in the third embodiment are replaced with the power semiconductor transistors 513e, 523e, and 533e composed of silicon carbide MOSFETs. So both the upper and lower are MOSFETs, and the silicon carbide MOSFET in the lower bridge arm is configured / designed to have a short-circuit saturation current lower than that of the silicon carbide MOSFET in the upper bridge arm.

[0075] In this embodiment, the power semiconductor transistors of both the upper and lower bridges are silicon carbide MOSFETs. In one embodiment, the same model of silicon carbide MOSFET is used for both. The drive circuit of the lower-bridge switching element, such as its transistor drive component, appropriately reduces the gate drive voltage of the power semiconductor transistor to improve the short-circuit resistance of the lower-bridge power semiconductor transistor. In this way, the silicon carbide MOSFET in the lower bridge arm will increase the switching loss and conduction resistance. In another embodiment, different models of devices are used for the silicon carbide MOSFETs of the upper and lower bridge arms, and the silicon carbide MOSFET in the lower-bridge switching element is designed to be of a type with strong short-circuit resistance.

[0076] In this embodiment, the lower arm enhances the short-circuit resistance of the switching element or transistor. In this embodiment, when an inter-phase short circuit or an arm short circuit occurs in the drive system, the silicon carbide MOSFET in the lower arm can bear most of the bus voltage. At this time, the silicon carbide MOSFET in the lower arm can be selected to turn off the short-circuit current. Since the silicon carbide MOSFET in the lower arm of this embodiment has strong short-circuit resistance, the short-circuit current can be turned off reliably and stably. Alternatively or additionally, the silicon carbide MOSFET in the upper arm can also be selected to turn off the short-circuit current. Since the voltage across the silicon carbide MOSFET in the upper arm is very low and the actual short-circuit energy is also very small, the short-circuit current can also be turned off reliably.

[0077] The various embodiments described above in conjunction with the drawings relate to a first configuration, that is, each upper arm includes a first transistor with lower switching losses (i.e., the terminal of the first transistor for connecting to the power supply is connected to the positive pole of the DC power supply), and each lower arm includes a second transistor with higher switching losses (i.e., the terminal of the second transistor for connecting to the power supply is connected to the negative pole of the DC power supply). When the power factor is greater than 0 (the current phase lags the voltage by less than 90 degrees), within a corresponding plurality of vector control cycles, the lower arm of the phase with the minimum instantaneous value of the equivalent phase voltage is kept on, clamped to the negative pole of the DC power supply, to implement DPWM control, so as to reduce the effective switching times of the second transistor in the lower arm, thereby reducing the switching losses of the lower arm, and further reducing the switching losses of the entire multi-phase full-bridge drive system. In this case, when the current of this phase flows from the arm to the motor, since the current does not flow through the second transistor in the lower arm of this phase, it can be selected not to keep the lower arm of this phase on during this period, that is, not to clamp the second transistor in the lower arm to the negative pole of the DC power supply. Instead, within a corresponding plurality of vector control cycles, switching actions are performed in a timely manner according to the CPWM method, so as to optimize the harmonic performance of the system. When the power factor is less than 0 (the current phase lags the voltage by more than 90 degrees), within a corresponding plurality of vector control cycles, the upper arm of the phase with the maximum instantaneous value of the equivalent phase voltage is kept on, that is, the first transistor of the upper arm is clamped to the positive pole of the DC power supply, to implement DPWM control. At this time, the second transistor of the lower arm remains off, thereby reducing the effective switching times of the lower arm and reducing the switching losses of the second transistor in the lower arm. In this case, when the current of this phase flows from the arm to the motor, since the current does not flow through the second transistor in the lower arm of this phase, it can be selected not to keep the upper arm of this phase on within a corresponding plurality of vector control cycles, that is, not to clamp the first transistor of the upper arm to the positive pole of the DC power supply. Instead, within a corresponding plurality of vector control cycles, switching actions are performed in a timely manner according to the CPWM method, so as to optimize the harmonic performance of the system.

[0078] However, the first transistor of the upper bridge arm and the second transistor of the lower bridge arm in the various embodiments described above in conjunction with the accompanying drawings can be set conversely. That is to say, in the second configuration, each upper bridge arm includes a second transistor with greater switching losses (i.e., the terminal of the second transistor for connecting to the power supply is connected to the positive pole of the DC power supply), and each lower bridge arm includes a first transistor with smaller switching losses (i.e., the terminal of the first transistor for connecting to the power supply is connected to the negative pole of the DC power supply). Correspondingly, when the power factor is greater than 0 (the current phase lags behind the voltage by less than 90 degrees), within the corresponding multiple vector control cycles, the upper bridge arm of the phase with the maximum instantaneous value of the equivalent phase voltage is kept turned on, that is, the second transistor in the upper bridge arm is clamped to the positive pole of the DC power supply to achieve DPWM control, so as to reduce the switching times of the second transistor in the upper bridge arm, thereby reducing the switching losses of the upper bridge arm, and further reducing the switching losses of the entire multi-phase full-bridge drive system. In this case, when the current of this phase flows from the motor to the bridge arm, since the current does not flow through the second transistor in the upper bridge arm of this phase, it is possible to choose not to keep the upper bridge arm of this phase turned on within the corresponding vector control cycle, that is, not to clamp the second transistor of the upper bridge arm of this phase to the positive pole of the DC power supply. Instead, within the corresponding multiple vector control cycles, the switching actions are performed in the manner of CPWM to optimize the harmonic performance of the system; when the power factor is less than 0 (the current phase lags behind the voltage by more than 90 degrees), within the corresponding multiple vector control cycles, the lower bridge arm of the phase with the minimum instantaneous value of the equivalent phase voltage is kept turned on, that is, the first transistor in the lower bridge arm of this phase is clamped to the negative pole of the DC power supply to achieve DPWM control. At this time, the second transistor in the upper bridge arm remains off, thereby reducing the switching times of the second transistor in the upper bridge arm, and further reducing the switching losses of the upper bridge arm, and thus reducing the switching losses of the entire multi-phase full-bridge drive system. In this case, when the current of this phase flows from the motor to the bridge arm, since the current does not flow through the second transistor in the upper bridge arm of this phase, it is possible to choose not to keep the lower bridge arm of this phase turned on within the corresponding vector control cycle, that is, not to clamp the first transistor in the lower bridge arm of this phase to the negative pole of the DC power supply. Instead, within the corresponding multiple vector control cycles, the switching actions are performed in the manner of CPWM in a timely manner to optimize the harmonic performance of the system.

[0079] The above discloses a three-phase full-bridge drive system using a variety of transistor combinations and a method for driving a motor using the system, including various embodiments described above in conjunction with the accompanying drawings. Regardless of the transistor combination used, the DPWM control method is used, which can reduce the effective switching times of transistors with greater switching losses, thereby reducing the switching losses of the entire three-phase full-bridge drive system and improving the efficiency of the system. In addition, each embodiment can also have other beneficial effects due to the specific performance of the transistors / switching devices in its combination. For example, when the half-bridge circuit uses a normally open transistor and a normally closed transistor, it has the beneficial effect of causing the motor to enter an active short-circuit state when the system loses control. When the half-bridge circuit uses a combination of transistors / switching devices with different short-circuit resistance capabilities, it has additional beneficial effects, such as the device with strong short-circuit resistance in each half-bridge circuit can reliably turn off the short-circuit current, avoiding damage to the switch device / semiconductor transistor with weak short-circuit resistance, thereby improving the reliability of the entire drive system. In the case of some combinations of transistors / switching devices, such as the combination of silicon carbide JEFT and IGBT, the above-mentioned multiple beneficial technical effects can be achieved at the same time. It should be pointed out that the present application is not limited to the embodiments described in conjunction with the accompanying drawings, but is intended to include all variations and modifications thereof.

[0080] It should be noted that although the three-phase full-bridge drive system and the method for driving a motor using the three-phase full-bridge drive system have been described in detail above in conjunction with the accompanying drawings, they are for illustrative purposes only and not for limitation. On the contrary, the multi-phase full-bridge drive system proposed in the present application includes any multi-phase full-bridge drive system having at least three half-bridge circuits. Moreover, the method for driving a motor proposed in the present application is also applicable to controlling any multi-phase full-bridge drive system having at least three half-bridge circuits to achieve a target multi-phase drive voltage for driving the motor. Additionally, the multi-phase full-bridge drive system according to the present application and the method for driving a motor have been described above in conjunction with various specific transistor combinations. However, this is only for illustrative purposes and not for limitation. In fact, it is easily understood that the drive system and drive method disclosed in the present application may also include various other different transistor combinations and the half-bridge and full-bridge circuits formed thereby. Additionally, the motor mentioned in the present application may be a synchronous motor or an asynchronous motor. The motor is a three-phase motor or a motor with more phases. The motor has at least three lead terminals, where each lead terminal is connected to a corresponding half-bridge circuit. Moreover, although the multi-phase full-bridge drive system (such as a three-phase full-bridge drive system) has been described above in conjunction with driving a motor, and some of the embodiments described above are particularly beneficial for driving a motor on an electric vehicle (such as making it enter the ASC state in case of a fault), the multi-phase full-bridge drive system described in the present application can also be used to drive other inductive loads, such as being connected to the power grid, etc. And, in the case of being used for other inductive loads, it can still bring the benefits of reducing the effective switching times of larger transistors for switching losses, thereby reducing the switching losses of the entire multi-phase full-bridge drive system and improving the system efficiency.

[0081] It should be understood that although terms such as "first" and "second" are used in the present application to describe various devices, elements, components, or stages, these devices, elements, components, or stages should not be limited by these terms. These terms are only used to distinguish one device, element, component, or stage from another device, element, component, or stage.

[0082] Although the present application has been described in conjunction with some embodiments, the present application is not intended to be limited to the specific forms and details set forth herein. On the contrary, the scope of the present application is only limited by the appended claims and their equivalents. Additionally, although individual features may be included in different claims, these features may be combined. The order of features in the claims does not imply that the features must work in any specific order. Moreover, in the claims, the word "comprising" does not exclude other elements, and the term "a" does not exclude a plurality.

Claims

1. A multiphase full-bridge drive system for driving a motor, comprising: A multiphase full-bridge circuit, which includes at least three identical half-bridge circuits, wherein each half-bridge circuit includes a first transistor and a second transistor, and the switching loss of the first transistor is less than the switching loss of the second transistor; And A controller, which is used to control the multiphase full-bridge circuit to generate a target multiphase drive voltage for driving the motor, wherein the controller is configured to select a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the instantaneous value of the voltage of the target multiphase drive voltage, and reduce the effective switching times of the second transistor of the selected half-bridge circuit based on the power factor of the motor, wherein the effective switching times refer to the number of switchings when the transistor has switching loss during turn-on or turn-off.

2. The multiphase full-bridge drive system according to claim 1, wherein the terminal of the first transistor of each half-bridge circuit for connecting to the power supply is connected to the positive pole of the DC power supply, the terminal of the second transistor of each half-bridge circuit for connecting to the power supply is connected to the negative pole of the DC power supply, and selecting a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the target multiphase drive voltage includes: In response to the power factor of the motor being greater than zero, selecting the half-bridge circuit associated with the phase having the minimum instantaneous value of the voltage in the target multiphase drive voltage from at least three half-bridge circuits; And In response to the power factor of the motor being less than zero, selecting the half-bridge circuit associated with the phase having the maximum instantaneous value of the voltage in the target multiphase drive voltage from at least three half-bridge circuits.

3. The multiphase full-bridge drive system according to claim 1 or 2, wherein reducing the effective switching times of the second transistor of the selected half-bridge circuit based on the power factor of the motor includes: The controller causes the first transistor or the second transistor of the selected half-bridge circuit to remain in the on state according to the power factor of the motor, and the controller also reduces the ineffective switching times of the second transistor of the selected half-bridge circuit, and the ineffective switching times refer to the number of switchings when the transistor has no switching loss during turn-on or turn-off.

4. The multiphase full-bridge drive system according to claim 3, wherein: In response to the power factor of the motor being greater than zero, causing the second transistor of the selected half-bridge circuit to remain in the on state; Or In response to the power factor of the motor being less than zero, causing the first transistor of the selected half-bridge circuit to remain in the on state.

5. The multiphase full-bridge drive system according to claim 1 or 2, wherein reducing the effective switching times of the second transistor of the selected half-bridge circuit based on the power factor of the motor includes: The controller then determines the direction of the current, and based on both the power factor of the motor and the direction of the current, keeps the first transistor or the second transistor of the selected half-bridge circuit in the on state, or performs CPWM control on the first transistor and the second transistor of the selected half-bridge circuit, where the controller does not reduce the number of ineffective switching times of the second transistor of the selected half-bridge circuit, and the number of ineffective switching times refers to the number of switching times when there is no switching loss generated when the transistor is turned on or off.

6. The multiphase full-bridge drive system according to claim 5, wherein: In response to the power factor of the motor being greater than zero: In response to the current flowing from the motor to the DC power supply, keep the second transistor of the selected half-bridge circuit in the on state; or In response to the current flowing from the DC power supply to the motor, control the first transistor and the second transistor of the selected half-bridge circuit to perform switching actions according to the CPWM control method, or In response to the power factor of the motor being less than zero: In response to the current flowing from the motor to the DC power supply, keep the first transistor of the selected half-bridge circuit in the on state; or In response to the current flowing from the DC power supply to the motor, control the first transistor and the second transistor of the selected half-bridge circuit to perform switching actions according to the CPWM control method.

7. The multiphase full-bridge drive system according to any one of claims 1, 2, 4, and 6, wherein the first transistor is selected from the group consisting of silicon carbide JEFT, gallium nitride HEMT, IGBT, and silicon carbide MOSFET, and the second transistor is selected from the group consisting of IGBT, silicon carbide MOSFET, and silicon carbide JEFT.

8. The multiphase full-bridge drive system according to any one of claims 1, 2, 4, and 6, wherein the short-circuit withstand ability of the first transistor is weaker than that of the second transistor.

9. The multiphase full-bridge drive system according to any one of claims 1, 2, 4, and 6, wherein the first transistor and the second transistor belong to the same transistor type, or the first transistor and the second transistor belong to different device types, and the controller is further configured to: In response to the first transistor and the second transistor belonging to the same transistor type, configure the first transistor and the second transistor of each half-bridge circuit respectively by adjusting the transistor drive components connected to the control terminals of the first transistor and the second transistor of each half-bridge circuit so that the switching loss of the first transistor is less than that of the second transistor.

10. The multiphase full-bridge drive system according to any one of claims 1, 2, 4, and 6, wherein the first transistor and the second transistor belong to the same transistor type, or the first transistor and the second transistor belong to different device types, and the controller is further configured to: In response to the first transistor and the second transistor belonging to the same transistor type, the first transistor and the second transistor are respectively configured by adjusting a transistor driving component connected to the control terminals of the first transistor and the second transistor of each half-bridge circuit such that: the switching loss of the first transistor is less than the switching loss of the second transistor and the short-circuit resistance of the first transistor is weaker than the short-circuit resistance of the second transistor.

11. The multiphase full-bridge drive system according to claim 8, wherein the first transistor is a silicon carbide MOSFET or a silicon carbide JEFT, and the second transistor is an IGBT.

12. The multiphase full-bridge drive system according to any one of claims 1, 2, 4, and 6, wherein the first transistor is a normally-open transistor and the second transistor is a normally-closed transistor, or the first transistor is a normally-closed transistor and the second transistor is a normally-open transistor.

13. The multiphase full-bridge drive system according to claim 12, wherein in response to the multiphase full-bridge drive system losing control, the normally-open transistors in each half-bridge circuit are turned on simultaneously to put the motor into an active short-circuit state.

14. The multiphase full-bridge drive system according to claim 12, wherein the first transistor is a silicon carbide JEFT or a gallium nitride HEMT, and the second transistor is an IGBT.

15. The multiphase full-bridge drive system according to any one of claims 1, 2, 4, 6, 11, 13, and 14, wherein each half-bridge circuit further includes a first diode reversely connected in parallel with the first transistor and a second diode reversely connected in parallel with the second transistor.

16. The multiphase full-bridge drive system according to claim 15, wherein the first diode and the second diode are selected from the group consisting of a diode having a Schottky structure including silicon carbide and a fast-recovery diode.

17. The multiphase full-bridge drive system according to any one of claims 1, 2, 4, 6, 11, 13, 14, and 16, wherein the reduced effective switching times of the second transistor account for 10% to 50% of the total effective switching times of the second transistor that would occur if only CPWM control were performed.

18. A method for driving a motor, comprising: configuring a multiphase full-bridge circuit such that it includes at least three identical half-bridge circuits, wherein each half-bridge circuit includes a first transistor and a second transistor, and the switching loss of the first transistor is less than the switching loss of the second transistor; and using a controller to control the multiphase full-bridge circuit to generate a target multiphase drive voltage for driving the motor, including using the controller to select a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the instantaneous voltage value of the target multiphase drive voltage, and reducing the effective switching times of the second transistor of the selected half-bridge circuit based on the power factor of the motor, wherein the effective switching times refer to the number of switching times when the transistor has switching loss during the on or off moment.

19. The method according to claim 18, wherein a terminal of the first transistor of each half-bridge circuit for connecting to a power supply is connected to the positive pole of the DC power supply, a terminal of the second transistor of each half-bridge circuit for connecting to the power supply is connected to the negative pole of the DC power supply, and wherein selecting a half-bridge circuit from at least three half-bridge circuits based on the power factor of the motor and the target multiphase drive voltage comprises: In response to the power factor of the motor being greater than zero, select a half-bridge circuit associated with the phase having the minimum instantaneous voltage value among the target polyphase drive voltages from at least three half-bridge circuits; And In response to the power factor of the motor being less than zero, select a half-bridge circuit associated with the phase having the maximum instantaneous voltage value among the target polyphase drive voltages from at least three half-bridge circuits.

20. The method according to claim 18 or 19, wherein reducing the effective switching times of the second transistor of the selected half-bridge circuit based on the power factor of the motor includes: The controller causes the first transistor or the second transistor of the selected half-bridge circuit to remain in the on state according to the power factor of the motor, wherein the controller also reduces the ineffective switching times of the second transistor of the selected half-bridge circuit, and the ineffective switching times refer to the switching times when there is no switching loss generated when the transistor is turned on or off.

21. The method according to claim 20, wherein: In response to the power factor of the motor being greater than zero, cause the second transistor of the selected half-bridge circuit to remain in the on state; or In response to the power factor of the motor being less than zero, cause the first transistor of the selected half-bridge circuit to remain in the on state.

22. The method according to claim 18 or 19, wherein reducing the effective switching times of the second transistor of the selected half-bridge circuit based on the power factor of the motor includes: The controller further determines the direction of the current flow, and causes the first transistor or the second transistor of the selected half-bridge circuit to remain in the on state or performs CPWM control on the first transistor and the second transistor of the selected half-bridge circuit according to both the power factor of the motor and the direction of the current flow, wherein the controller does not reduce the ineffective switching times of the second transistor of the selected half-bridge circuit, and the ineffective switching times refer to the switching times when there is no switching loss generated when the transistor is turned on or off.

23. The method according to claim 22, wherein: In response to the power factor of the motor being greater than zero: In response to the current flowing from the motor to the DC power supply, cause the second transistor of the selected half-bridge circuit to remain in the on state; or In response to the current flowing from the DC power supply to the motor, control the first transistor and the second transistor of the selected half-bridge circuit to perform switching actions according to the CPWM control method, or In response to the power factor of the motor being less than zero: In response to the current flowing from the motor to the DC power supply, cause the first transistor of the selected half-bridge circuit to remain in the on state; or In response to the current flowing from the DC power supply to the motor, control the first transistor and the second transistor of the selected half-bridge circuit to perform switching actions according to the CPWM control method.

24. The method according to any one of claims 18, 19, 21, and 23, wherein the first transistor is selected from the group consisting of silicon carbide JEFT, gallium nitride HEMT, IGBT, and silicon carbide MOSFET, and the second transistor is selected from the group consisting of IGBT, silicon carbide MOSFET, and silicon carbide JEFT.

25. The method according to any one of claims 18, 19, 21, and 23, wherein the short-circuit resistance of the first transistor is weaker than that of the second transistor.

26. The method according to any one of claims 18, 19, 21, and 23, wherein the first transistor and the second transistor belong to the same transistor type, or the first transistor and the second transistor belong to different device types, and the method further includes: Using the controller to, in response to the first transistor and the second transistor belonging to the same transistor type, configure the first transistor and the second transistor of each half-bridge circuit respectively by adjusting the transistor driving components connected to the control terminals of the first transistor and the second transistor of each half-bridge circuit such that the switching loss of the first transistor is less than that of the second transistor.

27. The method according to any one of claims 18, 19, 21, and 23, wherein the first transistor and the second transistor belong to the same transistor type, or the first transistor and the second transistor belong to different device types, and the method further includes: Using the controller to, in response to the first transistor and the second transistor belonging to the same transistor type, configure the first transistor and the second transistor respectively by adjusting the transistor driving components connected to the control terminals of the first transistor and the second transistor of each half-bridge circuit such that: the switching loss of the first transistor is less than that of the second transistor and the short-circuit resistance of the first transistor is weaker than that of the second transistor.

28. The method according to claim 25, wherein the first transistor is a silicon carbide MOSFET or a silicon carbide JEFT, and the second transistor is an IGBT.

29. The method according to any one of claims 18, 19, 21, and 23, wherein the first transistor is a normally-open transistor and the second transistor is a normally-closed transistor, or the first transistor is a normally-closed transistor and the second transistor is a normally-open transistor.

30. The method according to claim 29, the method further includes, in response to the multi-phase full-bridge drive system losing control, simultaneously turning on the normally-open transistors in each half-bridge circuit to make the motor enter the active short-circuit state.

31. The method according to claim 29, wherein the first transistor is a silicon carbide JEFT or a gallium nitride HEMT, and the second transistor is an IGBT.

32. The method according to any one of claims 18, 19, 21, 23, 28, 30, and 31, wherein each half-bridge circuit further includes a first diode connected in anti-parallel with the first transistor, and a second diode connected in anti-parallel with the second transistor.

33. The method according to claim 32, wherein the first diode and the second diode are selected from the group consisting of diodes with a Schottky structure and fast-recovery diodes including silicon carbide.

34. The method according to any one of claims 18, 19, 21, 23, 28, 30, 31, and 33, wherein the reduced number of effective switching operations of the second transistor accounts for 10% to 50% of the total number of effective switching operations of the second transistor that would occur if CPWM control were performed alone.

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