A method and device for improving the symmetry of the CAN bus

Abstract

Embodiments of the present invention provide a method and apparatus for improving the symmetry of a CAN bus. The method belongs to the field of controller area network bus transceivers and includes: performing DC calibration through a DC calibration module after the chip is powered on; performing transient calibration through a transient calibration module after the DC calibration is completed. By calibrating with the DC calibration module and the transient calibration module, the present invention improves the symmetry of the CAN bus, reduces electromagnetic radiation, and the entire calibration process is automatically completed during the power-on process without the participation of additional off-chip signals for calibration, saving costs and improving efficiency.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of controller area network (CAN) bus transceivers. More specifically, embodiments of the present invention relate to a method and apparatus for improving the symmetry of a CAN bus. Background Art

[0002] CAN is short for controller area network, which is commonly used in in-vehicle communication and has high reliability and versatility. CAN transmits data through a twisted pair (CANH / CANL). When CANH is high and CANL is low, a 0 signal is transmitted, which is called the dominant state. When the voltages of CANH and CANL are equal (half of the power supply voltage), a 1 signal is transmitted, which is called the recessive state. The receiver outputs logic 1 or 0 according to the state of the bus at the same time. As Figure 1 shown, in an ideal situation, usually the bus signals CANH and CANL can always keep CANH plus CANL equal to the power supply voltage VCC during the transmission process, whether in the dominant state, the recessive state, or during the state transition process. At this time, the electromagnetic radiation of the bus signal to the outside is the smallest. The actual situation is that if not calibrated, both the DC and transient CANH plus CANL will deviate from the power supply voltage, forming electromagnetic radiation to the outside, and the radiation energy is related to the deviation amount of the DC and the amplitude of the transient glitch.

[0003] The prior art drives the bus by controlling the current through a switch. The signal slopes of CANH and CANL at the bus end are uncontrollable, the output symmetry is poor, and VCANH + VCANL deviates from the power supply voltage. Especially during the state transition process, there are relatively large deviation glitches. Summary of the Invention

[0004] In this context, embodiments of the present invention are expected to provide a method and apparatus for improving the symmetry of a CAN bus.

[0005] In a first aspect of the embodiments of the present invention, a method for improving the symmetry of a CAN bus is provided, including:

[0006] Performing DC calibration through a DC calibration module after the chip is powered on;

[0007] Performing transient calibration through a transient calibration module after the DC calibration is completed.

[0008] In an embodiment of this embodiment, the performing DC calibration through a DC calibration module after the chip is powered on includes:

[0009] Taking out the common-mode voltages of CANH and CANL through resistors, comparing them with VCC / 2, and outputting a comparison result through a dynamic comparator;

[0010] After sampling the comparison result through the SAR logic module, the control logic MOSH<5:0> and MOSL<5:0> are output to control the number of current source tubes in the CANH and CANL drive branches, adjust the DC voltages of CANH and CANL, and make CANH + CANL equal to VCC to complete the calibration of the DC voltage.

[0011] Among them, the DC calibration module includes: a resistor, a dynamic comparator, and an SAR logic module that are electrically connected.

[0012] The DC calibration includes the calibration of the DC voltage.

[0013] In an embodiment of the present embodiment, after the DC calibration is completed, transient calibration is performed through the transient calibration module, including:

[0014] After the DC calibration is completed, the transition calibration from recessive to dominant and the transition calibration from dominant to recessive are sequentially performed through the transient calibration module.

[0015] Among them, the transient calibration includes: the transition calibration from recessive to dominant and the transition calibration from dominant to recessive.

[0016] In an embodiment of the present embodiment, after the DC calibration is completed, the transition calibration from recessive to dominant is performed through the transient calibration module, including:

[0017] When the CANH and CANL signals are connected to the transient calibration module, the CANH and CANL signals are respectively compared with VTH_CH and VTH_CL through a comparator, and the comparison results outh and outl are output, and outl is used to sample outh to obtain the sampling result out, where VTH_CH is the high-side threshold voltage for dominant transition, and VTH_CL is the low-side threshold voltage for dominant transition.

[0018] Through the logic in the transient calibration module, the control logic CH<5:0> and CL<5:0> are output according to the sampling result out to control the number of charging capacitors in the CANH and CANL drive branches, thereby changing the slope when the CANH and CANL signals open from recessive to dominant, and making the opening times of the CANH and CANL signals consistent during the opening process.

[0019] In an embodiment of the present embodiment, after the DC calibration is completed, the transition calibration from dominant to recessive is performed through the transient calibration module, including:

[0020] When the CANH and CANL signals are connected to the transient calibration module, the CANH and CANL signals are respectively compared with VTH_RH and VTH_RL through the comparator in the transient calibration module, and the comparison results outh and outl are output, and outl is used to sample outh to obtain the sampling result out, where VTH_RH is the recessive conversion high-side threshold voltage and VTH_RL is the recessive conversion low-side threshold voltage;

[0021] Through the logic in the transient calibration module, the control logics RH<5:0> and RL<5:0> are output according to the sampled result out to control the number of discharge resistors of the CANH and CANL drive branches, thereby changing the slope when the CANH and CANL signals close the amplitude when converting from dominant to recessive, so that the CANH and CANL signals ensure the same closing time during the closing process.

[0022] In an embodiment of this embodiment, it further includes:

[0023] After the calibration is completed, the switches connecting CANH and CANL to the DC calibration module and the transient calibration module are disconnected, and the DC calibration module and the transient calibration module are turned off.

[0024] In the second aspect of the embodiment of the present invention, a device for improving the symmetry of the CAN bus is provided, including:

[0025] A DC calibration module for performing DC calibration through the DC calibration module after the chip is powered on;

[0026] A transient calibration module for performing transient calibration after the DC calibration is completed.

[0027] In an embodiment of this embodiment, the DC calibration module includes: a resistor, a dynamic comparator and a SAR logic that are electrically connected:

[0028] The resistor is used to extract the common-mode voltages of CANH and CANL;

[0029] The dynamic comparator is used to compare the common-mode voltages of CANH and CANL with VCC / 2 and output the comparison result;

[0030] The SAR logic module is used to sample the comparison result and then output the control logics MOSH<5:0> and MOSL<5:0> to control the number of current source tubes of the CANH and CANL drive branches, adjust the DC voltages of CANH and CANL, so that CANH + CANL is equal to VCC, and complete the calibration of the DC voltage.

[0031] In an embodiment of this embodiment, the transient calibration module includes: a comparator and a logic that are electrically connected;

[0032] The comparator is configured to compare the CANH and CANL signals with VTH_CH and VTH_CL, or with VTH_RH and VTH_RL respectively when the CANH and CANL signals are accessed, output the comparison results outh and outl, and sample outh with outl to obtain the sampling result out;

[0033] The logic is configured to output the control logics CH<5:0> and CL<5:0> according to the sampling result out to control the number of charging capacitors of the CANH and CANL driving branches, thereby changing the slope when the CANH and CANL signals change from recessive to dominant amplitude opening or the slope when changing from dominant to recessive amplitude closing.

[0034] In an embodiment of the present embodiment, a recovery module is further included, which is configured to disconnect the switches connecting CANH and CANL to the calibration module and turn off the DC calibration module and the transient calibration module after calibration is completed.

[0035] A method, device and medium for improving the symmetry of the CAN bus according to an embodiment of the present invention improve the symmetry of the CAN bus, reduce electromagnetic radiation through the calibration of the DC calibration module and the transient calibration module, and the entire calibration process is automatically completed during the power-on process without the need for additional off-chip signals to participate in calibration, saving costs and improving efficiency. Description of the Drawings

[0036] By reading the following detailed description with reference to the accompanying drawings, the above and other objects, features and advantages of the exemplary embodiments of the present invention will become readily understood. In the drawings, several embodiments of the present invention are shown in an exemplary rather than restrictive manner, wherein:

[0037] Figure 1 It is a typical waveform diagram of the CAN bus signal provided by an embodiment of the present invention;

[0038] Figure 2 It is a flowchart of a method for improving the symmetry of the CAN bus provided by an embodiment of the present invention;

[0039] Figure 3 It is a schematic diagram of the architecture for improving the symmetry of the CAN bus provided by an embodiment of the present invention;

[0040] Figure 4 It is a schematic diagram of the structure of the CANH control module of the present invention;

[0041] Figure 5 It is a schematic diagram of the structure of the CANL control module of the present invention;

[0042] Figure 6Schematic diagram of a DC calibration module provided by an embodiment of the present invention;

[0043] Figure 7 Timing diagram of DC symmetry calibration provided by an embodiment of the present invention;

[0044] Figure 8 Schematic diagram of a transient calibration module provided by an embodiment of the present invention;

[0045] Figure 9 Timing diagram of recessive-to-dominant transient symmetry calibration provided by an embodiment of the present invention;

[0046] Figure 10 Timing diagram of dominant-to-recessive transient symmetry calibration provided by an embodiment of the present invention.

[0047] In the drawings, the same or corresponding reference numerals denote the same or corresponding parts. Detailed implementation manners

[0048] The principles and spirit of the present invention will be described below with reference to several exemplary embodiments. It should be understood that these embodiments are provided only to enable those skilled in the art to better understand and then implement the present invention, rather than to limit the scope of the present invention in any way. On the contrary, these embodiments are provided to make the present disclosure more thorough and complete, and to be able to convey the scope of the present disclosure fully to those skilled in the art.

[0049] Those skilled in the art know that the embodiments of the present invention can be implemented as a method and device for improving the symmetry of the CAN bus. Therefore, the present disclosure can be specifically implemented in the following forms, namely: completely hardware, completely software (including firmware, resident software, microcode, etc.), or a combination of hardware and software.

[0050] According to the embodiments of the present invention, a method and device for improving the symmetry of the CAN bus are proposed.

[0051] It should be noted that any number of elements in the drawings is for illustration rather than limitation, and any naming is only for distinction and does not have any limiting meaning.

[0052] The principles and spirit of the present invention will be elaborated in detail below with reference to several representative embodiments of the present invention.

[0053] Exemplary method

[0054] Below with reference to Figure 2 , Figure 2 Schematic flowchart of a method for improving the symmetry of the CAN bus provided by an embodiment of the present invention. It should be noted that the embodiments of the present invention can be applied to any applicable scenario.

[0055] A method for improving the symmetry of the CAN bus provided by the present invention, the specific implementation process of which is as follows:

[0056] After the chip is powered on, it automatically enters the calibration mode. First, DC calibration is performed, and then transient calibration is carried out. The transient calibration process is further divided into a recessive-to-dominant transition calibration process and a dominant-to-recessive calibration process. After calibration is completed, the DC calibration module and the transient calibration module are automatically turned off without affecting the normal operation of the chip.

[0057] Figure 2 The flow of a method for improving the symmetry of the CAN bus provided by an embodiment of the present invention is shown in the figure, including:

[0058] Step 1: Perform DC calibration through the DC calibration module after the chip is powered on;

[0059] Step 2: Perform transient calibration through the transient calibration module after the DC calibration is completed.

[0060] In another embodiment of the present invention, in order to accurately describe the DC calibration performed through the DC calibration module after the chip is powered on, as Figure 3 shown, the above Step 1 is replaced by the following Steps 101 to 102:

[0061] The implementation of the above Steps 101 to 102 is as follows:

[0062] Step 101: Take out the common-mode voltages of CANH and CANL through a resistor, compare them with VCC / 2, and output the comparison result through a dynamic comparator;

[0063] Step 102: After sampling the comparison result through the SAR logic module, output control logics MOSH<5:0> and MOSL<5:0> to control the number of current source tubes in the driving branches of CANH and CANL, adjust the DC voltages of CANH and CANL, and make CANH + CANL equal to VCC to complete the calibration of the DC voltage;

[0064] Among them, the DC calibration module includes: a resistor, a dynamic comparator, and a SAR logic module that are electrically connected;

[0065] The DC calibration includes the calibration of the DC voltage.

[0066] The DC calibration module in Step 1 is as Figure 6 shown. Step 1 is mainly implemented through the CANH control module and the CANL control module. Among them, the structure of the CANH control module is as Figure 4 shown, and the structure of the CANL control module is as Figure 5 shown:

[0067] During DC calibration, the DC calibration module first extracts the common-mode voltages of CANH and CANL through resistors, compares them with VCC / 2, and the dynamic comparator outputs the comparison result. After the SAR logic module samples the comparison result, it outputs control logic MOSH<5:0> and MOSL<5:0> to control the number of current source transistors in the CANH and CANL drive branches, so as to controllably adjust the DC voltages of CANH and CANL, and finally make CANH + CANL equal to VCC, as Figure 7 shown in the DC symmetry calibration timing diagram to complete the calibration of the DC voltage.

[0068] In another embodiment of the present invention, in order to accurately describe the transient calibration performed by the transient calibration module after the recessive-to-dominant conversion calibration is completed, where the transient calibration module is as Figure 8 shown, then the above step 2 is replaced by the following steps:

[0069] After the recessive-to-dominant conversion calibration is completed, perform recessive-to-dominant conversion calibration and dominant-to-recessive conversion calibration through the transient calibration module;

[0070] Among them, the transient calibration includes: recessive-to-dominant conversion calibration and dominant-to-recessive calibration processes.

[0071] In another embodiment of the present invention, in order to accurately describe the recessive-to-dominant conversion calibration, it is replaced by the following steps 201 to step 203.

[0072] Steps 201 to 202 specifically include:

[0073] Step 201: When the CANH and CANL signals are connected to the transient calibration module, compare the CANH and CANL signals with VTH_CH and VTH_CL respectively through the comparator in the transient calibration module, output the comparison results outh and outl, and use outl to sample outh to obtain the sampling result out;

[0074] Step 202: According to the sampling result out, the logic in the transient calibration module outputs control logic CH<5:0> and CL<5:0> to control the number of charging capacitors in the CANH and CANL drive branches, thereby changing the slope when the CANH and CANL signals change from recessive to dominant and the amplitude spreads, so that the opening times of the CANH and CANL signals are the same during the opening process, as Figure 9 shown in the recessive-to-dominant transient symmetry calibration timing diagram.

[0075] In another embodiment of the present invention, in order to accurately describe the dominant-to-recessive conversion calibration, it is replaced by the following steps 203 to step 204.

[0076] Steps 203 to 204 replacement specifically includes:

[0077] Step 203: When the CANH and CANL signals are connected to the transient calibration module, the CANH and CANL signals are respectively compared with VTH_RH and VTH_RL through the comparators in the transient calibration module, and the comparison results outh and outl are output. Then, outl is used to sample outh to obtain the sampling result out;

[0078] Step 204: According to the sampled result out, the logic in the transient calibration module outputs the control logics RH<5:0> and RL<5:0> to control the number of discharge resistors in the CANH and CANL drive branches, thereby changing the slope when the CANH and CANL signals transition from dominant to recessive amplitude closure, so that the CANH and CANL signals can ensure consistent closure times during the closure process, as Figure 10 shown in the dominant-to-recessive transient symmetry calibration timing diagram.

[0079] The specific implementation process of Step 2 includes:

[0080] During transient calibration, first perform recessive-to-dominant conversion calibration. The CANH and CANL signals are connected to the transient calibration module and respectively compared with VTH_CH and VTH_CL. The comparators in the transient calibration module respectively output the comparison results outh and outl, and outl is used to sample outh. The logic in the transient calibration module outputs the control logics CH<5:0> and CL<5:0> according to the sampled result out to control the number of charging capacitors in the CANH and CANL drive branches, thereby changing the slope when the CANH and CANL signals transition from recessive to dominant amplitude opening, and finally ensuring that the CANH and CANL signals can have consistent opening times during the opening process. Here, VTH_CH is the dominant conversion high-side threshold voltage, and VTH_CL is the dominant conversion low-side threshold voltage.

[0081] Then perform dominant-to-recessive conversion calibration. The CANH and CANL signals are connected to the transient calibration module and respectively compared with VTH_RH and VTH_RL. The comparators respectively output the comparison results outh and outl, and outl is used to sample outh. The logic outputs the control logics RH<5:0> and RL<5:0> according to the sampled result out to control the number of discharge resistors in the CANH and CANL drive branches, thereby changing the slope when the CANH and CANL signals transition from dominant to recessive amplitude closure, and finally ensuring that the CANH and CANL signals can have consistent closure times during the closure process.

[0082] In another embodiment of the present invention, after calibration is completed, the switches connecting CANH and CANL to the calibration module are disconnected, and the calibration module is turned off.

[0083] After calibration is completed, disconnect the switches connecting CANH and CANL to the calibration module, and turn off the calibration module.

[0084] The present invention adopts a step-by-step calibration method, which can improve the symmetry of the CAN bus, thereby reducing electromagnetic radiation. Moreover, the entire calibration process is automatically completed during the power-on process without the need for additional off-chip signals to participate in the calibration process, such as SPI communication, etc., thus saving costs and improving efficiency.

[0085] The beneficial technical effects of the present invention: After the above-mentioned step-by-step calibration, both the DC symmetry and the transient symmetry of the CAN bus signal can be greatly improved.

[0086] Exemplary device

[0087] After introducing the method of the exemplary embodiment of the present invention, next, refer to Figure 5 A device for improving the symmetry of the CAN bus according to an exemplary embodiment of the present invention will be described. The device includes:

[0088] A DC calibration module, which is used to perform DC calibration through the DC calibration module after the chip is powered on;

[0089] A transient calibration module, which is used to perform transient calibration through the transient calibration module after the DC calibration is completed.

[0090] As an optional embodiment, the DC calibration module is as Figure 6 shown, and includes: a resistor, a dynamic comparator, and a SAR logic that are electrically connected;

[0091] The resistor is used to extract the common-mode voltages of CANH and CANL;

[0092] The dynamic comparator is used to compare the common-mode voltages of CANH and CANL with VCC / 2 and output a comparison result;

[0093] The SAR logic is used to sample the comparison result and then output control logic MOSH<5:0> and MOSL<5:0> to control the number of current source transistors in the driving branches of CANH and CANL, adjust the DC voltages of CANH and CANL, and make CANH + CANL equal to VCC to complete the calibration of the DC voltage, as shown in Figure 7 the DC symmetry calibration timing diagram shown.

[0094] As an optional embodiment, the transient calibration module is as Figure 8 shown, and includes:

[0095] A comparator and a logic logic that are electrically connected;

[0096] The comparator is configured to compare the CANH and CANL signals with VTH_CH and VTH_CL, or with VTH_RH and VTH_RL respectively when the CANH and CANL signals are input, output the comparison results outh and outl, and sample outh with outl to obtain the sampling result out;

[0097] The logic is configured to output control logics CH<5:0> and CL<5:0> according to the sampling result out to control the number of charging capacitors in the CANH and CANL driving branches, thereby changing the slope when the CANH and CANL signals transition from recessive to dominant with the amplitude expanding or the slope when transitioning from dominant to recessive with the amplitude closing.

[0098] Specifically:

[0099] The comparator is configured to compare the CANH and CANL signals with VTH_CH and VTH_CL respectively when the CANH and CANL signals are input, output the comparison results outh and outl, and sample outh with outl to obtain the sampling result out; it is also configured to compare the CANH and CANL signals with VTH_RH and VTH_RL respectively when the CANH and CANL signals are input, output the comparison results outh and outl, and sample outh with outl to obtain the sampling result out.

[0100] The logic is configured to output control logics CH<5:0> and CL<5:0> according to the sampling result out to control the number of charging capacitors in the CANH and CANL driving branches, thereby changing the slope when the CANH and CANL signals transition from recessive to dominant with the amplitude expanding, so that the expansion times of the CANH and CANL signals are the same during the expansion process. The transient calibration timing diagram from recessive to dominant is as shown in Figure 9 shown; it is also configured to output control logics RH<5:0> and RL<5:0> according to the sampling result out to control the number of discharge resistors in the CANH and CANL driving branches, thereby changing the slope when the CANH and CANL signals transition from dominant to recessive with the amplitude closing, so that the closing times of the CANH and CANL signals are the same during the closing process. The transient calibration timing diagram from dominant to recessive is as shown in Figure 10 shown.

[0101] As an optional implementation, the device further includes a shutdown module, which is configured to disconnect the switches connecting CANH and CANL to the DC calibration module and the transient calibration module after calibration is completed, and turn off the DC calibration module and the transient calibration module.

[0102] In the description of the present invention, it should be noted that the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0103] Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0104] In several embodiments provided by the present invention, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of the units is only a logical functional division, and there may be other division methods in actual implementation. For another example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the couplings, direct couplings, or communication connections shown or discussed with each other can be through some communication interfaces, and the indirect couplings or communication connections of the devices or units can be in electrical, mechanical, or other forms.

[0105] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0106] In addition, each functional unit in various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit.

[0107] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium executable by a processor. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0108] Finally, it should be noted that the above-described embodiments are only specific embodiments of the present invention, used to illustrate the technical solutions of the present invention, rather than limiting it. The protection scope of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that any person skilled in the technical field can still modify the technical solutions recorded in the foregoing embodiments, or can easily think of changes, or perform equivalent replacements on some of the technical features; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

[0109] In addition, although the operations of the method of the present invention are described in a specific order in the drawings, this does not require or imply that these operations must be performed in that specific order, or that all of the shown operations must be performed to achieve the desired result. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step for execution, and / or one step may be decomposed into multiple steps for execution.

Claims

1. A method for improving the symmetry of a CAN bus, characterized in that, Including: Performing DC calibration through a DC calibration module after the chip is powered on; Performing transient calibration through a transient calibration module after the DC calibration is completed; The performing of transient calibration through the transient calibration module after the DC calibration is completed includes: After the DC calibration is completed, performing a recessive-to-dominant transition calibration and a dominant-to-recessive transition calibration through the transient calibration module; Wherein, the transient calibration includes: a recessive-to-dominant transition calibration and a dominant-to-recessive calibration; After the DC calibration is completed, performing a recessive-to-dominant transition calibration through the transient calibration module, including: When the CANH and CANL signals are connected to the transient calibration module, comparing the CANH and CANL signals with VTH_CH and VTH_CL respectively through a comparator in the transient calibration module, outputting comparison results outh and outl, and sampling outh with outl to obtain a sampling result out, where VTH_CH is the dominant transition high-side threshold voltage and VTH_CL is the dominant transition low-side threshold voltage; Outputting control logics CH<5:0> and CL<5:0> through the logic in the transient calibration module according to the sampling result out to control the number of charging capacitors of the CANH and CANL drive branches, thereby changing the slope when the amplitudes of the CANH and CANL signals open from recessive to dominant, so that the opening times of the CANH and CANL signals are consistent during the opening process; After the DC calibration is completed, performing a dominant-to-recessive calibration through the transient calibration module, including: When the CANH and CANL signals are connected to the transient calibration module, comparing the CANH and CANL signals with VTH_RH and VTH_RL respectively through a comparator in the transient calibration module, outputting comparison results outh and outl, and sampling outh with outl to obtain a sampling result out, where VTH_RH is the recessive transition high-side threshold voltage and VTH_RL is the recessive transition low-side threshold voltage; Outputting control logics RH<5:0> and RL<5:0> through the logic in the transient calibration module according to the sampled result out to control the number of discharge resistors of the CANH and CANL drive branches, thereby changing the slope when the amplitudes of the CANH and CANL signals close from dominant to recessive, so that the closing times of the CANH and CANL signals are guaranteed to be consistent during the closing process.

2. The method according to claim 1, characterized in that, The performing of DC calibration through the DC calibration module after the chip is powered on includes: Taking out the common-mode voltages of CANH and CANL through resistors, comparing them with VCC / 2, and outputting a comparison result through a dynamic comparator; Sampling the comparison result through a SAR logic module and then outputting control logics MOSH<5:0> and MOSL<5:0> to control the number of current source transistors of the CANH and CANL drive branches, adjusting the DC voltages of CANH and CANL, so that CANH + CANL is equal to VCC, and completing the calibration of the DC voltage; Wherein, the DC calibration module includes: a resistor, a dynamic comparator and a SAR logic module that are electrically connected; The DC calibration includes the calibration of the DC voltage.

3. The method according to claim 1, wherein Also includes: After calibration is completed, disconnect the switches connecting CANH and CANL to the DC calibration module and the transient calibration module, and turn off the DC calibration module and the transient calibration module.

4. A device for improving the symmetry of the CAN bus, characterized in that, Includes: A DC calibration module for performing DC calibration after the chip is powered on; A transient calibration module for performing transient calibration after DC calibration is completed; Performing transient calibration through the transient calibration module after DC calibration is completed, includes: After DC calibration is completed, perform calibration for the transition from recessive to dominant and calibration for the transition from dominant to recessive through the transient calibration module; Among them, the transient calibration includes: calibration for the transition from recessive to dominant and calibration for the transition from dominant to recessive; After DC calibration is completed, perform calibration for the transition from recessive to dominant through the transient calibration module, includes: When the CANH and CANL signals are connected to the transient calibration module, compare the CANH and CANL signals with VTH_CH and VTH_CL respectively through the comparator in the transient calibration module, output the comparison results outh and outl, and use outl to sample outh to obtain the sampling result out, where VTH_CH is the high-side threshold voltage for dominant transition, and VTH_CL is the low-side threshold voltage for dominant transition; Output control logics CH<5:0> and CL<5:0> according to the sampling result out through the logic in the transient calibration module to control the number of charging capacitors in the CANH and CANL drive branches, thereby changing the slope when the CANH and CANL signals transition from recessive to dominant with an amplitude opening, so that the opening times of the CANH and CANL signals are consistent during the opening process; After DC calibration is completed, perform calibration for the transition from dominant to recessive through the transient calibration module, includes: When the CANH and CANL signals are connected to the transient calibration module, compare the CANH and CANL signals with VTH_RH and VTH_RL respectively through the comparator in the transient calibration module, output the comparison results outh and outl, and use outl to sample outh to obtain the sampling result out, where VTH_RH is the high-side threshold voltage for recessive transition, and VTH_RL is the low-side threshold voltage for recessive transition; Output control logics RH<5:0> and RL<5:0> according to the sampled result out through the logic in the transient calibration module to control the number of discharge resistors in the CANH and CANL drive branches, thereby changing the slope when the CANH and CANL signals transition from dominant to recessive with an amplitude closing, so that the closing times of the CANH and CANL signals are guaranteed to be consistent during the closing process.

5. The device according to claim 4, characterized in that, The DC calibration module includes: a resistor, a dynamic comparator, and a SAR logic module connected electrically; The resistor is used to extract the common-mode voltages of CANH and CANL; The dynamic comparator is used to compare the common-mode voltages of CANH and CANL with VCC / 2 and output a comparison result; The SAR logic module is used to output control logic for MOSH<5:0> and MOSL<5:0> after sampling the comparison result, controlling the number of current source transistors in the CANH and CANL drive branches, adjusting the DC voltages of CANH and CANL, and making CANH + CANL equal to VCC to complete the calibration of the DC voltage.

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