Photoelectric detection chips, distance sensors and electronic devices

Abstract

The present application provides a photodetection chip, a distance sensor and an electronic device. The photodetection chip includes a substrate, a first sub-chip, an N-electrode layer, and a second sub-chip. The first sub-chip is arranged on one side of the substrate. The N-electrode layer is arranged on the side of the first sub-chip away from the substrate. The second sub-chip is arranged on the side of the N-electrode layer away from the substrate. Among them, the first sub-chip and the second sub-chip both transmit carriers through the N-electrode layer. The present application provides a photodetection chip, a distance sensor and an electronic device. By using two sub-chips to share the N-electrode layer, each using a sub-P-electrode layer to output separately, and then converging the electrical signal to the total P-electrode output, the responsivity output of the photodetection chip becomes the sum of the responsivities of the two chips while using a single chip with unchanged quantum efficiency, thereby improving the responsivity of the photodetection chip and thus improving the detection sensitivity of the photodetection chip.

Description

Technical Field

[0001] The present application belongs to the field of chip technology, and specifically relates to photoelectric detection chips, distance sensors and electronic equipment. Background Art

[0002] With the development of science and technology, electronic devices with photoelectric detection functions are increasingly widely used. For example, distance sensors in electronic devices include photoelectric detection chips to achieve distance sensing. Especially when used in high-speed data centers, especially in data center optical communications with rates of 800G and 1.6T and above, photoelectric detection chips need to have both large bandwidth and large responsiveness. However, the photoelectric detection chips in related technologies have low quantum efficiency and low responsiveness, resulting in low detection sensitivity of the photoelectric detection chips. Summary of the invention

[0003] In view of this, the first aspect of the present application provides a photoelectric detection chip, the photoelectric detection chip comprising:

[0004] substrate;

[0005] A first sub-chip, disposed on one side of the substrate;

[0006] An N-electrode layer is provided on a side of the first sub-chip facing away from the substrate; and

[0007] A second sub-chip is arranged on a side of the N-electrode layer away from the substrate;

[0008] Wherein, both the first sub-chip and the second sub-chip transmit carriers through the N-electrode layer.

[0009] The first sub-chip comprises a first sub-P electrode layer and a first light absorption layer which are sequentially stacked along the arrangement direction from the substrate to the N electrode layer;

[0010] The second sub-chip includes a second light absorption layer and a second sub-P electrode layer which are sequentially stacked along an arrangement direction from the substrate to the N electrode layer.

[0011] The first sub-chip further includes a first transition layer disposed between the first sub-P electrode layer and the first light absorbing layer, and the bandgap width of the first transition layer is greater than the bandgap width of the first light absorbing layer;

[0012] The second sub-chip further includes a second transition layer disposed between the second light absorbing layer and the second sub-P-electrode layer, and the bandgap width of the second transition layer is greater than the bandgap width of the second light absorbing layer.

[0013] Wherein, the first sub-chip further includes a first cutoff layer disposed between the first sub-P electrode layer and the first transition layer, and the first cutoff layer is used to protect the first sub-P electrode layer;

[0014] The second sub-chip further includes a second cutoff layer disposed between the N-electrode layer and the second light absorbing layer, wherein the second cutoff layer is used to protect the N-electrode layer.

[0015] Wherein, the photoelectric detection chip satisfies at least one of the following conditions:

[0016] The substrate is an InP layer, and the substrate is also doped with Fe;

[0017] The first sub-P electrode layer is an InGaAs layer, and the first sub-P electrode layer is further doped with Be or C;

[0018] The first cutoff layer is an InP layer, and the first cutoff layer is further doped with Be or C;

[0019] The first transition layer is an InAlAs layer and / or an InAlGaAs layer, and the first transition layer is further doped with Be or C;

[0020] The first light absorbing layer is an InGaAs layer, and the first light absorbing layer is further doped with Be or C;

[0021] The N electrode layer is an InGaAs layer, and the N electrode layer is further doped with Si;

[0022] The second cutoff layer is an InP layer, and the second cutoff layer is further doped with Si;

[0023] The second light absorbing layer is an InGaAs layer, and the second light absorbing layer is further doped with Be or C;

[0024] The second transition layer is an InAlAs layer and / or an InAlGaAs layer, and the second transition layer is further doped with Be or C;

[0025] The second P-sub electrode layer is an InGaAs layer, and the second P-sub electrode layer is further doped with Be or C.

[0026] Wherein, the photoelectric detection chip satisfies at least one of the following conditions:

[0027] The doping concentration of the first sub-P electrode layer is greater than 3.0×10 18 cm -3 ;

[0028] The doping concentration of the first cut-off layer is greater than 1.0×10 18 cm -3 ;

[0029] The doping concentration of the first transition layer is greater than 3.0×10 18 cm -3 ;

[0030] The doping concentration of the first light absorbing layer is greater than 5.0×10 17 cm -3 ;

[0031] The doping concentration of the N electrode layer is greater than 1.0×10 18 cm -3 ;

[0032] The doping concentration of the second cut-off layer is greater than 1.0×10 18 cm -3 ;

[0033] The doping concentration of the second light absorbing layer is greater than 5.0×10 17 cm -3 ;

[0034] The doping concentration of the second transition layer is greater than 3.0×10 18 cm -3 ;

[0035] The doping concentration of the second sub-P electrode layer is greater than 3.0×10 18 cm -3 .

[0036] Wherein, the photoelectric detection chip satisfies at least one of the following conditions:

[0037] The thickness of the substrate is 300 μm to 400 μm;

[0038] The thickness of the first sub-P electrode layer is 0.05 μm to 0.20 μm;

[0039] The thickness of the first cutoff layer is 0.01 μm to 0.10 μm;

[0040] The thickness of the first transition layer is 0.30 μm to 2.10 μm;

[0041] The thickness of the first light absorbing layer is 0.30 μm to 0.90 μm;

[0042] The thickness of the N-electrode layer is 0.30 μm to 1.00 μm;

[0043] The thickness of the second cutoff layer is 0.01 μm to 1.00 μm;

[0044] The thickness of the second light absorbing layer is 0.30 μm to 0.90 μm;

[0045] The thickness of the second transition layer is 0.30 μm to 2.10 μm;

[0046] The thickness of the second P-sub electrode layer is 0.05 μm-0.20 μm.

[0047] The width of the first sub-P electrode layer is greater than the width of the N electrode layer, and the width of the N electrode layer is greater than the width of the second sub-P electrode layer; and the photoelectric detection chip satisfies at least one of the following conditions:

[0048] The width of the first sub-P electrode layer is 22 μm-70 μm;

[0049] The width of the N electrode layer is 19 μm-60 μm;

[0050] The width of the second P-sub electrode layer is 14 μm-30 μm.

[0051] The first light absorbing layer comprises a first sub-light absorbing layer, a second sub-light absorbing layer, and a third sub-light absorbing layer which are sequentially stacked along the arrangement direction from the substrate to the N-electrode layer, the doping concentration of the first sub-light absorbing layer is greater than the doping concentration of the second sub-light absorbing layer, and the doping concentration of the second sub-light absorbing layer is greater than the doping concentration of the third sub-light absorbing layer;

[0052] The second light absorption layer includes a fourth sub-light absorption layer, a fifth sub-light absorption layer, and a sixth sub-light absorption layer which are sequentially stacked along the arrangement direction from the substrate to the N-electrode layer, the doping concentration of the fourth sub-light absorption layer is less than the doping concentration of the fifth sub-light absorption layer, and the doping concentration of the fifth sub-light absorption layer is less than the doping concentration of the sixth sub-light absorption layer.

[0053] Wherein, the doping concentration of the first light absorption layer is greater than 5.0×10 18 cm -3 The doping concentration of the second light absorbing layer is 3.0×10 18 cm -3 ~5.0×10 18 cm -3 The doping concentration of the third light absorption layer is 5.0×10 17 cm -3 ~3.0×10 18 cm -3 ;

[0054] The doping concentration of the fourth light absorption sub-layer is 5.0×10 17 cm -3 ~3.0×10 18 cm -3 The doping concentration of the fifth light absorption layer is 3.0×1018 cm -3 ~5.0×10 18 cm -3 The doping concentration of the sixth light absorption layer is greater than 5.0×10 18 cm -3 .

[0055] The thickness of the first sub-light absorbing layer, the second sub-light absorbing layer, the third sub-light absorbing layer, the fourth sub-light absorbing layer, the fifth sub-light absorbing layer and the sixth sub-light absorbing layer are all 0.10 μm to 0.30 μm.

[0056] The first transition layer includes a first sub-transition layer and a second sub-transition layer stacked in sequence along the arrangement direction from the substrate to the N-electrode layer, the bandgap width of the first sub-transition layer is greater than the bandgap width of the second sub-transition layer, and the bandgap width of the second sub-transition layer is greater than the bandgap width of the first light absorption layer;

[0057] The second transition layer includes a third sub-transition layer and a fourth sub-transition layer stacked in sequence along the arrangement direction from the substrate to the N-electrode layer. The bandgap width of the fourth sub-transition layer is greater than the bandgap width of the third sub-transition layer, and the bandgap width of the third sub-transition layer is greater than the bandgap width of the second light absorption layer.

[0058] The doping concentrations of the first transition layer, the second transition layer, the third transition layer, and the fourth transition layer are all greater than 3.0×10 18 cm -3 .

[0059] The thickness of the first sub-transition layer and the fourth sub-transition layer are both 0.30 μm to 2.00 μm; the thickness of the second sub-transition layer and the third sub-transition layer are both 0.01 μm to 0.05 μm.

[0060] Among them, the photoelectric detection chip also includes a passivation layer and an anti-reflection layer, the passivation layer covers the substrate, the first sub-chip, the N-electrode layer, and the second sub-chip, the passivation layer has a through hole exposing at least part of the second sub-P-electrode layer, and the anti-reflection layer is arranged in the through hole.

[0061] Among them, the photodetection chip also includes a total N electrode part and a total P electrode part arranged on the side of the passivation layer away from the substrate, the total N electrode part is electrically connected to the N electrode layer, and the total P electrode part is electrically connected to the first sub-P electrode layer and the second sub-P electrode layer.

[0062] Wherein, the photoelectric detection chip satisfies at least one of the following conditions:

[0063] The width of the anti-reflection layer is smaller than the width of the second sub-P electrode layer, and the width of the anti-reflection layer is 12 μm-20 μm;

[0064] The N-electrode layer is electrically connected to the total N-electrode portion through a first lead, and the width of the first lead is 5 μm to 30 μm;

[0065] The width of the total N-electrode portion is 50 μm to 100 μm, and the length of the total N-electrode portion is 50 μm to 300 μm;

[0066] The first sub-P electrode layer and the second sub-P electrode layer are electrically connected to the total P electrode portion through second leads, respectively, and the width of the second lead is 5 μm to 20 μm;

[0067] The width of the total P-electrode portion is 50 μm to 100 μm, and the length of the total P-electrode portion is 50 μm to 300 μm.

[0068] Wherein, the photoelectric detection chip further includes a reflective layer, and the reflective layer is arranged between the substrate and the first sub-chip, and the reflective layer is used to reflect light to the first sub-chip and the second sub-chip.

[0069] Among them, the reflective layer includes a stacked structure stacked in sequence along the arrangement direction from the substrate to the N-electrode layer, each of the stacked structures includes a low refractive index layer and a high refractive index layer farther away from the substrate than the low refractive index layer, and the number of the stacked structures is 15 to 25.

[0070] Wherein, the reflective layer satisfies at least one of the following conditions:

[0071] The low refractive index layer is an InP layer, and the refractive index of the low refractive index layer is 3.17;

[0072] The high refractive index layer is an InAlGaAs layer, and the refractive index of the high refractive index layer is 3.71;

[0073] The high refractive index layer is an InAlGaAs layer, and the InAlGaAs in the high refractive index layer satisfies: In x Al y Ga z As, where x=0.53, y=0.02, z=0.45;

[0074] The doping concentrations of the low refractive index layer and the high refractive index layer are both less than 5.0×10 15 cm -3 ;

[0075] The thickness of the low refractive index layer and the high refractive index layer are both 0.05 μm to 0.15 μm;

[0076] The width of the reflective layer is greater than the width of the first sub-chip, and the widths of the low refractive index layer and the high refractive index layer are both 25 μm-110 μm.

[0077] The responsivity of the photoelectric detection chip is greater than 0.7A / W, and the bandwidth of the photoelectric detection chip is greater than 40GHz.

[0078] The second aspect of the present application provides a distance sensor, which includes a transmitting chip and a photoelectric detection chip as provided in the first aspect of the present application, wherein the transmitting chip is used to transmit a detection signal, and the photoelectric detection chip is used to receive the detection signal and convert the detection signal into an electrical signal.

[0079] The third aspect of the present application provides an electronic device, which includes a display screen and a distance sensor as provided in the second aspect of the present application, wherein the distance sensor is arranged on one side of the display screen, the transmitting chip of the distance sensor transmits a detection signal toward the display screen, and the photoelectric detection chip of the distance sensor is used to receive the detection signal through the display screen.

[0080] The present application provides a photoelectric detection chip, a distance sensor and an electronic device. By adopting a method in which two sub-chips share an N-electrode layer, each of which uses a sub-P-electrode layer for output, and then converging the electrical signal to the total P-electrode output, the response output of the photoelectric detection chip becomes the sum of the response of the two chips while using a single chip with unchanged quantum efficiency, thereby improving the response of the photoelectric detection chip and thus improving the detection sensitivity of the photoelectric detection chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0081] In order to more clearly illustrate the technical solutions in the implementation modes of the present application, the drawings required for use in the implementation modes of the present application will be described below.

[0082] Figure 1 A schematic diagram of the structure of a photodetection chip provided in one embodiment of the present application Figure 1 .

[0083] Figure 2 A schematic diagram of the structure of a photodetection chip provided in one embodiment of the present application Figure 2 .

[0084] Figure 3 A schematic diagram of the structure of a photodetection chip provided in one embodiment of the present application Figure 3 .

[0085] Figure 4A schematic diagram of the structure of a photodetection chip provided in one embodiment of the present application Figure 4 .

[0086] Figure 5 A schematic diagram of the structure of a photodetection chip provided in one embodiment of the present application Figure 5 .

[0087] Figure 6 A top view of a photodetection chip provided in accordance with an embodiment of the present application.

[0088] Figure 7 For this application Figure 6 A cross-sectional view of the photodetection chip along the AA direction in the embodiment.

[0089] Figure 8 For this application Figure 6 A cross-sectional view of the photoelectric detection chip along the BB direction in the embodiment.

[0090] Description of reference numerals: photodetection chip 1, substrate 11, first sub-chip 12, first sub-P electrode layer 121, first cutoff layer 122, first transition layer 123, first sub-transition layer 1231, second sub-transition layer 1232, first light absorption layer 124, first sub-light absorption layer 1241, second sub-light absorption layer 1242, third sub-light absorption layer 1243, N electrode layer 13, second sub-chip 14, second cutoff layer 141, second light absorption layer 14 2, fourth sub-light absorption layer 1421, fifth sub-light absorption layer 1422, sixth sub-light absorption layer 1423, second transition layer 143, third sub-transition layer 1431, fourth sub-transition layer 1432, second sub-P electrode layer 144, passivation layer 15, anti-reflection layer 16, total N electrode part 17, first lead 171, total P electrode part 18, second lead 181, reflective layer 19, stacked structure 190, low refractive index layer 191, high refractive index layer 192. DETAILED DESCRIPTION

[0091] The following are preferred implementations of the present application. It should be noted that, for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application, and these improvements and modifications are also considered to be within the scope of protection of the present application.

[0092] Unless otherwise specified or there is a contradiction, the terms and phrases used in this application have the following meanings:

[0093] In this application, "first", "second", etc. are used only for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features.

[0094] In this application, "one or several" refers to any one, any two or more of the listed items. Among them, "several" refers to any two or more of the listed items.

[0095] In the present application, it is necessary to understand that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0096] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be connected, detachably connected, or integrated. It can be mechanically connected or electrically connected. It can be directly connected or indirectly connected through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0097] The following is an introduction to the photoelectric detection chip of the related technology. In the photoelectric detection chip used for low-speed 2.5G rates or below, the thickness of the light absorption layer of the chip is relatively large, usually the thickness of the light absorption layer is greater than 2μm and the light absorption layer is usually an undoped intrinsic semiconductor layer. Such a photoelectric detection chip has a low responsiveness, resulting in a low detection sensitivity of the photoelectric detection chip.

[0098] In photoelectric detection chips that require bandwidths greater than 30 GHz, in order to obtain high bandwidth, the thickness of the light absorption layer is compressed to less than 0.5 μm, resulting in a quantum efficiency of the photoelectric detection chip of less than 20% and a low responsivity, which can be as low as 0.21 A / W. Low quantum efficiency and low responsivity directly affect the detection sensitivity of the photoelectric detection chip, resulting in a low detection sensitivity of the photoelectric detection chip. Therefore, how to improve the overall quantum efficiency and responsivity of the photoelectric detection chip while ensuring that the bandwidth of the photoelectric detection chip is sufficient is an urgent problem to be solved.

[0099] Please refer to Figure 1This embodiment provides a photodetection chip 1, which includes a substrate 11, a first sub-chip 12, an N-electrode layer 13, and a second sub-chip 14. The first sub-chip 12 is disposed on one side of the substrate 11, the N-electrode layer 13 is disposed on the side of the first sub-chip 12 away from the substrate 11, and the second sub-chip 14 is disposed on the side of the N-electrode layer 13 away from the substrate 11. The first sub-chip 12 and the second sub-chip 14 both transmit carriers through the N-electrode layer 13.

[0100] Among them, the photoelectric detection chip 1 can be used in intelligent driving, sweeping robots, mobile phones, tablet computers, laptop computers, PDAs, personal computers (PC), personal digital assistants (PDA), portable media players (PMP), headphones, cameras, smart wearable devices, smart screens, display screens, wind power generation equipment and other equipment. For example, the photoelectric detection chip 1 can be used for ranging and obstacle avoidance in intelligent driving; or ranging and obstacle avoidance of sweeping robots; or proximity sensing of mobile phones, tablet computers, laptop computers, PDAs, PCs, PDAs, smart wearable devices, smart screens, display screens, and portable media players; or earphones for in-ear detection; or camera atmospheric detection, or the photoelectric detection chip 1 composed of an array can realize the camera's photo function; or deformation detection of wind turbine blades in wind power generation equipment, etc. It can be understood that the above-mentioned application fields of the photoelectric detection chip 1 should not be understood as a limitation on the photoelectric detection chip 1 provided in the embodiment of the present application.

[0101] The substrate 11 is the base of the photodetection chip 1, and is used to carry other film layers in the photodetection chip 1. The substrate 11 is an InP layer, and the substrate 11 is also doped with Fe. In other words, the material of the substrate 11 is InP, and it is doped with Fe. By doping Fe in InP, the substrate 11 can be made insulating. In addition, the InP layer is used as the material of the epitaxial growth substrate. Since the lattice of InGaAs can be completely matched with the InP material, high-quality InGaAs material can be generated, which is beneficial to improving the reliability of the photodetection chip 1. The thickness of the substrate 11 is 300μm~400μm. Specifically, for example, the thickness of the substrate 11 can be 300μm, or 320μm, or 350μm, or 370μm, or 400μm, etc.

[0102] It should be noted that the thickness of each film layer can be understood as the thickness along the arrangement direction from the substrate 11 to the first sub-chip 12 (eg Figure 1The film layer size in the axial direction (as shown in the middle direction D1), or the film layer size in the axial direction of the photoelectric detection chip 1. The width of each film layer can be understood as the width of the film layer along the arrangement direction perpendicular to the substrate 11 to the first sub-chip 12 (as shown in the middle direction D1). Figure 1 The film layer size in the radial direction (as shown in the middle direction D2), or in other words, the film layer size of the photoelectric detection chip 1 in the radial direction.

[0103] The N-electrode layer 13 is used to transfer carriers and is also used to electrically connect the total N-electrode portion 17. The N-electrode layer 13 is provided between the first sub-chip 12 and the second sub-chip 14, and the first sub-chip 12 and the second sub-chip 14 are both electrically connected to the N-electrode layer 13. The N-electrode layer 13 is an InGaAs layer, and the N-electrode layer 13 is also doped with Si. The doping concentration of the N-electrode layer 13 is greater than 1.0×10 18 cm -3 Specifically, for example, the doping concentration of the N electrode layer 13 can be 1.2×10 18 cm -3 , or 1.5 × 10 18 cm -3 , or 2.0×10 18 cm -3 , or 2.5 × 10 18 cm -3 , or 3.0×10 18 cm -3 By using a specific doping concentration of Be or C in the InGaAs layer, the ability of the N-electrode layer 13 to transport carriers can be improved, thereby improving the reliability of the photodetection chip 1. The N-electrode layer 13 can also be understood as an N-type doped InGaAs epitaxial layer. The thickness of the N-electrode layer 13 is 0.30 μm to 1.00 μm. Specifically, for example, the thickness of the N-electrode layer 13 can be 0.30 μm, or 0.40 μm, or 0.50 μm, or 0.60 μm, or 0.70 μm, or 0.80 μm, or 0.90 μm, or 1.00 μm, etc.

[0104] The first sub-chip 12, the N-electrode layer 13, and the second sub-chip 14 are stacked in sequence on the substrate 11. The first sub-chip 12 and the second sub-chip 14 share the N-electrode layer 13, and the first sub-chip 12 and the second sub-chip 14 can transmit carriers through the N-electrode layer 13, so that when the quantum efficiency of a single chip remains unchanged, the responsivity output of the photodetection chip 1 becomes the sum of the responsivities of the two chips, thereby improving the responsivity of the photodetection chip 1, and further improving the detection sensitivity of the photodetection chip 1.

[0105] If the thickness of the first light absorption layer 124 of the first sub-chip 12 is d1 and the reflectivity r of the incident surface of the photodetection chip 1 is constant, the responsivity of the first sub-chip 12 is: Re1=(q / hν)×(1–r)×(1–e –αd1 ). If the thickness of the second light absorption layer 142 of the second sub-chip 14 is d2, and the reflectivity r of the incident surface of the photodetection chip 1 is constant, the responsivity of the second sub-chip 14 is: Re2=(q / hν)×(1–r)×(1–e –αd2 ), then the total chip responsivity Re of the first sub-chip 12 and the second sub-chip 14, that is, the overall responsivity Re of the photodetection chip 1 is: Re=Re1+Re2. Wherein, q represents the charge of a single electron. h represents Planck's constant, ν represents the frequency of the incident photon, and α represents the absorption coefficient of the chip material to light.

[0106] The specific structure of the photoelectric detection chip 1 is introduced below. Figure 2 The first sub-chip 12 includes a first sub-P electrode layer 121 and a first light absorption layer 124 which are sequentially stacked along the arrangement direction from the substrate 11 to the N electrode layer 13. The second sub-chip 14 includes a second light absorption layer 142 and a second sub-P electrode layer 144 which are sequentially stacked along the arrangement direction from the substrate 11 to the N electrode layer 13.

[0107] The first sub-P electrode layer 121, the first light absorption layer 124, the N electrode layer 13, the second light absorption layer 142, and the second sub-P electrode layer 144 are stacked in sequence on the substrate 11. Specifically, when the photodetection chip 1 is working, the first light absorption layer 124 and the second light absorption layer 142 can both convert the detection signal as light energy into electrical energy, and generate electrons and holes. In the first sub-chip 12, the electrons and holes drift under the action of the electric field formed by the first sub-P electrode layer 121 and the N electrode layer 13, thereby forming a first sensing current, which is output to the total P electrode part 18 through the first sub-P electrode layer 121. In the second sub-chip 14, the electrons and holes drift under the action of the electric field formed by the second sub-P electrode layer 144 and the N electrode layer 13, thereby forming a second sensing current, which is output to the total P electrode part 18 through the second sub-P electrode layer 144.

[0108] The first sub-P electrode layer 121 is used to transmit carriers and is also used to electrically connect the main P electrode portion 18. The first sub-P electrode layer 121 is disposed on one side of the substrate 11. For example, the first sub-P electrode layer 121 is directly disposed on the surface of the substrate 11, or there is another film layer between the first sub-P electrode layer 121 and the substrate 11, and the first sub-P electrode layer 121 is indirectly disposed on one side of the substrate 11. The first sub-P electrode layer 121 is an InGaAs layer, and the first sub-P electrode layer 121 is also doped with Be or C. The doping concentration of the first sub-P electrode layer 121 is greater than 3.0×10 18 cm -3 Specifically, for example, the doping concentration of the first P-sub electrode layer 121 may be 3.2×10 18 cm -3 , or 3.5 × 10 18 cm -3 , or 3.7 × 10 18 cm -3 , or 4.0×10 18 cm -3 , or 4.5 × 10 18 cm -3 By using a specific doping concentration of Be or C in the InGaAs layer, the ability of the first sub-P electrode layer 121 to transport carriers can be improved, thereby improving the reliability of the photodetection chip 1. The first sub-P electrode layer 121 can also be understood as a P-type doped InGaAs epitaxial layer. The thickness of the first sub-P electrode layer 121 is 0.05μm~0.20μm. Specifically, for example, the thickness of the first sub-P electrode layer 121 can be 0.05μm, or 0.07μm, or 0.1μm, or 0.12μm, or 0.15μm, or 0.17μm, or 0.20μm, etc.

[0109] The first light absorption layer 124 is used to convert the absorbed light energy into electrical energy. In the photodetection chip 1, the first light absorption layer 124 is used to receive the detection signal. The first light absorption layer 124 is arranged on the side of the first sub-P electrode layer 121 away from the substrate 11. For example, the first light absorption layer 124 is directly arranged on the surface of the first sub-P electrode layer 121, or there are other film layers between the first light absorption layer 124 and the first sub-P electrode layer 121, and the first light absorption layer 124 is indirectly arranged on one side of the first sub-P electrode layer 121. The first light absorption layer 124 is an InGaAs layer, and the first light absorption layer 124 is also doped with Be or C. The doping concentration of the first light absorption layer 124 is greater than 5.0×10 17 cm -3 Specifically, for example, the doping concentration of the first light absorbing layer 124 may be 5.2×10 17 cm -3 , or 6.0×10 17 cm-3 , or 7.0×10 17 cm -3 , or 8.0×10 17 cm -3 , or 9.0×10 17 cm -3 By using a specific doping concentration of Be or C in the InGaAs layer, the performance of the first light absorption layer 124 in converting light energy into electrical energy can be improved, thereby improving the responsiveness of the photodetection chip 1. The first light absorption layer 124 can also be understood as a P-type doped InGaAs epitaxial layer. The thickness of the first light absorption layer 124 is 0.30 μm to 0.90 μm. Specifically, for example, the thickness of the first light absorption layer 124 can be 0.30 μm, or 0.40 μm, or 0.50 μm, or 0.60 μm, or 0.70 μm, or 0.80 μm, or 0.90 μm, etc.

[0110] In one embodiment, please refer to Figure 7 and Figure 8 The first light absorbing layer 124 includes a first sub-light absorbing layer 1241, a second sub-light absorbing layer 1242, and a third sub-light absorbing layer 1243 which are sequentially stacked along the arrangement direction from the substrate 11 to the N-electrode layer 13, the doping concentration of the first sub-light absorbing layer 1241 is greater than the doping concentration of the second sub-light absorbing layer 1242, and the doping concentration of the second sub-light absorbing layer 1242 is greater than the doping concentration of the third sub-light absorbing layer 1243.

[0111] The first sub-light absorbing layer 1241, the second sub-light absorbing layer 1242, and the third sub-light absorbing layer 1243 are all InGaAs layers, and the first sub-light absorbing layer 1241, the second sub-light absorbing layer 1242, and the third sub-light absorbing layer 1243 are all doped with Be or C. The first sub-light absorbing layer 1241 can be understood as a heavily doped epitaxial layer, the second sub-light absorbing layer 1242 can be understood as a medium-doped epitaxial layer, and the third sub-light absorbing layer 1243 can be understood as a lightly doped epitaxial layer. From the first sub-light absorbing layer 1241 to the third sub-light absorbing layer 1243, the doping concentration of the doping element in the first light absorbing layer 124 gradually decreases.

[0112] The doping concentration of the first light absorption sub-layer 1241 is greater than 5.0×10 18 cm -3 Specifically, for example, the doping concentration of the first light absorption sub-layer 1241 may be 5.2×10 18 cm -3 , or 5.5 × 10 18 cm -3 , or 6.5 × 10 18 cm-3 , or 7.0×10 18 cm -3 The thickness of the first light absorbing sub-layer 1241 is 0.10 μm to 0.30 μm. Specifically, for example, the thickness of the first light absorbing sub-layer 1241 may be 0.10 μm, or 0.15 μm, or 0.20 μm, or 0.25 μm, or 0.30 μm, etc.

[0113] The doping concentration of the second light absorption sub-layer 1242 is 3.0×10 18 cm -3 ~5.0×10 18 cm -3 Specifically, for example, the doping concentration of the second light absorption sub-layer 1242 may be 3.0×10 18 cm -3 , or 3.5 × 10 18 cm -3 , or 4.0×10 18 cm -3 , or 4.5 × 10 18 cm -3 , or 5.0×10 18 cm -3 The thickness of the second light absorbing sub-layer 1242 is 0.10 μm to 0.30 μm. Specifically, for example, the thickness of the second light absorbing sub-layer 1242 may be 0.10 μm, 0.15 μm, 0.20 μm, 0.25 μm, 0.30 μm, etc.

[0114] The doping concentration of the third light absorption sub-layer 1243 is 5.0×10 17 cm -3 ~3.0×10 18 cm -3 Specifically, for example, the doping concentration of the third light absorption sub-layer 1243 may be 5.0×10 17 cm -3 , or 8.0×10 17 cm -3 , or 1.0×10 18 cm -3 , or 2.0×10 18 cm -3 , or 3.0×10 18 cm -3 The thickness of the third light absorbing sub-layer 1243 is 0.10 μm to 0.30 μm. Specifically, for example, the thickness of the third light absorbing sub-layer 1243 may be 0.10 μm, or 0.15 μm, or 0.20 μm, or 0.25 μm, or 0.30 μm.

[0115] In this embodiment, the internal electric field of the first sub-chip 12 is increased by performing P-type step doping on the first light absorption layer 124, thereby increasing the bandwidth of the photodetection chip 1 and improving the detection performance of the photodetection chip 1. In addition, by limiting the thickness of the first sub-light absorption layer 1241, the second sub-light absorption layer 1242, and the third sub-light absorption layer 1243 to 0.10 μm to 0.30 μm, the drift time of the carriers is reduced, thereby further improving the detection performance of the photodetection chip 1.

[0116] The second light absorption layer 142 is used to convert the absorbed light energy into electrical energy. In the photodetection chip 1, the second light absorption layer 142 is used to receive the detection signal. The second light absorption layer 142 is arranged on the side of the N-electrode layer 13 away from the substrate 11. For example, the second light absorption layer 142 is directly arranged on the surface of the N-electrode layer 13, or there are other film layers between the second light absorption layer 142 and the N-electrode layer 13, and the second light absorption layer 142 is indirectly arranged on one side of the N-electrode layer 13. The second light absorption layer 142 is an InGaAs layer, and the second light absorption layer 142 is also doped with Be or C. The doping concentration of the second light absorption layer 142 is greater than 5.0×10 17 cm -3 Specifically, for example, the doping concentration of the second light absorbing layer 142 may be 5.2×10 17 cm -3 , or 6.0×10 17 cm -3 , or 7.0×10 17 cm -3 , or 8.0×10 17 cm -3 , or 9.0×10 17 cm -3 By using a specific doping concentration of Be or C in the InGaAs layer, the performance of the second light absorption layer 142 in converting light energy into electrical energy can be improved, thereby improving the responsiveness of the photodetection chip 1. The second light absorption layer 142 can also be understood as a P-type doped InGaAs epitaxial layer. The thickness of the second light absorption layer 142 is 0.30 μm to 0.90 μm. Specifically, for example, the thickness of the second light absorption layer 142 can be 0.30 μm, or 0.40 μm, or 0.50 μm, or 0.60 μm, or 0.70 μm, or 0.80 μm, or 0.90 μm, etc.

[0117] In one embodiment, please refer to Figure 7 and Figure 8The second light absorbing layer 142 includes a fourth sub-light absorbing layer 1421, a fifth sub-light absorbing layer 1422, and a sixth sub-light absorbing layer 1423 which are sequentially stacked along the arrangement direction from the substrate 11 to the N-electrode layer 13, the doping concentration of the fourth sub-light absorbing layer 1421 is less than the doping concentration of the fifth sub-light absorbing layer 1422, and the doping concentration of the fifth sub-light absorbing layer 1422 is less than the doping concentration of the sixth sub-light absorbing layer 1423.

[0118] The fourth sub-light absorption layer 1421, the fifth sub-light absorption layer 1422, and the sixth sub-light absorption layer 1423 are all InGaAs layers, and the fourth sub-light absorption layer 1421, the fifth sub-light absorption layer 1422, and the sixth sub-light absorption layer 1423 are all doped with Be or C. The fourth sub-light absorption layer 1421 can be understood as a lightly doped epitaxial layer, the fifth sub-light absorption layer 1422 can be understood as a medium-doped epitaxial layer, and the sixth sub-light absorption layer 1423 can be understood as a heavily doped epitaxial layer. From the fourth sub-light absorption layer 1421 to the sixth sub-light absorption layer 1423, the doping concentration of the doping element in the first light absorption layer 124 gradually increases.

[0119] The doping concentration of the fourth light absorbing sub-layer 1421 is 5.0×10 17 cm -3 ~3.0×10 18 cm -3 Specifically, for example, the doping concentration of the fourth light absorption sub-layer 1421 may be 5.0×10 17 cm -3 , or 8.0×10 17 cm -3 , or 1.0×10 18 cm -3 , or 2.0×10 18 cm -3 , or 3.0×10 18 cm -3 The thickness of the fourth light absorbing layer 1421 is 0.10 μm to 0.30 μm. Specifically, the thickness of the fourth light absorbing layer 1421 may be 0.10 μm, 0.15 μm, 0.20 μm, 0.25 μm, 0.30 μm, etc.

[0120] The doping concentration of the fifth light absorbing sub-layer 1422 is 3.0×10 18 cm -3 ~5.0×10 18 cm -3 Specifically, for example, the doping concentration of the fifth light absorbing sub-layer 1422 may be 3.0×10 18 cm -3, or 3.5 × 10 18 cm -3 , or 4.0×10 18 cm -3 , or 4.5 × 10 18 cm -3 , or 5.0×10 18 cm -3 The thickness of the fifth light absorbing sub-layer 1422 is 0.10 μm to 0.30 μm. Specifically, for example, the thickness of the fifth light absorbing sub-layer 1422 may be 0.10 μm, 0.15 μm, 0.20 μm, 0.25 μm, 0.30 μm, etc.

[0121] The doping concentration of the sixth light absorbing sub-layer 1423 is greater than 5.0×10 18 cm -3 Specifically, for example, the doping concentration of the sixth light absorption sub-layer 1423 may be 5.2×10 18 cm -3 , or 5.5 × 10 18 cm -3 , or 6.5 × 10 18 cm -3 , or 7.0 × 10 18 cm -3 The thickness of the sixth light absorbing sub-layer 1423 is 0.10 μm to 0.30 μm. Specifically, the thickness of the sixth light absorbing sub-layer 1423 may be 0.10 μm, 0.15 μm, 0.20 μm, 0.25 μm, 0.30 μm, etc.

[0122] In this embodiment, the internal electric field of the second sub-chip 14 is increased by performing P-type step doping on the second light absorption layer 142, thereby increasing the bandwidth of the photodetection chip 1 and improving the detection performance of the photodetection chip 1. In addition, by limiting the thickness of the fourth sub-light absorption layer 1421, the fifth sub-light absorption layer 1422, and the sixth sub-light absorption layer 1423 to 0.10 μm to 0.30 μm, the drift time of the carriers is reduced, thereby further improving the detection performance of the photodetection chip 1.

[0123] Optionally, the thickness of the first light absorption layer 124 is equal to the thickness of the second light absorption layer 142. Further optionally, the thicknesses of the first sub-light absorption layer 1241, the second sub-light absorption layer 1242, the third sub-light absorption layer 1243, the fourth sub-light absorption layer 1421, the fifth sub-light absorption layer 1422, and the sixth sub-light absorption layer 1423 are all equal. By limiting the thickness of the first light absorption layer 124 and the second light absorption layer 142 to be equal, the drift time of the entire photodetection chip 1 is equal to that of a single chip, and the drift time of the entire chip will not be increased due to the provision of the first sub-chip 12 and the second sub-chip 14, thereby improving the responsiveness of the photodetection chip 1 and improving the detection performance of the photodetection chip 1.

[0124] The second sub-P electrode layer 144 is used to transmit carriers and is also used to electrically connect the total P electrode portion 18. The second sub-P electrode layer 144 is disposed on the side of the second light absorbing layer 142 away from the substrate 11. For example, the second sub-P electrode layer 144 is directly disposed on the surface of the second light absorbing layer 142 away from the substrate 11, or there is another film layer between the second light absorbing layer 142 and the second sub-P electrode layer 144, and the second sub-P electrode layer 144 is indirectly disposed on one side of the second light absorbing layer 142. The second sub-P electrode layer 144 is an InGaAs layer, and the second sub-P electrode layer 144 is also doped with Be or C. The doping concentration of the second sub-P electrode layer 144 is greater than 3.0×10 18 cm -3 Specifically, for example, the doping concentration of the second P-sub electrode layer 144 may be 3.2×10 18 cm -3 , or 3.5 × 10 18 cm -3 , or 3.7 × 10 18 cm -3 , or 4.0×10 18 cm -3 , or 4.5 × 10 18 cm -3 By using a specific doping concentration of Be or C in the InGaAs layer, the ability of the second sub-P electrode layer 144 to transport carriers can be improved, thereby improving the reliability of the photodetection chip 1. The second sub-P electrode layer 144 can also be understood as a P-type doped InGaAs epitaxial layer. The thickness of the second sub-P electrode layer 144 is 0.05μm~0.20μm. Specifically, for example, the thickness of the second sub-P electrode layer 144 can be 0.05μm, or 0.07μm, or 0.1μm, or 0.12μm, or 0.15μm, or 0.17μm, or 0.20μm, etc.

[0125] In another embodiment, please refer to Figure 3The first sub-chip 12 also includes a first transition layer 123 arranged between the first sub-P electrode layer 121 and the first light absorption layer 124, and the bandgap width of the first transition layer 123 is greater than the bandgap width of the first light absorption layer 124; the second sub-chip 14 also includes a second transition layer 143 arranged between the second light absorption layer 142 and the second sub-P electrode layer 144, and the bandgap width of the second transition layer 143 is greater than the bandgap width of the second light absorption layer 142.

[0126] The bandgap width of the first transition layer 123 is greater than the bandgap width of the first light absorption layer 124, which can increase the bandwidth of the photodetection chip 1 and suppress the dark current of the photodetection chip 1. The first transition layer 123 is disposed between the first sub-P electrode layer 121 and the first light absorption layer 124. For example, the first transition layer 123 is directly disposed on the surface of the first sub-P electrode layer 121 and directly disposed on the surface of the first light absorption layer 124, or, there are other film layers between the first transition layer 123 and the first sub-P electrode layer 121, or, there are other film layers between the first transition layer 123 and the first light absorption layer 124. The first transition layer 123 is an InAlAs layer and / or an InAlGaAs layer, and the first transition layer 123 is also doped with Be or C. The doping concentration of the first transition layer 123 is greater than 3.0×10 18 cm -3 Specifically, for example, the doping concentration of the first transition layer 123 may be 3.2×10 18 cm -3 , or 3.5 × 10 18 cm -3 , or 4.0×10 18 cm -3 , or 4.5 × 10 18 cm -3 , or 5.0×10 18 cm -3 By using a specific doping concentration of Be or C in the InAlAs layer and / or the InAlGaAs layer, the ability of the first transition layer 123 to reduce dark current can be improved, and the bandwidth of the photodetection chip 1 can be improved. The first transition layer 123 can also be understood as a P-type doped InAlAs epitaxial layer and / or a P-type doped InAlGaAs epitaxial layer. The thickness of the first transition layer 123 is 0.30μm~2.10μm. Specifically, for example, the thickness of the first transition layer 123 can be 0.30μm, or 0.50μm, or 0.80μm, or 1.00μm, or 1.30μm, or 1.50μm, or 1.80μm, or 2.00μm, or 2.10μm, etc.

[0127] Among them, please refer to Figure 7 and Figure 8The first transition layer 123 includes a first sub-transition layer 1231 and a second sub-transition layer 1232 which are stacked in sequence along the arrangement direction from the substrate 11 to the N-electrode layer 13, the bandgap width of the first sub-transition layer 1231 is greater than the bandgap width of the second sub-transition layer 1232, and the bandgap width of the second sub-transition layer 1232 is greater than the bandgap width of the first light absorption layer 124.

[0128] The bandgap width of the first sub-transition layer 1231 is greater than the bandgap width of the second sub-transition layer 1232, which can suppress the dark current of the photodetection chip 1. The first sub-transition layer 1231 is an InAlAs layer, and the first sub-transition layer 1231 is also doped with Be or C. The first sub-transition layer 1231 can also be understood as a P-type doped InAlAs epitaxial layer. The bandgap width of the second sub-transition layer 1232 is greater than the bandgap width of the first light absorption layer 124, and can be used as a bandgap width transition to increase the bandwidth of the photodetection chip 1. The second sub-transition layer 1232 is an InAlGaAs layer, and the second sub-transition layer 1232 is also doped with Be or C. The second sub-transition layer 1232 can also be understood as a P-type doped InAlGaAs transition layer.

[0129] The doping concentration of the first transition sub-layer 1231 and the second transition sub-layer 1232 is greater than 3.0×10 18 cm -3 Specifically, for example, the doping concentrations of the first sub-transition layer 1231 and the second sub-transition layer 1232 can both be 3.2×10 18 cm -3 , or 3.5 × 10 18 cm -3 , or 4.0×10 18 cm -3 , or 4.5 × 10 18 cm -3 , or 5.0×10 18 cm -3 The thickness of the first sub-transition layer 1231 is 0.30 μm to 2.00 μm. Specifically, the thickness of the first sub-transition layer 1231 can be 0.30 μm, or 0.50 μm, or 0.80 μm, or 1.00 μm, or 1.30 μm, or 1.50 μm, or 1.80 μm, or 2.00 μm, etc. The thickness of the second sub-transition layer 1232 is 0.01 μm to 0.05 μm. Specifically, the thickness of the second sub-transition layer 1232 can be 0.01 μm, or 0.02 μm, or 0.03 μm, or 0.04 μm, or 0.05 μm, etc.

[0130] This embodiment can further increase the bandwidth of the photodetection chip 1, further suppress the dark current of the photodetection chip 1, and improve the detection performance of the photodetection chip 1 by setting a first sub-transition layer 1231 and a second sub-transition layer 1232 whose bandgap widths decrease successively along the direction close to the first light absorption layer 124.

[0131] The bandgap width of the second transition layer 143 is greater than the bandgap width of the second light absorption layer 142, which can increase the bandwidth of the photodetection chip 1 and suppress the dark current of the photodetection chip 1. The second transition layer 143 is arranged between the second sub-P electrode layer 144 and the second light absorption layer 142. For example, the second transition layer 143 is directly arranged on the surface of the second sub-P electrode layer 144 and directly arranged on the surface of the second light absorption layer 142, or, there are other film layers between the second transition layer 143 and the second sub-P electrode layer 144, or, there are other film layers between the second transition layer 143 and the second light absorption layer 142. The second transition layer 143 is an InAlAs layer and / or an InAlGaAs layer, and the second transition layer 143 is also doped with Be or C. The doping concentration of the second transition layer 143 is greater than 3.0×10 18 cm -3 Specifically, for example, the doping concentration of the second transition layer 143 may be 3.2×10 18 cm -3 , or 3.5 × 10 18 cm -3 , or 4.0×10 18 cm -3 , or 4.5 × 10 18 cm -3 , or 5.0×10 18 cm -3 By using a specific doping concentration of Be or C in the InAlAs layer and / or the InAlGaAs layer, the ability of the second transition layer 143 to reduce dark current can be improved, and the bandwidth of the photodetection chip 1 can be improved. The second transition layer 143 can also be understood as a P-type doped InAlAs epitaxial layer and / or a P-type doped InAlGaAs epitaxial layer. The thickness of the second transition layer 143 is 0.30μm~2.10μm. Specifically, for example, the thickness of the second transition layer 143 can be 0.30μm, or 0.50μm, or 0.80μm, or 1.00μm, or 1.30μm, or 1.50μm, or 1.80μm, or 2.00μm, or 2.10μm, etc.

[0132] Among them, please refer to Figure 7 and Figure 8The second transition layer 143 includes a third sub-transition layer 1431 and a fourth sub-transition layer 1432 which are stacked in sequence along the arrangement direction from the substrate 11 to the N-electrode layer 13, the bandgap width of the fourth sub-transition layer 1432 is greater than the bandgap width of the third sub-transition layer 1431, and the bandgap width of the third sub-transition layer 1431 is greater than the bandgap width of the second light absorption layer 142.

[0133] The bandgap width of the third sub-transition layer 1431 is greater than the bandgap width of the second light absorption layer 142, and can be used as a bandgap width transition to increase the bandwidth of the photodetection chip 1. The third sub-transition layer 1431 is an InAlGaAs layer, and the third sub-transition layer 1431 is also doped with Be or C. The third sub-transition layer 1431 can also be understood as a P-type doped InAlGaAs transition layer. The bandgap width of the fourth sub-transition layer 1432 is greater than the bandgap width of the third sub-transition layer 1431, and can suppress the dark current of the photodetection chip 1. The fourth sub-transition layer 1432 is an InAlAs layer, and the fourth sub-transition layer 1432 is also doped with Be or C. The fourth sub-transition layer 1432 can also be understood as a P-type doped InAlAs epitaxial layer.

[0134] The doping concentration of the third sub-transition layer 1431 and the fourth sub-transition layer 1432 is greater than 3.0×10 18 cm -3 Specifically, for example, the doping concentrations of the third transition sub-layer 1431 and the fourth transition sub-layer 1432 can both be 3.2×10 18 cm -3 , or 3.5 × 10 18 cm -3 , or 4.0×10 18 cm -3 , or 4.5 × 10 18 cm -3 , or 5.0×10 18 cm -3 The thickness of the third sub-transition layer 1431 is 0.01 μm to 0.05 μm. Specifically, the thickness of the third sub-transition layer 1431 can be 0.01 μm, 0.02 μm, 0.03 μm, 0.04 μm, 0.05 μm, etc. The thickness of the fourth sub-transition layer 1432 is 0.30 μm to 2.00 μm. Specifically, the thickness of the fourth sub-transition layer 1432 can be 0.30 μm, 0.50 μm, 0.80 μm, 1.00 μm, 1.30 μm, 1.50 μm, 1.80 μm, 2.00 μm, etc.

[0135] This embodiment can further increase the bandwidth of the photodetection chip 1, further suppress the dark current of the photodetection chip 1, and improve the detection performance of the photodetection chip 1 by setting the third sub-transition layer 1431 and the fourth sub-transition layer 1432 whose bandgap widths decrease successively along the direction close to the second light absorption layer 142.

[0136] In yet another embodiment, please refer to Figure 4 The first sub-chip 12 also includes a first cutoff layer 122 arranged between the first sub-P electrode layer 121 and the first transition layer 123, and the first cutoff layer 122 is used to protect the first sub-P electrode layer 121; the second sub-chip 14 also includes a second cutoff layer 141 arranged between the N electrode layer 13 and the second light absorption layer 142, and the second cutoff layer 141 is used to protect the N electrode layer 13.

[0137] The first cutoff layer 122 is used to protect the first sub-P electrode layer 121 during the preparation of each film layer. The first cutoff layer 122 is disposed between the first sub-P electrode layer 121 and the first transition layer 123. For example, the first cutoff layer 122 is directly disposed on the surface of the first sub-P electrode layer 121 and directly disposed on the surface of the first transition layer 123, or there is another film layer between the first cutoff layer 122 and the first transition layer 123. The first cutoff layer 122 is an InP layer, and the first cutoff layer 122 is also doped with Be or C. The doping concentration of the first cutoff layer 122 is greater than 1.0×10 18 cm -3 Specifically, for example, the doping concentration of the first cutoff layer 122 may be 1.2×10 18 cm -3 , or 1.5 × 10 18 cm -3 , or 2.0×10 18 cm -3 , or 2.5 × 10 18 cm -3 , or 3.0×10 18 cm -3 The first cutoff layer 122 can also be understood as a P-type doped InP etching cutoff layer. The thickness of the first cutoff layer 122 is 0.01 μm to 0.10 μm. Specifically, for example, the thickness of the first cutoff layer 122 can be 0.01 μm, or 0.02 μm, or 0.03 μm, or 0.04 μm, or 0.05 μm, or 0.06 μm, or 0.07 μm, or 0.08 μm, or 0.09 μm, or 0.10 μm, etc.

[0138] The second cutoff layer 141 is used to protect the N electrode layer 13 during the preparation of each film layer. The second cutoff layer 141 is disposed between the N electrode layer 13 and the second light absorbing layer 142. For example, the second cutoff layer 141 is directly disposed on the surface of the N electrode layer 13 and directly disposed on the surface of the second light absorbing layer 142, or there is another film layer between the second cutoff layer 141 and the second light absorbing layer 142. The second cutoff layer 141 is an InP layer, and the second cutoff layer 141 is also doped with Si. The doping concentration of the second cutoff layer 141 is greater than 1.0×10 18 cm -3 Specifically, for example, the doping concentration of the second cutoff layer 141 may be 1.2×10 18 cm -3 , or 1.5 × 10 18 cm -3 , or 2.0×10 18 cm -3 , or 2.5 × 10 18 cm -3 , or 3.0×10 18 cm -3 The second cutoff layer 141 can also be understood as an N-type doped InP etching cutoff layer. The thickness of the second cutoff layer 141 is 0.01 μm to 1.00 μm. Specifically, for example, the thickness of the second cutoff layer 141 can be 0.01 μm, or 0.10 μm, or 0.20 μm, or 0.30 μm, or 0.40 μm, or 0.50 μm, or 0.60 μm, or 0.70 μm, or 0.80 μm, or 0.90 μm, or 1.00 μm, etc.

[0139] In yet another embodiment, please refer to Figure 6 , the width of the first sub-P electrode layer 121 (such as Figure 6 ) is larger than the width of the N electrode layer 13 (as shown in W4 in FIG. Figure 6 ), the width of the N electrode layer 13 (as shown in W3 in FIG. Figure 6 ) is larger than the width of the second P-sub electrode layer 144 (as shown in W3 in FIG. Figure 6 ). The photodetection chip 1 satisfies at least one of the following conditions: the width of the first sub-P electrode layer 121 is 22 μm-70 μm; and / or the width of the N electrode layer 13 is 19 μm-60 μm; and / or the width of the second sub-P electrode layer 144 is 14 μm-30 μm.

[0140] Specifically, for example, the width of the first sub-P electrode layer 121 can be 22 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, 65 μm, 70 μm, etc. The width of the N electrode layer 13 can be 19 μm, 22 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, etc. The width of the second sub-P electrode layer 144 can be 14 μm, 19 μm, 22 μm, 25 μm, 30 μm, etc.

[0141] This embodiment uses the method of sharing the N electrode between the first sub-chip 12 and the second sub-chip 14, while improving the chip responsiveness, so that the equivalent capacitance of the photodetection chip 1 is equal to the sum of the capacitance of the first sub-chip 12 and the capacitance of the second sub-chip 14, resulting in an increase in the overall capacitance of the photodetection chip 1, which is not conducive to the bandwidth of the photodetection chip 1. To this end, this embodiment limits the width of the N electrode layer 13 and the second sub-P electrode layer 144, reduces the area of ​​the P-type region of the photodetection chip 1, thereby improving the bandwidth of the photodetection chip 1 and minimizing the impact of the use of the first sub-chip 12 and the second sub-chip 14 on the bandwidth degradation.

[0142] In yet another embodiment, please refer to Figure 6-Figure 8 The photodetection chip 1 also includes a passivation layer 15 and an anti-reflection layer 16. The passivation layer 15 covers the substrate 11, the first sub-chip 12, the N-electrode layer 13, and the second sub-chip 14. The passivation layer 15 has a through hole exposing at least a portion of the second sub-P-electrode layer 144, and the anti-reflection layer 16 is arranged in the through hole.

[0143] The passivation layer 15 is used to protect the photodetection chip 1. It is also used to reduce the dark current of the photodetection chip 1. The passivation layer 15 covers the surface of the substrate 11, the first sub-chip 12, the N-electrode layer 13, and the second sub-chip 14. The material of the passivation layer 15 can be, but is not limited to, silicon oxide, silicon nitride, etc.

[0144] The anti-reflection layer 16 is used to reduce the reflectivity of the incident light, so that more incident light enters the interior of the photodetection chip 1. Specifically, the anti-reflection layer 16 is used to make the detection signal incident on the anti-reflection layer 16 have a greater transmittance. The anti-reflection layer 16 is arranged on the surface of the second sub-chip 14 away from the substrate 11, that is, the anti-reflection layer 16 is directly arranged on the surface of the second sub-P electrode layer 144 away from the substrate 11. The width of the anti-reflection layer 16 is smaller than the width of the second sub-P electrode layer 144. The width of the anti-reflection layer 16 (such as Figure 6, as shown in W1 in FIG. 1 , the width of the anti-reflection layer 16 may be 12 μm, 13 μm, 14 μm, 15 μm, 16 μm, 17 μm, 18 μm, 19 μm, 20 μm, etc.

[0145] The photodetection chip 1 further includes a total N electrode portion 17 and a total P electrode portion 18 disposed on the side of the passivation layer 15 away from the substrate 11 . The total N electrode portion 17 is electrically connected to the N electrode layer 13 , and the total P electrode portion 18 is electrically connected to the first sub-P electrode layer 121 and the second sub-P electrode layer 144 .

[0146] The total N electrode portion 17 is used to transmit current and carriers. For example, the total N electrode portion 17 can introduce electrons from an external circuit into the photodetection chip 1, or export electrons generated inside the photodetection chip 1 to the external circuit. The total P electrode portion 18 is used to transmit current and carriers. For example, the total P electrode portion 18 is responsible for introducing holes from an external circuit into the photodetection chip 1, or exporting holes generated inside the photodetection chip 1 to the external circuit. The total N electrode portion 17 can be directly electrically connected to the N electrode layer 13, or the total N electrode portion 17 is indirectly electrically connected to the N electrode layer 13 through a lead. The total P electrode portion 18 can be directly electrically connected to the first sub-P electrode layer 121 and the second sub-P electrode layer 144, or the total P electrode portion 18 is indirectly electrically connected to the first sub-P electrode layer 121 and the second sub-P electrode layer 144 through a lead. In this embodiment, the first sub-chip 12 is connected to the second sub-chip 14 via the general N-electrode portion 17 and the general P-electrode portion 18 , which can be understood as the first sub-chip 12 and the second sub-chip 14 are connected in parallel.

[0147] The first sub-chip 12 and the second sub-chip 14 share the N-electrode layer 13, and each uses a sub-P-electrode layer for output, and then converges the electrical signal to the total P-electrode part 18 for output. While using a single chip with unchanged quantum efficiency, the response output of the photodetection chip 1 becomes the sum of the response of the two chips, thereby improving the response of the photodetection chip 1 and thus improving the detection sensitivity of the photodetection chip 1.

[0148] The N-electrode layer 13 is electrically connected to the total N-electrode portion 17 via a first lead 171. The width of the first lead 171 (eg Figure 6 The width of the first lead 171 may be 5 μm, 15 μm, 20 μm, 25 μm, or 30 μm. The width of the total N-electrode portion 17 (as shown in W6 in FIG. 1 ) may be 5 μm to 30 μm. Specifically, the width of the first lead 171 may be 5 μm, 15 μm, 20 μm, 25 μm, or 30 μm. Figure 6The total length of the N-electrode portion 17 (as shown in W7 in FIG. 1 ) is 50 μm to 100 μm. Specifically, for example, the width of the total N-electrode portion 17 can be 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, or 100 μm. Figure 6 ) is 50 μm to 300 μm. Specifically, for example, the total length of the N-electrode portion 17 can be 50 μm, 100 μm, 150 μm, 200 μm, 250 μm, 300 μm, etc.

[0149] The first sub-P electrode layer 121 and the second sub-P electrode layer 144 are electrically connected to the main P electrode portion 18 through a second lead 181, and the width of the second lead 181 (eg Figure 6 The width of the total P electrode portion 18 is 50 μm to 100 μm. Specifically, the width of the total P electrode portion 18 (as shown in W9 in FIG. 1 ) is 5 μm to 20 μm. Specifically, for example, the width of the second lead 181 can be 5 μm, 8 μm, 10 μm, 12 μm, 15 μm, 18 μm, or 20 μm. The width of the total P electrode portion 18 is 50 μm to 100 μm. Specifically, for example, the width of the total P electrode portion 18 (as shown in FIG. Figure 6 The length of the total P electrode portion 18 (as shown in W10 in FIG. 1 ) can be 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc. Figure 6 ) is 50μm~300μm. Specifically, for example, the total length of the P electrode portion 18 can be 50μm, or 100μm, or 150μm, or 200μm, or 250μm, or 300μm, etc.

[0150] In yet another embodiment, please refer to Figure 5-Figure 8 The photodetection chip 1 further includes a reflection layer 19 , which is disposed between the substrate 11 and the first sub-chip 12 , and is used to reflect light to the second sub-chip 14 and the first sub-chip 12 .

[0151] The reflective layer 19 is used to reflect the incident light back to the first sub-chip 12 and the second sub-chip 14. The reflective layer 19, the first sub-chip 12, the N-electrode layer 13, and the second sub-chip 14 are sequentially stacked on one side of the substrate 11. The reflective layer 19 is disposed between the substrate 11 and the first sub-chip 12, for example, the reflective layer 19 is directly disposed on the surface of the substrate 11 and directly disposed on the surface of the first sub-chip 12, or, there are other film layers between the reflective layer 19 and the substrate 11, and the reflective layer 19 is indirectly disposed on one side of the substrate 11.

[0152] During the operation of the photodetection chip 1, the incident light passes through the second sub-chip 14, the N-electrode layer 13, and the first sub-chip 12, and part of the incident light is absorbed and converted into electrical energy by the first sub-chip 12 and the second sub-chip 14. Then, the remaining incident light that is not completely absorbed and converted is projected to the reflective layer 19, and the reflective layer 19 reflects the incident light that is not completely absorbed and converted back to the first sub-chip 12 and the second sub-chip 14 for secondary absorption conversion, thereby further improving the chip quantum conversion efficiency and the responsiveness of the photodetection chip 1.

[0153] Specifically, the reflective layer 19 includes a stacked structure 190 stacked in sequence along the arrangement direction from the substrate 11 to the N-electrode layer 13, each of the stacked structures 190 includes a low refractive index layer 191 and a high refractive index layer 192 that is farther away from the substrate 11 than the low refractive index layer 191, and the number of the stacked structures 190 is 15 to 25.

[0154] The number of the stacked structures 190 is 15 to 25. Specifically, the number of the stacked structures 190 can be 15, or 16, or 17, or 18, or 19, or 20, or 21, or 22, or 23, or 24, or 25, etc. By limiting the number of the stacked structures 190, the reflective layer 19 has a higher reflectivity, and the reflective effect of the reflective layer 19 is improved. If the number of the stacked structures 190 is too small, the reflective effect of the reflective layer 19 will be reduced, which is not conducive to reflecting more incident light and reducing the responsiveness of the photoelectric detection chip 1. If the number of the stacked structures 190 is too large, the process of preparing the reflective layer 19 will be complicated, the preparation efficiency will be low, and the preparation cost will be increased. Optionally, the reflectivity of the reflective layer 19 is greater than 90%, and specifically, for example, the reflectivity of the reflective layer 19 may be 91%, or 92%, or 93%, or 94%, or 95%, or 96%, or 97%, or 98%, or 99%, etc. For example, when the number of the stacked structures 190 is greater than 20, the reflectivity of the reflective layer 19 is greater than 99%.

[0155] Exemplarily, in the reflective layer 19, along the arrangement direction from the substrate 11 to the N-electrode layer 13, the low refractive index layer 191, the high refractive index layer 192, the low refractive index layer 191, the high refractive index layer 192, and so on are sequentially stacked on the substrate 11. The low refractive index layer 191 is an InP layer, and the refractive index of the low refractive index layer 191 is 3.17. The high refractive index layer 192 is an InAlGaAs layer, and the refractive index of the high refractive index layer 192 is 3.71. The doping concentrations of the low refractive index layer 191 and the high refractive index layer 192 are both less than 5.0×10 15 cm -3Specifically, for example, the doping concentration of the low refractive index layer 191 and the high refractive index layer 192 can be 1.0×10 15 cm -3 , or 2.0×10 15 cm -3 , or 3.0×10 15 cm -3 , or 4.0×10 15 cm -3 , or 4.5×10 15 cm -3 The thickness of the low refractive index layer 191 and the high refractive index layer 192 are both 0.05 μm to 0.15 μm. Specifically, for example, the thickness of the low refractive index layer 191 and the high refractive index layer 192 can be 0.05 μm, 0.08 μm, 0.10 μm, 0.12 μm, 0.15 μm, etc. The width of the reflective layer 19 (e.g. Figure 6 ) is greater than the width of the first sub-chip 12, which can also be understood as the width of the reflective layer 19 (as shown in FIG. Figure 6 ) is larger than the first sub-P electrode layer 121 (as shown in W5 in FIG. Figure 6 The width of the low refractive index layer 191 and the high refractive index layer 192 (as shown in W4 in FIG. Figure 6 ) are both 25 μm-110 μm. Specifically, for example, the widths of the low refractive index layer 191 and the high refractive index layer 192 can both be 25 μm, 50 μm, 75 μm, 100 μm, 110 μm, etc.

[0156] In the related art, the material of the high refractive index layer 192 is usually In 0.53 Al 0.05 Ga 0.45 As layer, In 0.53 Al 0.05 Ga 0.45 The refractive index of the As layer is 3.63. However, in the high refractive index layer 192 of the present embodiment, the InAlGaAs in the high refractive index layer 192 satisfies: In x Al y Ga z As, wherein x=0.53, y=0.02, z=0.45. By limiting InAlGaAs to satisfy the above xyz, a high refractive index layer 192 with a refractive index of 3.71 can be obtained, thereby further improving the reflection effect of the reflection layer 19 and further improving the responsiveness of the photodetection chip 1.

[0157] The responsivity of the photodetection chip 1 is greater than 0.7A / W, and the bandwidth of the photodetection chip 1 is greater than 40GHz. Specifically, for example, the responsivity of the photodetection chip 1 can be 0.71A / W, or 0.75A / W, or 0.80A / W, or 0.85A / W, or 0.90A / W, or 1.00A / W, etc. The bandwidth of the photodetection chip 1 can be 40.1GHz, or 42GHz, or 45GHz, or 47GHz, or 50GHz, or 52GHz, or 55GHz, or 57GHz, or 60GHz, or 65GHz, or 70GHz, etc.

[0158] In summary, this embodiment improves the responsiveness of the photodetection chip 1 while keeping the quantum efficiency of a single chip unchanged by adopting a method in which two sub-chips share the N-electrode layer 13; and, by adding a reflective layer 19 under the first sub-chip 12 and the second sub-chip 14, the incident light that has not been completely absorbed and converted by the first sub-chip 12 and the second sub-chip 14 is reflected back to the first sub-chip 12 and the second sub-chip 14 for secondary absorption and conversion, thereby further improving the chip quantum conversion efficiency and chip responsiveness; in addition, by limiting the thickness of the first light absorption layer 124 and the second light absorption layer 142 to be equal, the bandwidth of the photodetection chip 1 is improved, thereby obtaining a photodetection chip 1 with a responsiveness greater than 0.7A / W and a bandwidth greater than 40GHz.

[0159] The photoelectric detection chip 1 provided in this embodiment is particularly suitable for 800G and 1.6T data center optical communications, which greatly improves the receiving sensitivity performance of the photoelectric detection chip 1.

[0160] Optionally, the width of the anti-reflection layer 16 is smaller than the width of the second sub-chip 14, the width of the second sub-chip 14 is smaller than the width of the N-electrode layer 13, the width of the N-electrode layer 13 is smaller than or equal to the width of the first sub-chip 12, the width of the first sub-chip 12 is smaller than the width of the reflective layer 19, and the width of the reflective layer 19 is smaller than the width of the substrate 11.

[0161] For example, the widths of the second light absorbing layer 142, the second transition layer 143, and the second sub-P electrode layer 144 are all equal, and the width of the second cutoff layer 141 is greater than the width of the second light absorbing layer 142. The widths of the N electrode layer 13, the first light absorbing layer 124, and the first transition layer 123 are all equal, the width of the first cutoff layer 122 is greater than the width of the first transition layer 123, and the width of the first sub-P electrode layer 121 is greater than the width of the first cutoff layer 122. The width of the reflective layer 19 is greater than the width of the first sub-P electrode layer 121. The width of the substrate 11 is greater than the width of the reflective layer 19. Specifically, the width of the anti-reflection layer 16 (e.g., Figure 6 The width of the second sub-P electrode layer 144 (as shown in W1 in FIG. Figure 6The width of the N electrode layer 13 (as shown in W2 in FIG. 1 ) is Aμm+(2~5)μm, or Aμm+(2~10)μm. Figure 6 The width of the first sub-P electrode layer 121 (as shown in W3 in FIG. 1 ) is Aμm+(7-20)μm, or Aμm+(7-40)μm. Figure 6 The width of the reflective layer 19 (as shown in W4 in FIG. Figure 6 (as shown in W5 in the figure) is Aμm+(12~80)μm. Among them, A=12μm~20μm.

[0162] This embodiment limits the width of each film layer of the photodetection chip 1, thereby improving the chip responsiveness and the bandwidth of the photodetection chip 1, so as to obtain a photodetection chip 1 with a responsiveness greater than 0.7A / W and a bandwidth greater than 40GHz.

[0163] The second aspect of the present application provides a distance sensor, which includes a transmitting chip and a photoelectric detection chip as provided in the first aspect of the present application, wherein the transmitting chip is used to transmit a detection signal, and the photoelectric detection chip is used to receive the detection signal and convert the detection signal into an electrical signal.

[0164] When the distance sensor is working, the transmitting chip transmits a detection signal. After the detection signal is reflected by the target object, the reflected detection signal can enter the photoelectric detection chip. The photoelectric detection chip converts the received detection signal into an electrical signal to determine the distance between the target object and the distance sensor.

[0165] The distance sensor provided in this embodiment adopts the photoelectric detection chip provided above in this application. The photoelectric detection chip adopts a method in which two sub-chips share an N-electrode layer, each of which uses a sub-P-electrode layer for output, and then converges the electrical signal to the total P-electrode output. While using a single chip with unchanged quantum efficiency, the response output of the photoelectric detection chip becomes the sum of the response of the two chips, thereby improving the response of the photoelectric detection chip, thereby improving the detection sensitivity of the photoelectric detection chip, and improving the detection sensitivity of the distance sensor.

[0166] The present application also provides an electronic device, which includes a display screen and a distance sensor as provided above in the present application, wherein the distance sensor is arranged on one side of the display screen, the transmitting chip of the distance sensor transmits a detection signal toward the display screen, and the photoelectric detection chip of the distance sensor is used to receive the detection signal through the display screen.

[0167] The electronic device may be, but is not limited to, smart driving, sweeping robots, mobile phones, tablet computers, laptop computers, PDAs, personal computers (PCs), personal digital assistants (PDAs), portable media players (PMPs), headphones, cameras, smart wearable devices, smart screens, displays, wind power generation equipment, and other devices with distance sensing functions.

[0168] The electronic device provided in this embodiment adopts the distance sensor provided above in this application. The photoelectric detection chip of the distance sensor adopts a method in which two sub-chips share an N-electrode layer, each of which uses a sub-P-electrode layer for output, and then converges the electrical signal to the total P-electrode output. While using a single chip with unchanged quantum efficiency, the response output of the photoelectric detection chip becomes the sum of the response of the two chips, thereby improving the response of the photoelectric detection chip, thereby improving the detection sensitivity of the photoelectric detection chip and improving the working performance of the electronic device.

[0169] The above is a detailed introduction to the contents provided in the implementation mode of the present application. This article explains and illustrates the principles and implementation modes of the present application. The above explanation is only used to help understand the method and core idea of ​​the present application. At the same time, for those skilled in the art, according to the idea of ​​the present application, there will be changes in the specific implementation mode and application scope. In summary, the contents of this specification should not be understood as limiting the present application.

Claims

1. A photoelectric detection chip, characterized in that: The photoelectric detection chip comprises: substrate; The first sub-chip is arranged on one side of the substrate; the first sub-chip comprises a first sub-P electrode layer, a first cutoff layer, a first transition layer, and a first light absorption layer which are sequentially stacked along the arrangement direction from the substrate to the first sub-chip; the bandgap width of the first transition layer is greater than the bandgap width of the first light absorption layer; the first cutoff layer is used to protect the first sub-P electrode layer; the first cutoff layer is an InP layer, and the first cutoff layer is also doped with Be or C; the doping concentration of the first cutoff layer is greater than 1.0×10 18 cm -3 ; The thickness of the first cutoff layer is 0.01 μm~0.10 μm; An N-electrode layer is provided on a side of the first sub-chip facing away from the substrate; and The second sub-chip is arranged on the side of the N electrode layer away from the substrate; the second sub-chip comprises a second cutoff layer, a second light absorption layer, a second transition layer, and a second sub-P electrode layer which are sequentially stacked along the arrangement direction from the substrate to the N electrode layer; the bandgap width of the second transition layer is greater than the bandgap width of the second light absorption layer; the second cutoff layer is used to protect the N electrode layer; the second cutoff layer is an InP layer, and the second cutoff layer is also doped with Si; the doping concentration of the second cutoff layer is greater than 1.0×10 18 cm -3 ; The thickness of the second cutoff layer is 0.01 μm~1.00 μm; Wherein, both the first sub-chip and the second sub-chip transmit carriers through the N-electrode layer; The photoelectric detection chip further includes a reflection layer, which is disposed between the substrate and the first sub-chip, and is used to reflect light to the first sub-chip and the second sub-chip; the reflection layer includes a stacked structure stacked in sequence along the arrangement direction from the substrate to the N-electrode layer, each of the stacked structures includes a low refractive index layer and a high refractive index layer farther from the substrate than the low refractive index layer, and the number of the stacked structures is 15 to 25; The high refractive index layer is an InAlGaAs layer, and the refractive index of the high refractive index layer is 3.71; the high refractive index layer is an InAlGaAs layer, and the InAlGaAs in the high refractive index layer satisfies: InxAlyGazAs, wherein x=0.53, y=0.02, and z=0.45; the doping concentration of the high refractive index layer is less than 5.0×10 15 cm -3 ; The responsivity of the photoelectric detection chip is greater than 0.7A / W, and the bandwidth of the photoelectric detection chip is greater than 40GHz.

2. The photodetection chip according to claim 1, characterized in that: The photodetection chip satisfies at least one of the following conditions: The substrate is an InP layer, and the substrate is also doped with Fe; The first sub-P electrode layer is an InGaAs layer, and the first sub-P electrode layer is further doped with Be or C; The first transition layer is an InAlAs layer and / or an InAlGaAs layer, and the first transition layer is further doped with Be or C; The first light absorbing layer is an InGaAs layer, and the first light absorbing layer is further doped with Be or C; The N electrode layer is an InGaAs layer, and the N electrode layer is further doped with Si; The second light absorbing layer is an InGaAs layer, and the second light absorbing layer is further doped with Be or C; The second transition layer is an InAlAs layer and / or an InAlGaAs layer, and the second transition layer is further doped with Be or C; The second P-sub electrode layer is an InGaAs layer, and the second P-sub electrode layer is further doped with Be or C.

3. The photodetection chip according to claim 1, characterized in that: The photodetection chip satisfies at least one of the following conditions: The doping concentration of the first sub-P electrode layer is greater than 3.0×10 18 cm -3 ; The doping concentration of the first transition layer is greater than 3.0×10 18 cm -3 ; The doping concentration of the first light absorbing layer is greater than 5.0×10 17 cm -3 ; The doping concentration of the N electrode layer is greater than 1.0×10 18 cm -3 ; The doping concentration of the second light absorbing layer is greater than 5.0×10 17 cm -3 ; The doping concentration of the second transition layer is greater than 3.0×10 18 cm -3 ; The doping concentration of the second sub-P electrode layer is greater than 3.0×10 18 cm -3 .

4. The photodetection chip according to claim 1, characterized in that: The photodetection chip satisfies at least one of the following conditions: The thickness of the substrate is 300 μm to 400 μm; The thickness of the first sub-P electrode layer is 0.05 μm to 0.20 μm; The thickness of the first transition layer is 0.30 μm to 2.10 μm; The thickness of the first light absorbing layer is 0.30 μm to 0.90 μm; The thickness of the N-electrode layer is 0.30 μm to 1.00 μm; The thickness of the second light absorbing layer is 0.30 μm to 0.90 μm; The thickness of the second transition layer is 0.30 μm to 2.10 μm; The thickness of the second P-sub electrode layer is 0.05 μm-0.20 μm.

5. The photodetection chip according to claim 1, characterized in that: The width of the first sub-P electrode layer is greater than the width of the N electrode layer, and the width of the N electrode layer is greater than the width of the second sub-P electrode layer; the photodetection chip satisfies at least one of the following conditions: The width of the first sub-P electrode layer is 22 μm-70 μm; The width of the N electrode layer is 19 μm-60 μm; The width of the second P-sub electrode layer is 14 μm-30 μm.

6. The photodetection chip according to claim 1, characterized in that: The first light absorbing layer comprises a first sub-light absorbing layer, a second sub-light absorbing layer, and a third sub-light absorbing layer which are sequentially stacked along an arrangement direction from the substrate to the N-electrode layer, wherein the doping concentration of the first sub-light absorbing layer is greater than the doping concentration of the second sub-light absorbing layer, and the doping concentration of the second sub-light absorbing layer is greater than the doping concentration of the third sub-light absorbing layer; The second light absorption layer includes a fourth sub-light absorption layer, a fifth sub-light absorption layer, and a sixth sub-light absorption layer which are sequentially stacked along the arrangement direction from the substrate to the N-electrode layer, the doping concentration of the fourth sub-light absorption layer is less than the doping concentration of the fifth sub-light absorption layer, and the doping concentration of the fifth sub-light absorption layer is less than the doping concentration of the sixth sub-light absorption layer.

7. The photodetection chip according to claim 6, characterized in that: The doping concentration of the first light absorption layer is greater than 5.0×10 18 cm -3 The doping concentration of the second light absorbing layer is 3.0×10 18 cm -3 ~5.0×10 18 cm -3 The doping concentration of the third light absorption layer is 5.0×10 17 cm -3 ~3.0×10 18 cm -3 ; The doping concentration of the fourth light absorption sub-layer is 5.0×10 17 cm -3 ~3.0×10 18 cm -3 The doping concentration of the fifth light absorption layer is 3.0×10 18 cm -3 ~5.0×10 18 cm -3 The doping concentration of the sixth light absorption layer is greater than 5.0×10 18 cm -3 .

8. The photodetection chip according to claim 7, characterized in that: The thickness of the first sub-light absorbing layer, the second sub-light absorbing layer, the third sub-light absorbing layer, the fourth sub-light absorbing layer, the fifth sub-light absorbing layer and the sixth sub-light absorbing layer are all 0.10 μm to 0.30 μm.

9. The photodetection chip according to claim 1, characterized in that: The first transition layer comprises a first sub-transition layer and a second sub-transition layer which are sequentially stacked along the arrangement direction from the substrate to the N-electrode layer, the bandgap width of the first sub-transition layer is greater than the bandgap width of the second sub-transition layer, and the bandgap width of the second sub-transition layer is greater than the bandgap width of the first light absorption layer; The second transition layer includes a third sub-transition layer and a fourth sub-transition layer stacked in sequence along the arrangement direction from the substrate to the N-electrode layer. The bandgap width of the fourth sub-transition layer is greater than the bandgap width of the third sub-transition layer, and the bandgap width of the third sub-transition layer is greater than the bandgap width of the second light absorption layer.

10. The photodetection chip according to claim 9, characterized in that: The doping concentrations of the first transition layer, the second transition layer, the third transition layer, and the fourth transition layer are all greater than 3.0×10 18 cm -3 .

11. The photodetection chip according to claim 10, characterized in that: The thickness of the first sub-transition layer and the fourth sub-transition layer are both 0.30 μm to 2.00 μm; the thickness of the second sub-transition layer and the third sub-transition layer are both 0.01 μm to 0.05 μm.

12. The photodetector chip according to claim 1, characterized in that: The photodetection chip also includes a passivation layer and an anti-reflection layer. The passivation layer covers the substrate, the first sub-chip, the N-electrode layer, and the second sub-chip. The passivation layer has a through hole exposing at least a portion of the second sub-P-electrode layer. The anti-reflection layer is arranged in the through hole.

13. The photodetection chip according to claim 12, characterized in that: The photodetection chip further includes a total N electrode portion and a total P electrode portion disposed on the side of the passivation layer away from the substrate, the total N electrode portion electrically connected to the N electrode layer, and the total P electrode portion electrically connected to the first sub-P electrode layer and the second sub-P electrode layer.

14. The photodetection chip according to claim 13, characterized in that: The photodetection chip satisfies at least one of the following conditions: The width of the anti-reflection layer is smaller than the width of the second sub-P electrode layer, and the width of the anti-reflection layer is 12 μm-20 μm; The N-electrode layer is electrically connected to the total N-electrode portion through a first lead, and the width of the first lead is 5 μm to 30 μm; The width of the total N-electrode portion is 50 μm to 100 μm, and the length of the total N-electrode portion is 50 μm to 300 μm; The first sub-P electrode layer and the second sub-P electrode layer are electrically connected to the total P electrode portion through second leads, respectively, and the width of the second lead is 5 μm to 20 μm; The width of the total P-electrode portion is 50 μm to 100 μm, and the length of the total P-electrode portion is 50 μm to 300 μm.

15. The photodetection chip according to claim 1, characterized in that: The reflective layer satisfies at least one of the following conditions: The low refractive index layer is an InP layer, and the refractive index of the low refractive index layer is 3.17; The doping concentration of the low refractive index layer is less than 5.0×10 15 cm -3 ; The thickness of the low refractive index layer and the high refractive index layer are both 0.05 μm to 0.15 μm; The width of the reflective layer is greater than the width of the first sub-chip, and the widths of the low refractive index layer and the high refractive index layer are both 25 μm-110 μm.

16. A distance sensor, characterized in that: The distance sensor comprises a transmitting chip and the photoelectric detection chip according to any one of claims 1 to 15, wherein the transmitting chip is used to transmit a detection signal, and the photoelectric detection chip is used to receive the detection signal and convert the detection signal into an electrical signal.

17. An electronic device, characterized in that: The electronic device includes a display screen and a distance sensor as claimed in claim 16, wherein the distance sensor is arranged on one side of the display screen, the transmitting chip of the distance sensor transmits a detection signal toward the display screen, and the photoelectric detection chip of the distance sensor is used to receive the detection signal through the display screen.

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