Square wave generating circuit and electronic equipment

Abstract

A square wave generating circuit and electronic equipment belong to the technical field of power supply. A voltage-controlled direct current power supply circuit converts an input voltage to output a first direct current; a square wave inverter circuit inverts the first direct current to output an output square wave; an amplitude detection circuit detects the amplitude of the output square wave to output an amplitude sampling signal; a control circuit outputs an adjustment voltage according to the amplitude sampling signal and a communication signal output by a host computer; the voltage-controlled direct current power supply circuit also converts the input voltage based on the adjustment voltage to output the first direct current; only one voltage-controlled direct current power supply circuit is used to realize rapid adjustment of the first direct current voltage between zero and a maximum design voltage. When applied to a plasma knife, the requirements for rapid switching between a high voltage for electric cutting and a low voltage for electric coagulation are met, one power supply is reduced, and flexibility is high. Moreover, due to the full closed-loop voltage regulation, the voltage output by the voltage-controlled direct current power supply circuit is stable, accurate, and highly safe.

Description

Technical Field

[0001] The present application belongs to the technical field of power supply, and in particular, relates to a square wave generating circuit and an electronic device. Background Art

[0002] Plasma is generally generated by plasma power supply and reactor. Due to its advantages such as strong oxidizing property and chemical activity, plasma is increasingly used in the medical field. Plasma power supply often includes microwave, radio frequency and square wave. Square wave plasma power supply is the power supply used in many medical fields because of its richer frequency content.

[0003] Among the existing plasma surgical equipment, the plasma knife is an electrosurgical instrument that replaces the mechanical scalpel for tissue cutting. The plasma knife has functions such as electrocuting and electrocoagulation, and can select different working modes according to different surgical needs. However, the voltage required for electrocuting is high, and the voltage required for electrocoagulation is low. Therefore, different power supplies are required in different working modes, and it is impossible to achieve fast switching between the electrocuting working mode and the electrocoagulation working mode. The flexibility is low. If a traditional power supply is directly used to achieve fast response between low static load and high dynamic load, it is very easy to cause unstable power supply output voltage, large output overshoot, and even damage the switch tube in the power supply, which has low safety. Summary of the invention

[0004] The purpose of the present application is to provide a square wave generating circuit and electronic equipment, aiming to solve the problems that the existing high-frequency electric knife cannot achieve rapid switching between electric cutting and electric coagulation, has low flexibility and low safety.

[0005] The present application embodiment provides a square wave generating circuit, comprising:

[0006] A voltage-controlled DC power supply circuit is configured to receive an input voltage and convert the input voltage to output a first DC power;

[0007] a square wave inverter circuit, connected to the voltage-controlled DC power supply circuit, configured to invert the first DC power to output an output square wave;

[0008] an amplitude detection circuit, connected to the square wave inverter circuit, and configured to detect the amplitude of the output square wave to output an amplitude sampling signal;

[0009] A control circuit connected to the amplitude detection circuit and the voltage-controlled DC power supply circuit, configured to output a regulated voltage according to the amplitude sampling signal and a communication signal output by a host computer;

[0010] The voltage-controlled DC power supply circuit is further configured to convert the input voltage based on the regulated voltage to output the first DC power.

[0011] In one embodiment, the square wave generating circuit further includes:

[0012] an isolation conversion circuit, connected to the square wave inverter circuit and the amplitude detection circuit, and configured to isolate and convert the output square wave;

[0013] The amplitude detection circuit is specifically configured to detect the amplitude of the output square wave after isolation and conversion to output an amplitude sampling signal.

[0014] In one embodiment, the voltage-controlled DC power supply circuit comprises:

[0015] A power circuit, configured to receive the input voltage, convert the input voltage based on the first drive signal and the second drive signal, so as to output a first direct current;

[0016] a subtraction circuit connected to the control circuit and configured to subtract a reference voltage from the adjustment voltage to output a first voltage;

[0017] a feedback circuit connected to the subtraction circuit and the power circuit, and configured to divide the voltage difference between the voltage of the first direct current and the first voltage to output a feedback voltage;

[0018] a power management circuit connected to the feedback circuit and configured to output a first control voltage and a second control voltage based on the feedback voltage;

[0019] The driving circuit is connected to the power management circuit and the power circuit, and is configured to output the first driving signal according to the first control voltage, and to output the second driving signal according to the second control voltage.

[0020] In one embodiment, the power circuit includes a first field effect transistor, a second field effect transistor, a first transformer, a rectifier bridge, an eleventh resistor, a first inductor and a first capacitor;

[0021] The gate of the first field effect transistor is used as the first drive signal input terminal of the power circuit, connected to the drive circuit to input the first drive signal; the gate of the second field effect transistor is used as the second drive signal input terminal of the power circuit, connected to the drive circuit to input the second drive signal; the source of the first field effect transistor is connected to the source of the second field effect transistor and the first end of the eleventh resistor; the drain of the first field effect transistor is connected to the first end of the primary side of the first transformer, the drain of the second field effect transistor is connected to the second end of the primary side of the first transformer, and the center tap end of the primary side of the first transformer is used as the power The input voltage input terminal of the circuit is connected to the second power supply to access the input voltage; the first end of the secondary side of the first transformer is connected to the first AC input terminal of the rectifier bridge, the second end of the secondary side of the first transformer is connected to the second AC input terminal of the rectifier bridge, the positive output terminal of the rectifier bridge is connected to the first end of the first inductor, the second end of the first inductor and the first end of the first capacitor are jointly used as the first DC output terminal of the power circuit, and are connected to the square wave inverter circuit to output the first DC; the negative output terminal of the rectifier bridge, the second end of the first capacitor and the second end of the eleventh resistor are connected to the power ground.

[0022] In one embodiment, the subtraction circuit includes a first operational amplifier U3, a first resistor, a second resistor, a third resistor and a fourth resistor;

[0023] The first end of the second resistor and the first end of the third resistor serve together as the adjustment voltage input end of the subtraction circuit, and are connected to the control circuit to access the adjustment voltage; the second end of the second resistor is connected to the inverting input end of the first operational amplifier and the first end of the first resistor, and the first end of the fourth resistor serves as the reference voltage input end of the subtraction circuit, and is connected to the first power supply to access the reference voltage; the second end of the fourth resistor is connected to the non-inverting input end of the first operational amplifier, and the second end of the first resistor and the output end of the first operational amplifier serve together as the first voltage output end of the subtraction circuit, and are connected to the feedback circuit to output the first voltage; the second end of the third resistor is connected to the power ground.

[0024] In one embodiment, the feedback circuit includes a fifth resistor and a sixth resistor;

[0025] The first end of the fifth resistor serves as the first voltage input end of the feedback circuit and is connected to the subtraction circuit to input the first voltage; the first end of the sixth resistor serves as the first DC input end of the feedback circuit and is connected to the power circuit to input the first DC power; the second end of the fifth resistor and the second end of the sixth resistor serve together as the feedback voltage output end of the feedback circuit and are connected to the power management circuit to output the feedback voltage.

[0026] In one of the embodiments, the power management circuit includes a PWM controller;

[0027] The inverting input terminal of the PWM controller serves as the feedback voltage input terminal of the power management circuit, and is connected to the feedback circuit to input the feedback voltage; the first output terminal of the PWM controller serves as the first control voltage output terminal of the power management circuit, and is connected to the drive circuit to output the first control voltage; the second output terminal of the PWM controller serves as the second control voltage output terminal of the power management circuit, and is connected to the drive circuit to output the second control voltage.

[0028] In one embodiment, the driving circuit includes a first driver, a second driver, a seventh resistor, an eighth resistor, a ninth resistor and a tenth resistor;

[0029] The in-phase input terminal of the first driver serves as the first control voltage input terminal of the drive circuit, and is connected to the power management circuit to input the first control voltage; the sinking terminal of the first driver is connected to the first end of the seventh resistor, the source terminal of the first driver is connected to the first end of the eighth resistor, the second end of the seventh resistor and the second end of the eighth resistor are jointly used as the first drive signal output terminal of the drive circuit, and are connected to the power circuit to output the first drive signal; the in-phase input terminal of the second driver serves as the second control voltage input terminal of the drive circuit, and is connected to the power management circuit to input the second control voltage; the sinking terminal of the second driver is connected to the first end of the ninth resistor, the source terminal of the second driver is connected to the first end of the tenth resistor, the second end of the ninth resistor and the second end of the tenth resistor are jointly used as the second drive signal output terminal of the drive circuit, and are connected to the power circuit to output the second drive signal.

[0030] In one embodiment, the amplitude detection circuit comprises:

[0031] a preprocessing circuit connected to the square wave inverter circuit and configured to adjust the amplitude of the output square wave to output a first square wave;

[0032] a rectifier circuit, connected to the preprocessing circuit, configured to rectify the first square wave to output a DC square wave pulse;

[0033] a pulse width compensation circuit, connected to the rectification circuit and the control circuit, and configured to perform voltage compensation on the DC square wave pulse to output the amplitude sampling signal;

[0034] The amplitude sampling signal is direct current and has the same amplitude as the direct current square wave pulse.

[0035] In one embodiment, the pre-processing circuit includes a second operational amplifier, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, and a fifteenth resistor;

[0036] The first end of the twelfth resistor serves as the output square wave input end of the preprocessing circuit and is connected to the square wave inverter circuit to input the output square wave; the second end of the twelfth resistor is connected to the first end of the thirteenth resistor and the non-inverting input end of the second operational amplifier, the first end of the fourteenth resistor is connected to the first end of the fifteenth resistor and the inverting input end of the second operational amplifier, the output end of the second operational amplifier and the second end of the fifteenth resistor jointly serve as the first square wave output end of the preprocessing circuit and are connected to the rectifier circuit to output the first square wave; the second end of the thirteenth resistor and the second end of the fourteenth resistor are connected to the signal ground.

[0037] In one embodiment, the rectifier circuit includes a third operational amplifier, a first diode, a second diode, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, and a twentieth resistor;

[0038] The first end of the sixteenth resistor and the first end of the seventeenth resistor are jointly used as the first square wave input end of the rectifier circuit, and are connected to the preprocessing circuit to input the first square wave; the second end of the sixteenth resistor is connected to the first end of the eighteenth resistor, the cathode of the second diode and the A channel inverting input end of the third operational amplifier, the second end of the eighteenth resistor is connected to the anode of the first diode and the first end of the nineteenth resistor, the B channel inverting input end of the third operational amplifier is connected to the second end of the seventeenth resistor, the second end of the nineteenth resistor and the first end of the twentieth resistor, the A channel output end of the third operational amplifier is connected to the anode of the second diode and the cathode of the first diode, the second end of the twentieth resistor and the B channel output end of the third operational amplifier are jointly used as the DC square wave pulse output end of the rectifier circuit, and are connected to the pulse width compensation circuit to output the DC square wave pulse; the A channel positive input end of the third operational amplifier and the B channel positive input end of the third operational amplifier are jointly connected to the signal ground.

[0039] In one embodiment, the pulse width compensation circuit includes a first comparator, a fourth operational amplifier, a twenty-first resistor, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a thirty-third resistor, a thirty-fourth resistor, a thirty-fifth resistor and a third capacitor;

[0040] The positive phase input terminal of the first comparator and the first end of the twenty-first resistor are jointly used as the DC square wave pulse input terminal of the pulse width compensation circuit, and are connected to the rectifier circuit to input the DC square wave pulse; the inverting input terminal of the first comparator is connected to the first end of the thirty-third resistor and the first end of the thirty-fourth resistor, the output terminal of the first comparator is connected to the first end of the twenty-second resistor, the second end of the twenty-second resistor is connected to the A channel positive phase input terminal of the fourth operational amplifier, the A channel output terminal of the fourth operational amplifier is connected to the first end of the twenty-seventh resistor and the first end of the twenty-third resistor, the A channel inverting input terminal of the fourth operational amplifier is connected to the second end of the twenty-third resistor and the first end of the twenty-fourth resistor, and the B channel of the fourth operational amplifier is connected to the first end of the twenty-second resistor. The inverting input terminal of the channel of the fourth operational amplifier is connected to the second end of the twenty-seventh resistor, the first end of the twenty-fifth resistor and the first end of the twenty-sixth resistor, the non-inverting input terminal of the B channel of the fourth operational amplifier is connected to the second end of the twenty-first resistor, the first end of the thirty-fifth resistor and the first end of the third capacitor, the second end of the twenty-sixth resistor and the B channel output terminal of the fourth operational amplifier are jointly used as the amplitude sampling signal output terminal of the pulse width compensation circuit, and are connected to the control circuit to output the amplitude sampling signal; the second end of the thirty-third resistor is connected to the second power supply, the second end of the twenty-fifth resistor is connected to the third power supply, and the second end of the thirty-fifth resistor, the second end of the third capacitor, the second end of the thirty-fourth resistor and the second end of the twenty-fourth resistor are jointly connected to the signal ground.

[0041] In one embodiment, the control circuit includes a digital signal controller, a digital-to-analog converter, an optical isolation amplifier, a fifth operational amplifier, a twenty-eighth resistor, a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor, and a second capacitor;

[0042] The first input and output terminal of the digital signal controller is connected to the chip selection terminal of the digital-to-analog converter, the second input and output terminal of the digital signal controller is connected to the digital serial clock input terminal of the digital-to-analog converter, the third input and output terminal of the digital signal controller is connected to the digital serial data input terminal of the digital-to-analog converter, the A channel analog voltage output terminal of the digital-to-analog converter serves as the adjustment voltage output terminal of the control circuit, and is connected to the voltage-controlled DC power supply circuit to output the adjustment voltage; the fourth input and output terminal of the digital signal controller is connected to the output terminal of the fifth operational amplifier and the first end of the thirty-second resistor, the non-inverting input terminal of the fifth operational amplifier is connected to the first end of the twenty-ninth resistor and the first end of the thirty-first resistor The inverting input terminal of the fifth operational amplifier is connected to the second end of the thirty-second resistor and the first end of the thirtieth resistor, the second end of the thirtieth resistor is connected to the negative output terminal of the optical isolation amplifier, the second end of the twenty-ninth resistor is connected to the positive output terminal of the optical isolation amplifier, the non-inverting input terminal of the optical isolation amplifier is connected to the first end of the twenty-eighth resistor and the first end of the second capacitor, the second end of the twenty-eighth resistor serves as the amplitude sampling signal input terminal of the control circuit, and is connected to the amplitude detection circuit to input the amplitude sampling signal; the second end of the thirty-first resistor is connected to the power ground, and the inverting input terminal of the optical isolation amplifier and the second end of the second capacitor are commonly connected to the signal ground.

[0043] An embodiment of the present application further provides an electronic device, which includes the above-mentioned square wave generating circuit.

[0044] Compared with the prior art, the embodiments of the present application have the following beneficial effects: since the control circuit outputs the adjustment voltage according to the amplitude sampling signal and the communication signal output by the host computer, different adjustment voltages can be output according to the communication signal output by the host computer, and only one voltage-controlled DC power supply circuit is required to convert the input voltage based on the adjustment voltage, so as to realize rapid adjustment of the first DC voltage between zero and the maximum design voltage. When applied to a plasma knife, it meets the requirements of rapid switching between the high voltage of electric cutting and the low voltage of electric coagulation, reduces one power supply, has high flexibility, and due to the full closed-loop voltage regulation, the first DC voltage output by the voltage-controlled DC power supply circuit is stable, accurate and highly safe. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical application in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0046] Figure 1 A schematic diagram of a square wave generating circuit provided in one embodiment of the present application;

[0047] Figure 2 Another structural schematic diagram of a square wave generating circuit provided in an embodiment of the present application;

[0048] Figure 3 A schematic diagram of the structure of a high-frequency isolation transformer provided in one embodiment of the present application;

[0049] Figure 4 Another structural schematic diagram of a square wave generating circuit provided in an embodiment of the present application;

[0050] Figure 5 Another structural schematic diagram of a square wave generating circuit provided in an embodiment of the present application;

[0051] Figure 6 A partial exemplary circuit schematic diagram of a square wave generating circuit provided in one embodiment of the present application. DETAILED DESCRIPTION

[0052] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0053] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0054] It should be understood that the orientation or position relationship indicated by terms such as "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0055] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0056] Figure 1 The structural diagram of the square wave generating circuit provided in one embodiment of the present application is shown. For the convenience of explanation, only the part related to the present embodiment is shown, which is described in detail as follows:

[0057] The square wave generating circuit comprises a voltage-controlled DC power supply circuit 100 , a square wave inverter circuit 200 , an amplitude detection circuit 300 and a control circuit 400 .

[0058] The voltage-controlled DC power supply circuit 100 is configured to receive an input voltage and convert the input voltage to output a first DC power.

[0059] The square wave inverter circuit 200 is connected to the voltage-controlled DC power supply circuit 100 and is configured to invert the first DC power to output an output square wave.

[0060] The amplitude detection circuit 300 is connected to the square wave inverter circuit 200 and is configured to detect the amplitude of the output square wave to output an amplitude sampling signal.

[0061] The control circuit 400 is connected to the amplitude detection circuit 300 and the voltage-controlled DC power supply circuit 100, and is configured to output a regulated voltage according to the amplitude sampling signal and the communication signal output by the host computer.

[0062] The voltage-controlled DC power supply circuit 100 is further configured to convert the input voltage based on the regulated voltage to output a first DC power.

[0063] It should be noted that, the amplitude sampling signal may be a DC voltage signal, and the communication signal output by the host computer may be a wired communication signal or a wireless communication signal. In a specific implementation, the communication signal output by the host computer carries mode information; the control circuit 400 is specifically configured to output an adjustment voltage according to the amplitude sampling signal and the mode information. In one embodiment, the mode information includes electrocuting mode information and electrocoagulation mode information.

[0064] Since the control circuit 400 outputs an adjustment voltage according to the amplitude sampling signal and the communication signal output by the host computer, different adjustment voltages can be output according to the communication signal output by the host computer. Only one voltage-controlled DC power supply circuit 100 is used to convert the input voltage based on the adjustment voltage, so as to realize rapid adjustment of the first DC voltage between zero and the maximum design voltage. When applied to a plasma knife, it meets the requirements of rapid switching between the high voltage of electric cutting and the low voltage of electric coagulation, reduces one power supply, has high flexibility, and due to the full closed-loop voltage regulation, the first DC voltage output by the voltage-controlled DC power supply circuit 100 is stable, accurate and highly safe.

[0065] By way of example and not limitation, Figure 2As shown, the square wave generating circuit further includes an isolation conversion circuit 500 .

[0066] The isolation conversion circuit 500 is connected to the square wave inverter circuit 200 and the amplitude detection circuit 300, and is configured to isolate and convert the output square wave.

[0067] The amplitude detection circuit 300 is specifically configured to detect the amplitude of the output square wave after isolation and conversion to output an amplitude sampling signal.

[0068] When used in interventional medical equipment, in order to ensure patient safety, interventional medical equipment requires high output isolation voltage and low leakage current. The plasma cutter head is a good conductor of electricity and directly contacts human tissue. If the insulation is poor or the leakage current is large, it will bring great safety hazards.

[0069] The electrical isolation between the power supply side and the load side is achieved through the isolation conversion circuit 500, which reduces the leakage current and improves the anti-interference ability of the circuit. The plasma power supply arc can be dynamically adjusted and the arc stability can be improved, thereby greatly reducing the risk of arc breaking during tissue cutting. The smaller average electric power can optimize the tissue cutting effect, effectively reduce tissue heating, and reduce the risk of thermal damage and carbonization of the tissue, thereby reducing the secondary damage to the patient caused by the operation.

[0070] In a specific implementation, the isolation conversion circuit 500 may include a high-frequency isolation transformer.

[0071] The leakage inductance of the transformer affects the coupling degree between the primary and secondary sides of the transformer, restricting the energy transmission between the primary and secondary sides in the power circuit. In severe cases, it will form a spike voltage in the circuit, affecting the safe operation of the circuit. After selecting the core material and structure, the installation and winding form of the transformer winding and the air gap of the core are the main sources of the transformer leakage inductance.

[0072] For this, Figure 3 As shown, the high-frequency isolation transformer in the present application may include a primary winding, a secondary winding and a shielding layer, and may also include a balanced winding 1 and a balanced winding 2. The balanced winding 1 and the balanced winding 2 are two sets of windings with the same parameters and connected in series. When the primary winding and the secondary winding are not coupled tightly enough, a large leakage flux will be generated. At this time, the magnetic flux passing through the two side arms of the magnetic core is not equal. The balanced winding 1 and the balanced winding 2 will generate the same or opposite magnetic flux through the unbalanced magnetic flux, thereby strengthening or offsetting the unbalanced magnetic flux, achieving the purpose of reducing the leakage magnetic flux, thereby constraining the leakage magnetic flux, and effectively reducing the high voltage isolation between the primary winding and the secondary winding and the transformer leakage inductance.

[0073] Using high-frequency transformers to replace traditional dedicated industrial frequency transformers can meet the safety standards for medical electrical equipment, and is small in size, low in cost and high in reliability.

[0074] By way of example and not limitation, Figure 4 As shown, the voltage-controlled DC power supply circuit 100 includes a power circuit 110 , a subtraction circuit 120 , a feedback circuit 130 , a power management circuit 140 and a driving circuit 150 .

[0075] The power circuit 110 is configured to receive an input voltage and convert the input voltage based on a first driving signal and a second driving signal to output a first direct current.

[0076] The subtraction circuit 120 is connected to the control circuit 400 and is configured to subtract the reference voltage from the adjustment voltage to output a first voltage.

[0077] The feedback circuit 130 is connected to the subtraction circuit 120 and the power circuit 110 , and is configured to divide the voltage difference between the voltage of the first direct current and the first voltage to output a feedback voltage.

[0078] The power management circuit 140 is connected to the feedback circuit 130 and is configured to output a first control voltage and a second control voltage based on the feedback voltage.

[0079] The driving circuit 150 is connected to the power management circuit 140 and the power circuit 110 , and is configured to output a first driving signal according to a first control voltage, and to output a second driving signal according to a second control voltage.

[0080] The subtraction circuit 120 enables the voltage-controlled DC power supply circuit 100 to be applicable to medical devices with different voltages, thereby improving the adaptability of the circuit.

[0081] The feedback circuit 130 establishes a square wave amplitude feedback loop and a first DC power feedback loop based on the first DC power and the first voltage output feedback voltage, which further improves the stability of the square wave generating circuit compared to a single feedback loop; at the same time, the response bandwidth of the feedback voltage output port is made equal to the bandwidth of the first DC power input terminal and the bandwidth of the first voltage input terminal, thereby realizing a wide range of rapid and stable adjustment of the output square wave.

[0082] By way of example and not limitation, Figure 5 As shown, the amplitude detection circuit 300 includes a pre-processing circuit 310 , a rectification circuit 320 and a pulse width compensation circuit 330 .

[0083] The preprocessing circuit 310 is connected to the square wave inverter circuit 200 and is configured to adjust the amplitude of the output square wave to output a first square wave.

[0084] The rectifier circuit 320 is connected to the preprocessing circuit 310 and is configured to rectify the first square wave to output a DC square wave pulse.

[0085] The pulse width compensation circuit 330 is connected to the rectifier circuit 320 and the control circuit 400, and is configured to perform voltage compensation on the DC square wave pulse to output an amplitude sampling signal.

[0086] The amplitude sampling signal is direct current and has the same amplitude as the direct current square wave pulse.

[0087] The pre-processing circuit 310 can adjust the high-frequency output square wave to a first square wave with a suitable amplitude and equal-proportion attenuation.

[0088] The rectifier circuit 320 can rectify the first square wave into a high-fidelity, unipolar DC square wave pulse.

[0089] The pulse width compensation circuit 330 can generate a voltage gain compensation signal according to the duty cycle of the DC square wave pulse, and at the same time perform low-pass filtering on the input DC square wave pulse, and multiply the filtered DC square wave pulse with the voltage gain compensation signal to obtain an amplitude sampling signal proportional to the high-frequency square wave output amplitude.

[0090] The traditional amplitude detection circuit 300 obtains the amplitude sampling signal of DC power through filtering. It can no longer meet the measurement requirements when used in scenarios where the pulse width changes rapidly and dynamically. The measurement error is large and the error is not fixed. The pulse width compensation circuit 330 makes the circuit compensation coefficient change dynamically and linearly with the pulse width, thereby realizing rapid measurement of the pulse amplitude and single coefficient calibration of the amplitude detection circuit 300, reducing the measurement error.

[0091] Figure 6 A partial exemplary circuit structure of a square wave generating circuit provided in an embodiment of the present application is shown. For the sake of convenience, only the part related to the embodiment of the present application is shown, which is described in detail as follows:

[0092] The power circuit 110 includes a first field effect transistor Q1 , a second field effect transistor Q2 , a first transformer T1 , a rectifier bridge M1 , an eleventh resistor R11 , a first inductor L1 , and a first capacitor C1 .

[0093] The gate of the first field effect transistor Q1 is used as the first driving signal input terminal of the power circuit 110, and is connected to the driving circuit 150 to input the first driving signal; the gate of the second field effect transistor Q2 is used as the second driving signal input terminal of the power circuit 110, and is connected to the driving circuit 150 to input the second driving signal; the source of the first field effect transistor Q1 is connected to the source of the second field effect transistor Q2 and the first end of the eleventh resistor R11; the drain of the first field effect transistor Q1 is connected to the first end of the primary side of the first transformer T1, the drain of the second field effect transistor Q2 is connected to the second end of the primary side of the first transformer T1, and the center tap end of the primary side of the first transformer T1 is used as the power The input voltage input terminal of the circuit 110 is connected to the second power supply to access the input voltage; the first end of the secondary side of the first transformer T1 is connected to the first AC input terminal of the rectifier bridge M1, the second end of the secondary side of the first transformer T1 is connected to the second AC input terminal of the rectifier bridge M1, the positive output terminal of the rectifier bridge M1 is connected to the first end of the first inductor L1, the second end of the first inductor L1 and the first end of the first capacitor C1 are jointly used as the first DC output terminal of the power circuit 110, and are connected to the square wave inverter circuit 200 to output the first DC power; the negative output terminal of the rectifier bridge M1, the second end of the first capacitor C1 and the second end of the eleventh resistor R11 are connected to the power ground.

[0094] Rectifier bridge M1 is used for rectification, which has high efficiency, wide application range, simple structure and high reliability.

[0095] The subtraction circuit 120 includes a first operational amplifier U3 , a first resistor R1 , a second resistor R2 , a third resistor R3 , and a fourth resistor R4 .

[0096] The first end of the second resistor R2 and the first end of the third resistor R3 serve together as the adjustment voltage input terminal of the subtraction circuit 120, and are connected to the control circuit 400 to access the adjustment voltage; the second end of the second resistor R2 is connected to the inverting input terminal VIN- of the first operational amplifier U3 and the first end of the first resistor R1, and the first end of the fourth resistor R4 serves as the reference voltage input terminal of the subtraction circuit 120, and is connected to the first power supply to access the reference voltage; the second end of the fourth resistor R4 is connected to the non-inverting input terminal VIN+ of the first operational amplifier U3, the second end of the first resistor R1 and the output terminal VO of the first operational amplifier U3 serve together as the first voltage output terminal of the subtraction circuit 120, and are connected to the feedback circuit 130 to output the first voltage; the second end of the third resistor R3 is connected to the power ground.

[0097] The subtraction circuit 120 has a simple structure and low cost. The parameters of the first operational amplifier U3, the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 can be adjusted according to actual needs, and has high flexibility.

[0098] The feedback circuit 130 includes a fifth resistor R5 and a sixth resistor R6.

[0099] The first end of the fifth resistor R5 serves as the first voltage input end of the feedback circuit 130, and is connected to the subtraction circuit 120 to input the first voltage; the first end of the sixth resistor R6 serves as the first DC input end of the feedback circuit 130, and is connected to the power circuit 110 to input the first DC power; the second end of the fifth resistor R5 and the second end of the sixth resistor R6 serve together as the feedback voltage output end of the feedback circuit 130, and are connected to the power management circuit 140 to output the feedback voltage.

[0100] The feedback circuit 130 may further include a filter capacitor (not shown).

[0101] The circuit is composed only of resistors and capacitors, and the components are easy to obtain and the cost is low.

[0102] The power management circuit 140 includes a pulse width modulation (PWM) controller U4 .

[0103] The inverting input terminal VFB of the PWM controller U4 serves as the feedback voltage input terminal of the power management circuit 140, and is connected to the feedback circuit 130 to input the feedback voltage; the first output terminal OUT1 of the PWM controller U4 serves as the first control voltage output terminal of the power management circuit 140, and is connected to the drive circuit 150 to output the first control voltage; the second output terminal OUT2 of the PWM controller U4 serves as the second control voltage output terminal of the power management circuit 140, and is connected to the drive circuit 150 to output the second control voltage.

[0104] In existing plasma power supplies, large-capacity capacitors are usually used to provide the subsequent circuit with an instantaneous power demand that far exceeds the designed output rated power, resulting in high stress on the voltage-controlled DC power supply circuit 100 during startup, and the voltage of the previous power supply drops below the circuit startup voltage requirement, causing the circuit to restart repeatedly. In this application, by optimizing the peak current of the PWM controller U4 to limit the parameters, reliable and fast startup of large capacitive loads can be achieved.

[0105] The driving circuit 150 includes a first driver U5, a second driver U6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9 and a tenth resistor R10.

[0106] The in-phase input terminal IN+ of the first driver U5 serves as the first control voltage input terminal of the driving circuit 150, and is connected to the power management circuit 140 to input the first control voltage; the sinking terminal OUTL of the first driver U5 is connected to the first end of the seventh resistor R7, the source terminal OUTH of the first driver U5 is connected to the first end of the eighth resistor R8, the second end of the seventh resistor R7 and the second end of the eighth resistor R8 serve together as the first drive signal output terminal of the driving circuit 150, and are connected to the power circuit 110 to output the first drive signal; the in-phase input terminal IN+ of the second driver U6 serves as the second control voltage input terminal of the driving circuit 150, and is connected to the power management circuit 140 to input the second control voltage; the sinking terminal OUTL of the second driver U6 is connected to the first end of the ninth resistor R9, the source terminal OUTH of the second driver U6 is connected to the first end of the tenth resistor R10, the second end of the ninth resistor R9 and the second end of the tenth resistor R10 serve together as the second drive signal output terminal of the driving circuit 150, and are connected to the power circuit 110 to output the second drive signal.

[0107] The first driver U5 and the second driver U6 have high integration, which can reduce the size of the device.

[0108] The pre-processing circuit 310 includes a second operational amplifier U7 , a twelfth resistor R12 , a thirteenth resistor R13 , a fourteenth resistor R14 , and a fifteenth resistor R15 .

[0109] The first end of the twelfth resistor R12 serves as the output square wave input end of the pre-processing circuit 310, and is connected to the square wave inverter circuit 200 to input and output square waves; the second end of the twelfth resistor R12 is connected to the first end of the thirteenth resistor R13 and the non-inverting input end VIN+ of the second operational amplifier U7, the first end of the fourteenth resistor R14 is connected to the first end of the fifteenth resistor R15 and the inverting input end VIN- of the second operational amplifier U7, the output end VO of the second operational amplifier U7 and the second end of the fifteenth resistor R15 serve together as the first square wave output end of the pre-processing circuit 310, and are connected to the rectifier circuit 320 to output the first square wave; the second end of the thirteenth resistor R13 and the second end of the fourteenth resistor R14 are connected to the signal ground.

[0110] The circuit is simple and reliable.

[0111] The rectifier circuit 320 includes a third operational amplifier U8 , a first diode D1 , a second diode D2 , a sixteenth resistor R16 , a seventeenth resistor R17 , an eighteenth resistor R18 , a nineteenth resistor R19 , and a twentieth resistor R20 .

[0112] The first end of the sixteenth resistor R16 and the first end of the seventeenth resistor R17 are commonly used as the first square wave input end of the rectifier circuit 320, and are connected to the preprocessing circuit 310 to input the first square wave; the second end of the sixteenth resistor R16 is connected to the first end of the eighteenth resistor R18, the cathode of the second diode D2 and the A channel inverting input end -INA of the third operational amplifier U8, the second end of the eighteenth resistor R18 is connected to the anode of the first diode D1 and the first end of the nineteenth resistor R19, the B channel inverting input end -INB of the third operational amplifier U8 and the second end of the seventeenth resistor R17, the cathode of the second diode D2 and the A channel inverting input end -INA of the third operational amplifier U8 The second end of the nineteenth resistor R19 and the first end of the twentieth resistor R20 are connected, the A channel output terminal OUTA of the third operational amplifier U8 is connected to the anode of the second diode D2 and the cathode of the first diode D1, the second end of the twentieth resistor R20 and the B channel output terminal OUTB of the third operational amplifier U8 are jointly used as the DC square wave pulse output terminal of the rectifier circuit 320, and are connected to the pulse width compensation circuit 330 to output a DC square wave pulse; the A channel positive phase input terminal +INA of the third operational amplifier U8 and the B channel positive phase input terminal +INB of the third operational amplifier U8 are jointly connected to the signal ground.

[0113] The circuit has simple structure and high efficiency.

[0114] The pulse width compensation circuit 330 includes a first comparator U9, a fourth operational amplifier U10, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-third resistor R23, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27, a thirty-third resistor R33, a thirty-fourth resistor R34, a thirty-fifth resistor R35 and a third capacitor C3.

[0115] The positive phase input terminal +IN of the first comparator U9 and the first end of the twenty-first resistor R21 are used together as the DC square wave pulse input terminal of the pulse width compensation circuit 330, and are connected to the rectifier circuit 320 to input the DC square wave pulse; the inverting input terminal -IN of the first comparator U9 is connected to the first end of the thirty-third resistor R33 and the first end of the thirty-fourth resistor R34, the output terminal OUT of the first comparator U9 is connected to the first end of the twenty-second resistor R22, the second end of the twenty-second resistor R22 is connected to the A channel positive phase input terminal +INA of the fourth operational amplifier U10, the A channel output terminal OUTA of the fourth operational amplifier U10 is connected to the first end of the twenty-seventh resistor R27 and the first end of the twenty-third resistor R23, the A channel inverting input terminal -INA of the fourth operational amplifier U10 is connected to the second end of the twenty-third resistor R23 and the first end of the twenty-fourth resistor R24, and the fourth operational amplifier U The B channel inverting input terminal -INB of the fourth operational amplifier U10 is connected to the second end of the twenty-seventh resistor R27, the first end of the twenty-fifth resistor R25 and the first end of the twenty-sixth resistor R26, the B channel non-inverting input terminal +INB of the fourth operational amplifier U10 is connected to the second end of the twenty-first resistor R21, the first end of the thirty-fifth resistor R35 and the first end of the third capacitor C3, the second end of the twenty-sixth resistor R26 and the B channel output terminal OUTB of the fourth operational amplifier U10 are jointly used as the amplitude sampling signal output terminal of the pulse width compensation circuit 330, and are connected to the control circuit 400 to output the amplitude sampling signal; the second end of the thirty-third resistor R33 is connected to the second power supply, the second end of the twenty-fifth resistor R25 is connected to the third power supply, and the second end of the thirty-fifth resistor R35, the second end of the third capacitor C3, the second end of the thirty-fourth resistor R34 and the second end of the twenty-fourth resistor R24 ​​are jointly connected to the signal ground.

[0116] Among them, the thirty-fifth resistor R35 and the third capacitor C3 can form a low-pass filter.

[0117] The pulse width compensation circuit 330 is constructed using discrete components, which makes it easy to change component parameters according to actual needs and improves the flexibility of use.

[0118] The control circuit 400 includes a digital signal controller U1, a digital-to-analog converter U2, an optical isolation amplifier U11, a fifth operational amplifier U12, a twenty-eighth resistor R28, a twenty-ninth resistor R29, a thirtieth resistor R30, a thirty-first resistor R31, a thirty-second resistor R32 and a second capacitor C2.

[0119] The first input-output terminal RD5 of the digital signal controller U1 is connected to the chip selection terminal CS of the digital-to-analog converter U2, the second input-output terminal RD6 of the digital signal controller U1 is connected to the digital serial clock input terminal SCLK of the digital-to-analog converter U2, the third input-output terminal RD7 of the digital signal controller U1 is connected to the digital serial data input terminal DIN of the digital-to-analog converter U2, the A channel analog voltage output terminal OUTA of the digital-to-analog converter U2 serves as the regulated voltage output terminal of the control circuit 400, and is connected to the voltage-controlled DC power supply circuit 100 to output the regulated voltage; the fourth input-output terminal RB6 of the digital signal controller U1 is connected to the output terminal VO of the fifth operational amplifier U12 and the first end of the thirty-second resistor R32, the non-inverting input terminal VIN+ of the fifth operational amplifier U12 is connected to the first end of the twenty-ninth resistor R29 and the first end of the thirty-first resistor R31 The first end is connected, the inverting input terminal VIN- of the fifth operational amplifier U12 is connected to the second end of the thirty-second resistor R32 and the first end of the thirtieth resistor R30, the second end of the thirtieth resistor R30 is connected to the negative output terminal VOUT- of the optical isolation amplifier U11, the second end of the twenty-ninth resistor R29 is connected to the positive output terminal VOUT+ of the optical isolation amplifier U11, the non-inverting input terminal VIN+ of the optical isolation amplifier U11 is connected to the first end of the twenty-eighth resistor R28 and the first end of the second capacitor C2, the second end of the twenty-eighth resistor R28 is used as the amplitude sampling signal input terminal of the control circuit 400, and is connected to the amplitude detection circuit 300 to input the amplitude sampling signal; the second end of the thirty-first resistor R31 is connected to the power ground, and the inverting input terminal of the optical isolation amplifier U11 and the second end of the second capacitor C2 are commonly connected to the signal ground.

[0120] The circuit includes integrated chips such as a digital signal controller U1, a digital-to-analog converter U2, an optical isolation amplifier U11, and a fifth operational amplifier U12, which simplifies the assembly process and reduces the possibility of connection errors and signal loss.

[0121] The following is a combination of working principles Figure 6 As shown for further explanation:

[0122] The center tap end of the primary side of the first transformer T1 is connected to the input voltage, the first transformer T1 converts the input voltage, and outputs the first alternating current from the first end of the secondary side of the first transformer T1 and the second end of the secondary side of the first transformer T1 to the first alternating current input end of the rectifier bridge M1 and the second alternating current input end of the rectifier bridge M1, the rectifier bridge M1 rectifies the first alternating current, and outputs the first direct current from the second end of the first inductor L1 and the first end of the first capacitor C1 to the square wave inverter circuit 200 and the first end of the sixth resistor R6, the square wave inverter circuit 200 inverts the first direct current, and outputs the output square wave to the isolation conversion circuit 500, the isolation conversion circuit 500 outputs the square wave for isolation and conversion, and The output square wave after isolation and conversion is output to the first end of the twelfth resistor R12, the second operational amplifier U7 adjusts the amplitude of the output square wave, and outputs the first square wave from the output terminal VO of the second operational amplifier U7 and the second end of the fifteenth resistor R15 to the first end of the sixteenth resistor R16 and the first end of the seventeenth resistor R17, the rectifier circuit 320 rectifies the first square wave into a unipolar DC square wave pulse, and outputs the DC square wave pulse from the second end of the twentieth resistor R20 and the B channel output terminal OUTB of the third operational amplifier U8 to the positive phase input terminal +IN of the first comparator U9 and the first end of the twenty-first resistor R21, the second end of the thirty-third resistor R33 is connected to the second power supply, The thirty-third resistor R33 and the thirty-fourth resistor R34 divide the voltage of the second power supply, and output the divided voltage of the second power supply from the first end of the thirty-third resistor R33 and the first end of the thirty-fourth resistor R34 to the inverting input terminal -IN of the first comparator U9. The first comparator U9 generates a voltage gain compensation signal according to the DC square wave pulse and the voltage output of the divided second power supply, and outputs the voltage gain compensation signal from the output terminal OUT of the first comparator U9 to the A channel positive input terminal +INA of the fourth operational amplifier U10. The B channel positive input terminal +INB of the fourth operational amplifier U10 is connected to the DC square wave pulse filtered by the third capacitor C3 and the thirty-fifth resistor R35. The fourth operational amplifier U10 multiplies the filtered DC square wave pulse and the output voltage gain compensation signal, and outputs the amplitude sampling signal from the second end of the twenty-sixth resistor R26 and the B channel output terminal OUTB of the fourth operational amplifier U10 to the second end of the twenty-eighth resistor R28. The optical isolation amplifier U11 isolates and converts the amplitude sampling signal, and outputs a differential output voltage proportional to the amplitude sampling signal from the positive output terminal VOUT+ of the optical isolation amplifier U11 and the negative output terminal VOUT- of the optical isolation amplifier U11 to the non-inverting input terminal VIN+ of the fifth operational amplifier U12 and the inverting input terminal VIN- of the fifth operational amplifier U12.The fifth operational amplifier U12 outputs an adjustment signal from the output terminal VO of the fifth operational amplifier U12 and the first end of the thirty-second resistor R32 to the fourth input-output terminal RB6 of the digital signal controller U1 according to the differential output voltage. The control circuit 400 also receives the communication signal output by the host computer. The digital signal controller U1 outputs a digital signal from the third input-output terminal RD7 of the digital signal controller U1 to the digital serial data input terminal DIN of the digital-to-analog converter U2 according to the adjustment signal and the communication signal output by the host computer. The digital-to-analog converter U2 performs digital-to-analog conversion on the digital signal, and outputs the adjustment voltage from the A channel analog voltage output terminal OUTA of the digital-to-analog converter U2 to the first end of the second resistor R2 and the first end of the third resistor R3. The first end of the fourth resistor R4 is connected to the reference voltage. The first operational amplifier U3 performs a subtraction operation on the reference voltage and the adjustment voltage, and outputs a first voltage from the second end of the first resistor R1 and the output terminal VO of the first operational amplifier U3 to the first end of the fifth resistor R5. The fifth resistor R5 and the sixth resistor R6 divide the voltage difference between the voltage of the first DC power and the first voltage, and output the feedback voltage from the second end of the fifth resistor R5 and the second end of the sixth resistor R6 to the inverting input terminal VFB of the PWM controller U4. The PWM controller U4 outputs the first control voltage from the A channel output terminal OUT1 of the PWM controller U4 to the in-phase input terminal IN+ of the first driver U5 according to the feedback voltage, and outputs the second control voltage from the B channel output terminal OUT2 of the PWM controller U4 to the in-phase input terminal IN+ of the second driver U6. The first driver U5 outputs the first drive signal to the gate of the first field effect transistor Q1 through the second end of the seventh resistor R7 and the second end of the eighth resistor R8 according to the first control voltage. The second driver U6 outputs the second drive signal to the gate of the second field effect transistor Q2 through the second end of the ninth resistor R9 and the second end of the tenth resistor R10 according to the second control voltage. The first transformer T1 converts the input voltage based on the first drive signal and the second drive signal.

[0123] An embodiment of the present application further provides an electronic device, which includes the above-mentioned square wave generating circuit.

[0124] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0125] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A square wave generating circuit, characterized in that: include: A voltage-controlled DC power supply circuit is configured to receive an input voltage and convert the input voltage to output a first DC power; a square wave inverter circuit, connected to the voltage-controlled DC power supply circuit, configured to invert the first DC power to output an output square wave; an amplitude detection circuit, connected to the square wave inverter circuit, and configured to detect the amplitude of the output square wave to output an amplitude sampling signal; A control circuit connected to the amplitude detection circuit and the voltage-controlled DC power supply circuit, configured to output a regulated voltage according to the amplitude sampling signal and a communication signal output by a host computer; The voltage-controlled DC power supply circuit is further configured to convert the input voltage based on the regulated voltage to output the first DC power; The voltage-controlled DC power supply circuit comprises: A power circuit, configured to receive the input voltage, convert the input voltage based on the first drive signal and the second drive signal, so as to output a first direct current; a subtraction circuit connected to the control circuit and configured to subtract a reference voltage from the adjustment voltage to output a first voltage; a feedback circuit connected to the subtraction circuit and the power circuit, and configured to divide the voltage difference between the voltage of the first direct current and the first voltage to output a feedback voltage; a power management circuit connected to the feedback circuit and configured to output a first control voltage and a second control voltage based on the feedback voltage; The driving circuit is connected to the power management circuit and the power circuit, and is configured to output the first driving signal according to the first control voltage, and to output the second driving signal according to the second control voltage.

2. The square wave generating circuit according to claim 1, characterized in that: Also includes: an isolation conversion circuit, connected to the square wave inverter circuit and the amplitude detection circuit, and configured to isolate and convert the output square wave; The amplitude detection circuit is specifically configured to detect the amplitude of the output square wave after isolation and conversion to output an amplitude sampling signal.

3. The square wave generating circuit according to claim 1, characterized in that: The power circuit includes a first field effect transistor, a second field effect transistor, a first transformer, a rectifier bridge, an eleventh resistor, a first inductor and a first capacitor; The gate of the first field effect transistor serves as a first driving signal input terminal of the power circuit and is connected to the driving circuit to input the first driving signal; The gate of the second field effect transistor serves as a second driving signal input terminal of the power circuit and is connected to the driving circuit to input the second driving signal; The source of the first field effect transistor is connected to the source of the second field effect transistor and the first end of the eleventh resistor; the drain of the first field effect transistor is connected to the first end of the primary side of the first transformer, the drain of the second field effect transistor is connected to the second end of the primary side of the first transformer, and the center tap end of the primary side of the first transformer serves as the input voltage input end of the power circuit and is connected to the second power supply to access the input voltage; The first end of the secondary side of the first transformer is connected to the first AC input end of the rectifier bridge, the second end of the secondary side of the first transformer is connected to the second AC input end of the rectifier bridge, the positive output end of the rectifier bridge is connected to the first end of the first inductor, the second end of the first inductor and the first end of the first capacitor jointly serve as the first DC output end of the power circuit, and are connected to the square wave inverter circuit to output the first DC power; the negative output end of the rectifier bridge, the second end of the first capacitor and the second end of the eleventh resistor are connected to the power ground.

4. The square wave generating circuit according to claim 1, characterized in that: The subtraction circuit includes a first operational amplifier, a first resistor, a second resistor, a third resistor and a fourth resistor; The first end of the second resistor and the first end of the third resistor serve together as the adjustment voltage input end of the subtraction circuit, and are connected to the control circuit to access the adjustment voltage; the second end of the second resistor is connected to the inverting input end of the first operational amplifier and the first end of the first resistor, and the first end of the fourth resistor serves as the reference voltage input end of the subtraction circuit, and is connected to the first power supply to access the reference voltage; the second end of the fourth resistor is connected to the non-inverting input end of the first operational amplifier, and the second end of the first resistor and the output end of the first operational amplifier serve together as the first voltage output end of the subtraction circuit, and are connected to the feedback circuit to output the first voltage; the second end of the third resistor is connected to the power ground.

5. The square wave generating circuit according to claim 1, characterized in that: The feedback circuit includes a fifth resistor and a sixth resistor; The first end of the fifth resistor is used as the first voltage input end of the feedback circuit, connected to the subtraction circuit, so as to input the first voltage; the first end of the sixth resistor is used as the first DC input end of the feedback circuit, connected to the power circuit, so as to input the first DC; The second end of the fifth resistor and the second end of the sixth resistor serve together as a feedback voltage output end of the feedback circuit, and are connected to the power management circuit to output the feedback voltage.

6. The square wave generating circuit according to claim 1, characterized in that: The power management circuit includes a PWM controller; The inverting input terminal of the PWM controller serves as the feedback voltage input terminal of the power management circuit, and is connected to the feedback circuit to input the feedback voltage; the first output terminal of the PWM controller serves as the first control voltage output terminal of the power management circuit, and is connected to the drive circuit to output the first control voltage; the second output terminal of the PWM controller serves as the second control voltage output terminal of the power management circuit, and is connected to the drive circuit to output the second control voltage.

7. The square wave generating circuit according to claim 1, characterized in that: The driving circuit includes a first driver, a second driver, a seventh resistor, an eighth resistor, a ninth resistor and a tenth resistor; The non-inverting input terminal of the first driver is used as the first control voltage input terminal of the driving circuit and is connected to the power management circuit to input the first control voltage; The sink end of the first driver is connected to the first end of the seventh resistor, the source end of the first driver is connected to the first end of the eighth resistor, and the second end of the seventh resistor and the second end of the eighth resistor serve together as the first drive signal output end of the drive circuit, and are connected to the power circuit to output the first drive signal; The non-inverting input terminal of the second driver is used as the second control voltage input terminal of the driving circuit and is connected to the power management circuit to input the second control voltage; The sink end of the second driver is connected to the first end of the ninth resistor, the source end of the second driver is connected to the first end of the tenth resistor, the second end of the ninth resistor and the second end of the tenth resistor together serve as the second drive signal output end of the drive circuit, and are connected to the power circuit to output the second drive signal.

8. The square wave generating circuit according to claim 1, characterized in that: The amplitude detection circuit comprises: a preprocessing circuit connected to the square wave inverter circuit and configured to adjust the amplitude of the output square wave to output a first square wave; a rectifier circuit, connected to the preprocessing circuit, configured to rectify the first square wave to output a DC square wave pulse; a pulse width compensation circuit, connected to the rectification circuit and the control circuit, and configured to perform voltage compensation on the DC square wave pulse to output the amplitude sampling signal; The amplitude sampling signal is direct current and has the same amplitude as the direct current square wave pulse.

9. The square wave generating circuit as claimed in claim 8, characterized in that: The pre-processing circuit includes a second operational amplifier, a twelfth resistor, a thirteenth resistor, a fourteenth resistor and a fifteenth resistor; The first end of the twelfth resistor serves as the output square wave input end of the preprocessing circuit and is connected to the square wave inverter circuit to input the output square wave; the second end of the twelfth resistor is connected to the first end of the thirteenth resistor and the non-inverting input end of the second operational amplifier, the first end of the fourteenth resistor is connected to the first end of the fifteenth resistor and the inverting input end of the second operational amplifier, the output end of the second operational amplifier and the second end of the fifteenth resistor jointly serve as the first square wave output end of the preprocessing circuit and are connected to the rectifier circuit to output the first square wave; the second end of the thirteenth resistor and the second end of the fourteenth resistor are connected to the signal ground.

10. The square wave generating circuit according to claim 8, characterized in that: The rectifier circuit includes a third operational amplifier, a first diode, a second diode, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor and a twentieth resistor; The first end of the sixteenth resistor and the first end of the seventeenth resistor are used together as the first square wave input end of the rectifier circuit, and are connected to the preprocessing circuit to input the first square wave; The second end of the sixteenth resistor is connected to the first end of the eighteenth resistor, the cathode of the second diode and the inverting input end of the A channel of the third operational amplifier, the second end of the eighteenth resistor is connected to the anode of the first diode and the first end of the nineteenth resistor, the inverting input end of the B channel of the third operational amplifier is connected to the second end of the seventeenth resistor, the second end of the nineteenth resistor and the first end of the twentieth resistor, the A channel output end of the third operational amplifier is connected to the anode of the second diode and the cathode of the first diode, the second end of the twentieth resistor and the B channel output end of the third operational amplifier are used together as the DC square wave pulse output end of the rectifier circuit, and are connected to the pulse width compensation circuit to output the DC square wave pulse; The A channel non-inverting input terminal of the third operational amplifier and the B channel non-inverting input terminal of the third operational amplifier are commonly connected to the signal ground.

11. The square wave generating circuit according to claim 8, characterized in that: The pulse width compensation circuit includes a first comparator, a fourth operational amplifier, a twenty-first resistor, a twenty-second resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a thirty-third resistor, a thirty-fourth resistor, a thirty-fifth resistor and a third capacitor; The positive phase input terminal of the first comparator and the first end of the twenty-first resistor are jointly used as the DC square wave pulse input terminal of the pulse width compensation circuit, and are connected to the rectifier circuit to input the DC square wave pulse; the inverting input terminal of the first comparator is connected to the first end of the thirty-third resistor and the first end of the thirty-fourth resistor, the output terminal of the first comparator is connected to the first end of the twenty-second resistor, the second end of the twenty-second resistor is connected to the A channel positive phase input terminal of the fourth operational amplifier, the A channel output terminal of the fourth operational amplifier is connected to the first end of the twenty-seventh resistor and the first end of the twenty-third resistor, the A channel inverting input terminal of the fourth operational amplifier is connected to the second end of the twenty-third resistor and the first end of the twenty-fourth resistor, and the B channel of the fourth operational amplifier is connected to the first end of the twenty-second resistor. The inverting input terminal of the channel of the fourth operational amplifier is connected to the second end of the twenty-seventh resistor, the first end of the twenty-fifth resistor and the first end of the twenty-sixth resistor, the non-inverting input terminal of the B channel of the fourth operational amplifier is connected to the second end of the twenty-first resistor, the first end of the thirty-fifth resistor and the first end of the third capacitor, the second end of the twenty-sixth resistor and the B channel output terminal of the fourth operational amplifier are jointly used as the amplitude sampling signal output terminal of the pulse width compensation circuit, and are connected to the control circuit to output the amplitude sampling signal; the second end of the thirty-third resistor is connected to the second power supply, the second end of the twenty-fifth resistor is connected to the third power supply, and the second end of the thirty-fifth resistor, the second end of the third capacitor, the second end of the thirty-fourth resistor and the second end of the twenty-fourth resistor are jointly connected to the signal ground.

12. The square wave generating circuit according to any one of claims 1 to 11, characterized in that: The control circuit includes a digital signal controller, a digital-to-analog converter, an optical isolation amplifier, a fifth operational amplifier, a twenty-eighth resistor, a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor and a second capacitor; The first input and output terminal of the digital signal controller is connected to the chip selection terminal of the digital-to-analog converter, the second input and output terminal of the digital signal controller is connected to the digital serial clock input terminal of the digital-to-analog converter, the third input and output terminal of the digital signal controller is connected to the digital serial data input terminal of the digital-to-analog converter U2, the A channel analog voltage output terminal of the digital-to-analog converter serves as the adjustment voltage output terminal of the control circuit, and is connected to the voltage-controlled DC power supply circuit to output the adjustment voltage; the fourth input and output terminal of the digital signal controller is connected to the output terminal of the fifth operational amplifier and the first end of the thirty-second resistor, and the positive input terminal of the fifth operational amplifier is connected to the positive input terminal of the fifth operational amplifier. an end connected to the first end of the twenty-ninth resistor and the first end of the thirty-first resistor, an inverting input end of the fifth operational amplifier is connected to the second end of the thirty-second resistor and the first end of the thirtieth resistor, a second end of the thirtieth resistor is connected to the negative output end of the optical isolation amplifier, a second end of the twenty-ninth resistor is connected to the positive output end of the optical isolation amplifier, a non-inverting input end of the optical isolation amplifier is connected to the first end of the twenty-eighth resistor and the first end of the second capacitor, and a second end of the twenty-eighth resistor is used as an amplitude sampling signal input end of the control circuit and is connected to the amplitude detection circuit to input the amplitude sampling signal; The second end of the thirty-first resistor is connected to the power ground, and the inverting input end of the optical isolation amplifier and the second end of the second capacitor are commonly connected to the signal ground.

13. An electronic device, characterized in that: Comprising the square wave generating circuit as described in any one of claims 1 to 12.

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