Low-side driving circuit and driving device

Abstract

The present invention discloses a low-side drive circuit and a drive device, wherein the low-side drive circuit comprises: an output transistor; a control transistor, which is coupled to the control end of the output transistor through its input end, and is optionally coupled to a ground level through its output end; wherein, when the low-side drive circuit switches to turn off the output, the control transistor couples the control end of the output transistor to the ground level to quickly reduce the control end voltage of the output transistor. The low-side drive circuit provided by the present invention can significantly shorten the turn-off delay of the output transistor, allowing it to quickly enter a stage where the turn-off rate is controllable, ensuring that the actual drive duration and the expected drive duration are basically matched, and taking into account the advantage of controllable turn-off speed.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a low-side drive circuit and a drive device. Background Art

[0002] In a drive device, especially when used to drive a load output such as a motor, the output of a drive signal is usually completed by configuring a drive circuit; the drive circuit can be set on the high side and / or the low side, so as to convert the control signal input from the previous circuit into a suitable drive signal to start and stop the motor load.

[0003] The driving circuit provided in the prior art, in order to realize the slow shutdown of the driving output and control the shutdown speed of the output side switch, usually uses a current source to discharge the output side after the controlled shutdown, so as to realize the control of the slow shutdown of the driving output by controlling the current source. However, the delay generated by the driving circuit when turning off the output is usually greater than the delay generated when turning on the output, resulting in the duration of the signal input to the driving circuit indicating the driving being mismatched with the actual working duration of the driving circuit; and simply adjusting the output of the current source will result in uneven speed of the slow shutdown process, which cannot meet the actual application requirements. Summary of the invention

[0004] One of the purposes of the present invention is to provide a low-side drive circuit to solve the technical problems in the prior art that the actual drive duration does not match the expected duration, the drive circuit has a slow shutdown response speed, and the shutdown speed is uneven and uncontrollable.

[0005] One of the objects of the present invention is to provide a driving device.

[0006] To achieve one of the above-mentioned purposes of the invention, an embodiment of the present invention provides a low-side driving circuit, comprising: an output transistor; a control transistor, which is coupled to the control end of the output transistor through its input end, and is optionally coupled to a ground level through its output end; wherein, when the low-side driving circuit is switched to turn off the output, the control transistor couples the control end of the output transistor to the ground level to quickly reduce the control end voltage of the output transistor.

[0007] As a further improvement of one embodiment of the present invention, the output transistor is coupled with its input end to or serves as the driving output end of the low-side driving circuit; the control end of the control transistor is coupled to the driving output end, and when the input end voltage of the output transistor is raised to a first voltage, the control transistor is turned off and at least slows down the falling speed of the control end voltage of the output transistor.

[0008] As a further improvement of an embodiment of the present invention, when the low-side drive circuit switches to turn off the output, the control transistor couples the control terminal of the output transistor to the ground level to pull the control terminal voltage of the output transistor down to near the Miller platform region.

[0009] As a further improvement of one embodiment of the present invention, the low-side drive circuit also includes a first pull-down switch, which is used to close and couple the output end of the control transistor to the ground level when the low-side drive circuit switches to turn off the output, so as to couple the control end of the output transistor to the ground level through the control transistor.

[0010] As a further improvement of one embodiment of the present invention, the low-side drive circuit also includes: a pull-down current source, coupled to the ground level through its output end; a second pull-down switch, connected in series between the control end of the output transistor and the input end of the pull-down current source, and when the low-side drive circuit switches to turn off the output, the input end of the pull-down current source is coupled to the control end of the output transistor, so that the discharge current of the control end of the output transistor is greater than or equal to the pull-down current.

[0011] As a further improvement of one embodiment of the present invention, the output transistor is coupled with its input end to or serves as the driving output end of the low-side driving circuit; when the control terminal voltage of the output transistor is pulled down to the Miller platform region, the control transistor is turned off, and the rising slope of the driving output terminal voltage is positively correlated with the magnitude of the pull-down current.

[0012] As a further improvement of an embodiment of the present invention, the low-side drive circuit also includes: a first pull-up current source, coupled to a power supply level through its input terminal; a first pull-up switch, connected in series between the control terminal of the output transistor and the output terminal of the first pull-up current source, and when the low-side drive circuit switches to turn on the output, the output terminal of the first pull-up current source is coupled to the control terminal of the output transistor to increase the control terminal voltage of the output transistor.

[0013] As a further improvement of an embodiment of the present invention, when the low-side drive circuit switches to the output-on state, the first pull-up switch couples the output end of the first pull-up current source to the control end of the output transistor, and pulls up the control end voltage of the output transistor to near the Miller platform region; the output transistor is coupled to or serves as the drive output end of the low-side drive circuit with its input end; when the control end voltage of the output transistor is in the Miller platform region, the falling slope of the drive output end voltage is positively correlated with the magnitude of the first pull-up current.

[0014] As a further improvement of one embodiment of the present invention, the low-side drive circuit also includes: a second pull-up current source, coupled to the power supply level through its input terminal; a second pull-up switch, connected in series between the control terminal of the output transistor and the output terminal of the second pull-up current source, and when the voltage of the drive output terminal drops to the second voltage, the output terminal of the second pull-up current source is coupled to the control terminal of the output transistor to quickly increase the control terminal voltage of the output transistor.

[0015] As a further improvement of one embodiment of the present invention, the low-side drive circuit also includes a control signal terminal, a comparator, a first inverter, a second inverter and a logic OR gate; the output terminal of the logic OR gate is coupled to the control terminal of the second pull-up switch; the control signal terminal is coupled to the first input terminal of the logic OR gate through the second inverter; the output terminal of the comparator is coupled to the second input terminal of the logic OR gate through the first inverter; the non-inverting input terminal of the comparator is coupled to the second voltage, and the inverting input terminal of the comparator is coupled to the drive output terminal.

[0016] As a further improvement of one embodiment of the present invention, the low-side drive circuit also includes a first pull-up switch, a second pull-up switch, a first pull-down switch, and a second pull-down switch for adjusting the control terminal voltage of the output transistor, and respectively coupled to the control signal terminal through their own control terminals; the first pull-up switch and the second pull-up switch are configured as P-type transistors, and the first pull-down switch and the second pull-down switch are configured as N-type transistors; the control transistor is configured as a P-channel field effect transistor, and the output transistor is configured as an N-channel field effect transistor.

[0017] To achieve one of the above-mentioned objects of the invention, an embodiment of the present invention provides a driving device, comprising the low-side driving circuit described in any one of the above-mentioned technical solutions.

[0018] Compared with the prior art, the low-side drive circuit provided by the present invention can couple the ground level to the control end of the output transistor when the low-side drive circuit is switched to off, so as to quickly reduce the control end voltage of the output transistor, so that it is quickly turned off to a certain extent, and then the speed at which the output transistor continues to be turned off is controlled as needed. In this way, the turn-off delay of the output transistor can be greatly shortened, so that it can quickly enter the stage where the turn-off rate is controllable, ensuring that the actual drive time and the expected drive time are basically matched, and taking into account the advantage of the controllable turn-off speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 Schematic diagram of the structure of a low-side driving circuit in one embodiment of the present invention.

[0020] Figure 24 is a circuit diagram of a low-side driver circuit according to an embodiment of the present invention.

[0021] Figure 3 1 is a waveform diagram of relevant electrical parameters when a low-side driving circuit is implemented in one embodiment of the present invention. DETAILED DESCRIPTION

[0022] The present invention will be described in detail below in conjunction with the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional changes made by a person skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0023] It should be noted that the term "comprises" or any other variation thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In addition, the terms "first", "second", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0024] An embodiment of the present invention provides a driving device, which can be applied to large-volume equipment such as cars (energy types include but are not limited to gasoline, diesel, hybrid, pure electric, plug-in hybrid and extended-range), trucks, buses, urban rail vehicles, and can also be applied to small-volume equipment such as robots. Preferably, the driving device can be used to drive loads such as motors in any of the above-mentioned devices to achieve transmission or other functions of equipment such as hubs and connecting rods. Preferably, the driving device provided by the present invention includes a low-side drive circuit to achieve rapid response to control signals, achieve control of subsequent circuits and loads, and overcome the defects of large delays and low control accuracy in the prior art. Specifically, the low-side drive circuit can be a low-side drive circuit provided by any of the technical solutions below.

[0025] Of course, since devices such as cars and robots themselves have driving functions, the driving device defined in the present invention can also be interpreted as the cars, robots and other devices themselves, in addition to the specific components inside the device for performing load driving.

[0026] An embodiment of the present invention provides a low-side driving circuit, which can be arranged in any of the above-mentioned driving devices to achieve corresponding driving functions.

[0027] like Figure 1 and Figure 2As shown, the low-side drive circuit provided by the present invention includes an output transistor NM1 and a control transistor PM1. In one embodiment, the output transistor NM1 can be configured as an N-type transistor to match the functional requirements of the low-side drive; specifically, it can be configured as an N-channel field effect transistor to achieve uniform and controllable closing and / or opening speeds. Of course, the present invention does not exclude adjusting the selection, connection relationship or setting position of components in the technical solution according to actual application needs. For example, based on the technical route provided by the present invention, it is transformed and applied to high-side drive, etc.

[0028] The input terminal of the control transistor PM1 is coupled to the control terminal of the output transistor NM1; the output terminal of the control transistor PM1 is optionally coupled to the low level VSS. In one embodiment, the control transistor PM1 can be configured as a P-type transistor to match the adjustment requirements of the control terminal voltage of the output transistor NM1; specifically, it can be configured as a P-channel field effect transistor. Similarly, the present invention does not necessarily exclude configuring the control transistor PM1 as other options.

[0029] In the embodiment where the control transistor PM1 is configured as a P-channel field effect transistor, its input terminal can be interpreted as the source of the P-channel field effect transistor, and its output terminal can be interpreted as the drain of the P-channel field effect transistor. In the embodiment where the output transistor NM1 is configured as an N-channel field effect transistor, its control terminal can be interpreted as the gate of the N-channel field effect transistor.

[0030] The ground level VSS can be any level relative to the ground, and can be the ground terminal of a driver chip used to carry the low-side driver circuit; specifically, it can be the common ground terminal on the driver chip. The "optionally" indicates that during the implementation of the low-side driver circuit, there is at least a state in which the control terminal of the control transistor PM1 is coupled to the ground level VSS; of course, when implementing the low-side driver circuit, it can also include a state in which the control terminal of the control transistor PM1 is disconnected from the ground level VSS.

[0031] The "coupling" is embodied in forms including but not limited to direct connection, indirect connection, etc. As for the coupling between the control transistor PM1 and the output transistor NM1 and the low level VSS, the function is to pull down the control terminal voltage of the output transistor PM1, so that the connection mode that can achieve the above function is included in the protection scope of the present invention.

[0032] Specifically, the control transistor PM1 may be configured to couple the control terminal of the output transistor NM1 to the ground level VSS to quickly reduce the control terminal voltage of the output transistor NM1 when the low-side drive circuit switches to turn off the output.

[0033] Thus, compared with adjusting the conduction degree of the output transistor NM1 by the current source during the whole process from switching off to completely turning off the output transistor NM1, the above technical solution provided by the present invention can quickly reduce the voltage level of the control terminal of the output transistor NM1 at the beginning of switching off the output, and turn off the output transistor NM1 to a certain conduction degree, so as to control the speed of the subsequent further turning off process of the output transistor NM1;

[0034] Furthermore, the technical solution provided by the present invention can shorten the overall shutdown delay of the low-side drive circuit, making it closer to and basically matching the overall startup delay, thereby improving the situation where the actual drive output duration of the low-side drive circuit does not match the expected drive output duration, especially avoiding the problem that the actual drive output duration is longer than the expected drive output duration, thereby improving the overall control accuracy of the low-side drive circuit.

[0035] Combination Figure 3 As shown, if it is assumed that the control signal comd switches from a high level to a low level, indicating that the low-side drive circuit switches to a closed output, in particular, when the control signal comd switches from a digital signal 1 to a digital signal 0, since the control transistor PM1 couples the control terminal of the output transistor NM1 to the low level VSS, the control terminal current Igate of the output transistor NM1 increases in the reverse direction, indicating that the control terminal is in a fast discharge state, and the control terminal voltage Vgate of the output transistor NM1 is instantly pulled down to a certain voltage to present a first conduction state state1; at the same time, the input terminal voltage Vout of the output transistor NM1 is slowly raised.

[0036] As for the two technical effects of driving duration matching and shortening the off delay td_off, as an explanatory explanation, it is assumed that when the input terminal voltage of the output transistor NM1 rises to a certain value, it is considered that the low-side driving circuit has completed the response to the off output control indicated by the control signal comd; for example, the input terminal voltage Vout of the output transistor NM1 is used as the voltage of the driving output terminal of the low-side driving circuit, and it is assumed that when Vout=10%*Vom (where Vom represents the maximum voltage output by the driving output terminal), it is considered that the response to the control signal comd switching from digital signal 1 to digital signal 0 has been completed. In one case, if in the above-mentioned first conduction state state1, the input terminal voltage of the output transistor NM1 has satisfied Vout≥10%*Vom, then the control transistor PM1 is equivalent to completing the response to the control signal comd during its conduction period, greatly shortening the off delay td_off. In another case, if the 10%*Vom is higher than the input terminal voltage Vout of the output transistor NM1 in the first conduction state state1 (that is, as Figure 3The state shown in the figure), at least the process of raising the input voltage Vout by the control transistor PM1 also shortens the time for Vout to continue to rise until it reaches 10%*Vom. Therefore, no matter which of the above configurations, they all represent the technical solution provided by the present invention, which can effectively reduce the off delay td_off of the low-side drive circuit.

[0037] In one implementation, the output terminal of the output transistor NM1 is coupled to the ground level VSS; in an implementation where the output transistor NM1 is configured as an N-channel field effect transistor, the output terminal may be the source of the N-channel field effect transistor.

[0038] In one embodiment, the input end of the output transistor NM1 is coupled to the driving output end OUT of the low-side driving circuit, or the input end of the output transistor NM1 directly serves as the driving output end OUT of the low-side driving circuit. In an embodiment where the output transistor NM1 is configured as an N-channel field effect transistor, the input end may be the drain of the N-channel field effect transistor.

[0039] The control terminal of the control transistor PM1 is coupled to the driving output terminal OUT to achieve on-off control following the voltage at the driving output terminal OUT. Further, the control transistor PM1 is configured such that when the input terminal voltage of the output transistor NM1 is raised to a first voltage, the control transistor PM1 is turned off, and as the control transistor PM1 is turned off, the decreasing speed of the control terminal voltage of the output transistor NM1 is at least slowed down. That is, at this time, the decreasing speed of the control terminal voltage is slowed down, or the control terminal voltage no longer decreases.

[0040] Thus, firstly, since the input terminal voltage of the output transistor NM1 is raised to the first voltage, the output of the driving output terminal OUT can be synchronously adjusted before, after or simultaneously with the output transistor NM1 being turned off to the first conduction state state1; secondly, the falling speed of the control terminal voltage of the output transistor NM1 can be adjusted by controlling the on and off of the transistor PM1; furthermore, the control terminal voltage of the output transistor NM1 can be adaptively feedback-adjusted according to the input terminal voltage of the output transistor NM1 or according to the voltage of the driving output terminal OUT, so as to adjust the conduction state or the degree of closing of the output transistor NM1; and, since the rapid decline of the control terminal voltage of the output transistor NM1 is accompanied by the rise of its input terminal voltage, such a configuration can achieve the effect that the control terminal voltage first declines rapidly and then slows down, thereby achieving the effect that the output transistor NM1 is first turned off rapidly and then slowly turned off.

[0041] In one embodiment, the control transistor PM1 is configured to couple the control terminal of the output transistor NM1 to the ground level VSS when the low-side drive circuit is switched to turn off the output, so as to pull the control terminal voltage of the output transistor NM1 down to near the Miller platform region. In this way, the output transistor NM1 can be turned off to a certain conduction state, and the property of the output transistor NM1 in the conduction state can be used to achieve precise control of the terminal voltage of the output transistor NM1.

[0042] In a specific example, when the control terminal voltage of the output transistor NM1 is pulled down to the Miller platform region, it can be considered that the output transistor NM1 is simultaneously turned off to the first conduction state state1, and / or it can be considered that the input terminal voltage of the output transistor NM1 is simultaneously raised to the first voltage. That is, the first conduction state state1, the first voltage and the conditions of the Miller platform region can be achieved at the same time.

[0043] Of course, the present invention does not exclude the implementation methods that are carried out in sequence. For example, in another specific example, the control terminal voltage Vgate of the output transistor NM1 drops rapidly to 1.5V, and its input terminal voltage Vout is raised to 0.5V, and the input terminal-control terminal voltage Vsg of the control transistor PM1 (or in one embodiment, the source-gate voltage of the control transistor PM1) is close to 1V; at this time, it can be considered that the output transistor NM1 is turned off to the first conduction state state1, and the control terminal voltage of the output transistor NM1 enters the Miller platform region. The output transistor NM1 is continuously turned off until its input terminal voltage Vout is raised to 0.8V, and the input terminal-control terminal voltage Vsg of the control transistor PM1 is reduced to 0.7V, and the control transistor PM1 is about to be turned off; at this time, it can be considered that the first voltage is 0.8V. That is, in this specific example, the conditions of the first conduction state state1 and the Miller platform region are achieved simultaneously and first, and the condition of the first voltage is achieved later.

[0044] The “nearby” may be interpreted as pulling down the control terminal voltage of the output transistor NM1 to be equal to the control terminal voltage pointed to by the Miller platform region of the output transistor NM1, or may be interpreted as pulling it down to a control voltage slightly greater than or slightly less than the control voltage pointed to by its own Miller platform region.

[0045] The Miller platform region is a voltage platform generated based on the Miller effect of the transistor itself, which represents the stage in which the gate-source voltage Vgs (for the output transistor NM1, it can be the control terminal-output terminal voltage) remains unchanged during the process of the transistor switching from off to fully on; when the source of the transistor is connected to the ground level VSS or other fixed levels, the "platform" formed by this gate-source voltage Vgs will be reflected in the gate voltage of the transistor (for the output transistor NM1, it can be the control terminal voltage Vgate) and form a "platform".

[0046] At this time, since the control terminal voltage Vgate or the control terminal-output terminal voltage remains stable, the conduction degree of the output transistor NM1 can be considered to be maintained at the first conduction state state1, so the input terminal voltage Vout of the output transistor NM1 (preferably, the voltage Vout at the driving output terminal OUT) can be considered to be only affected by the control terminal current Igate of the output transistor NM1. Therefore, in this process, the input terminal voltage Vout can be adjusted by adjusting the control terminal current Igate, and even the linear adjustment and rising / falling slope adjustment of the input terminal voltage Vout can be achieved.

[0047] It can be understood that the input and output terminals of the transistor in the present invention are defined with reference to the direction of current flow thereon; when the input and output terminals of the transistor are defined by other standards, the terminal names mentioned above can be adjusted accordingly.

[0048] In one embodiment, continue as Figure 1 and Figure 2 As shown, the low-side drive circuit may further include a first pull-down switch SN1. In a specific example, the first pull-down switch SN1 may be configured as an N-type transistor to match the functional requirement that the control transistor PM1 is optionally coupled to the ground level VSS. Of course, it may also be configured as other switches or contacts, in particular switches or contacts that can establish a linkage relationship with other pull-up switches or pull-down switches.

[0049] The first pull-down switch SN1 is configured such that when the low-side drive circuit switches to the off output, the first pull-down switch SN1 is closed, and the first pull-down switch SN1 couples the output end of the control transistor PM1 to the ground level VSS, so as to couple the control end of the output transistor NM1 to the ground level VSS through the control transistor PM1. That is, the "optional" coupling relationship between the output end of the control transistor PM1 and the ground level VSS is established through the first pull-down switch SN1. In this way, the external regulation control of the output transistor NM1 and the control transistor PM1 in addition to the internal mutual voltage regulation can be realized by controlling the opening and closing of the first pull-down switch SN1. In particular, the control end of the first pull-down switch SN1 can be coupled with the control signal comd, in particular, coupled with its reverse signal, to realize the on-off control of the branch where the control transistor PM1 is located.

[0050] Specifically, the first pull-down switch SN1 is connected in series between the control transistor PM1 and the ground level VSS. Figure 3 As shown in the dotted line part; the input end of the first pull-down switch SN1 is connected to the output end of the control transistor PM1, and the output end of the first pull-down switch SN1 is connected to the ground level VSS; the drain of the first pull-down switch SN1 is connected to the drain of the control transistor PM1, the source of the first pull-down switch SN1 is connected to the ground level VSS, and the gate of the first pull-down switch SN1 is coupled to the control signal comd.

[0051] Further, the control signal comd is sent to the low-side drive circuit through the control signal terminal COMD, and a second inverter INV2 is connected in series between the control signal terminal COMD and the control terminal of the first pull-down switch SN1. When the low-side drive circuit is controlled to switch to the off output, the control signal comd is switched from the digital signal 1 to the digital signal 0, the control signal terminal COMD outputs a low level, the second inverter INV2 outputs a high level, the first pull-down switch SN1 is controlled to close and couple the output end of the control transistor PM1 to the ground level VSS. When the low-side drive circuit is controlled to switch to the on output, the control signal comd is switched from the digital signal 0 to the digital signal 1, the control signal terminal COMD outputs a high level, the second inverter INV2 outputs a low level, and the first pull-down switch SN1 is controlled to open and disconnect the coupling relationship between the output end of the control transistor PM1 and the ground level VSS.

[0052] In one embodiment, the low-side drive circuit further includes a pull-down current source CF and a second pull-down switch SN2. In a specific example, the second pull-down switch SN2 can be configured as an N-type transistor to match the pull-down voltage, especially the functional requirements of the control terminal voltage of the pull-down output transistor NM1. Of course, it can also be configured as other switches and contacts, especially switches and contacts that can establish a linkage relationship with other pull-up switches or pull-down switches.

[0053] The output terminal of the pull-down current source CF is coupled to the low level VSS. The second pull-down switch SN2 is connected in series between the control terminal of the output transistor NM1 and the input terminal of the pull-down current source CF; it can be specifically shown as Figure 1 In this way, the pull-down current source CF can be controlled to selectively adjust the discharge of the control terminal of the output transistor NM1 with its set pull-down current Ioff, so as to adjust the voltage drop speed of the control terminal of the output transistor NM1, the closing speed of the output transistor NM1, and the closing speed of the low-side drive circuit.

[0054] The second pull-down switch SN2 is configured to couple the input end of the pull-down current source CF to the control end of the output transistor NM1 when the low-side drive circuit is switched to turn off the output, so that the discharge current of the control end of the output transistor NM1 is greater than or equal to the pull-down current Ioff. In this way, on the basis of simply configuring the control transistor PM1 to achieve the "step-by-step adjustment" of the control voltage of the output transistor NM1, the pull-down current source CF can be optionally introduced to achieve an effect of approximate "stepless adjustment", which is also equivalent to dividing the shutdown process of the output transistor NM1 into two processes, which can adapt to more application scenarios and requirements. Among them, the second pull-down switch SN2 is closed when the low-side drive circuit is switched to turn off the output.

[0055] Specifically, the input end of the second pull-down switch SN2 is connected to the control end of the output transistor NM1, and the output end of the second pull-down switch SN2 is connected to the input end of the pull-down current source CF; the drain of the second pull-down switch SN2 is connected to the gate of the output transistor NM1, the source of the second pull-down switch SN2 is connected to the input end of the pull-down current source CF, and the gate of the second pull-down switch SN2 is coupled to the control signal comd.

[0056] Further, the control signal comd is sent to the low-side drive circuit through the control signal terminal COMD, and a second inverter INV2 is connected in series between the control signal terminal COMD and the control terminal of the second pull-down switch SN2. When the low-side drive circuit is controlled to switch to the output off, the control signal comd is switched from digital signal 1 to digital signal 0, the control signal terminal COMD outputs a low level, the second inverter INV2 outputs a high level, the second pull-down switch SN2 is controlled to close and couple the input end of the pull-down current source CF to the control end of the output transistor NM1. When the low-side drive circuit is controlled to switch to the output on, the control signal comd is switched from digital signal 0 to digital signal 1, the control signal terminal COMD outputs a high level, the second inverter INV2 outputs a low level, and the second pull-down switch SN2 is controlled to open and disconnect the coupling relationship between the control end of the output transistor NM1 and the pull-down current source CF.

[0057] When the pull-down current source CF and the control transistor PM1 are coupled to the control terminal of the output transistor NM1 at the same time, the Figure 3 As shown, the current on the control transistor PM1 is defined as Ipm1, and the maximum reverse current Igate of the control terminal can reach Ipm1+Ioff (or the control terminal current Igate can be reduced to -Ipm1-Ioff). At this time, it is equivalent to that the discharge current of the control terminal of the output transistor is greater than the pull-down current Ioff. When the control transistor PM1 is turned off and the pull-down current source CF independently adjusts the discharge of the control terminal of the output transistor NM1, the control terminal current Igate is substantially equal to the pull-down current Ioff.

[0058] Preferably, the discharge current (control terminal current Igate) of the control terminal NM1 of the output transistor is formed as follows: first greater than the pull-down current Ioff, and then equal to the pull-down current Ioff. In this way, the voltage level of the output terminal voltage Vgate can be quickly reduced first, and then the output transistor NM1 can be slowly turned off at a certain rate. Not only can the technical effects described above be achieved, but also the conventional control logic of the low-side drive circuit will not be overturned, and it has a wider range of applications and adaptability.

[0059] Further, in an embodiment where the output end of the output transistor NM1 is coupled to the driving output end OUT of the low-side driving circuit, or in an embodiment where the output end of the output transistor NM1 directly serves as the driving output end OUT of the low-side driving circuit, when the control end voltage Vgate of the output transistor NM1 is pulled down to the Miller platform region, or when the output transistor NM1 is turned off to the first conduction degree state1, the control transistor NM1 is turned off, and the rising slope of the driving output end voltage Vout is positively correlated with the magnitude of the pull-down current Ioff. In this way, on the one hand, when the output transistor NM1 works in the Miller platform region, the driving output end voltage Vout can be adjusted by the pull-down current Ioff to achieve single variable control; on the other hand, the correlation between the pull-down current Ioff and the driving output end voltage Vout can be constructed, thereby improving the convenience of users adjusting the driving output end voltage Vout (that is, the output of the low-side driving circuit), especially facilitating the process of users adjusting the low-side driving circuit to turn off the driving output.

[0060] Among them, the size of the pull-down current Ioff is interpreted as its size at the absolute value level, and the present invention does not define the size of the pull-down current Ioff as positive or negative based on the current direction. Specifically, the larger the absolute value of the pull-down current Ioff, the larger the rising slope of the driving output terminal voltage Vout, the faster the change speed, the faster the closing speed of the output transistor NM1, the shorter the closing time of the output transistor NM1, the faster the speed of the low-side drive circuit closing the output, and the shorter the time of the low-side drive circuit closing the output. The smaller the absolute value of the pull-down current Ioff, the smaller the rising slope of the driving output terminal voltage Vout, the slower the change speed, the slower the closing speed of the output transistor NM1, the longer the closing time of the output transistor NM1, the slower the speed of the low-side drive circuit closing the output, and the longer the time of the low-side drive circuit closing the output.

[0061] In a preferred embodiment of the present invention, when the low-side drive circuit turns off the drive output, the following stage changes are completed in sequence: (1) the control signal comd is received and switched from the digital signal 1 to the falling edge of the digital signal 0; (2) the branch where the control transistor PM1 is located is turned on and the control terminal voltage Vgate is quickly reduced, the control terminal current Igate=Ipm1+Ioff is quickly reversed, and the drive output terminal voltage Vout is raised; (3) the output transistor NM1 is turned off to the first conduction state, the control terminal voltage Vgate enters the Miller platform area, the control terminal current Igate=Ioff, the drive output terminal voltage Vout is raised with a larger slope and the slope is positively correlated with the size of the pull-down current Ioff; (4) the drive output terminal voltage Vout=10%*Vom, the low-side drive circuit completes the response to the above-mentioned falling edge in the control signal comd, the output transistor NM1 continues to work in the Miller platform area, and the drive output terminal Vout continues to maintain a positive correlation with the size of the pull-down current Ioff.

[0062] After this, the preferred implementation may further include a variation stage: (5) when the driving output terminal voltage Vout is raised to the maximum driving output voltage Vom, the driving output terminal voltage Vout is maintained at the maximum driving output voltage Vom, and the control terminal voltage Vgate passes through the Miller platform region and continues to decrease under the discharge regulation of the pull-down current Ioff; (6) when the control terminal voltage Vout drops to the minimum, the output transistor NM1 is turned off to the second conduction state state2, that is, the output transistor NM1 is completely turned off, and the control terminal current Igate = 0.

[0063] In one embodiment, continue as Figure 1 and Figure 2 As shown, the low-side driving circuit may further include a pull-up current source for controlling the output transistor NM1 to be turned on and for controlling the low-side driving circuit to start outputting.

[0064] In one embodiment, the low-side drive circuit further includes a first pull-up current source CO1 and a first pull-up switch SP1. In a specific example, the first pull-up switch SP1 can be configured as a P-type transistor to match the pull-up voltage, especially the functional requirements of the control terminal voltage of the pull-up output transistor NM1. Of course, it can also be configured as other switches or contacts, especially switches or contacts that can establish a linkage relationship with other pull-up switches or pull-down switches.

[0065] The input terminal of the first pull-up current source CO1 is coupled to a power supply level VCC. The power supply level VCC may be any stable high level; the power supply level VCC may be a power supply voltage of the low-side driver circuit or a chip where the low-side driver circuit is located.

[0066] The first pull-up switch SP1 is connected in series between the control terminal of the output transistor NM1 and the output terminal of the first pull-up current source CO1; it can be specifically shown as Figure 1 In this way, the first pull-up current source CO1 can be controlled to charge the control terminal of the output transistor NM1 with the first pull-up current Ion1 set therein, so as to adjust the rising speed of the control terminal voltage of the output transistor NM1, the opening speed of the output transistor NM1, and the opening speed of the low-side drive circuit.

[0067] The first pull-up switch SP1 is configured to couple the output end of the first pull-up current source CO1 to the control end of the output transistor NM1 to increase the control end voltage of the output transistor NM1 when the low-side drive circuit switches to the output on state. In this way, the turn-on speed of the output transistor NM1 and the turn-on speed of the low-side drive circuit can be adjusted by adjusting the first pull-up current Ion1. When other pull-up currents or pull-up circuits are superimposed, the output transistor NM1 and the low-side drive circuit can be turned on quickly; when other pull-up currents or pull-up circuits are not set, the turn-on speed can be accurately controlled by the single variable of the first pull-up current Ion1. The first pull-up switch SP1 is closed when the low-side drive circuit switches to the output on state.

[0068] Combination Figure 3 As shown, if it is assumed that the control signal comd switches from a low level to a high level, indicating that the low-side driving circuit switches to turn on the output, in particular, when the control signal comd switches from a digital signal 0 to a digital signal 1, since the first pull-up current source CO1 charges the control terminal of the output transistor NM1 with the first pull-up current Ion1, the control terminal current Igate of the output transistor NM1 increases, indicating that the control terminal is in a charging state, and the control terminal voltage Vgate of the output transistor NM1 is raised to a certain voltage to present a third conduction state state3; at the same time, the input terminal voltage Vout of the output transistor NM1 is about to drop.

[0069] In this specific embodiment, it is assumed that when the input terminal voltage of the output transistor NM1 drops to a certain value, it is considered that the low-side drive circuit has completed the response to the output control indicated by the control signal comd; for example, the input terminal voltage Vout of the output transistor NM1 is used as the voltage of the drive output terminal of the low-side drive circuit, and it is assumed that when Vout=90%*Vom, it is considered that the response to the control signal comd switching from digital signal 0 to digital signal 1 has been completed. In one case, if in the third conduction state state3, the input terminal voltage of the output transistor NM1 has satisfied Vout≤90%*Vom, then the first pull-up current source CO1 and the first pull-up switch SP1 are equivalent to completing the response to the control signal comd during their charging period, which can shorten the turn-on delay td_off. In another case, if the 90%*Vom is lower than the input terminal voltage Vout of the output transistor NM1 in the third conduction state state3 (that is, if Figure 3 The state shown in the figure), at least the first pull-up current source CO1 and the first pull-up switch SP1 reduce the input voltage Vout, and also shorten the time for Vout to continue to decrease until it reaches 90%*Vom. In order to match the closing delay td_off and the opening delay td_on to make them as equal as possible, the latter configuration is preferably used.

[0070] The output end of the first pull-up switch SP1 is connected to the control end of the output transistor NM1, and the input end of the first pull-up switch SP1 is connected to the output end of the first pull-up current source CO1; the drain of the first pull-up switch SP1 is connected to the gate of the output transistor NM1, the source of the first pull-up switch SP1 is connected to the output end of the first pull-up current source CO1, and the gate of the first pull-up switch SP1 is coupled to the control signal comd.

[0071] Further, the control signal comd is sent to the low-side drive circuit through the control signal terminal COMD, and a second inverter INV2 is connected in series between the control signal terminal COMD and the control terminal of the first pull-up switch SP1. When the low-side drive circuit is controlled to switch to the on output, the control signal comd is switched from digital signal 0 to digital signal 1, the control signal terminal COMD outputs a high level, the second inverter INV2 outputs a low level, the first pull-up switch SP1 is controlled to close and couple the output end of the first pull-up current source CO1 to the control end of the output transistor NM1. When the low-side drive circuit is controlled to switch to the off output, the control signal comd is switched from digital signal 1 to digital signal 0, the control signal terminal COMD outputs a low level, the second inverter INV2 outputs a high level, the first pull-up switch SP1 is controlled to open and disconnect the coupling relationship between the control end of the output transistor NM1 and the first pull-up current source CO1.

[0072] In a specific embodiment, when the low-side drive circuit switches to the on-output state, the first pull-up switch SP1 couples the output end of the first pull-up current source CO1 to the control end of the output transistor NM1, and pulls up the control end voltage Vgate of the output transistor NM1 to the vicinity of the Miller platform region. At this time, it is equivalent to the output transistor NM1 being turned on to the third conduction state state3. Through the action of the first pull-up current Ion1, the output transistor NM1 can be quickly turned on to a certain conduction level, thereby improving the overall response speed and facilitating the subsequent use of the property of the output transistor NM1 in the conduction state to achieve precise control of the terminal voltage of the output transistor NM1. For the explanation of the "nearby" and the "Miller platform region", please refer to the above text, which will not be repeated here.

[0073] In a specific embodiment, the output transistor NM1 is configured such that, when the output transistor NM1 is turned on to the third conduction state state3 and maintained therein, the control terminal voltage Vgate is only charged by the first pull-up current Ion1 .

[0074] In a specific embodiment, the input end of the output transistor NM1 is coupled to the driving output end OUT of the low-side driving circuit, or the input end of the output transistor NM1 directly serves as the driving output end OUT of the low-side driving circuit. Further, when the control end voltage Vgate of the output transistor NM1 is in the Miller platform region, or when the output transistor NM1 is turned on to the third conduction degree state3, the falling slope of the driving output end voltage is positively correlated with the magnitude of the first pull-up current. In this way, on the one hand, when the output transistor NM1 works in the Miller platform region, the driving output end voltage Vout can be adjusted by the first pull-up current Ion1 alone to achieve single variable control; on the other hand, the correlation between the first pull-up current Ion1 and the driving output end voltage Vout can be established, thereby improving the convenience of users adjusting the driving output end voltage Vout (that is, the output of the low-side driving circuit), especially facilitating the process of users adjusting the low-side driving circuit to start the driving output.

[0075] The larger the first pull-up current Ion1 is, the larger the slope of the voltage Vout at the output terminal is, the faster the speed of change is, the faster the speed of turning on the output transistor NM1 is, the shorter the time of turning on the output transistor NM1 is, the faster the speed of turning on the output of the low-side drive circuit is, and the shorter the time of turning on the output of the low-side drive circuit is. The smaller the first pull-up current Ion1 is, the smaller the slope of the voltage Vout at the output terminal is, the slower the speed of change is, the slower the speed of turning on the output transistor NM1 is, the longer the time of turning on the output transistor NM1 is, the slower the speed of turning on the output of the low-side drive circuit is, and the longer the time of turning on the output of the low-side drive circuit is.

[0076] In a specific embodiment, after coupling the output end of the first pull-up current source CO1 to the control end of the output transistor NM1 , the first pull-up switch SP1 can make the charging current of the control end of the output transistor NM1 greater than or equal to the first pull-up current Ion1 .

[0077] As described above, when the first pull-up current source CO1 charges the control terminal of the output transistor NM1 alone, the control terminal current Igate is substantially equal to the first pull-up current Ion1 .

[0078] In some embodiments of the present invention, the second pull-up current source CO2 can also be set to charge the control end of the output transistor NM1 to speed up the turn-on speed of the output transistor NM1; when the second pull-up current source CO2 outputs the second pull-up current Ion2, the control end current Igate=Ion1+Ion2 and is greater than the first pull-up current Ion1. Preferably, the charging current (control end current Igate) of the control end of the output transistor NM1 is formed as follows: first equal to the first pull-up current Ion1, and then greater than the first pull-up current Ion1. In this way, the voltage level of the output end voltage Vgate can be stably raised at a certain rate, and then the output transistor NM1 can be quickly turned on. Not only can the technical effects described above be achieved, but also the conventional control logic of the low-side drive circuit will not be overturned, and it has a wider range of applications and adaptability.

[0079] Based on this, the low-side drive circuit further includes a second pull-up current source CO2 and a second pull-up switch SP2. In a specific example, the second pull-up switch SP2 can be configured as a P-type transistor to match the pull-up voltage, especially the functional requirements of the control terminal voltage of the pull-up output transistor NM1. Of course, it can also be configured as other switches or contacts, especially switches or contacts that can establish a linkage relationship with other pull-up switches or pull-down switches.

[0080] The input end of the second pull-up current source CO2 is coupled to the power supply level VCC. The power supply level VCC may be any stable high level; the power supply level VCC may be the power supply voltage of the low-side driver circuit or the chip where the low-side driver circuit is located.

[0081] The second pull-up switch SP2 is connected in series between the control terminal of the output transistor NM1 and the output terminal of the second pull-up current source CO2; it can be specifically shown as Figure 1 In this way, the second pull-up current source CO2 can be controlled to charge the control terminal of the output transistor NM1 with the second pull-up current Ion2 set therein, so as to adjust the rising speed of the control terminal voltage of the output transistor NM1, the opening speed of the output transistor NM1, and the opening speed of the low-side drive circuit.

[0082] The second pull-up switch SP2 is configured to couple the output end of the second pull-up current source CO2 to the control end of the output transistor NM1 when the output voltage Vout of the driving output terminal drops to the second voltage, so as to quickly increase the control end voltage Vgate of the output transistor NM1. In this way, the second pull-up current Ion2 can be superimposed on the first pull-up current Ion1, so as to realize the rapid opening of the output transistor NM1 and the low-side driving circuit. Specifically, after the output voltage Vout of the driving output terminal drops to the second voltage, before the output transistor NM1 is turned on to the fourth conduction state state4 of full conduction, the control end current Igate can always be equal to the sum of the first pull-up current Ion1 and the second pull-up current Ion2.

[0083] The second voltage may be a reference voltage Vref of the low-side driving circuit, which is used to adjust the magnitude of the driving output voltage Vout, or to adjust the magnitude and driving capability of the driving output of the low-side driving circuit.

[0084] Preferably, the low-side driving circuit further comprises a control signal terminal COMD, a comparator COMP, a first inverter INV1, a second inverter INV2 and a logic OR gate OR, wherein the output terminal of the logic OR gate OR is coupled to the control terminal of the second pull-up switch SP2.

[0085] The control signal terminal COMD is coupled to the first input terminal of the logic OR gate OR through the second inverter INV2. The control signal terminal COMD is connected to the input terminal of the second inverter INV2, and the output terminal of the second inverter INV2 is connected to the first input terminal of the logic OR gate OR.

[0086] The output of the comparator COMP is coupled to the second input of the logic OR gate OR through the first inverter INV1. The output of the comparator COMP is connected to the input of the first inverter INV1, and the output of the first inverter INV1 is connected to the second input of the logic OR gate OR.

[0087] A non-inverting input terminal of the comparator COMP is coupled to a second voltage (preferably a reference voltage Vref), and an inverting input terminal of the comparator COMP is coupled to the driving output terminal OUT.

[0088] When the low-side drive circuit is controlled to switch to the output start-up, the control signal comd is switched from the digital signal 0 to the digital signal 1, the control signal terminal COMD outputs a high level, and the second inverter INV2 outputs a low level added to the first input terminal of the logic OR gate OR; the driving output terminal voltage Vout is greater than the reference voltage Vref, the comparator COMP outputs a low level, and the first inverter INV1 outputs a high level added to the second input terminal of the logic OR gate OR; the logic OR gate OR outputs a high level, the second pull-up switch SP2 is controlled to open, and the coupling relationship between the output terminal of the second pull-up current source CO2 and the control terminal of the output transistor NM1 is disconnected.

[0089] Continuing, when the driving output voltage Vout is pulled down to less than the reference voltage Vref under the action of the first pull-up current source CO1, the comparator COMP outputs a high level, and the first inverter INV1 outputs a low level which is added to the second input terminal of the logic OR gate OR; the logic OR gate OR outputs a low level, and the second pull-up switch SP2 is controlled to close, coupling the output terminal of the second pull-up current source CO2 to the control terminal of the output transistor NM1.

[0090] When the low-side drive circuit is controlled to switch to the output off, the control signal comd is switched from the digital signal 1 to the digital signal 0, the control signal terminal COMD outputs a low level, and the second inverter INV2 outputs a high level which is added to the first input terminal of the logic OR gate OR; at this time, regardless of whether the drive output terminal voltage Vout is greater than the reference voltage Vref, that is, regardless of whether a high level or a low level is added to the second input terminal of the logic OR gate OR, the logic OR gate OR always outputs a high level, so that the second pull-up switch SP2 is controlled to open, and the coupling relationship between the output terminal of the second pull-up current source CO2 and the control terminal of the output transistor NM1 is disconnected.

[0091] In a preferred embodiment of the present invention, when the low-side drive circuit turns off the drive output, the following stage changes are completed in sequence: (1) the control signal comd is received and switched from the digital signal 0 to the rising edge of the digital signal 1; (2) the branch where the first pull-up current source CO1 is located is turned on and the control terminal voltage Vgate is raised, and the control terminal current Igate=Ion1 is increased; (3) the output transistor NM1 is turned on to the third conduction state, the control terminal voltage Vgate enters the Miller platform region, and the control terminal current Igate=Ion1 is maintained, and the drive output terminal voltage Vout begins to decrease and the slope is positively correlated with the magnitude of the first pull-up current Ion1; (4) the drive output terminal voltage Vout=90%*Vom, the low-side drive circuit completes the response to the above-mentioned rising edge in the control signal comd, the output transistor NM1 continues to work in the Miller platform region, and the drive output terminal Vout continues to maintain a positive correlation with the magnitude of the first pull-up current Ion1.

[0092] After this, the preferred implementation may further include a variation phase: (5) when the output voltage Vout is driven to drop to the reference voltage Vref, the control voltage Vgate passes through the Miller platform region and is simultaneously charged by the first pull-up current Ion1 and the second pull-up current Ion2 and continues to rise at a larger slope, and the output voltage Vout is driven to continue to drop at a larger slope; (6) when the control voltage Vout rises to the highest, the output transistor NM1 is turned on to the fourth conduction state state4, that is, the output transistor NM1 is fully turned on, and the control current Igate is restored to 0.

[0093] To summarize from another perspective, in one embodiment, the low-side driving circuit further includes a first pull-up switch SP1, a second pull-up switch SP2, a first pull-down switch SN1, and a second pull-down switch SN2 for adjusting the control terminal voltage Vgate of the output transistor NM1. The first pull-up switch SP1, the second pull-up switch SP2, the first pull-down switch SN1, and the second pull-down switch SN2 are respectively coupled to the control signal terminal COMD through their own control terminals.

[0094] The first pull-up switch SP1 and the second pull-up switch SP2 are configured as P-type transistors.

[0095] The first pull-down switch SN1 and the second pull-down switch SN2 are configured as N-type transistors.

[0096] The control transistor SN1 is configured as a P-channel field effect transistor; the output transistor NM1 is configured as an N-channel field effect transistor.

[0097] It can be understood that the above-mentioned various technical solutions can be independent of each other or combined with each other, and the present invention does not list all the technical solutions here.

[0098] When describing the conduction state of the output transistor NM1, the conduction degrees of the second conduction state state2, the first conduction state state1 (the third conduction state state3), and the fourth conduction state state4 are increased in sequence. The first conduction state state1 and the third conduction state state3 may be the same or different. The conduction state may be defined by the magnitude of the current flowing through the output transistor NM1.

[0099] In summary, the low-side drive circuit provided by the present invention can couple the ground level to the control end of the output transistor when the low-side drive circuit is switched to off, so as to quickly reduce the control end voltage of the output transistor, so that it is quickly turned off to a certain extent, and then the speed at which the output transistor continues to be turned off is controlled as needed. In this way, the turn-off delay of the output transistor can be greatly shortened, so that it can quickly enter the stage where the turn-off rate is controllable, ensuring that the actual drive time and the expected drive time are basically matched, and taking into account the advantage of the controllable turn-off speed.

[0100] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0101] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention. They are not intended to limit the scope of protection of the present invention. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. A low-side driving circuit, characterized in that: include: Output transistor; a control transistor coupled to the control terminal of the output transistor via its input terminal and selectively coupled to ground level via its output terminal; Wherein, when the low-side drive circuit switches to turn off the output, the control transistor couples the control terminal of the output transistor to the ground level to quickly reduce the control terminal voltage of the output transistor; The output transistor is coupled with its input end to or serves as the driving output end of the low-side driving circuit; the control end of the control transistor is coupled to the driving output end, and when the input end voltage of the output transistor is raised to a first voltage, the control transistor is turned off and at least slows down the falling speed of the control end voltage of the output transistor.

2. The low-side driving circuit according to claim 1, characterized in that: When the low-side driving circuit is switched to turn off the output, the control transistor couples the control terminal of the output transistor to the ground level to pull the control terminal voltage of the output transistor down to near the Miller platform region.

3. The low-side driving circuit according to claim 1, characterized in that: The low-side driving circuit also includes a first pull-down switch, which is used to close and couple the output end of the control transistor to the ground level when the low-side driving circuit is switched to turn off the output, so as to couple the control end of the output transistor to the ground level through the control transistor.

4. The low-side driving circuit according to claim 1, characterized in that: The low-side driving circuit also includes: A pull-down current source is coupled to the ground level through its output terminal; The second pull-down switch is connected in series between the control end of the output transistor and the input end of the pull-down current source, and when the low-side drive circuit is switched to turn off the output, the input end of the pull-down current source is coupled to the control end of the output transistor, so that the discharge current of the control end of the output transistor is greater than or equal to the pull-down current.

5. The low-side driving circuit according to claim 4, characterized in that: The output transistor is coupled with its input end to or serves as the driving output end of the low-side driving circuit; when the control terminal voltage of the output transistor is pulled down to the Miller platform region, the control transistor is turned off, and the rising slope of the driving output terminal voltage is positively correlated with the magnitude of the pull-down current.

6. The low-side driving circuit according to claim 1, characterized in that: The low-side driving circuit also includes: A first pull-up current source, coupled to a supply level via an input terminal thereof; A first pull-up switch is connected in series between the control terminal of the output transistor and the output terminal of the first pull-up current source, and when the low-side drive circuit is switched to turn on the output, the output terminal of the first pull-up current source is coupled to the control terminal of the output transistor to increase the control terminal voltage of the output transistor.

7. The low-side driving circuit according to claim 6, characterized in that: When the low-side drive circuit is switched to the on-output state, the first pull-up switch couples the output end of the first pull-up current source to the control end of the output transistor, and pulls up the voltage of the control end of the output transistor to the vicinity of the Miller platform region; The output transistor is coupled to or serves as the driving output terminal of the low-side driving circuit with its input terminal; when the control terminal voltage of the output transistor is in the Miller platform region, the falling slope of the driving output terminal voltage is positively correlated with the magnitude of the first pull-up current.

8. The low-side driving circuit according to claim 7, characterized in that: The low-side driving circuit also includes: a second pull-up current source coupled to the supply level via an input terminal thereof; The second pull-up switch is connected in series between the control terminal of the output transistor and the output terminal of the second pull-up current source, and when the voltage of the driving output terminal drops to a second voltage, the output terminal of the second pull-up current source is coupled to the control terminal of the output transistor to quickly increase the control terminal voltage of the output transistor.

9. The low-side driving circuit according to claim 8, characterized in that: The low-side drive circuit further includes a control signal terminal, a comparator, a first inverter, a second inverter and a logic OR gate; the output terminal of the logic OR gate is coupled to the control terminal of the second pull-up switch; The control signal terminal is coupled to the first input terminal of the logic OR gate through the second inverter; the output terminal of the comparator is coupled to the second input terminal of the logic OR gate through the first inverter; The non-inverting input terminal of the comparator is coupled to the second voltage, and the inverting input terminal of the comparator is coupled to the driving output terminal.

10. The low-side driving circuit according to claim 1, characterized in that: The low-side driving circuit also includes a first pull-up switch, a second pull-up switch, a first pull-down switch, and a second pull-down switch for adjusting the control terminal voltage of the output transistor and respectively coupled to the control signal terminal through the control terminal thereof; The first pull-up switch and the second pull-up switch are configured as P-type transistors, and the first pull-down switch and the second pull-down switch are configured as N-type transistors; The control transistor is configured as a P-channel field effect transistor, and the output transistor is configured as an N-channel field effect transistor.

11. A driving device, characterized in that: The invention comprises the low-side driving circuit as described in any one of claims 1 to 10.

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