IGBT device and preparation method thereof

Abstract

The present invention discloses an IGBT device and a preparation method. The IGBT device includes: a plurality of device cells; the device cells include a unipolar conductive cell structure, a dielectric isolation layer and a bipolar conductive cell structure; the unipolar conductive cell structure and the bipolar conductive cell structure both include an epitaxial layer; the epitaxial layer is provided with a plurality of first through grooves, and the first through grooves are located between the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure; the dielectric isolation layer is located in the first through grooves in a one-to-one correspondence; the first surface of the epitaxial layer of the unipolar conductive cell structure is provided with a second conductive type collector contact region; the first surface of the epitaxial layer of the bipolar conductive cell structure is provided with a first conductive type collector contact region. The technical solution provided by the embodiment of the present invention avoids the voltage snap-back effect of the IGBT device and improves the stability of the device and the working circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to an IGBT device and a preparation method thereof. Background Art

[0002] Insulated gate bipolar transistor (IGBT) devices have the advantages of high input resistance, high breakdown voltage, wide safe operating area, and easy driving similar to metal-oxide semiconductor field-effect transistor (MOSFET, MOS) power devices. They also have the advantages of low on-voltage of bipolar devices. They are widely used in solar inverters, new energy vehicles, high-voltage direct current transmission systems, high-speed railways and other fields. They are the core devices of today's medium and high-power power electronic systems.

[0003] Taking N-channel IGBT devices as an example, in areas such as three-phase inverters where attention needs to be paid to the switching state, the industry usually adds an N+ region to the collector region of the IGBT, so that a diode structure integrated in parallel with the IGBT is formed through the N+ region and the P-body region. This structure is called a reverse-conducting IGBT (RC-IGBT), which has the following advantages: 1. The diode is integrated on a single chip, reducing the chip area; 2. In an inductive load environment, the switching device needs to be connected in parallel with a freewheeling diode to maintain the continuity of the current. Ordinary MOS power devices have their own parasitic reverse diodes, while IGBT devices do not have this parasitic structure. The internally integrated reverse diode can make the IGBT device connected in parallel with the freewheeling diode, so that the IGBT device can also achieve switching in an inductive circuit; 3. At the moment of shutdown, the N+ region can accelerate the rapid extraction of minority carriers (electrons) in the drift region of the IGBT device, reducing the switching loss of the IGBT, etc. However, RC-IGBT devices also have problems. Due to the presence of the N+ region in the collector region, when the device is in the on state, the emitter injection efficiency becomes very low, the device turn-on voltage is very high, and at low collector voltage, the RC-IGBT device operates in unipolar mode. When the collector voltage is large enough, the device switches from unipolar mode to bipolar mode with a voltage slew effect, which seriously affects the stability of the circuit. How to optimize the above negative effects of RC-IGBT is the focus of research in this field. Summary of the invention

[0004] The present invention provides an IGBT device and a preparation method thereof, so as to avoid the Snap-Back effect of the IGBT device and improve the stability of the device and a working circuit.

[0005] According to one aspect of the present invention, an IGBT device is provided, comprising:

[0006] A plurality of device cells; the device cells include a unipolar conductive cell structure, a dielectric isolation layer and a bipolar conductive cell structure;

[0007] The unipolar conductive cell structure and the bipolar conductive cell structure both include an epitaxial layer; the epitaxial layer is provided with a plurality of first through-grooves, and the first through-grooves are located between the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure; the dielectric isolation layers are located in the first through-grooves in a one-to-one correspondence, and the dielectric isolation layers cover the openings of the first through-grooves and fill part or all of the space inside the first through-grooves;

[0008] The first surface of the epitaxial layer of the unipolar conductive cell structure is provided with a collector contact region of the second conductivity type; the first surface of the epitaxial layer of the bipolar conductive cell structure is provided with a collector contact region of the first conductivity type; the second surfaces of the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure are both provided with a body region and an emitter contact region of the first conductivity type, and the second surface is arranged opposite to the first surface;

[0009] A plurality of first gate structures, each of which is located one by one on one side of the second surface of the epitaxial layer of the unipolar conductive cell structure; a plurality of second gate structures, each of which is located one by one on one side of the second surface of the epitaxial layer of the bipolar conductive cell structure;

[0010] A common emitter, the common emitter is located on one side of the second surface of the epitaxial layer, and the common emitter is in contact with emitter contact regions of the unipolar conductive cell structure and the bipolar conductive cell structure;

[0011] A common collector, the common collector is located on one side of the first surface of the epitaxial layer, and the common collector is in contact with the first conductivity type collector contact region and the second conductivity type collector contact region;

[0012] The first through groove and the common collector are arranged vertically.

[0013] According to another aspect of the present invention, a method for preparing an IGBT device is provided, wherein the IGBT device comprises a plurality of device cells; the device cells comprise a unipolar conductive cell structure, a dielectric isolation layer and a bipolar conductive cell structure, including:

[0014] Prepare an epitaxial layer, wherein the epitaxial layer is provided with a plurality of first through-grooves, the epitaxial layer includes an epitaxial layer of a unipolar conductive cell structure and an epitaxial layer of a bipolar conductive cell structure, the first through-grooves are located between the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure; the dielectric isolation layers are arranged one by one in the first through-grooves, the dielectric isolation layers cover the openings of the first through-grooves and fill part or all of the space inside the first through-grooves; the first surface of the epitaxial layer of the unipolar conductive cell structure is provided with a collector contact region of a second conductivity type; the first surface of the epitaxial layer of the bipolar conductive cell structure is provided with a collector contact region of a first conductivity type; the second surfaces of the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure are both provided with a body region and an emitter contact region of a first conductivity type, and the second surface and the first surface are arranged relative to each other;

[0015] Prepare a first gate structure on one side of the second surface of the epitaxial layer of the unipolar conductive cell structure;

[0016] Prepare a second gate structure on one side of the second surface of the epitaxial layer of the bipolar conductive cell structure;

[0017] A common emitter is prepared on one side of the second surface of the epitaxial layer, wherein the common emitter is in contact with emitter contact regions of the unipolar conductive cell structure and the bipolar conductive cell structure;

[0018] A common collector is prepared on one side of the first surface of the epitaxial layer, and the common collector is in contact with the first conductive type collector contact region and the second conductive type collector contact region; the first through groove and the common collector are vertically arranged.

[0019] In the IGBT device and preparation method of the embodiment of the present invention, the device cell is separated by a dielectric isolation layer perpendicular to the common collector, and separated into a unipolar conductive cell structure and a bipolar conductive cell structure. The difference between the unipolar conductive cell structure and the bipolar conductive cell structure is that the first surface of the epitaxial layer of the unipolar conductive cell structure is provided with a collector contact area of ​​the second conductive type, that is, the semiconductor layer in contact with the common collector is a collector contact area of ​​the second conductive type semiconductor, and the unipolar conductive cell structure is equivalent to a MOSFET power device when forward conducting. The first surface of the epitaxial layer of the bipolar conductive cell structure is provided with a collector contact area of ​​the first conductive type, and the semiconductor layer in contact with the common collector is a collector contact area of ​​the first conductive type, so that the bipolar conductive cell structure is equivalent to a MOSFET power device and a bipolar transistor when forward conducting. The rest of the structures of the unipolar conductive cell structure and the bipolar conductive cell structure remain consistent. The IGBT device, in the forward conducting state, has a mixed conduction mode consisting of bipolar IGBT conductivity and unipolar conductivity. And because the dielectric isolation layer is located in the first through groove vertically arranged in the epitaxial layer and the common collector, that is, in the direction perpendicular to the common collector pointing to the common emitter, the dielectric isolation layer completely isolates the epitaxial layer of the unipolar conductive cell structure from the epitaxial layer of the bipolar conductive cell structure, thereby realizing the isolation of the full dielectric layer of the unipolar conductive cell structure and the bipolar conductive cell structure. Among them, the unipolar conductive cell structure has unipolar conductivity, and the bipolar conductive cell structure has bipolar conductivity. The bipolar conductive cell structure does not have the situation of unipolar conduction turning on to bipolar conduction, which completely avoids the voltage snap-back effect of the IGBT device and improves the stability of the IGBT device and its corresponding working circuit. In the off state, because the inductive load circuit needs to maintain current continuity, the traditional IGBT does not have a parallel body diode, and an additional parallel freewheeling diode (FWD) is required. The embodiment of the present invention integrates a parallel bipolar conductive cell structure through the same process steps, which is equivalent to integrating a reverse parallel body diode, without the need for an additional parallel freewheeling diode, reducing the area of ​​the chip, and can work better in the inductive load circuit. In addition, the current capacity of the IGBT device can be adjusted by controlling the ratio of the doping concentration of the first conductive type collector contact area and the second conductive type collector contact area. The dielectric isolation layer covers the opening of the first through groove and fills part or all of the space inside the first through groove, reducing the difficulty of filling the dielectric isolation layer, thereby reducing the preparation cost of the IGBT device. Among them, the unipolar conductive cell structure and the bipolar conductive cell structure adopt independent gate structures, and the first gate structure and the second gate structure apply the same gate voltage to achieve the gate voltage consistency of the parallel connection of the unipolar conductive cell structure and the bipolar conductive cell structure.The unipolar conductive cell structure and the bipolar conductive cell structure adopt a common collector and a common emitter, which simplifies the structural setting of the collector and the emitter and reduces the preparation cost of the IGBT.

[0020] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 It is a structural schematic diagram of an IGBT device provided by an embodiment of the present invention;

[0023] Figure 2 is a schematic structural diagram of another IGBT device provided by an embodiment of the present invention;

[0024] Figure 3 yes Figure 1 and Figure 2 A schematic diagram of a cross-section of the superjunction structure region;

[0025] Figure 4 yes Figure 1 and Figure 2 Another cross-sectional diagram of the superjunction structure region;

[0026] Figure 5 yes Figure 1 and Figure 2 Another schematic diagram of a cross-section of the superjunction structure region;

[0027] Figure 6 yes Figure 1 and Figure 2 Another schematic diagram of a cross-section of the superjunction structure region;

[0028] Figure 7 is a flow chart of a method for preparing an IGBT device provided by an embodiment of the present invention;

[0029] Figure 8 yes Figure 7 A schematic structural diagram corresponding to each step of the preparation method of the IGBT device;

[0030] Fig. 9 yes Figure 7 A schematic diagram of the process included in S110;

[0031] Figure 10-Figure 22 yes Fig. 9 Schematic diagram of the structures corresponding to each step of the preparation method of the IGBT device. DETAILED DESCRIPTION

[0032] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0033] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0034] In order to avoid the Snap-Back effect of the IGBT device and improve the stability of the device and the working circuit, the embodiment of the present invention provides the following technical solutions:

[0035] like Figure 1 and Figure 2 As shown, Figure 1 is a schematic structural diagram of an IGBT device provided by an embodiment of the present invention, Figure 21 is a schematic structural diagram of another IGBT device provided by an embodiment of the present invention, wherein the IGBT device comprises: a plurality of device cells 100; the device cell 100 comprises a unipolar conductive cell structure 1, a dielectric isolation layer 31 and a bipolar conductive cell structure 2; the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 both comprise an epitaxial layer 101; the epitaxial layer 101 is provided with a plurality of first through grooves 102, the first through grooves 102 being located between the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2; the dielectric isolation layer 31 is located in the first through grooves 102 in a one-to-one correspondence, the dielectric isolation layer 31 covers the opening of the first through grooves 102 and fills part or all of the space inside the first through grooves 102; the first surface of the epitaxial layer 101 of the unipolar conductive cell structure 1 is provided with a second conductive type collector contact region 25; the first surface of the epitaxial layer 101 of the bipolar conductive cell structure 2 is provided with a first conductive type collector contact region 13; the unipolar conductive cell structure 1 The second surfaces of the epitaxial layer 101 and the epitaxial layer 101 of the bipolar conductive cell structure 2 are both provided with a first conductive type body region 103 and an emitter contact region 104, and the second surface is arranged opposite to the first surface; a plurality of first gate structures 105, the first gate structures 105 are correspondingly located on one side of the second surface of the epitaxial layer 101 of the unipolar conductive cell structure 1; a plurality of second gate structures 106, the second gate structures 106 are correspondingly located on one side of the second surface of the epitaxial layer 101 of the bipolar conductive cell structure 2; a common emitter 42, the common emitter 42 is located on one side of the second surface of the epitaxial layer 101, and the common emitter 42 is in contact with the emitter contact region 104 of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2; a common collector 43, the common collector 43 is located on one side of the first surface of the epitaxial layer 101, and the common collector 43 is in contact with the first conductive type collector contact region 13 and the second conductive type collector contact region 25; the first through groove 102 and the common collector 43 are arranged vertically.

[0036] It should be noted that, in the embodiment of the present invention, the dielectric isolation layer 31 covers the opening of the first through-groove 102 and fills part or all of the space inside the first through-groove 102, corresponding to two types of IGBT devices. The first type of IGBT device is Figure 1 In the IGBT device shown, the dielectric isolation layer 31 covers the opening of the first through-groove 102 and fills the entire space inside the first through-groove 102. The second IGBT device is Figure 2 In the illustrated IGBT device, the dielectric isolation layer 31 covers the opening of the first through-groove 102 and fills a portion of the space inside the first through-groove 102 .

[0037] For example, Figure 1 and Figure 2The first gate structure 105 and the second gate structure 106 are both trench gate structures, and the first gate structure 105 and the second gate structure 106 include a first dielectric layer 32, a gate polysilicon 41, and a second dielectric layer 33. The first dielectric layer 32 may be silicon oxide, and the second dielectric layer 33 may be borophosphosilicate glass. In other embodiments, the first gate structure 105 and the second gate structure 106 may also be planar gate structures.

[0038] For example, Figure 1 and Figure 2 The common emitter 42 shown is a trench type common emitter. In other embodiments, the common emitter 42 may also be a planar type common emitter.

[0039] The dielectric isolation layer 31 may be made of silicon dioxide or a material with a higher dielectric constant than silicon dioxide.

[0040] In the IGBT device of the embodiment of the present invention, the device cell 100 is separated into a unipolar conductive cell structure 1 and a bipolar conductive cell structure 2 by a dielectric isolation layer 31 perpendicular to the common collector 43. The difference between the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 is that the first surface of the epitaxial layer 101 of the unipolar conductive cell structure 1 is provided with a second conductive type collector contact region 25, that is, the semiconductor layer in contact with the common collector 43 is the second conductive type collector contact region 25, and the unipolar conductive cell structure 1 is equivalent to a MOSFET power device when forward conducting. The first surface of the epitaxial layer 101 of the bipolar conductive cell structure 2 is provided with a first conductive type collector contact region 13, and the semiconductor layer in contact with the common collector 43 is the first conductive type collector contact region 13, so that the bipolar conductive cell structure 2 is equivalent to a MOSFET power device and a bipolar transistor when forward conducting. The rest of the structures of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 remain consistent. The IGBT device, in the forward conduction state, has a mixed conduction mode consisting of bipolar IGBT conductivity and unipolar conductivity. And because the dielectric isolation layer 31 is located in the epitaxial layer 101 and in the first through groove 102 vertically arranged at the common collector 43, that is, in the direction perpendicular to the common collector 43 and pointing to the common emitter 42, the dielectric isolation layer 31 completely isolates the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2, thereby realizing the isolation of the full dielectric layer of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2. Among them, the unipolar conductive cell structure 1 has unipolar conductivity, and the bipolar conductive cell structure 2 has bipolar conductivity. The bipolar conductive cell structure 2 does not have the situation of unipolar conductivity turning into bipolar conductivity, which completely avoids the voltage Snap-Back effect of the IGBT device and improves the stability of the IGBT device and its corresponding working circuit. In the off state, because the inductive load circuit needs to maintain current continuity, the traditional IGBT does not have a parallel body diode, and an additional parallel freewheeling diode is required. The embodiment of the present invention integrates the parallel bipolar conductive cell structure 2 through the same process steps, which is equivalent to integrating the reverse parallel body diode, without the need for an additional parallel freewheeling diode, reducing the area of ​​the chip, and can work better in the inductive load circuit. Moreover, the current capacity of the IGBT device can be adjusted by controlling the ratio of the doping concentration of the first conductive type collector contact area 13 and the second conductive type collector contact area 25. And the dielectric isolation layer 31 covers the opening of the first through groove 102 and fills part or all of the space inside the first through groove 102, which reduces the difficulty of filling the dielectric isolation layer 31, thereby reducing the preparation cost of the IGBT device.The unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 use independent gate structures, and the first gate structure 105 and the second gate structure 106 apply the same gate voltage to achieve gate voltage consistency of the parallel connection of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2. The unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 use a common collector 43 and a common emitter 42, which simplifies the structural setting of the collector and the emitter and reduces the preparation cost of the IGBT.

[0041] It should be noted that, for an N-channel IGBT device, the first conductivity type is P-type, and the second conductivity type is N-type. For a P-channel IGBT device, the first conductivity type is N-type, and the second conductivity type is P-type.

[0042] Optionally, based on the above technical solution, a super junction structure region 3 is provided in the IGBT device.

[0043] like Figure 1 and Figure 2As shown, the epitaxial layer 101 includes a first sub-epitaxial layer 21, wherein the conductivity type of the first sub-epitaxial layer 21 is the second conductivity type; a second sub-epitaxial layer 12, wherein the second sub-epitaxial layer 12 is located on one side of the first sub-epitaxial layer 21, and the conductivity type of the second sub-epitaxial layer 12 is the first conductivity type; the second sub-epitaxial layer 12 and the first sub-epitaxial layer 21 are provided with a plurality of second through grooves 107, and the second through grooves 107 penetrate the second sub-epitaxial layer 12 and the first sub-epitaxial layer 21; a third sub-epitaxial layer 11, wherein the third sub-epitaxial layer 11 and the dielectric isolation layer 31 are located in the second through grooves 107, and the dielectric isolation layer 31 covers the opening of the first through groove 102 and fills the first Part or all of the space inside the through groove 102, wherein the conductivity type of the third sub-epitaxial layer 11 is the first conductivity type; wherein, on one side of the second surface of the epitaxial layer 101, the second sub-epitaxial layer 12, the third sub-epitaxial layer 11 and the dielectric isolation layer 31 are flush; on one side of the second surface of the epitaxial layer 101, the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 are away from the first sub-epitaxial layer 21. The side is provided with a first conductivity type body region 103 and an emitter contact region 104; on one side of the first surface of the epitaxial layer 101, the first sub-epitaxial layer 21 and the third sub-epitaxial layer 11 are close to the common collector 43. The contact area 13 and the collector contact area 25 of the second conductivity type; the partial area of ​​the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 away from the first sub-epitaxial layer 21 is used as the first conductivity type body area 103; the partial area doped by ion implantation process in the first conductivity type body area 103 is used as the emitter contact area 104; the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2 are both provided with a super junction structure area 3; the super junction structure area 3 includes a first conductivity type semiconductor super junction layer and a second conductivity type semiconductor super junction layer arranged at intervals; in the epitaxial layer 101 of the unipolar conductive cell structure 1, the second conductivity type The first sub-epitaxial layer 21 between the first conductive type collector contact region 25 and the first conductive type body region 103 serves as a second conductive type semiconductor superjunction layer; the third sub-epitaxial layer 11 between the second conductive type collector contact region 25 and the first conductive type body region 103 serves as a first conductive type superlayer; in the epitaxial layer 101 of the bipolar conductive cell structure 2, the first sub-epitaxial layer 21 between the first conductive type collector contact region 13 and the first conductive type body region 103 serves as a second conductive type semiconductor superjunction layer; the third sub-epitaxial layer 11 between the first conductive type collector contact region 13 and the first conductive type body region 103 serves as a first conductive type superlayer.

[0044] Specifically, the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2 are both provided with a super junction structure region 3, and the super junction structure region 3 includes a first conductive type super layer and a second conductive type semiconductor super junction layer. The setting of the super junction structure region 3 is based on the charge balance principle, and the on-resistance and breakdown voltage of the IGBT device are well balanced through the modulation of the lateral electric field and the longitudinal electric field.

[0045] Part of the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 of the first conductivity type away from the first sub-epitaxial layer 21 serves as the first conductivity type body region 103. The first conductivity type body region 103 does not need to be doped, which simplifies the preparation process of the first conductivity type body region 103 and reduces the preparation cost of the IGBT device.

[0046] Among them, in the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2, the first sub-epitaxial layer 21 with the second conductivity type and the third sub-epitaxial layer 11 with the first conductivity type constitute the super junction structure area 3, and there is no need to perform ion implantation doping on the epitaxial layer 101 to prepare the first conductivity type super layer and the second conductivity type semiconductor super junction layer, which simplifies the preparation process of the super junction structure area 3 and reduces the preparation cost of the IGBT device.

[0047] It should be noted that the third sub-epitaxial layer 11 and the dielectric isolation layer 31 are located in the second through-groove 107 that penetrates the second sub-epitaxial layer 12 and the first sub-epitaxial layer 21. The first through-groove 102 is the space in the second through-groove 107 that is not occupied by the third sub-epitaxial layer 11. Therefore, the dielectric isolation layer 31 covers the opening of the first through-groove 102 and fills part or all of the space inside the first through-groove 102.

[0048] Optionally, based on the above technical solution, Figure 1 and Figure 2 As shown, the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2 are both provided with a charge storage layer 23; the charge storage layer 23 is located between the super junction structure region 3 and the first conductive type body region 103; the conductivity type of the charge storage layer 23 is the second conductive type.

[0049] Specifically, the charge storage layer 23 is prepared by performing an ion implantation process on the third sub-epitaxial layer 11 and the first sub-epitaxial layer 21 or the second sub-epitaxial layer 12. The second conductive type charge storage layer 23 can store the first conductive type carriers, and prevent the first conductive type carriers from flowing too quickly from the common collector 43 to the common emitter 42, thereby ensuring the stability of the IGBT device.

[0050] Optionally, based on the above technical solution, Figure 1 and Figure 2As shown, the emitter contact region 104 includes a first conductivity type emitter contact region 14 and a second conductivity type emitter contact region 24. Alternatively, in other embodiments, the emitter contact region 104 may also include only the second conductivity type emitter contact region 24.

[0051] The IGBT structure provided in the embodiment of the present invention is applicable to the following three structures:

[0052] The first structure: the first gate structure 105 includes a planar gate structure; the second gate structure 106 includes a planar gate structure; the common emitter 42 includes a planar common emitter.

[0053] The second structure: the first gate structure 105 includes a trench gate structure; the second gate structure 106 includes a trench gate structure; the common emitter 42 includes a planar common emitter.

[0054] like Figure 1 and Figure 2 As shown, the third structure is as follows: the first gate structure 105 includes a trench gate structure; the second gate structure 106 includes a trench gate structure; and the common emitter 42 includes a trench common emitter.

[0055] It should be noted that the first structure and the second structure are not shown in the drawings of the embodiments of the present invention.

[0056] Optionally, based on the above technical solution, the cross-sectional figure of the super junction structure region 3 in the direction perpendicular to the common collector 43 pointing to the common emitter 42 includes any one of a long rectangular structure, a regular quadrilateral structure, a diamond structure and a regular hexagonal structure, thereby enriching the structural setting of the super junction structure region 3.

[0057] like Figure 3 As shown, Figure 3 yes Figure 1 and Figure 2 A schematic diagram of a cross-sectional diagram of a super junction structure region in FIG. 3 , the cross-sectional diagram of the super junction structure region 3 in a direction perpendicular to the common collector 43 and pointing to the common emitter 42 includes a long rectangular structure. Figure 4 As shown, Figure 4 yes Figure 1 and Figure 2 Another cross-sectional diagram of the super junction structure region is shown in FIG. 3 , in which the cross-sectional diagram of the super junction structure region 3 in the direction perpendicular to the common collector 43 and pointing to the common emitter 42 includes a regular quadrilateral structure. Figure 5 As shown, Figure 5 yes Figure 1 and Figure 2 Another cross-sectional diagram of the super junction structure region is shown in FIG. 3 , in which the cross-sectional diagram of the super junction structure region 3 in the direction perpendicular to the common collector 43 and pointing to the common emitter 42 includes a diamond structure. Figure 6 As shown, Figure 6 yes Figure 1 and Figure 2 Another cross-sectional diagram of the super junction structure region is shown in FIG. 3 , in which the cross-sectional diagram of the super junction structure region 3 in the direction perpendicular to the common collector 43 and pointing to the common emitter 42 includes a regular hexagonal structure. Optionally, a gate-controlled MOS structure region 4 is also provided in the IGBT device.

[0058] Optionally, based on the above technical solution, Figure 1 and Figure 2 As shown, the epitaxial layer 101 includes a silicon carbide epitaxial layer or a gallium nitride epitaxial layer.

[0059] The epitaxial layer made of silicon carbide epitaxial layer or gallium nitride epitaxial layer as the third-generation semiconductor material makes the IGBT device have the advantages of high insulation breakdown electric field, wide band gap and high temperature stability, and can be used in high voltage and high current application fields.

[0060] And / or, optionally, based on the above technical solution, as Figure 1 and Figure 2 As shown, the epitaxial layer 101 of the unipolar conductive cell structure 1 is provided with a second conductive type semiconductor field stop layer 22, and the second conductive type semiconductor field stop layer 22 is located on the side of the second conductive type collector contact area 25 away from the common collector 43; the epitaxial layer 101 of the bipolar conductive cell structure 2 is provided with a second conductive type semiconductor field stop layer 22, and the second conductive type semiconductor field stop layer 22 is located on the side of the first conductive type collector contact area 13 away from the common collector 43.

[0061] Specifically, the second conductive type semiconductor field stop layer 22 is provided so that when the IGBT device is in the off state, the electric field is rapidly reduced to 0 in the second conductive type semiconductor field stop layer 22 , thereby achieving the purpose of terminating the electric field.

[0062] The embodiment of the present invention also provides a method for preparing an IGBT device. Figure 7 As shown, Figure 7 is a flow chart of a method for preparing an IGBT device provided by an embodiment of the present invention, wherein the IGBT device includes a plurality of device cells; Figure 1 Taking the IGBT device shown in the figure as an example, the IGBT device cell includes a unipolar conductive cell structure 1, a dielectric isolation layer 31 and a bipolar conductive cell structure 2. The preparation method of the IGBT device includes the following steps:

[0063] S110, preparing an epitaxial layer.

[0064] like Figure 8As shown, an epitaxial layer 101 is prepared. Among them, the epitaxial layer 101 is provided with a plurality of first through grooves 102, the epitaxial layer 101 includes the epitaxial layer of the unipolar conductive cell structure 1 and the epitaxial layer of the bipolar conductive cell structure 2, and the first through grooves 102 are located between the epitaxial layer of the unipolar conductive cell structure 1 and the epitaxial layer of the bipolar conductive cell structure 2; dielectric isolation layers 31 are arranged one by one in the first through grooves 102, and the dielectric isolation layers 31 cover the openings of the first through grooves 102 and fill part or all of the space inside the first through grooves 102; the first surface of the epitaxial layer of the unipolar conductive cell structure 1 is provided with a second conductive type collector contact region 25; the first surface of the epitaxial layer of the bipolar conductive cell structure 2 is provided with a first conductive type collector contact region 13; the second surfaces of the epitaxial layers of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 are both provided with a first conductive type body region 103 and an emitter contact region 104, and the second surfaces are arranged opposite to the first surfaces; the first through grooves 102 and the common collector 43 are arranged vertically.

[0065] The dielectric isolation layer 31 may be made of silicon dioxide or a material with a higher dielectric constant than silicon dioxide.

[0066] The dielectric isolation layer 31 covers the opening of the first through-groove 102 and fills part or all of the space inside the first through-groove 102, corresponding to two IGBT devices. Figure 8 As shown, the dielectric isolation layer 31 covers the opening of the first through slot 102 and fills the entire space inside the first through slot 102. In other embodiments, the dielectric isolation layer 31 covers the opening of the first through slot 102 and fills a portion of the space inside the first through slot 102.

[0067] S120, preparing a first gate structure on one side of the second surface of the epitaxial layer of the unipolar conductive cell structure.

[0068] like Figure 8 As shown, a first gate structure 105 is prepared on one side of the second surface of the epitaxial layer of the unipolar conductive cell structure 1 .

[0069] S130 , preparing a second gate structure on one side of the second surface of the epitaxial layer of the bipolar conductive cell structure.

[0070] like Figure 8 As shown, a second gate structure 106 is prepared on one side of the second surface of the epitaxial layer of the bipolar conductive cell structure 2 .

[0071] It should be noted that the preparation of the first gate structure 105 and the second gate structure 106 can be prepared before the second conductivity type collector contact region 25 set on the first surface of the epitaxial layer of the unipolar conductive cell structure 1; and the first conductivity type collector contact region 13 set on the first surface of the epitaxial layer of the bipolar conductive cell structure 2 are doped by an ion implantation process.

[0072] And exemplary, Figure 8 The first gate structure 105 and the second gate structure 106 are both trench gate structures, and the first gate structure 105 and the second gate structure 106 include a first dielectric layer 32, a gate polysilicon 41, and a second dielectric layer 33. The first dielectric layer 32 may be silicon oxide, and the second dielectric layer 33 may be borophosphosilicate glass. In other embodiments, the first gate structure 105 and the second gate structure 106 may also be planar gate structures.

[0073] S140, preparing a common emitter on one side of the second surface of the epitaxial layer, wherein the common emitter is in contact with emitter contact regions of the unipolar conductive cell structure and the bipolar conductive cell structure.

[0074] like Figure 1 As shown, a common emitter 42 is prepared on one side of the second surface of the epitaxial layer 101 , and the common emitter 42 is in contact with the emitter contact regions 104 of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 .

[0075] It should be noted that the common emitter 42 can be prepared before the second conductivity type collector contact region 25 set on the first surface of the epitaxial layer of the unipolar conductive cell structure 1; and the first conductivity type collector contact region 13 set on the first surface of the epitaxial layer of the bipolar conductive cell structure 2 are doped by an ion implantation process.

[0076] For example, Figure 1 The common emitter 42 shown is a trench type common emitter. In other embodiments, the common emitter 42 may also be a planar type common emitter.

[0077] S150 , preparing a common collector on one side of the first surface of the epitaxial layer, wherein the common collector is in contact with the first conductivity type collector contact region and the second conductivity type collector contact region.

[0078] like Figure 1 As shown, a common collector 43 is prepared on one side of the first surface of the epitaxial layer 101 by a back metal deposition process, and the common collector 43 contacts the first conductive type collector contact region 13 and the second conductive type collector contact region 25. The first through groove 102 and the common collector 43 are vertically arranged.

[0079] In the IGBT device prepared in the embodiment of the present invention, the device cell 100 is separated into a unipolar conductive cell structure 1 and a bipolar conductive cell structure 2 by a dielectric isolation layer 31 perpendicular to the common collector 43. The difference between the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 is that the first surface of the epitaxial layer 101 of the unipolar conductive cell structure 1 is provided with a second conductive type collector contact region 25, that is, the semiconductor layer in contact with the common collector 43 is the second conductive type collector contact region 25, and the unipolar conductive cell structure 1 is equivalent to a MOSFET power device when forward conducting. The first surface of the epitaxial layer 101 of the bipolar conductive cell structure 2 is provided with a first conductive type collector contact region 13, and the semiconductor layer in contact with the common collector 43 is the first conductive type collector contact region 13, so that the bipolar conductive cell structure 2 is equivalent to a MOSFET power device and a bipolar transistor when forward conducting. The rest of the structures of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 remain consistent. The IGBT device, in the forward conduction state, has a mixed conduction mode consisting of bipolar IGBT conductivity and unipolar conductivity. And because the dielectric isolation layer 31 is located in the epitaxial layer 101 and in the first through groove 102 vertically arranged at the common collector 43, that is, in the direction perpendicular to the common collector 43 and pointing to the common emitter 42, the dielectric isolation layer 31 completely isolates the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2, thereby realizing the isolation of the full dielectric layer of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2. Among them, the unipolar conductive cell structure 1 has unipolar conductivity, and the bipolar conductive cell structure 2 has bipolar conductivity. The bipolar conductive cell structure 2 does not have the situation of unipolar conductivity turning into bipolar conductivity, which completely avoids the voltage Snap-Back effect of the IGBT device and improves the stability of the IGBT device and its corresponding working circuit. In the off state, because the inductive load circuit needs to maintain current continuity, the traditional IGBT does not have a parallel body diode, and an additional parallel freewheeling diode is required. The embodiment of the present invention integrates the parallel bipolar conductive cell structure 2 through the same process steps, which is equivalent to integrating the reverse parallel body diode, without the need for an additional parallel freewheeling diode, reducing the area of ​​the chip, and can work better in the inductive load circuit. Moreover, the current capacity of the IGBT device can be adjusted by controlling the ratio of the doping concentration of the first conductive type collector contact area 13 and the second conductive type collector contact area 25. And the dielectric isolation layer 31 covers the opening of the first through groove 102 and fills part or all of the space inside the first through groove 102, which reduces the difficulty of filling the dielectric isolation layer 31, thereby reducing the preparation cost of the IGBT device.The unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 use independent gate structures, and the first gate structure 105 and the second gate structure 106 apply the same gate voltage to achieve gate voltage consistency of the parallel connection of the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2. The unipolar conductive cell structure 1 and the bipolar conductive cell structure 2 use a common collector 43 and a common emitter 42, which simplifies the structural setting of the collector and the emitter and reduces the preparation cost of the IGBT.

[0080] It should be noted that, for an N-channel IGBT device, the first conductivity type is P-type, and the second conductivity type is N-type. For a P-channel IGBT device, the first conductivity type is N-type, and the second conductivity type is P-type.

[0081] Optionally, based on the above technical solution, Fig. 9 As shown, Fig. 9 yes Figure 7 The schematic diagram of the process included in S110, S110 preparing the epitaxial layer includes:

[0082] S1101. Provide a substrate.

[0083] like Fig.10 As shown, a substrate 108 is provided. The substrate 108 may be a silicon carbide substrate or a gallium nitride substrate.

[0084] S1102 , preparing a first sub-epitaxial layer on one side of the substrate, wherein the conductivity type of the first sub-epitaxial layer is the second conductivity type.

[0085] like Fig.10 As shown, a first sub-epitaxial layer 21 is prepared on one side of the substrate 108 by an epitaxial process, and the conductivity type of the first sub-epitaxial layer 21 is the second conductivity type. The first sub-epitaxial layer 21 can be made of silicon carbide material or gallium nitride material.

[0086] S1103 , preparing a second sub-epitaxial layer on a side of the first sub-epitaxial layer away from the substrate, wherein the conductivity type of the second sub-epitaxial layer is the first conductivity type.

[0087] like Fig.11 As shown, a second sub-epitaxial layer 12 is prepared on a side of the first sub-epitaxial layer 21 away from the substrate by an epitaxial process, and the conductivity type of the second sub-epitaxial layer 12 is the first conductivity type.

[0088] S1104, preparing a groove on a side of the second sub-epitaxial layer away from the first sub-epitaxial layer, wherein the depth of the groove is equal to the thickness of the second sub-epitaxial layer and a partial thickness of the first sub-epitaxial layer.

[0089] like Fig.12As shown, a groove T01 is prepared on the side of the second sub-epitaxial layer 12 away from the first sub-epitaxial layer 21 by photolithography and etching processes, wherein the depth of the groove T01 is equal to the thickness of the second sub-epitaxial layer 12 and the partial thickness of the first sub-epitaxial layer 21. The etching process may include dry etching or wet etching. Preferably, the etching process selects a reactive ion etching process in the dry etching process to form a groove T01 with a relatively large depth.

[0090] S1105 , preparing a third sub-epitaxial layer on the sidewall and the bottom of the groove and the surface of the second sub-epitaxial layer away from the first sub-epitaxial layer, wherein the conductivity type of the third sub-epitaxial layer is the first conductivity type.

[0091] like Fig.13 As shown, a third sub-epitaxial layer 11 is prepared through the sidewall and bottom of the epitaxial process groove T01 and the surface of the second sub-epitaxial layer 12 away from the first sub-epitaxial layer 21 , wherein the conductivity type of the third sub-epitaxial layer 11 is the first conductivity type.

[0092] S1106, preparing a dielectric isolation layer in the groove and on the surface of the third sub-epitaxial layer away from the second sub-epitaxial layer, wherein the dielectric isolation layer fills the bottom, opening and part or all of the inner space of the groove.

[0093] like Fig.14 As shown, a dielectric isolation layer 31 is prepared in the groove T01 and on the surface of the third sub-epitaxial layer 11 away from the second sub-epitaxial layer 12 by a filling or oxidation process, wherein the dielectric isolation layer 31 fills the bottom, opening and part or all of the inner space of the groove. It should be noted that, Fig.14 In the embodiment, the dielectric isolation layer 31 fills the bottom, opening and all the internal spaces of the groove. Figure 2 As shown, the dielectric isolation layer 31 fills the bottom, the opening and part of the inner space of the groove.

[0094] S1107, removing the dielectric isolation layer and the third sub-epitaxial layer on the side of the second sub-epitaxial layer away from the first sub-epitaxial layer to expose the second sub-epitaxial layer; wherein, on one side of the second surface of the epitaxial layer, the second sub-epitaxial layer, the third sub-epitaxial layer and the dielectric isolation layer are flush.

[0095] like Fig.15 As shown, the dielectric isolation layer 31 and the third sub-epitaxial layer 11 on the side of the second sub-epitaxial layer 12 away from the first sub-epitaxial layer 21 are removed by a planarization process (for example, chemical mechanical polishing (CMP)) to expose the second sub-epitaxial layer 12; wherein, on one side of the second surface of the epitaxial layer 101, the second sub-epitaxial layer 12, the third sub-epitaxial layer 11 and the dielectric isolation layer 31 are flush.

[0096] S1108. Prepare a first conductive type body region and an emitter contact region on the side of the second sub-epitaxial layer and the third sub-epitaxial layer away from the first sub-epitaxial layer, wherein a partial region on the side of the second sub-epitaxial layer and the third sub-epitaxial layer away from the first sub-epitaxial layer serves as the first conductive type body region; and a partial region in the first conductive type body region doped by ion implantation serves as the emitter contact region.

[0097] The process of preparing the first conductivity type body region 103 and the emitter contact region 104 on the side of the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 away from the first sub-epitaxial layer 21 is as follows:

[0098] like Fig.16 As shown, the charge storage layer 23 is formed on the side of the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 away from the first sub-epitaxial layer by an ion input process.

[0099] like Fig.17 As shown, a trench is formed in the second sub-epitaxial layer 12 by a reactive ion etching process, a first dielectric layer 32 is thermally grown in the trench by a dry oxidation process, a portion of the first dielectric layer 32 is removed in the trench, heavily doped polysilicon is prepared by a deposition process, and then etched to form a gate polysilicon 41.

[0100] like Fig.18 As shown, a second conductivity type emitter contact region 24 in the emitter contact region 104 is prepared on the side of the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 away from the first sub-epitaxial layer 21 by a self-alignment process, ion implantation and high temperature annealing process.

[0101] like Fig.19 As shown, before forming the common emitter 42, borophosphosilicate glass is deposited on the second sub-epitaxial layer 12 as the second dielectric layer 33, and after high-temperature reflow, contact holes are etched on the second dielectric layer 33, and ions are implanted in the etched holes to form the first conductive type emitter contact region 14 in the emitter contact region 104. After preparing the first conductive type emitter contact region 14, the common emitter 42 is prepared by a deposition process.

[0102] Among them, Fig.19 As shown, a part of the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 on one side away from the first sub-epitaxial layer 21 is used as the first conductivity type body region 103; a part of the first conductivity type body region 103 doped by ion implantation is used as the emitter contact region 104. Exemplarily, the emitter contact region 104 includes the first conductivity type emitter contact region 14 and the second conductivity type emitter contact region 24. Alternatively, in other embodiments, for a planar emitter structure, the emitter contact region 104 may also include only the second conductivity type emitter contact region 24.

[0103] It should be noted that the trench gate structure and the trench common emitter 42 are used as examples for description herein, wherein the first dielectric layer 32, the gate polysilicon 41 and the second dielectric layer 33 constitute the gate structure.

[0104] Part of the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 away from the first sub-epitaxial layer 21 is used as the first conductivity type body region 103 ; and part of the first conductivity type body region 103 doped by ion implantation is used as the emitter contact region 104 .

[0105] S1109. Remove the substrate and part of the first sub-epitaxial layer to expose the bottoms of the multiple grooves to form multiple first through-grooves and multiple second through-grooves in the epitaxial layer, wherein the third sub-epitaxial layer and the dielectric isolation layer are located in the second through-grooves, and the dielectric isolation layer covers the openings of the first through-grooves and fills part or all of the space inside the first through-grooves.

[0106] like Fig. 20 As shown, after preparing the first gate structure 105 on one side of the second surface of the epitaxial layer 101 of the unipolar conductive cell structure 1 and preparing the second gate structure 106 on one side of the second surface of the epitaxial layer 101 of the bipolar conductive cell structure 2 and preparing the common emitter 42 on one side of the second surface of the epitaxial layer 101, the method further includes:

[0107] The substrate 108 and part of the first sub-epitaxial layer 21 are gradually removed through a grinding process to expose the bottoms of multiple grooves T01, so as to form multiple first through-grooves 102 and multiple second through-grooves 107 in the epitaxial layer 101, wherein the third sub-epitaxial layer 11 and the dielectric isolation layer 31 are located in the second through-grooves 107, and the dielectric isolation layer 31 covers the openings of the first through-grooves 102 and fills part or all of the space inside the first through-grooves 102.

[0108] like Fig. 20 As shown, the above operation is to prepare a super junction structure region 3 in the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2; the super junction structure region 3 includes a first conductive type semiconductor super junction layer and a second conductive type semiconductor super junction layer arranged at intervals.

[0109] Among them, in the epitaxial layer 101 of the unipolar conductive cell structure 1, the first sub-epitaxial layer 21 between the second conductive type collector contact region 25 and the first conductive type body region 103 serves as a second conductive type semiconductor superjunction layer; the third sub-epitaxial layer 11 between the second conductive type collector contact region 25 and the first conductive type body region 103 serves as a first conductive type superlayer.

[0110] In the epitaxial layer 101 of the bipolar conductive cell structure 2, the first sub-epitaxial layer 21 between the first conductive type collector contact region 13 and the first conductive type body region 103 serves as the second conductive type semiconductor superjunction layer; the third sub-epitaxial layer 11 between the first conductive type collector contact region 13 and the first conductive type body region 103 serves as the first conductive type superlayer.

[0111] S11010, doping is performed on the first sub-epitaxial layer and the third sub-epitaxial layer on one side close to the common collector by a back ion implantation process to prepare a first conductivity type collector contact region and a second conductivity type collector contact region.

[0112] like Fig.21 As shown, before forming the common collector 43 on one side of the epitaxial layer 101, doping is performed on the first sub-epitaxial layer 21 and the third sub-epitaxial layer 11 near the common collector 43 by back ion implantation and annealing activation to form a second conductive type semiconductor field stop layer 22. Then, as shown in FIG. Fig. 22 As shown, the first and third sub-epitaxial layers 21 and 11 are doped on one side close to the common collector 43 by back ion implantation and annealing activation to prepare the first conductivity type collector contact region 13 and the second conductivity type collector contact region 25 .

[0113] Specifically, the above technical solution completes the preparation process of the super junction structure region 3 in the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2. The super junction structure region 3 includes a first conductive type super layer and a second conductive type semiconductor super junction layer. The setting of the super junction structure region 3 is based on the charge balance principle, and the on-resistance and breakdown voltage of the IGBT device are well balanced through the modulation of the lateral electric field and the longitudinal electric field.

[0114] Part of the second sub-epitaxial layer 12 and the third sub-epitaxial layer 11 of the first conductivity type away from the first sub-epitaxial layer 21 serves as the first conductivity type body region 103. The first conductivity type body region 103 does not need to be doped, which simplifies the preparation process of the first conductivity type body region 103 and reduces the preparation cost of the IGBT device.

[0115] Among them, in the unipolar conductive cell structure 1 and the bipolar conductive cell structure 2, the first sub-epitaxial layer 21 with the second conductivity type and the third sub-epitaxial layer 11 with the first conductivity type constitute the super junction structure area 3, and there is no need to perform ion implantation doping on the epitaxial layer 101 to prepare the first conductivity type super layer and the second conductivity type semiconductor super junction layer, which simplifies the preparation process of the super junction structure area 3 and reduces the preparation cost of the IGBT device.

[0116] It should be noted that the third sub-epitaxial layer 11 and the dielectric isolation layer 31 are located in the second through-groove 107 that penetrates the second sub-epitaxial layer 12 and the first sub-epitaxial layer 21. The first through-groove 102 is the space in the second through-groove 107 that is not occupied by the third sub-epitaxial layer 11. Therefore, the dielectric isolation layer 31 covers the opening of the first through-groove 102 and fills part or all of the space inside the first through-groove 102.

[0117] Optionally, based on the above technical solution, S1108, before preparing the emitter contact region on the side of the second sub-epitaxial layer and the third sub-epitaxial layer away from the first sub-epitaxial layer, further includes:

[0118] A charge storage layer is prepared between the super junction structure region and the first conductive type body region, wherein both the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure are provided with a charge storage layer, and the conductivity type of the charge storage layer is the second conductive type.

[0119] like Fig.16 As shown, a charge storage layer 23 is prepared between the super junction structure region 3 and the first conductive type body region 103, wherein the epitaxial layer 101 of the unipolar conductive cell structure 1 and the epitaxial layer 101 of the bipolar conductive cell structure 2 are both provided with a charge storage layer 23, and the conductivity type of the charge storage layer 23 is the second conductive type.

[0120] Specifically, the charge storage layer 23 is prepared by performing an ion implantation process on the third sub-epitaxial layer 11 and the first sub-epitaxial layer 21 or the second sub-epitaxial layer 12. The second conductive type charge storage layer 23 can store the first conductive type carriers, and prevent the first conductive type carriers from flowing too quickly from the common collector 43 to the common emitter 42, thereby ensuring the stability of the IGBT device.

[0121] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0122] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. An IGBT device, characterized in that: include: A plurality of device cells; the device cells include a unipolar conductive cell structure, a dielectric isolation layer and a bipolar conductive cell structure; The unipolar conductive cell structure and the bipolar conductive cell structure both include an epitaxial layer; the epitaxial layer is provided with a plurality of first through-grooves, and the first through-grooves are located between the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure; the dielectric isolation layers are located in the first through-grooves in a one-to-one correspondence, and the dielectric isolation layers cover the openings of the first through-grooves and fill part or all of the space inside the first through-grooves; The first surface of the epitaxial layer of the unipolar conductive cell structure is provided with a collector contact region of the second conductivity type; the first surface of the epitaxial layer of the bipolar conductive cell structure is provided with a collector contact region of the first conductivity type; the second surfaces of the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure are both provided with a body region and an emitter contact region of the first conductivity type, and the second surface is arranged opposite to the first surface; A plurality of first gate structures, each of which is located one by one on one side of the second surface of the epitaxial layer of the unipolar conductive cell structure; a plurality of second gate structures, each of which is located one by one on one side of the second surface of the epitaxial layer of the bipolar conductive cell structure; A common emitter, the common emitter is located on one side of the second surface of the epitaxial layer, and the common emitter is in contact with emitter contact regions of the unipolar conductive cell structure and the bipolar conductive cell structure; A common collector, the common collector is located on one side of the first surface of the epitaxial layer, and the common collector is in contact with the first conductivity type collector contact region and the second conductivity type collector contact region; The first through groove and the common collector are arranged vertically; The epitaxial layer includes a first sub-epitaxial layer, wherein the conductivity type of the first sub-epitaxial layer is the second conductivity type; A second sub-epitaxial layer, the second sub-epitaxial layer is located on one side of the first sub-epitaxial layer, and the conductivity type of the second sub-epitaxial layer is the first conductivity type; the second sub-epitaxial layer and the first sub-epitaxial layer are provided with a plurality of second through grooves, and the second through grooves penetrate the second sub-epitaxial layer and the first sub-epitaxial layer; a third sub-epitaxial layer, wherein the third sub-epitaxial layer and the dielectric isolation layer are located in the second through groove, wherein the conductivity type of the third sub-epitaxial layer is the first conductivity type; wherein, on one side of the second surface of the epitaxial layer, the second sub-epitaxial layer, the third sub-epitaxial layer and the dielectric isolation layer are flush; On one side of the second surface of the epitaxial layer, the first conductive type body region and the emitter contact region are provided on the second sub-epitaxial layer and the third sub-epitaxial layer away from the first sub-epitaxial layer; On one side of the first surface of the epitaxial layer, the first sub-epitaxial layer and the third sub-epitaxial layer are provided with a first conductive type collector contact region and a second conductive type collector contact region on one side close to the common collector; Part of the second sub-epitaxial layer and the third sub-epitaxial layer on a side away from the first sub-epitaxial layer serves as the first conductive type body region; and part of the first conductive type body region doped by ion implantation serves as the emitter contact region; The epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure are both provided with a super junction structure region; the super junction structure region comprises a first conductive type semiconductor super junction layer and a second conductive type semiconductor super junction layer which are arranged at intervals; In the epitaxial layer of the unipolar conductive cell structure, the first sub-epitaxial layer between the second conductive type collector contact region and the first conductive type body region serves as the second conductive type semiconductor superjunction layer; the third sub-epitaxial layer between the second conductive type collector contact region and the first conductive type body region serves as the first conductive type superlayer; In the epitaxial layer of the bipolar conductive cell structure, the first sub-epitaxial layer between the first conductive type collector contact region and the first conductive type body region serves as the second conductive type semiconductor superjunction layer; the third sub-epitaxial layer between the first conductive type collector contact region and the first conductive type body region serves as the first conductive type superlayer.

2. The IGBT device according to claim 1, characterized in that: The epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure are both provided with a charge storage layer; The charge storage layer is located between the super junction structure region and the first conductive type body region; The conductivity type of the charge storage layer is the second conductivity type.

3. The IGBT device according to claim 1, characterized in that: The emitter contact region includes a first conductivity type emitter contact region and a second conductivity type emitter contact region; Alternatively, the emitter contact region includes a second conductivity type emitter contact region.

4. The IGBT device according to claim 1, characterized in that: The first gate structure comprises a planar gate structure; the second gate structure comprises a planar gate structure; the common emitter comprises a planar common emitter; Alternatively, the first gate structure comprises a trench gate structure; the second gate structure comprises a trench gate structure; the common emitter comprises a planar common emitter; Alternatively, the first gate structure comprises a trench gate structure; the second gate structure comprises a trench gate structure; and the common emitter comprises a trench common emitter.

5. The IGBT device according to claim 1, characterized in that: The cross-sectional shape of the super junction structure region in a direction perpendicular to the common collector and pointing to the common emitter includes any one of a long rectangular structure, a regular quadrilateral structure, a rhombus structure and a regular hexagonal structure.

6. The IGBT device according to claim 1, characterized in that: The epitaxial layer includes a silicon carbide epitaxial layer or a gallium nitride epitaxial layer; and / or, The epitaxial layer of the unipolar conductive cell structure is provided with a second conductive type semiconductor field stop layer, and the second conductive type semiconductor field stop layer is located on a side of the second conductive type collector contact region away from the common collector; The epitaxial layer of the bipolar conductive cell structure is provided with a second conductive type semiconductor field stop layer, and the second conductive type semiconductor field stop layer is located on a side of the first conductive type collector contact region away from the common collector.

7. A method for preparing an IGBT device, wherein the IGBT device comprises a plurality of device cells; the device cells comprise a unipolar conductive cell structure, a dielectric isolation layer and a bipolar conductive cell structure, wherein: include: Prepare an epitaxial layer, wherein the epitaxial layer is provided with a plurality of first through-grooves, the epitaxial layer includes an epitaxial layer of a unipolar conductive cell structure and an epitaxial layer of a bipolar conductive cell structure, the first through-grooves are located between the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure; the dielectric isolation layers are arranged one by one in the first through-grooves, the dielectric isolation layers cover the openings of the first through-grooves and fill part or all of the space inside the first through-grooves; the first surface of the epitaxial layer of the unipolar conductive cell structure is provided with a collector contact region of a second conductivity type; the first surface of the epitaxial layer of the bipolar conductive cell structure is provided with a collector contact region of a first conductivity type; the second surfaces of the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure are both provided with a body region and an emitter contact region of a first conductivity type, and the second surface and the first surface are arranged relative to each other; Prepare a first gate structure on one side of the second surface of the epitaxial layer of the unipolar conductive cell structure; Prepare a second gate structure on one side of the second surface of the epitaxial layer of the bipolar conductive cell structure; A common emitter is prepared on one side of the second surface of the epitaxial layer, wherein the common emitter is in contact with emitter contact regions of the unipolar conductive cell structure and the bipolar conductive cell structure; A common collector is prepared on one side of the first surface of the epitaxial layer, the common collector is in contact with the first conductive type collector contact region and the second conductive type collector contact region; the first through groove and the common collector are vertically arranged; Preparing the epitaxial layer comprises: providing a substrate; Preparing a first sub-epitaxial layer on one side of the substrate, wherein the conductivity type of the first sub-epitaxial layer is the second conductivity type; preparing a second sub-epitaxial layer on a side of the first sub-epitaxial layer away from the substrate, wherein the conductivity type of the second sub-epitaxial layer is the first conductivity type; Preparing a groove on a side of the second sub-epitaxial layer away from the first sub-epitaxial layer, wherein the depth of the groove is equal to the thickness of the second sub-epitaxial layer and a portion of the thickness of the first sub-epitaxial layer; Preparing a third sub-epitaxial layer on the sidewall and the bottom of the groove and on the surface of the second sub-epitaxial layer away from the first sub-epitaxial layer, wherein the conductivity type of the third sub-epitaxial layer is the first conductivity type; Preparing a dielectric isolation layer in the groove and on a surface of the third sub-epitaxial layer away from the second sub-epitaxial layer, wherein the dielectric isolation layer fills a bottom, an opening and part or all of the inner space of the groove; Removing the dielectric isolation layer and the third sub-epitaxial layer on the side of the second sub-epitaxial layer away from the first sub-epitaxial layer to expose the second sub-epitaxial layer; wherein, on one side of the second surface of the epitaxial layer, the second sub-epitaxial layer, the third sub-epitaxial layer and the dielectric isolation layer are flush; A first conductive type body region and an emitter contact region are prepared on the side of the second sub-epitaxial layer and the third sub-epitaxial layer away from the first sub-epitaxial layer, wherein a portion of the second sub-epitaxial layer and the third sub-epitaxial layer away from the first sub-epitaxial layer is used as the first conductive type body region; and a portion of the first conductive type body region doped by ion implantation is used as the emitter contact region; After preparing a first gate structure on one side of the second surface of the epitaxial layer of the unipolar conductive cell structure, preparing a second gate structure on one side of the second surface of the epitaxial layer of the bipolar conductive cell structure, and preparing a common emitter on one side of the second surface of the epitaxial layer, the method further includes: Removing the substrate and part of the first sub-epitaxial layer to expose the bottoms of the plurality of grooves, so as to form a plurality of the first through grooves and a plurality of second through grooves in the epitaxial layer, wherein the third sub-epitaxial layer and the dielectric isolation layer are located in the second through grooves; Wherein, the first conductive type semiconductor super junction layer and the second conductive type semiconductor super junction layer arranged at intervals constitute a super junction structure region; Among them, in the epitaxial layer of the unipolar conductive cell structure, the first sub-epitaxial layer between the second conductive type collector contact region and the first conductive type body region serves as the second conductive type semiconductor superjunction layer; the third sub-epitaxial layer between the second conductive type collector contact region and the first conductive type body region serves as the first conductive type superlayer; In the epitaxial layer of the bipolar conductive cell structure, the first sub-epitaxial layer between the first conductive type collector contact region and the first conductive type body region serves as the second conductive type semiconductor superjunction layer; the third sub-epitaxial layer between the first conductive type collector contact region and the first conductive type body region serves as the first conductive type superlayer; Before preparing the common collector on one side of the first surface of the epitaxial layer, the method also includes: doping the first sub-epitaxial layer and the third sub-epitaxial layer on one side close to the common collector through a back ion implantation process to prepare the first conductive type collector contact region and the second conductive type collector contact region.

8. The method for preparing an IGBT device according to claim 7, characterized in that: Before preparing the emitter contact region on the side of the second sub-epitaxial layer and the third sub-epitaxial layer away from the first sub-epitaxial layer, the method further includes: A charge storage layer is prepared between the super junction structure region and the first conductive type body region, wherein both the epitaxial layer of the unipolar conductive cell structure and the epitaxial layer of the bipolar conductive cell structure are provided with the charge storage layer, and the conductivity type of the charge storage layer is the second conductive type.

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