A boost converter and method suitable for powering DAC output stage

Abstract

The present invention relates to the technical field of DAC output stage control, and specifically discloses a boost converter and method suitable for DAC output stage power supply, wherein the DAC output stage includes an output PMOS tube and a load resistor, the source of the output PMOS tube is electrically connected to the output voltage of the boost converter, the drain is electrically connected to one end of the load resistor, and the other end of the load resistor is electrically connected to the ground, and the converter includes: a high-side voltage sampling circuit, the input of which is electrically connected to the drain of the output PMOS tube, and is used to convert the source-drain voltage of the output PMOS tube into a ground-based voltage signal; a boost circuit, the input of which is electrically connected to the output end of the high-side voltage sampling circuit, and is used to convert the ground-based voltage signal into the boost converter output voltage. The present invention sequentially converts the source-drain voltage of the output PMOS tube into a ground-based voltage signal, and converts the ground-based voltage signal into the boost converter output voltage through a control loop, and dynamically adjusts and reduces the power consumption of the output PMOS tube.

Description

Technical Field

[0001] The present invention relates to the technical field of DAC output stage control, and in particular to a boost converter and method suitable for powering a DAC output stage. Background Art

[0002] Figure 1 It is a commonly used current-type digital-to-analog converter (DAC) output stage circuit. V1 is the power supply of the circuit, usually an external constant voltage source. OUT is the load current, that is, the output current of the circuit, and the value of this signal is controlled by DAC. OUT is the load resistance, i.e. the equivalent resistance at the load end, and the resistance value is usually 0~1kOhm. To stably output 20mA under all load resistance conditions, the voltage value of V1 needs to be greater than 1kOhm*20mA plus the voltage margin to ensure the normal operation of the output PMOS tube M1 (usually the voltage of V1 will be around 24V). At this time, the voltage across the source and drain of the output PMOS tube M1 and the output load resistance R OUT If driving a small resistance load, such as R OUT ~=0Ohm, the voltage drop on the output PMOS tube M1 will be approximately equal to the voltage value of V1, that is, 24V, and the power consumption of the entire output PMOS tube M1 is about 20mA*24V=480mW, which has a large power loss. Therefore, a circuit structure that can reduce the power consumption of the output PMOS tube M1 is expected.

[0003] Based on this technical background, the present invention studies a boost converter and method suitable for powering a DAC output stage. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention proposes a boost converter and method suitable for powering a DAC output stage. The converter sequentially converts the source-drain voltage of an output PMOS tube into a ground-based voltage signal and converts the ground-based voltage signal into the output voltage of the boost converter through a control loop, thereby dynamically adjusting and reducing the power consumption of the output PMOS tube.

[0005] In order to achieve the above-mentioned object, the first aspect of the present invention provides a boost converter suitable for powering a DAC output stage, wherein the DAC output stage comprises an output PMOS tube and a load resistor, wherein the source of the output PMOS tube is electrically connected to the output voltage of the boost converter, the drain is electrically connected to one end of the load resistor, and the other end of the load resistor is electrically connected to the ground, comprising:

[0006] A high-side voltage sampling circuit, the input of which is electrically connected to the drain of the output PMOS tube, and is used to convert the source-drain voltage of the output PMOS tube into a ground-based voltage signal;

[0007] A boost circuit, the input of which is electrically connected to the output of the high-side voltage sampling circuit, is used to convert the ground-based voltage signal into the output voltage of the boost converter.

[0008] A second aspect of the present invention provides a boost conversion method for powering a DAC output stage in the above-mentioned boost converter, comprising:

[0009] Convert the source-drain voltage of the output PMOS tube into a ground-based voltage signal;

[0010] A ground-based voltage signal is converted to the boost converter output voltage.

[0011] The beneficial effects of the present invention include:

[0012] (1) The boost converter for powering the DAC output stage proposed in the present invention converts the source-drain voltage of the output PMOS tube into a ground-based voltage signal and converts the ground-based voltage signal into the output voltage of the boost converter in sequence through a control loop, thereby dynamically adjusting and reducing the power consumption of the output PMOS tube.

[0013] (2) The boost converter suitable for powering the output stage of a DAC proposed in the present invention converts the source-drain voltage of the output PMOS tube into a ground-based voltage signal through a high-side voltage sampling circuit, converts the difference between the ground-based voltage signal and a fixed potential into a voltage control signal, and simultaneously compares the voltage control signal with the output signal of the current detection circuit for ramp compensation through a comparator to control the duty cycle of the NMOS tube. Finally, the voltage value of the output voltage of the boost converter is adjusted by the duty cycle, so that the voltage across the output PMOS tube has nothing to do with the load resistance and the output current, thereby reducing the power consumption of the output stage of the digital-to-analog converter.

[0014] Other features and advantages of the present invention will be described in detail in the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and other objects, features and advantages of the present invention will become more apparent through a more detailed description of exemplary embodiments of the present invention in conjunction with the accompanying drawings, wherein like reference numerals generally represent like components throughout the exemplary embodiments of the present invention.

[0016] Figure 1 The figure is a schematic diagram of the structure of the output stage circuit of the existing current-type digital-to-analog converter.

[0017] Figure 2 The schematic diagram of the structure of the boost converter suitable for powering the DAC output stage proposed by the present invention.

[0018] Figure 3This is a schematic diagram of key node voltage comparison in a specific implementation of a boost converter suitable for powering a DAC output stage proposed by the present invention.

[0019] Figure 4 This is a schematic structural diagram of a first operational amplifier in a specific implementation of a boost converter suitable for powering a DAC output stage proposed by the present invention.

[0020] Figure 5 This is a schematic diagram of the structure of a second operational amplifier in a specific implementation of a boost converter suitable for powering a DAC output stage proposed by the present invention.

[0021] Figure 6 This is a schematic diagram of a comparator structure in a specific implementation of a boost converter suitable for powering a DAC output stage proposed by the present invention.

[0022] Description of reference numerals:

[0023] M1-output PMOS tube, M2-feedback PMOS tube, M3-NMOS tube, EA1-first operational amplifier, EA2-second operational amplifier, R OUT - load resistor, R1- first resistor, R2- second resistor, Rc- compensation resistor, C1- main capacitor, Cc- compensation capacitor; COMP1- comparator, Q1- trigger, COM1- ramp compensator, L- inductor, D- diode;

[0024] V0-power supply, V1-boost converter output voltage, V2-ground-based voltage signal, V OUT - Output PMOS tube drain potential, I OUT -Load current, GND-ground, Vc-voltage control signal. DETAILED DESCRIPTION

[0025] The preferred embodiments of the present invention will be described in more detail below. Although the preferred embodiments of the present invention are described below, it should be understood that the present invention can be implemented in various forms and should not be limited to the embodiments set forth herein.

[0026] In the present invention, unless otherwise specified, the directional words used, such as "upper and lower", generally refer to the upper and lower parts of the device in normal use, and "inside and outside" refer to the outline of the device. In addition, the terms "first, second, third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first, second, third" may explicitly or implicitly include one or more of the features. In the description of the present invention, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0027] The present invention provides a boost converter suitable for powering a DAC output stage, wherein the DAC output stage includes an output PMOS tube M1 and a load resistor R OUT The source of the output PMOS tube M1 is electrically connected to the boost converter output voltage V1, and the drain is electrically connected to the load resistor R OUT One end is electrically connected to the load resistor R OUT The other end is electrically connected to the ground GND, such as Figure 2 As shown, including:

[0028] A high-side voltage sampling circuit, the input of which is electrically connected to the drain of the output PMOS tube M1, and is used to convert the source-drain voltage of the output PMOS tube M1 into a ground-based voltage signal V2;

[0029] The boost circuit has an input electrically connected to the output of the high-side voltage sampling circuit, and is used to convert a ground-based voltage signal V2 into a boost converter output voltage V1.

[0030] In the present invention, the source-drain voltage of the output PMOS tube M1 is converted into a ground-based voltage signal V2 and the ground-based voltage signal V2 is converted into the boost converter output voltage V1 in sequence through a control loop, so as to dynamically adjust and reduce the power consumption of the output PMOS tube M1.

[0031] According to the present invention, the high-side voltage sampling circuit includes a first operational amplifier EA1, a feedback PMOS tube M2, a first resistor R1 and a second resistor R2;

[0032] The non-inverting input terminal of the first operational amplifier EA1 is electrically connected to the drain of the output PMOS tube M1, and the output is electrically connected to the gate of the feedback PMOS tube M2;

[0033] One end of the first resistor R1 is electrically connected to the boost converter output voltage V1, and the other end is electrically connected to the source of the feedback PMOS tube M2 and the inverting input terminal of the first operational amplifier EA1;

[0034] The drain of the feedback PMOS tube M2 is electrically connected to one end of the second resistor R2;

[0035] The other end of the second resistor R2 is electrically connected to the ground GND.

[0036] In the present invention, the first operational amplifier EA1 can be used Figure 4 The circuit structure shown in the figure works between the high-voltage rail boost converter output voltage V1 and the ground GND. Its output controls the gate of the feedback PMOS tube M2 in the boost converter, so that the voltage across R1 in the boost converter is equal to the voltage across the source and drain of the output PMOS tube M1 in the boost converter, thereby realizing the high-side voltage sampling function.

[0037] According to the present invention, the relationship between the source-drain voltage of the output PMOS tube M1 and the ground-based voltage signal V2 is:

[0038] V2=(V1-V OUT )*R2 / R1;

[0039] Among them, V1-V OUT is the source-drain voltage of the output PMOS tube, V2 is the voltage signal based on the ground, V1 is the output voltage of the boost converter, V OUT To output the drain potential of the PMOS tube, R1 is the first resistance value, and R2 is the second resistance value.

[0040] According to the present invention, a boost circuit includes an error conversion circuit, a duty cycle adjustment circuit and a main body conversion circuit.

[0041] Preferably, the error conversion circuit comprises:

[0042] A second operational amplifier EA2, wherein the inverting input terminal is electrically connected to the drain of the feedback PMOS tube M2, and the non-inverting input terminal is electrically connected to a fixed potential;

[0043] A compensation resistor Rc, one end of which is electrically connected to the output of the second operational amplifier EA2;

[0044] The compensation capacitor Cc has one end electrically connected to the other end of the compensation resistor Rc, and the other end electrically connected to the ground GND.

[0045] In the present invention, the second operational amplifier EA2 can be used Figure 5 The circuit structure shown.

[0046] According to the present invention, the duty cycle adjustment circuit comprises:

[0047] A comparator COMP1, a negative input terminal of which is electrically connected to the output of the second operational amplifier EA2;

[0048] The trigger Q1, the R terminal is electrically connected to the output of the comparator COMP1, and the S terminal is electrically connected to the clock signal;

[0049] NMOS tube M3, the gate is electrically connected to the output end of the trigger Q1, and the source is electrically connected to the ground GND;

[0050] The current detector has an input electrically connected to the drain of the NMOS tube M3.

[0051] In the present invention, the comparator COMP1 can be used Figure 6 The circuit structure shown.

[0052] According to the present invention, the duty cycle adjustment circuit further includes:

[0053] The ramp compensator COM1 has a first input terminal electrically connected to the output of the current detector, a second input terminal electrically connected to the compensation ramp, and an output electrically connected to the positive input terminal of the comparator COMP1.

[0054] According to the present invention, the main body conversion circuit comprises:

[0055] An inductor L, one end of which is electrically connected to a power supply V0;

[0056] The diode D has an input end electrically connected to the other end of the inductor L and the drain of the NMOS tube M3, and an output end serving as a supply end for the output voltage V1 of the boost converter;

[0057] The main capacitor C1 has one end electrically connected to the output end of the diode D, and the other end electrically connected to the ground GND.

[0058] In the present invention, the source-drain voltage of the output PMOS tube M1 is converted into a ground-based voltage signal V2 through a high-side voltage sampling circuit, and the ground-based voltage signal V2 and a fixed voltage difference are converted into a voltage control signal. At the same time, the voltage control signal and the output signal of the current detection circuit for ramp compensation are compared through a comparator COMP1 to control the duty cycle of the NMOS tube M3. Finally, the voltage value of the boost converter output voltage V1 is adjusted by the duty cycle, so that the voltage across the source and drain of the output PMOS tube M1 is equal to the load resistor R OUT It has nothing to do with the output current, thereby reducing the output stage power consumption of the digital-to-analog converter.

[0059] In the present invention, the key node voltage comparison of the boost converter is as follows: Figure 3 shown.

[0060] The present invention also provides a boost conversion method for powering a DAC output stage in the boost converter, comprising:

[0061] Convert the source-drain voltage of the output PMOS tube M1 into a ground-based voltage signal V2;

[0062] The ground-based voltage signal V2 is converted to a boost converter output voltage V1 .

[0063] Preferably, converting the source-drain voltage of the output PMOS tube M1 into a ground-based voltage signal V2 includes:

[0064] The source-drain voltage of the output PMOS tube M1 is converted into a ground-based voltage signal V2 through a high-side voltage sampling circuit, wherein the ground-based voltage signal V2 is proportional to the source-drain voltage of the output PMOS tube M1;

[0065] Converting the ground-based voltage signal V2 to the boost converter output voltage V1 includes:

[0066] Converting the ground-based voltage signal V2 and the fixed voltage difference into a voltage control signal;

[0067] The voltage control signal and the output signal of the current detection circuit for ramp compensation are compared by the comparator COMP1 to control the duty cycle of the NMOS tube M3;

[0068] The voltage value of the boost converter output voltage V1 is adjusted by the duty cycle.

[0069] The present invention will be described in more detail below through specific embodiments. Example

[0070] like Figure 2 As shown, this embodiment provides a boost converter suitable for powering a DAC output stage, wherein the DAC output stage includes an output PMOS tube M1 and a load resistor R OUT The source of the output PMOS tube M1 is electrically connected to the boost converter output voltage V1, and the drain is electrically connected to the load resistor R OUT One end is electrically connected to the load resistor R OUT The other end is electrically connected to the ground GND, including:

[0071] A high-side voltage sampling circuit, the input of which is electrically connected to the drain of the output PMOS tube M1, and is used to convert the source-drain voltage of the output PMOS tube M1 into a ground-based voltage signal V2;

[0072] A boost circuit, the input of which is electrically connected to the output of the high-side voltage sampling circuit, for converting a ground-based voltage signal V2 into a boost converter output voltage V1;

[0073] In this embodiment, the high-side voltage sampling circuit includes a first operational amplifier EA1, a feedback PMOS tube M2, a first resistor R1 and a second resistor R2;

[0074] The non-inverting input terminal of the first operational amplifier EA1 is electrically connected to the drain of the output PMOS tube M1, and the output is electrically connected to the gate of the feedback PMOS tube M2;

[0075] One end of the first resistor R1 is electrically connected to the boost converter output V1, and the other end is electrically connected to the source of the feedback PMOS tube M2 and the inverting input terminal of the first operational amplifier EA1;

[0076] The drain of the feedback PMOS tube M2 is electrically connected to one end of the second resistor R2;

[0077] The other end of the second resistor R2 is electrically connected to the ground GND;

[0078] In this embodiment, the first operational amplifier EA1 is used Figure 4The circuit structure shown in FIG. 1 is a circuit that operates between the high-voltage rail boost converter output V1 and the ground GND. Its output controls the gate of the feedback PMOS tube M2 in the boost converter, so that the voltage across R1 in the boost converter is equal to the voltage across the source and drain of the output PMOS tube M1 in the boost converter, thereby realizing the high-side voltage sampling function.

[0079] The relationship between the source-drain voltage of the output PMOS tube M1 and the ground-based voltage signal V2 is:

[0080] V2=(V1-V OUT )*R2 / R1;

[0081] Among them, V1-V OUT is the source-drain voltage of the output PMOS tube, V2 is the voltage signal based on the ground, V1 is the output voltage of the boost converter, V OUT is the drain potential of the output PMOS tube, R1 is the first resistance value, and R2 is the second resistance value;

[0082] In this embodiment, the boost circuit includes an error conversion circuit, a duty cycle adjustment circuit and a main body conversion circuit;

[0083] The error conversion circuit includes:

[0084] The second operational amplifier EA2, the inverting input terminal is electrically connected to the drain of the feedback PMOS tube M2, and the non-inverting input terminal is electrically connected to the fixed potential 0.8V;

[0085] A compensation resistor Rc, one end of which is electrically connected to the output of the second operational amplifier EA2;

[0086] A compensation capacitor Cc, one end of which is electrically connected to the other end of the compensation resistor Rc, and the other end of which is electrically connected to the ground GND;

[0087] The second operational amplifier EA2 uses Figure 5 The circuit structure shown;

[0088] The duty cycle adjustment circuit includes:

[0089] A comparator COMP1, a negative input terminal of which is electrically connected to the output of the second operational amplifier EA2;

[0090] The trigger Q1, the R terminal is electrically connected to the output of the comparator COMP1, and the S terminal is electrically connected to the clock signal;

[0091] NMOS tube M3, the gate is electrically connected to the output end of the trigger Q1, and the source is electrically connected to the ground GND;

[0092] A current detector, the input of which is electrically connected to the drain of the NMOS tube M3;

[0093] A ramp compensator COM1, having a first input terminal electrically connected to the output of the current detector, a second input terminal electrically connected to the compensation ramp, and an output electrically connected to the positive input terminal of the comparator COMP1;

[0094] In this embodiment, the comparator COMP1 can be used Figure 6 The circuit structure shown;

[0095] The main conversion circuit includes:

[0096] An inductor L, one end of which is electrically connected to a power supply V0;

[0097] The diode D has an input end electrically connected to the other end of the inductor L and the drain of the NMOS tube M3, and an output end serving as a supply end for the output voltage V1 of the boost converter;

[0098] The main capacitor C1 has one end electrically connected to the output end of the diode D, and the other end electrically connected to the ground GND.

[0099] In this embodiment, the first operational amplifier EA1 converts V1-V OUT The voltage signal is converted into a current signal, and then the current signal is converted into a ground-based voltage signal V2=(V1-V OUT )*R2 / R1, the voltage signal V2 is controlled to 0.8V through the feedback loop composed of the second operational amplifier EA2 and the comparator COMP1, and V1-V OUT =0.8V*R1 / R2 can ensure that the source-drain voltage of the output PMOS tube M1 is a constant value, which is related to I OUT Value and R OUT The value is irrelevant, thereby reducing the power consumption of the output PMOS tube M1;

[0100] For current output type DAC, the output terminal has V OUT =I OUT *R OUT The current value in the feedback PMOS tube M2 is V1-V OUT The voltage difference control, that is, I M2 =(V1-V OUT ) / R1, feedback the current signal I in the PMOS tube M2 M2 The resistor R2 transmitted to the ground terminal obtains a current proportional to V1-V OUT The voltage signal V2 of the voltage difference, that is, V2=(V1-V OUT )*R2 / R1;

[0101] The second operational amplifier EA2, comparator COMP1, NMOS tube M3, diode D and inductor L form a boost circuit, which adopts a peak current control mode with ramp compensation. The second operational amplifier EA2 converts the error signal of 0.8V-V2 into a voltage control signal V C The voltage control signal and the output signal of the current measuring circuit are compared by the comparator COMP1 to control the duty cycle of the NMOS tube M3, thereby controlling the voltage value of the boost converter output voltage V1, so that the control loop controls the ground-based voltage signal V2 to 0.8V, (V1-V OUT )*R2 / R1=0.8V, that is, the voltage across the source and drain of the output PMOS tube M1 is V1-V OUT is controlled by the loop to 0.8V*R1 / R2, which is consistent with I OUT Value, R OUT The value has nothing to do with it, thereby reducing the power consumption of the output stage of the digital-to-analog converter;

[0102] like Figure 3 As shown, when I OUT When increasing, V OUT Follow the increase of V OUT =I OUT *R OUT Since the loop response takes time, V1-V OUT When the loop controls V2 to 0.8V again, V1-V OUT The value is restored to a constant value, so that the voltage across the source and drain of the output PMOS tube M1 is fixed and I OUT , R OUT The value of is irrelevant;

[0103] When I OUT When V OUT Follow the reduction of V OUT =I OUT *R OUT Since the loop response takes time, V1-V OUT Increase, when the loop controls V2 to 0.8V again, V1-V OUT The value is restored to a constant value, so that the voltage across the source and drain of the output PMOS tube M1 is fixed and I OUT Value, R OUT The value is irrelevant.

[0104] The boost converter suitable for powering the DAC output stage proposed in an embodiment of the present invention converts the source-drain voltage of the output PMOS tube into a ground-based voltage signal and converts the ground-based voltage signal into the output voltage of the boost converter in sequence through a control loop, thereby dynamically adjusting and reducing the power consumption of the output PMOS tube.

[0105] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A boost converter suitable for powering a DAC output stage, the DAC output stage comprising an output PMOS tube and a load resistor, the source of the output PMOS tube being electrically connected to the boost converter output voltage, the drain being electrically connected to one end of the load resistor, and the other end of the load resistor being electrically connected to ground, characterized in that: include: A high-side voltage sampling circuit, the input of which is electrically connected to the drain of the output PMOS tube, and is used to convert the source-drain voltage of the output PMOS tube into a ground-based voltage signal; a boost circuit, the input of which is electrically connected to the output of the high-side voltage sampling circuit, and is used to convert the ground-based voltage signal into the boost converter output voltage; The high-side voltage sampling circuit includes a first operational amplifier, a feedback PMOS tube, a first resistor and a second resistor; The non-inverting input terminal of the first operational amplifier is electrically connected to the drain of the output PMOS tube, and the output is electrically connected to the gate of the feedback PMOS tube; One end of the first resistor is electrically connected to the output voltage of the boost converter, and the other end is electrically connected to the source of the feedback PMOS tube and the inverting input end of the first operational amplifier; The drain of the feedback PMOS tube is electrically connected to one end of the second resistor; The other end of the second resistor is electrically connected to the ground; The boost circuit includes an error conversion circuit, a duty cycle adjustment circuit and a main body conversion circuit.

2. The boost converter according to claim 1, wherein: The relationship between the source-drain voltage of the output PMOS tube and the voltage signal based on the ground is: V2=(V1-V OUT )*R2 / R1; Among them, V1-V OUT is the source-drain voltage of the output PMOS tube, V2 is the voltage signal based on the ground, V1 is the output voltage of the boost converter, V OUT To output the drain potential of the PMOS tube, R1 is the first resistance value, and R2 is the second resistance value.

3. The boost converter according to claim 1, wherein: The error conversion circuit comprises: A second operational amplifier, an inverting input terminal of which is electrically connected to the drain of the feedback PMOS tube, and a non-inverting input terminal of which is electrically connected to a fixed potential; a compensation resistor, one end of which is electrically connected to the output of the second operational amplifier; The compensation capacitor has one end electrically connected to the other end of the compensation resistor and the other end electrically connected to the ground.

4. The boost converter according to claim 3, characterized in that The duty cycle adjustment circuit comprises: a comparator having a negative input terminal electrically connected to the output of the second operational amplifier; A trigger, wherein the R terminal is electrically connected to the output of the comparator, and the S terminal is electrically connected to the clock signal; An NMOS tube, a gate electrically connected to the output terminal of the trigger, and a source electrically connected to the ground; The current detector has an input electrically connected to the drain of the NMOS tube.

5. The boost converter according to claim 4, characterized in that The duty cycle adjustment circuit also includes: The ramp compensator has a first input terminal electrically connected to the output of the current detector, a second input terminal electrically connected to the compensation ramp, and an output electrically connected to the positive input terminal of the comparator.

6. The boost converter according to claim 5, characterized in that The main conversion circuit comprises: an inductor, one end of which is electrically connected to a power supply; A diode, the input end of which is electrically connected to the other end of the inductor and the drain of the NMOS tube at the same time, and the output end of which serves as the output voltage of the boost converter; The main capacitor has one end electrically connected to the output end of the diode and the other end electrically connected to the ground.

7. A boost conversion method for powering a DAC output stage in a boost converter according to any one of claims 1 to 6, characterized in that: include: Convert the source-drain voltage of the output PMOS tube into a ground-based voltage signal; A ground-based voltage signal is converted to the boost converter output voltage.

8. The method according to claim 7, characterized in that Converting the source-drain voltage of the output PMOS tube to a ground-based voltage signal includes: Converting the source-drain voltage of the output PMOS tube into a ground-based voltage signal through a high-side voltage sampling circuit, wherein the ground-based voltage signal is proportional to the source-drain voltage of the output PMOS tube; Converting a ground-based voltage signal to the boost converter output voltage includes: Convert the difference between the ground-based voltage signal and the fixed potential into a voltage control signal; The voltage control signal and the output signal of the current detection circuit for ramp compensation are compared by a comparator to control the duty cycle of the NMOS tube; The voltage value of the output voltage of the boost converter is adjusted by the duty cycle.

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