Semiconductor devices for power amplifiers

Abstract

A semiconductor device (100) for high-frequency amplification comprises a substrate (101), a first nitride semiconductor layer (103), a two-dimensional electron gas layer (105), and a second nitride semiconductor layer (104) on the substrate (101), and a source electrode (301), a drain electrode (302), and a gate electrode (401) spaced apart from each other above the second nitride semiconductor layer (104); in a planar view, in an active region (701) where the two-dimensional electron gas layer (105) exists, a resistor (601) and a resistor (601) disposed above the second nitride semiconductor layer (104); in a planar view, in an inactive region (704), a drain terminal (803) and a gate terminal (804) connected to the drain electrode (302) or the gate electrode (401), and a first resistor terminal (805) and a second resistor terminal (806) connected to the resistor (601).

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device for power amplification. Background Art

[0002] III-V semiconductors, especially arsenic-based GaAs or AlGaAs, or nitride-based GaN or AlGaN, can easily form heterostructures such as AlGaAs / GaAs and AlGaN / GaN. In the case of III-nitride semiconductors, in addition to the difference in band gap, the spontaneous polarization caused by the difference in ionic radius or the fixed charge caused by the piezoelectric polarization generated by the lattice constant difference between AlGaN and GaN can generate a channel (two-dimensional electron gas: 2DEG (Dimensional Electron Gas)) with high mobility and high concentration of electrons on the GaAs side of AlGaAs / GaAs and the GaN layer side of the AlGaN / GaN interface. By controlling this two-dimensional electron gas as a channel, a high electron mobility transistor (HEMT) can be formed. Taking advantage of the high-speed operation brought about by this high mobility, its application in high-frequency devices such as amplifiers and switching elements has become widespread.

[0003] In recent years, the practical application of high-frequency amplifiers, particularly for mobile phone base stations, has been progressing. With the advancement of mobile phone communication generations, expectations are rising for further increases in operating frequency and output power. This increase in operating frequency or output power leads to an increase in heat generated by the components (e.g., transistors) used in high-frequency amplifiers.

[0004] Patent Document 1 discloses a semiconductor device in which a temperature sensor is mounted next to a transistor.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 63-299264 Summary of the Invention

[0008] Problems to be solved by the invention

[0009] Furthermore, it is required to detect the temperature of the transistor during operation with good responsiveness and to control the heat generated by the transistor itself. However, according to the conventional technology described in Patent Document 1, it is difficult to detect the temperature with good responsiveness.

[0010] Therefore, the present disclosure provides a power amplification semiconductor device (high-frequency amplification semiconductor device) capable of detecting the temperature of a transistor with good responsiveness.

[0011] Means used to solve problems

[0012] A power amplifier semiconductor device according to a technical solution of the present disclosure comprises: a substrate; a first nitride semiconductor layer provided on the substrate; a second nitride semiconductor layer provided on the first nitride semiconductor layer, having a larger band gap than the first nitride semiconductor layer; a two-dimensional electron gas layer provided on the first nitride semiconductor layer side of the interface between the first nitride semiconductor layer and the second nitride semiconductor layer; a source electrode and a drain electrode provided above the first nitride semiconductor layer at intervals and electrically connected to the two-dimensional electron gas layer, respectively; and a gate electrode connected to the source electrode and the drain electrode. It is arranged at a distance from each other and is in contact with the above-mentioned second nitride semiconductor layer; in a planar observation of the above-mentioned substrate, the above-mentioned substrate is divided into an active region where the above-mentioned two-dimensional electron gas layer exists and an inactive region where the above-mentioned two-dimensional electron gas layer does not exist; in the above-mentioned active region, there is: a high electron mobility transistor, including the above-mentioned source electrode, the above-mentioned drain electrode and the above-mentioned gate electrode; and a resistor for temperature detection, arranged above the above-mentioned second nitride semiconductor layer; in the above-mentioned inactive region, there is: a first terminal pad, connected to the above-mentioned drain electrode or the above-mentioned gate electrode; and a second terminal pad, connected to the above-mentioned resistor.

[0013] Effects of the Invention

[0014] According to the power amplification semiconductor device of one aspect of the present disclosure, the temperature of the transistor can be detected with good responsiveness. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a plan view showing the structure of the high-frequency amplification semiconductor device according to the first embodiment.

[0016] Figure 2A Yes Figure 1 A cross-sectional view of the structure of the high-frequency amplification semiconductor device taken along line IIa-IIa of FIG.

[0017] Figure 2B Yes Figure 1 A cross-sectional view of the structure of the high-frequency amplification semiconductor device taken along line IIb-IIb of FIG.

[0018] Figure 3A This is a plan view showing a first example of the structure of a high-frequency amplification semiconductor device according to Modification 1 of Embodiment 1.

[0019] Figure 3B It is a plan view showing a second example of the structure of the high-frequency amplification semiconductor device according to the first modification of the first embodiment.

[0020] Figure 4AThis is a cross-sectional view showing a range in which a resistor can be arranged in a high-frequency amplification semiconductor device according to a second modification of the first embodiment.

[0021] Figure 4B This is a cross-sectional view showing a first example of the structure of a high-frequency amplification semiconductor device according to a second modification of the first embodiment.

[0022] Figure 4C This is a cross-sectional view showing a second example of the structure of the high-frequency amplification semiconductor device according to the second modification of the first embodiment.

[0023] Figure 4D This is a cross-sectional view showing a third example of the structure of the high-frequency amplification semiconductor device according to the second modification of the first embodiment.

[0024] Figure 4E This is a cross-sectional view showing a fourth example of the structure of the high-frequency amplification semiconductor device according to the second modification of the first embodiment.

[0025] Figure 4F This is a cross-sectional view showing a fifth example of the structure of the high-frequency amplification semiconductor device according to the second modification of the first embodiment.

[0026] Figure 4G This is a cross-sectional view showing a sixth example of the structure of the high-frequency amplification semiconductor device according to the second modification of the first embodiment.

[0027] Figure 4H This is a cross-sectional view showing a seventh example of the structure of the high-frequency amplification semiconductor device according to the second modification of the first embodiment.

[0028] Figure 4I This is a cross-sectional view showing an eighth example of the structure of the high-frequency amplification semiconductor device according to the second modification of the first embodiment.

[0029] Figure 4J This is a cross-sectional view showing a ninth example of the structure of the high-frequency amplification semiconductor device according to the second modification of the first embodiment.

[0030] Figure 5 It is a plan view showing the structure of a high-frequency amplification semiconductor device according to a third modification of the first embodiment.

[0031] Figure 6A It is a plan view showing a first example of the structure of a high-frequency amplification semiconductor device according to a fourth modification of the first embodiment.

[0032] Figure 6B This is a plan view showing a second example of the structure of the high-frequency amplification semiconductor device according to the fourth modification of the first embodiment.

[0033] Figure 6CThis is a plan view showing a third example of the structure of the high-frequency amplification semiconductor device according to the fourth modification of the first embodiment.

[0034] Figure 7A This is a plan view showing a first example of the structure of a high-frequency amplification semiconductor device according to a fifth modification of the first embodiment.

[0035] Figure 7B This is a plan view showing a second example of the structure of a high-frequency amplification semiconductor device according to a fifth modification of the first embodiment.

[0036] Figure 7C It is a plan view showing a third example of the structure of the high-frequency amplification semiconductor device according to the fifth modification of the first embodiment.

[0037] Figure 8A It is a plan view showing a first example of the structure of a high-frequency amplification semiconductor device according to a sixth modification of the first embodiment.

[0038] Figure 8B It is a plan view showing a second example of the structure of a high-frequency amplification semiconductor device according to Modification 6 of the first embodiment.

[0039] Figure 8C It is a plan view showing a third example of the structure of the high-frequency amplification semiconductor device according to the sixth modification of the first embodiment.

[0040] Figure 9 It is a plan view showing the structure of a high-frequency amplification semiconductor device according to a second embodiment.

[0041] Figure 10A It is a plan view showing a first example of the structure of a high-frequency amplification semiconductor device according to a modification of the second embodiment.

[0042] Figure 10B It is a plan view showing a second example of the structure of the high-frequency amplification semiconductor device according to a modification of the second embodiment.

[0043] Figure 11 This is a first cross-sectional view for explaining the method for manufacturing the high-frequency amplification semiconductor device according to the first embodiment.

[0044] Figure 12 This is a second cross-sectional view for explaining the method for manufacturing the high-frequency amplification semiconductor device according to the first embodiment.

[0045] Figure 13 This is a third cross-sectional view for explaining the method for manufacturing the high-frequency amplification semiconductor device according to the first embodiment.

[0046] Figure 14 This is a fourth cross-sectional view for explaining the method for manufacturing the high-frequency amplification semiconductor device according to the first embodiment.

[0047] Figure 15 This is a fifth cross-sectional view for explaining the method for manufacturing the high-frequency amplification semiconductor device according to the first embodiment.

[0048] Figure 16 This is a sixth cross-sectional view for explaining the method for manufacturing the high-frequency amplification semiconductor device according to the first embodiment.

[0049] Figure 17 This is a seventh cross-sectional view for explaining the method for manufacturing the high-frequency amplification semiconductor device according to the first embodiment.

[0050] Figure 18A This is for explaining the method for manufacturing the high-frequency amplifying semiconductor device according to the first embodiment. Figure 1 The 8th cross-sectional view of line IIa-IIa.

[0051] Figure 18B This is for explaining the method for manufacturing the high-frequency amplifying semiconductor device according to the first embodiment. Figure 1 The 9th cross-sectional view along line IIb-IIb.

[0052] Figure 19A This is for explaining the method for manufacturing the high-frequency amplifying semiconductor device according to the first embodiment. Figure 1 The 10th cross-sectional view of line IIa-IIa.

[0053] Figure 19B This is for explaining the method for manufacturing the high-frequency amplifying semiconductor device according to the first embodiment. Figure 1 The 11th cross-sectional view along line IIb-IIb.

[0054] Figure 20A This is for explaining the method for manufacturing the high-frequency amplifying semiconductor device according to the first embodiment. Figure 1 The 12th cross-sectional view of line IIa-IIa.

[0055] Figure 20B This is for explaining the method for manufacturing the high-frequency amplifying semiconductor device according to the first embodiment. Figure 1 The 13th cross-sectional view along line IIb-IIb.

[0056] Figure 21A This is for explaining the method for manufacturing the high-frequency amplifying semiconductor device according to the first embodiment. Figure 1 The 14th cross-sectional view of line IIa-IIa.

[0057] Figure 21B This is for explaining the method for manufacturing the high-frequency amplifying semiconductor device according to the first embodiment. Figure 1 The 15th cross-sectional view along line IIb-IIb. DETAILED DESCRIPTION

[0058] Hereinafter, the embodiments of the present disclosure will be described with reference to the accompanying drawings. In addition, the embodiments described below all represent preferred specific examples of the present disclosure. Therefore, the numerical values, shapes, materials, constituent elements, configuration positions and connection forms of constituent elements, as well as steps (processes) and the order of steps (processes) shown in the following embodiments are taken as examples and are not intended to limit the present disclosure. Therefore, regarding the constituent elements of the following embodiments that are not recorded in the independent claims representing the highest concept of the present disclosure, they are described as arbitrary constituent elements.

[0059] In addition, each figure is a schematic diagram and does not necessarily illustrate the exact diagram. Therefore, the scales, etc. in each figure are not necessarily the same. In each figure, the same reference numerals are given to substantially the same structure, and repeated descriptions are omitted or simplified.

[0060] In this specification, terms such as "upper" and "lower" in the structure of a high-frequency amplifying semiconductor device do not refer to upper (vertically above) and lower (vertically below) in absolute spatial terms. Instead, they refer to relative positional relationships based on the stacking order of a stacked structure. Furthermore, terms such as "upper" and "lower" apply not only to situations where two components are spaced apart and another component is present between them, but also to situations where two components are closely spaced and in contact with each other.

[0061] In this specification and the accompanying drawings, the X-axis, Y-axis, and Z-axis represent the three axes of a right-handed three-dimensional orthogonal coordinate system. In each embodiment, the stacking direction of each layer of the high-frequency amplifying semiconductor device is defined as the Z-axis direction, and the two axes parallel to the main surface of the high-frequency amplifying semiconductor device are defined as the X-axis and Y-axis. In this specification, "planar view" refers to viewing the high-frequency amplifying semiconductor device from the Z-axis direction.

[0062] In addition, in this specification, terms such as orthogonal, parallel, and identical that indicate the relationship between elements, terms such as rectangle that indicate the shape of an element, and numerical values and numerical ranges do not represent only strict expressions, but mean essentially equivalent ranges, for example, expressions that also include differences of about a few percentage points (or about 10%).

[0063] (Implementation 1)

[0064] [1-1. Structure of High-Frequency Amplification Semiconductor Device]

[0065] First, refer to Figure 1 、 Figure 2A and Figure 2BThe structure of the high-frequency amplification semiconductor device according to the first embodiment will be described. Figure 1 It is a plan view showing the structure of the high-frequency amplification semiconductor device 100 according to the first embodiment. Figure 2A Yes Figure 1 1 is a cross-sectional view of the structure of the high-frequency amplification semiconductor device 100 taken along line IIa-IIa of FIG. Figure 2B Yes Figure 1 1 is a cross-sectional view of the structure of the high-frequency amplification semiconductor device 100 taken along line IIb-IIb.

[0066] In addition, Figure 1 In FIG, the source electrode 301, the drain electrode 302, the source-drain electrode connection opening 801a, the gate electrode connection opening 801c, the second wiring layer connection opening 801d, and the resistor connection opening 901a arranged under the second wiring layer 901 are depicted with dotted lines to facilitate identification of their positional relationships. Figure 1 In the figure, for identification, the source field plate electrode 501 is shown with dotted hatching, the resistor 601 is shown with horizontal hatching, the second wiring layer 901 is shown with oblique hatching, and the other first wiring layer 801 and the like are shown without hatching. This also applies to the plan views of the first and subsequent variants of the first embodiment.

[0067] like Figure 1 、 Figure 2A and Figure 2B As shown, the high-frequency amplification semiconductor device 100 includes a substrate 101, a buffer layer 102, a first nitride semiconductor layer 103, a second nitride semiconductor layer 104, a first insulating layer 201, a second insulating layer 202, a third insulating layer 203, a fourth insulating layer 204, a source electrode 301, a drain electrode 302, a gate electrode 401, a source field plate electrode 501, a resistor 601, an active region 701, an inactive region 704, a first wiring layer 801, an opening 801a for connecting a source-drain electrode, an opening 801b for connecting a source-field plate electrode, an opening 801c for connecting a gate electrode, an opening 801d for connecting a second wiring layer, a source via 802, a drain terminal 803, a gate terminal 804, a first resistor terminal 805, a second resistor terminal 806, a second wiring layer 901, and an opening 901a for connecting a resistor.

[0068] Furthermore, in the high-frequency amplification semiconductor device 100, a two-dimensional electron gas layer 105 is formed on the first nitride semiconductor layer 103 side of the heterointerface between the second nitride semiconductor layer 104 and the first nitride semiconductor layer 103. Furthermore, the high-frequency amplification semiconductor device 100 is an example of a power amplification semiconductor device (hereinafter sometimes referred to as a power amplification semiconductor chip or simply a chip).

[0069] The substrate 101 is, for example, a substrate made of Si. The substrate 101 is not limited to a substrate made of Si, and may be a substrate made of sapphire, SiC, GaN, AlN, or the like.

[0070] Buffer layer 102 is formed on substrate 101. Buffer layer 102 is, for example, a nitride semiconductor layer composed of a stacked structure of multiple layers of AlN and AlGaN with a thickness of 2 μm. Alternatively, buffer layer 102 may be composed of a single layer or multiple layers of a Group III nitride semiconductor such as GaN, AlGaN, AIN, InGaN, or AlInGaN.

[0071] The first nitride semiconductor layer 103 is formed on the substrate 101. In this embodiment, the first nitride semiconductor layer 103 is formed on the buffer layer 102. The first nitride semiconductor layer 103 is composed of, for example, undoped (i-type) GaN with a thickness of 200 nm. Undoped (i-type) means that no impurities are intentionally added during epitaxial growth. In addition to GaN, the first nitride semiconductor layer 103 can also be composed of Group III nitride semiconductors such as AlGaN, InGaN, and AlInGaN. In addition, the first nitride semiconductor layer 103 not only includes undoped type (i-type), but can also contain n-type impurities such as Si.

[0072] The second nitride semiconductor layer 104 is formed on the first nitride semiconductor layer 103. The second nitride semiconductor layer 104 is made of, for example, undoped (i-type) AlGaN having a thickness of 20 nm and an Al composition ratio of 25%.

[0073] Furthermore, the second nitride semiconductor layer 104 is not limited to AlGaN, and may be composed of a Group III nitride semiconductor such as AlN, InGaN, or AlInGaN. Furthermore, the second nitride semiconductor layer 104 may contain n-type impurities.

[0074] Furthermore, on the second nitride semiconductor layer 104 , for example, a semiconductor layer made of GaN with a thickness of approximately 1 to 2 nm, or a protective insulating layer made of SiN with a thickness of approximately 2 to 5 nm may be provided as a cap layer.

[0075] In this embodiment, the band gap of the second nitride semiconductor layer 104 is larger than the band gap of the first nitride semiconductor layer 103. Furthermore, the second nitride semiconductor layer 104 composed of undoped (i-type) AlGaN and the first nitride semiconductor layer 103 composed of undoped (i-type) GaN form a heterostructure. That is, the interface between the second nitride semiconductor layer 104 and the first nitride semiconductor layer 103 forms a heterojunction, and a hetero barrier is formed at the interface between the second nitride semiconductor layer 104 and the first nitride semiconductor layer 103.

[0076] As a result, a two-dimensional electron gas layer 105 is formed near the boundary between the first nitride semiconductor layer 103 and the second nitride semiconductor layer 104, for example, on the first nitride semiconductor layer 103 side of the heterointerface between the second nitride semiconductor layer 104 and the first nitride semiconductor layer 103 (in other words, on the second nitride semiconductor layer 104 side within the first nitride semiconductor layer 103). For example, the two-dimensional electron gas layer 105 is provided on the first nitride semiconductor layer 103 side of the interface between the first nitride semiconductor layer 103 and the second nitride semiconductor layer 104.

[0077] Furthermore, a semiconductor layer having a thickness of about 1 to 2 nm and made of, for example, AlN may be provided between the second nitride semiconductor layer 104 and the first nitride semiconductor layer 103 as a spacer layer.

[0078] The source electrode 301 and the drain electrode 302 are provided on the second nitride semiconductor layer 104, spaced apart and facing each other. The source electrode 301 and the drain electrode 302 are each electrically connected to the first nitride semiconductor layer 103. The source electrode 301 and the drain electrode 302 are, for example, multilayer electrode films having a stacked structure of Ti films and Al films, but are not limited thereto. Furthermore, the source electrode 301 and the drain electrode 302 are electrically connected (e.g., ohmic connection) to the two-dimensional electron gas layer 105.

[0079] Furthermore, a recessed portion obtained by removing a portion of the second nitride semiconductor layer 104 and / or the first nitride semiconductor layer 103, a contact layer containing an n-type impurity and a donor such as Si, etc., may be provided below the source electrode 301 and the drain electrode 302. The contact layer containing an n-type impurity can be formed by plasma treatment, ion implantation, regrowth, or the like.

[0080] The gate electrode 401 is provided between the source electrode 301 and the drain electrode 302 on the second nitride semiconductor layer 104. The gate electrode 401 is provided at a distance from the source electrode 301 and the drain electrode 302. The gate electrode 401 is, for example, a multilayer electrode film having a stacked structure in which a Ni film and an Au film are stacked in sequence, but is not limited thereto. Furthermore, the gate electrode 401 may be electrically Schottky-connected to the two-dimensional electron gas layer 105. Furthermore, a so-called MIS structure may be formed in which an insulating layer is interposed between the gate electrode 401 and the second nitride semiconductor layer 104 to electrically insulate the gate electrode 401 from the second nitride semiconductor layer 104.

[0081] In plan view, the gate electrode 401 extends in the Y-axis direction. In plan view, the gate electrode 401 is rectangular, and its long side is parallel to the Y-axis direction. The Y-axis direction is an example of a first direction.

[0082] The gate electrode 401 may be, for example, an alloy containing one or more of Ni, Ta, Ti, W, TaN, TiN, Pt, Pd, Al, Au, Cu, or Ag. The gate electrode 401 may be formed of a single layer (single-layer film) or a stacked body (stacked film).

[0083] The first insulating layer 201 is provided on the source electrode 301, the drain electrode 302, and the gate electrode 401. The first insulating layer 201 is composed of at least one of SiN, SiO2, SiON, AlN, Al2O3, SiC, and C (diamond). In this embodiment, it is composed of SiN with a thickness of 150 nm. The first insulating layer 201 can be composed of a single layer or a stacked layer. SiC and C (diamond) are highly thermally conductive materials with thermal conductivity exceeding a specified value.

[0084] The source field plate electrode 501 has the same potential as the source electrode 301. The source field plate electrode 501 has an end on the drain electrode 302 side between the gate electrode 401 and the drain electrode 302, and is provided above the second nitride semiconductor layer 104. Specifically, the source field plate electrode 501 is positioned closer to the drain electrode 302 side than the end of the gate electrode 401 on the source electrode 301 side, with the end on the drain electrode 302 side positioned between the gate electrode 401 and the drain electrode 302. Furthermore, when viewed in plan, the gate electrode 401 is provided parallel to the longitudinal direction of the gate electrode 401. For example, the source field plate electrode 501 is a multilayer electrode film having a stacked structure in which Ti films and Al films are sequentially stacked, but this is not a limitation.

[0085] The source field plate electrode 501 is connected to the first wiring layer 801 through the source field plate electrode connection opening 801b, which is connected to the source electrode 301 through the source-drain electrode connection opening 801a. The source field plate electrode 501 is an example of a field plate.

[0086] The source field plate electrode 501 can be, for example, an alloy containing one or more of Ni, Ta, Ti, W, TaN, TiN, Pt, Pd, Al, Au, Cu, or Ag. Furthermore, the source field plate electrode 501 can be a single layer or a stacked layer. Cu and Ag are highly thermally conductive materials with thermal conductivities exceeding a specified value.

[0087] The second insulating layer 202 is provided on the first insulating layer 201 and the source field plate electrode 501. The second insulating layer 202 is composed of at least one of SiN, SiO2, SiON, AlN, Al2O3, SiC, and C (diamond). In this embodiment, it is composed of SiN with a thickness of 100 nm. The second insulating layer 202 can be composed of a single layer or a stacked layer.

[0088] The resistor 601 is located within the active region 701 when viewed in plan, and is located on the second nitride semiconductor layer 104 (on the positive side of the Z axis) when viewed in cross section. It is a temperature detection resistor used to detect the temperature of the high-frequency amplifier transistor (an example of a device) described later as a change in resistance value. In this embodiment, the resistor 601 is located on the second insulating layer 202. In addition, in this embodiment, the resistor 601 is located on the source field plate electrode 501. That is, in a plan view, at least a portion of the resistor 601 overlaps with the source field plate electrode 501. In addition, in this embodiment, at least a portion of the resistor 601 overlaps with the gate electrode 401 when viewed in plan. For example, in a plan view, at least a portion of the resistor 601 overlaps with the region where the source field plate electrode 501 and the gate electrode 401 overlap. In addition, the resistor 601 is not located in a region of the active region 701 that does not overlap with the source field plate electrode 501 and / or the gate electrode 401 when viewed in plan.

[0089] The end of the resistor 601 on the source electrode 301 side (the negative side of the X-axis) is positioned closer to the drain electrode 302 side (the positive side of the X-axis) than the end of the source field plate electrode 501 on the source electrode 301 side (the negative side of the X-axis). Furthermore, the end of the resistor 601 on the drain electrode 302 side (the positive side of the X-axis) is positioned closer to the source electrode 301 side (the negative side of the X-axis) than the end of the source field plate electrode 501 on the drain electrode 302 side (the positive side of the X-axis). This suppresses any increase in parasitic capacitance caused by the resistor 601.

[0090] The resistor 601 is extended in the Y-axis direction when viewed from above. The resistor 601 is rectangular when viewed from above, with its long side parallel to the Y-axis. For example, the long side of the resistor 601 is parallel to the long side (extension direction) of the gate electrode 401 when viewed from above. In other words, the long side of the resistor 601 is the first direction. The shape of the resistor 601 when viewed from above is, for example, a rectangle that is longer in the Y-axis direction. The resistor 601 is an elongated rectangle so as to cover the two resistor connection openings 901a provided along the Y-axis from the bottom. In addition, the shape of the resistor 601 when viewed from above is not limited to this.

[0091] The width (length in the X-axis direction) of the resistor 601 is, for example, less than the width (length in the X-axis direction) of the source field plate electrode 501 and / or the width (length in the X-axis direction) of the gate electrode 401, but is not limited thereto. Furthermore, the thickness (length in the Z-axis direction) of the resistor 601 is, for example, less than the thickness (length in the Z-axis direction) of the source field plate electrode 501 and / or the thickness (length in the Z-axis direction) of the gate electrode 401, but is not limited thereto.

[0092] For example, the resistor 601 is a multilayer electrode film having a stacked structure of Ti and Al films. However, the combination is not limited to Ti and Al. It may also be a single-layer electrode film composed of a single metal such as Ti, Al, Cu, Ni, Au, Pt, Pd, Ta, W, Si, or Hf. It may also be a multilayer electrode film composed of a combination of two or more of these metals. It may also be an electrode film composed of an alloy of these metals. It may also be a conductive compound obtained by nitriding or oxidizing these metals. It may also be a combination of these conductive compounds and the above-mentioned electrode films. Furthermore, the resistor 601 may be composed of the same metal as the gate electrode 401 or a different metal.

[0093] The third insulating layer 203 is provided on the second insulating layer 202 and the resistor 601. The third insulating layer 203 is composed of at least one of SiN, SiO2, SiON, AlN, Al2O3, SiC, and C (diamond). In this embodiment, it is composed of SiN with a thickness of 200 nm. The third insulating layer 203 can be composed of a single layer (single-layer film) or a stacked structure (stacked film).

[0094] The fourth insulating layer 204 is provided on the third insulating layer 203. The fourth insulating layer 204 is composed of at least one of SiN, SiO2, SiON, AlN, Al2O3, SiC, and C (diamond). In this embodiment, it is composed of SiN with a thickness of 200 nm. The fourth insulating layer 204 can be composed of a single layer (single-layer film) or a stacked body (stacked film).

[0095] The active region 701 is the region (region on the substrate 101) where the two-dimensional electron gas layer 105 is located in a planar view. When the direction perpendicular to the longitudinal direction of the gate electrode 401 is defined as the X-axis direction, the length of the active region 701 in the X-axis direction is L1. When the direction parallel to the longitudinal direction of the gate electrode 401 is defined as the Y-axis direction, the length of the active region 701 in the Y-axis direction is L2. The X-axis direction is a direction perpendicular to the first direction in a planar view and is an example of a second direction.

[0096] A high-frequency amplification transistor (high-frequency amplification amplifier) including at least a source electrode 301, a drain electrode 302, and a gate electrode 401 is formed in the active region 701. In this embodiment, the high-frequency amplification transistor includes a source field plate electrode 501 in addition to the source electrode 301, the drain electrode 302, and the gate electrode 401.

[0097] The inactive region 704 is a region on the substrate 101 outside the active region 701, where the two-dimensional electron gas layer 105 is absent. The inactive region 704 can be formed by implanting molecules containing, for example, He, B, H, F, and Fe, or by removing portions of the second nitride semiconductor layer 104, the first nitride semiconductor layer 103, and the buffer layer 102 and implanting molecules containing He, B, H, F, and Fe into the remaining regions. Alternatively, the inactive region 704 can be formed by removing portions of the second nitride semiconductor layer 104, the first nitride semiconductor layer 103, and the buffer layer 102. The absence of the two-dimensional electron gas layer 105 encompasses not only the complete absence of electrons but also the substantial absence of electrons.

[0098] In this way, the substrate 101 is divided into an active region 701 having a two-dimensional electron gas layer 105 and an inactive region 704 having no two-dimensional electron gas layer 105 in a planar view.

[0099] The first wiring layer 801 is provided on the fourth insulating layer 204. The first wiring layer 801 is a multi-layer metal layer having a stacked structure in which Au layers are sequentially stacked on a Ti layer, but the structure is not limited thereto.

[0100] The electrical connection between the source electrode 301 and the drain electrode 302 and the first wiring layer 801 is achieved by covering the source-drain electrode connection opening 801a provided in the fourth insulating layer 204, the third insulating layer 203, the second insulating layer 202 and the first insulating layer 201 and reaching the source electrode 301 and the drain electrode 302 with the first wiring layer 801.

[0101] The electrical connection between the source field plate electrode 501 and the source electrode 301 is achieved by covering a source field plate electrode connection opening 801b provided in the fourth insulating layer 204, the third insulating layer 203, and the second insulating layer 202 and reaching the source field plate electrode 501 with the first wiring layer 801. The source field plate electrode connection opening 801b is formed in a region on the Y-axis side of a region outside the active region 701 (inactive region 704) when viewed in plan.

[0102] In planar observation, the source electrode 301 and the source field plate electrode 501 are connected to a back metal (not shown) provided on the back side of the substrate 101 through a source via hole 802 formed on the Y-axis side outside the active area 701, provided in the fourth insulating layer 204, the third insulating layer 203, the second insulating layer 202, the first insulating layer 201, the second nitride semiconductor layer 104, the first nitride semiconductor layer 103, the buffer layer 102 and the substrate 101 and reaching the back side of the substrate 101, and have a reference potential.

[0103] In a planar view, a drain terminal 803 is formed in a region on the Y-axis direction side of the inactive region 704 by the first wiring layer 801 , and the drain terminal 803 is connected to the drain electrode 302 .

[0104] The electrical connection between the gate electrode 401 and the first wiring layer 801 (gate terminal 804) is achieved by covering the gate electrode connection opening 801c formed on the Y-axis side outside the active area 701, provided in the fourth insulating layer 204, the second insulating layer 202 and the first insulating layer 201 and reaching the gate electrode 401 by the first wiring layer 801 in planar observation.

[0105] In plan view, a gate terminal 804 is formed by the first wiring layer 801 in a region of the inactive region 704 on the opposite side of the drain terminal 803 in the Y-axis direction (Y-axis negative side), and the gate terminal 804 is connected to the gate electrode 401 .

[0106] The second wiring layer 901 is a wiring layer for connecting the resistor 601 to the first resistor terminal 805 and the second resistor terminal 806, and is provided between the third insulating layer 203 and the fourth insulating layer 204. The second wiring layer 901 is connected to both ends of the resistor 601 via the resistor connection opening 901a. The second wiring layer 901 is a multilayer metal layer having a stacked structure in which Au layers are sequentially stacked on a Ti layer, but is not limited to this.

[0107] The electrical connection between the resistor 601 and the second wiring layer 901 is achieved by covering the resistor connection opening 901 a provided in the third insulating layer 203 and reaching the resistor 601 with the second wiring layer 901 .

[0108] The drain terminal 803 is connected to the drain electrode 302 via the source-drain electrode connection opening 801a on the Y-axis direction side outside the active region 701. The drain terminal 803 is formed of the first wiring layer 801.

[0109] The gate terminal 804 is connected to the gate electrode 401 through the gate electrode connection opening 801c. The gate terminal 804 is formed of the first wiring layer 801.

[0110] At least one of the drain terminal 803 and the gate terminal 804 is an example of a first terminal pad. The first terminal pad is a portion electrically connected to the outside of the chip (e.g., a mounting substrate or a semiconductor package) by connecting a wire or the like, and is connected to, for example, the drain electrode 302 or the gate electrode 401. Furthermore, the first terminal pad is, for example, arranged in a region of the inactive region 704 that is parallel to the active region 701 in the direction in which the gate electrode 401 extends (the Y-axis direction).

[0111] The source via 802 connects the first wiring layer 801 connected to the source electrode 301 through the source-drain electrode connection opening 801 a and the back metal.

[0112] The first resistor terminal 805 and the second resistor terminal 806 are connected to the resistor 601 via the second wiring layer 901, and are connected to a temperature detection processing unit or electronic component outside the high-frequency amplification semiconductor device 100 using wires or the like. The first resistor terminal 805 is connected to the end portion on the positive side of the Y axis (one end portion in the longitudinal direction) of the resistor 601 via the second wiring layer 901, and the second resistor terminal 806 is connected to the end portion on the negative side of the Y axis (the other end portion in the longitudinal direction) of the resistor 601 via the second wiring layer 901. In other words, the two ends of the resistor 601 are connected to either the first resistor terminal 805 or the second resistor terminal 806.

[0113] At least one of the first resistor terminal 805 and the second resistor terminal 806 is an example of a second terminal pad connected to the resistor body 601. For example, the second terminal pad is a portion electrically connected to the outside of the chip (e.g., a mounting substrate or a semiconductor package) by connecting a wire or the like, and is arranged in a region of the inactive region 704 that is parallel to the active region 701 in a direction (X-axis direction) perpendicular to the extending direction (Y-axis direction) of the gate electrode 401.

[0114] The first resistance terminal 805 and the second resistance terminal 806 are provided in the region on the X-axis side in the region outside the active region 701 (the inactive region 704 ), and are connected to the second wiring layer 901 via the second wiring layer connection opening 801 d .

[0115] The first resistor terminal 805 and the second resistor terminal 806 are provided, for example, in a region on the negative side of the X-axis in a region on the X-axis direction outside the active region 701 in plan view. For example, the first resistor terminal 805 and the second resistor terminal 806 are provided on the same side of the high-frequency amplification semiconductor device 100.

[0116] The first resistance terminal 805 and the second resistance terminal 806 are terminal pads (second terminal pads) different from the terminal pads (first terminal pads) connected to the high-frequency amplification transistor. The terminal pads connected to the high-frequency amplification transistor are the drain terminal 803 and the gate terminal 804.

[0117] The first resistance terminal 805 and the second resistance terminal 806 are formed of, for example, the first wiring layer 801 .

[0118] In this way, relative to the gate terminal 804 and the drain terminal 803 arranged in the Y-axis direction of the non-active area 704, the first resistor terminal 805 and the second resistor terminal 806 are arranged on the X-axis direction side of the non-active area 704, so that the resistance value change of the resistor 601 can be detected with good responsiveness without hindering the input signal from the gate terminal 804 and the output signal from the drain terminal 803 during high-frequency operation.

[0119] In addition, the electrical connection between the first resistor terminal 805 and the second resistor terminal 806 and the second wiring layer 901 is achieved by covering the second wiring layer connection opening 801d provided in the insulating layer between the first resistor terminal 805 and the second resistor terminal 806 and the second wiring layer 901 in the non-active area 704 by the first wiring layer 801 (for example, the first resistor terminal 805 and the second resistor terminal 806) and reaching the second wiring layer 901 connected from both ends of the resistor body 601.

[0120] As described above, in the high-frequency amplifying semiconductor device 100, no other elements (e.g., electronic components) are connected between the resistor 601 and the first and second resistor terminals 805, 806. The resistor 601 is connected to the first and second resistor terminals 805, 806 without any other electronic components interposed therebetween. The end of the resistor 601 on the positive side of the Y axis is directly connected to the first resistor terminal 805 via one second wiring layer 901 (wiring), while the end of the resistor 601 on the negative side of the Y axis is directly connected to the second resistor terminal 806 via the other second wiring layer 901 (wiring).

[0121] [1-2. Effects of High-Frequency Amplification Semiconductor Device]

[0122] According to the high-frequency amplifier semiconductor device 100 of the present embodiment described above, a resistor 601 serving as a temperature sensor is disposed within the active region 701 of a heat-generating transistor (e.g., a high-frequency amplifier transistor). This allows for highly responsive detection of temperature changes in the transistor during operation, following the temperature distribution within the active region 701. For example, according to the high-frequency amplifier semiconductor device 100, temperature changes caused by heat generated during transistor operation near the end of the gate electrode 401 closest to the resistor 601 on the drain electrode 302 side can be detected with high responsiveness as changes in the resistance value of the resistor 601. Furthermore, by positioning the resistor 601 above the second nitride semiconductor layer 104 and outputting the signal from the first resistor terminal 805 and the second resistor terminal 806, the transistor temperature can be detected with high responsiveness without affecting the operation of the transistor itself. High responsiveness means that temperature changes within the active region are immediately reflected in the temperature detected by the temperature sensor.

[0123] In addition, Patent Document 1 discloses that the temperature sensor is located in the inactive area, but not in the active area that serves as the heat source. Therefore, the technology of Patent Document 1 is difficult to achieve temperature detection with good responsiveness. In particular, when transistors (devices) are arranged at equal intervals in the active area, the temperature distribution in the active area is such that heat is easily concentrated in the center of the active area. Therefore, it is difficult for a temperature sensor arranged in the inactive area as in Patent Document 1 to follow the temperature distribution in the active area. In addition, the so-called following refers to the situation where the temperature detected by the temperature sensor becomes a temperature close to the actual temperature in the current active area.

[0124] On the other hand, in this embodiment, since the resistor 601 is provided within the active region 701 in plan view, it is easy to detect temperature changes near the center of the active region 701, where heat is likely to concentrate. Therefore, the temperature detected by the resistor 601 can track the temperature within the active region 701.

[0125] As described above, the high-frequency amplification semiconductor device 100 of this embodiment includes: a substrate 101; a first nitride semiconductor layer 103 provided on the substrate 101; a second nitride semiconductor layer 104 provided on the first nitride semiconductor layer 103 and having a larger band gap than the first nitride semiconductor layer 103; a two-dimensional electron gas layer 105 provided on the first nitride semiconductor layer 103 side of the interface between the first nitride semiconductor layer 103 and the second nitride semiconductor layer 104; a source electrode 301 and a drain electrode 302 provided above the second nitride semiconductor layer 104 at a distance and electrically connected to the two-dimensional electron gas layer 105; and a gate electrode 401 provided at a distance from the source electrode 301 and the drain electrode 302 and in contact with the second nitride semiconductor layer 104. In a planar view of the substrate 101, the substrate 101 is divided into an active region 701 in which the two-dimensional electron gas layer 105 exists, and an inactive region 704 in which the two-dimensional electron gas layer 105 does not exist. Furthermore, the high-frequency amplification semiconductor device 100 includes a high-frequency amplification transistor including a source electrode 301, a drain electrode 302, and a gate electrode 401 in the active region 701, and a resistor 601 provided above the second nitride semiconductor layer 104. The inactive region 704 includes a first terminal pad (e.g., drain terminal 803 or gate terminal 804) connected to the drain electrode 302 or the gate electrode 401, and second terminal pads (e.g., first resistor terminal 805 and second resistor terminal 806) connected to the resistor 601.

[0126] Thus, the high-frequency amplifying semiconductor device 100 includes the resistor 601 serving as a temperature sensor in the active region 701 where the high-frequency amplifying transistor generating heat is formed. This allows for more responsive detection of temperature changes in the high-frequency amplifying transistor than would be possible if the resistor 601 were located in the inactive region 704 where the high-frequency amplifying transistor is not formed. Consequently, the high-frequency amplifying semiconductor device 100 can detect the temperature of the transistor with greater responsiveness.

[0127] Note that the phrase "the first terminal pad is connected to the drain electrode 302 or the gate electrode 401" means that the first terminal pad is electrically connected to the drain electrode 302 or the gate electrode 401 via respective wirings.

[0128] For example, in plan view, the longitudinal direction of the resistor 601 is the first direction, which is the extending direction (Y-axis direction) of the gate electrode 401. That is, the longitudinal direction of the resistor 601 is parallel to the first direction.

[0129] In this way, the temperature of a specific gate electrode 401 can be detected.

[0130] In addition, for example, in planar observation, the first terminal pad is arranged in the inactive region 704 parallel to the active region 701 in the extension direction of the gate electrode 401, and the second terminal pad is arranged in the inactive region 704 parallel to the active region 701 in a direction orthogonal to the extension direction.

[0131] Thus, temperature detection by the resistor 601 can be achieved within the chip without interfering with the input signal from the gate terminal 804 and the output signal from the drain terminal 803. Furthermore, the connection wires to the first terminal pad and the connection wires to the second terminal pad can be arranged separately from the outside of the chip, thereby reducing the density of the wires and suppressing signal interference from outside the chip.

[0132] (Variation 1 of Implementation Example 1)

[0133] In this modification, referring to Figure 3A and Figure 3B Another example of connection between both ends of the resistor 601 and external connection terminals (eg, the first resistor terminal 805 , the second resistor terminal 806 , the back surface electrode, and the source pad) in the high-frequency amplification semiconductor device 100 of the first embodiment will be described. Figure 3A and Figure 3B 1 is a plan view showing various examples of the structure of a high-frequency amplifying semiconductor device according to a first modification of the first embodiment. Figure 3A The structure of the high-frequency amplifying semiconductor device 100A1 is shown. Figure 3B The structure of a high-frequency amplification semiconductor device 100A2 is shown.

[0134] like Figure 3A and Figure 3B As shown in FIG, one end of the resistor 601 can also be set as the source potential inside the chip. Specifically, it can also be Figure 3A The connection shown in FIG. 1 may be made via the second wiring layer connection opening 801d corresponding to the first wiring layer 801 set to the source potential. Figure 3B As shown, the connection is made via the resistor-source field plate electrode connection opening 601a corresponding to the source field plate electrode 501 set to the source potential. In either case, the other end of the resistor 601 is connected to the first resistor terminal 805, eliminating the need for the second resistor terminal 806. This reduces the number of pads in high-frequency amplifier semiconductor devices 100A1 and 100A2. Temperature detection using the resistor 601 from outside the high-frequency amplifier semiconductor device 100 can be achieved by simply measuring the electrical characteristics between the first resistor terminal 805 and the external source terminal (back electrode, source pad).

[0135] (Variation 2 of Implementation 1)

[0136] In this modification, referring to Figures 4A to 4J The arrangement position of the resistor 601 in the high-frequency amplification semiconductor device 100 of the first embodiment will be described. Figure 4A The range in which the resistor 601 can be arranged will be described. Figure 4A 1 is a cross-sectional view showing a range where the resistor 601 can be arranged in the high-frequency amplification semiconductor device 100 according to the second modification of the first embodiment. Figures 4A to 4J In, omitted Figure 2A The fourth insulating layer 204, the first wiring layer 801, the source-drain electrode connection opening 801a, etc. shown in FIG.

[0137] Figure 4A The dotted line area R shown in FIG. 1 represents the range in which the resistor 601 can be arranged. Figure 4A The maximum range in which the resistor 601 can be arranged is shown in FIG. The end of the resistor 601 on the source electrode 301 side is arranged closer to the drain electrode 302 side than the end of the source electrode 301 on the drain electrode 302 side (for example, closer to the drain electrode 302 side than the imaginary line 602b). Furthermore, the resistor 601 is arranged closer to the gate electrode 401 side (negative side of the X-axis) than the imaginary line 602a, which is a straight line passing through the end of the gate electrode 401 on the drain electrode 302 side (point P1) and the end of the source field plate electrode 501 on the drain electrode 302 side (point P2). For example, the end of the resistor 601 on the drain electrode 302 side is arranged closer to the source electrode 301 side (negative side of the X-axis) than the intersection P3 on the upper portion of the second insulating layer 202 (for example, an imaginary line passing through the intersection P3 and parallel to the Z-axis). The imaginary line 602a is an example of an imaginary straight line.

[0138] By arranging the resistor 601 within the dotted line region R, temperature changes due to heat generated during transistor operation, occurring near the end of the gate electrode 401 closest to the resistor 601 on the drain electrode 302 side, can be selectively detected with good responsiveness.

[0139] Furthermore, imaginary line 602a is also an extension of a line segment connecting the end of gate electrode 401 on the drain electrode 302 side and the end of source field plate electrode 501 on the drain electrode 302 side. Furthermore, imaginary line 602b is a straight line passing through the end of source electrode 301 on the drain electrode 302 side and parallel to the Z axis.

[0140] Below, refer to Figures 4B to 4J right Figure 4A An example of arrangement of the resistor 601 within the dotted line region R shown will be described. Figures 4B to 4Jare cross-sectional views showing various examples of the structure of a high-frequency amplifying semiconductor device according to a second modification of the first embodiment. Figure 4B The structure of the high-frequency amplification semiconductor device 100B1 is shown in FIG. Figure 4C The structure of the high-frequency amplification semiconductor device 100B2 is shown in FIG. Figure 4D The structure of the high-frequency amplification semiconductor device 100B3 is shown in FIG. Figure 4E The structure of the high-frequency amplification semiconductor device 100B4 is shown in FIG. Figure 4F The structure of the high-frequency amplification semiconductor device 100B5 is shown in FIG. Figure 4G The structure of the high frequency amplification semiconductor device 100B6 is shown in FIG. Figure 4H The structure of the high-frequency amplification semiconductor device 100B7 is shown in FIG. Figure 4I The structure of the high-frequency amplification semiconductor device 100B8 is shown in FIG. Figure 4J The structure of a high-frequency amplification semiconductor device 100B9 is shown in FIG.

[0141] like Figure 4B and Figure 4C As shown, the resistor 601 may not be arranged on the gate electrode 401 and the source field plate electrode 501 .

[0142] In addition, for example, Figure 4B As shown, the end of the resistor 601 on the drain electrode 302 side is closer to the source electrode 301 than the imaginary line 602a, and the end on the source electrode 301 side is located closer to the drain electrode 302 side than the end of the source field plate electrode 501 on the drain electrode 302 side. For example, in plan view, the resistor 601 may be located between the drain electrode 302 and the source field plate electrode 501 and provided at a position that does not overlap with either the drain electrode 302 or the source field plate electrode 501.

[0143] In addition, for example, Figure 4C As shown, the end of the resistor 601 on the drain electrode 302 side is closer to the source electrode 301 side (the negative side of the X-axis) than the end of the gate electrode 401 on the source electrode 301 side, and the end on the source electrode 301 side is located on the drain electrode 302 side (the positive side of the X-axis) of the source electrode 301. For example, the resistor 601 may be provided between the source electrode 301 and the gate electrode 401 in a position that does not overlap with either the source electrode 301 or the gate electrode 401 when viewed in plan.

[0144] exist Figure 4B and Figure 4C In the example, the lower surface of the resistor 601 (the surface on the negative side of the Z axis) is lower than the upper surface of the gate electrode 401 (the surface on the positive side of the Z axis).

[0145] In addition, you can also Figure 4D As shown, the end of the resistor 601 on the drain electrode 302 side is closer to the source electrode 301 than the imaginary line 602a, and the end on the source electrode 301 side is located closer to the drain electrode 302 side than the end of the source field plate electrode 501 on the source electrode 301 side (for example, closer to the drain electrode 302 side than the imaginary line 602d). For example, the resistor 601 may be provided so as to cover the source field plate electrode 501, at least a portion of the source field plate electrode 501, and a portion of the region between the drain electrode 302 when viewed in plan. Furthermore, the imaginary line 602d is a straight line that passes through the end of the source field plate electrode 501 on the source electrode 301 side and is parallel to the Z-axis.

[0146] In addition, you can also Figure 4E As shown, the end of the resistor 601 on the drain electrode 302 side is closer to the source electrode 301 side than the imaginary line 602a, and the end on the source electrode 301 side is located closer to the drain electrode 302 side than the end of the gate electrode 401 on the source electrode 301 side (for example, closer to the drain electrode 302 side than the imaginary line 602e). For example, in plan view, the resistor 601 may be provided so as to cover at least a portion of the gate electrode 401, the source field plate electrode 501, and a portion of the region between the source field plate electrode 501 and the drain electrode 302. Furthermore, the imaginary line 602e is a straight line passing through the end of the gate electrode 401 on the source electrode 301 side and parallel to the Z-axis. Alternatively, the resistor 601 may have a cross-sectional shape that follows the cross-sectional shape of the source field plate electrode 501. For example, the resistor 601 may have a stepped shape.

[0147] In addition, you can also Figure 4F As shown, the end of the resistor 601 on the drain electrode 302 side is closer to the source electrode 301 side (negative side of the X-axis) than the end of the source field plate electrode 501 on the drain electrode 302 side, and the end of the source electrode 301 side is arranged on the drain electrode 302 side of the source electrode 301 (positive side of the X-axis).

[0148] In addition, you can also Figure 4G As shown, the end of the resistor 601 on the drain electrode 302 side is closer to the source electrode 301 side than the end of the source field plate electrode 501 on the source electrode 301 side (for example, closer to the source electrode 301 side than the imaginary line 602d), and the end on the source electrode 301 side is located on the drain electrode 302 side of the source electrode 301. Alternatively, for example, the end of the resistor 601 on the drain electrode 302 side may be closer to the source electrode 301 side (the negative side of the X-axis) than the end of the gate electrode 401 on the drain electrode 302 side. Furthermore, the resistor 601 may have a cross-sectional shape that follows the arrangement and cross-sectional shape of the source field plate electrode 501 and the gate electrode 401. For example, the resistor 601 may have a stepped shape.

[0149] In addition, when at least a portion of the resistor 601 is disposed between the end portion of the source electrode 301 on the drain electrode 302 side and the end portion of the gate electrode 401 on the source electrode 301 side, the resistor 601 may be disposed between the source electrode 302 and the drain electrode 302 side. Figures 4H to 4J As shown in FIG. 2 , a recessed portion 202a is provided in the second insulating layer 202, and a resistor 601 is arranged on the recessed portion 202a. The recessed portion 202a is a depression (through hole) formed in a portion of the region between the source electrode 301 and the gate electrode 401 in the second insulating layer 202 when viewed from above. For example, Figures 4H to 4J As shown, the resistor 601 is provided so that a portion thereof is in contact with the first insulating layer 201 .

[0150] Furthermore, by changing the depth of the recessed portion 202a from the second insulating layer 202, the resistor 601 can be located in the middle of the second insulating layer 202 or in the middle of the first insulating layer 201. In other words, the recessed portion 202a can be a depression that does not penetrate the second insulating layer 202 or a depression that reaches a portion of the first insulating layer 201. Figure 4H In the case of the arrangement shown, the resistor 601 may be formed using the source field plate electrode 501. That is, the resistor 601 may be formed simultaneously with the source field plate electrode 501.

[0151] Thus, the entire resistor 601 is arranged on the gate electrode 401 side (the negative side of the X-axis) relative to the imaginary line 602a when viewed from the plane of the substrate 101. The imaginary line 602a is a straight line extending from the end portion on the drain electrode 302 side of the gate electrode 401 through the lowest point (point P1) of the end portion on the drain electrode 302 side of the gate electrode 401 and the lowest point (point P2) of the end portion on the drain electrode 302 side of the source field plate electrode 501. The entire resistor 601 here refers to the entire portion of the resistor 601 that overlaps with the active region 701 when viewed from the plane. Furthermore, the portion closer to the gate electrode 401 side than the imaginary line 602a refers to the portion of the resistor 601 that overlaps with the active region 701 when viewed from the plane. Figures 4B to 4J The entire cross-sectional portion (hatched portion) of the resistor 601 shown is closer to the gate electrode 401 than the virtual line 602 a .

[0152] As described above, the high-frequency amplification semiconductor devices 100B1 to 100B9 of this modified example further include a source field plate electrode 501 having the same potential as the source electrode 301 above the second nitride semiconductor layer 104 and having an end portion on the drain electrode 302 side between the gate electrode 401 and the drain electrode 302. Furthermore, the entire resistor 601 is arranged at a lower point (e.g., a point on the drain electrode 302 side) than the end portion passing through the gate electrode 401 in plan view. Figure 4B point P1 shown in FIG. 1 ) and the lowest point of the end portion of the source field plate electrode 501 on the drain electrode 302 side (eg Figure 4B The imaginary straight line (for example, imaginary line 602a) of point P2 shown in the figure is closer to the gate electrode 401, and the end of the resistor 601 on the source electrode 301 side is arranged closer to the drain electrode 302 side than the end of the source electrode 301 on the drain electrode 302 side.

[0153] This allows selective and responsive detection of temperature changes caused by heat generated during transistor operation, occurring near the drain electrode 302 side end of the gate electrode 401 closest to the resistor 601. Furthermore, the effect of the resistor 601 on the electric field generated on the drain electrode 302 side can be reduced.

[0154] Furthermore, for example, in a second direction perpendicular to the first direction in planar view, the end portion of the resistor 601 on the drain electrode 302 side is arranged closer to the source electrode 301 than the end portion of the source field plate electrode 501 on the drain electrode 302 side. Furthermore, for example, in a second direction perpendicular to the first direction in planar view, the end portion of the resistor 601 on the source electrode 301 side is arranged closer to the drain electrode 302 side than the end portion of the source field plate electrode 501 on the source electrode 301 side.

[0155] This can suppress an increase in parasitic capacitance caused by the resistor 601 .

[0156] (Variation 3 of Implementation 1)

[0157] In this modification, referring to Figure 5 An example in which a plurality of resistors 601 are provided will be described. Figure 5 This is a plan view showing the structure of a high-frequency amplification semiconductor device 100C1 according to a third modification of the first embodiment.

[0158] like Figure 5 As shown in FIG, in a planar view, a plurality of resistors may exist in the active region 701. Figure 5 In the example shown, two resistors, a first resistor 603 and a second resistor 604, are provided. However, three or more resistors may be provided. Furthermore, for example, the first resistor 603 and the second resistor 604 are provided so as to sandwich the source electrode 301 when viewed in plan, but this is not limiting. Furthermore, the first resistor 603 and the second resistor 604 are formed, for example, from the same material. Furthermore, the first resistor 603 and the second resistor 604 have, for example, the same size and shape when viewed in plan.

[0159] The first resistor 603 and the second resistor 604 are provided in parallel and are each connected to the second wiring layer 901. By arranging multiple resistors in parallel, even if one resistor is disconnected, the temperature change can be detected as a change in resistance value by the other resistor.

[0160] Furthermore, the first resistor 603 and the second resistor 604 are each positioned within a range of L1 / 8 in the X-axis direction from the center of the active region 701 in the X-axis direction, as viewed in plan. This range is the range between a position L1 / 8 on the positive X-axis side and a position L1 / 8 on the negative X-axis side from the center of the active region 701 in the X-axis direction (single-dotted dashed line Cx) (e.g., a rectangular range elongated in the Y-axis direction). Furthermore, the first resistor 603 and the second resistor 604 are each positioned within the active region 701 in the Y-axis direction, with a length less than L2 / 2 in the Y-axis direction, as viewed in plan. Furthermore, more preferably, the first resistor 603 and the second resistor 604 are each positioned within a range of L2 / 4 in the Y-axis direction from the center of the active region 701 in the Y-axis direction, as viewed in plan. Thus, the first resistor 603 and the second resistor 604 can selectively detect temperature changes near the center of the active region 701, where heat generation is most concentrated when the devices are arranged at equal intervals, as changes in resistance. Furthermore, the length of at least one of the first resistor 603 and the second resistor 604 in the Y-axis direction within the active region 701 only needs to be less than L2 / 2 when viewed in plan.

[0161] Alternatively, the first resistor 603 and the second resistor 604 may be arranged so as to overlap the center of the active region 701 on the source field plate electrode 501 in the Y-axis direction when viewed in plan. Alternatively, the first resistor 603 and the second resistor 604 may be arranged on the source field plate electrode 501 so as to overlap with (e.g., straddle) the dotted line Cy when viewed in plan. The same applies to the resistor 601 of Embodiment 1. Alternatively, the resistor 601 may be arranged on the source field plate electrode 501 so as to overlap with (e.g., straddle) the dotted line Cy.

[0162] The dashed-dotted line Cx indicates the center in the X-axis direction and is a straight line that is a distance L1 / 2 from the end of the active region 701 in the X-axis direction (the distances from both ends of the active region 701 in the X-axis direction are equal).

[0163] Furthermore, the first resistor 603 and the second resistor 604 are connected to a first resistor terminal 805 and a second resistor terminal 806 which are common second terminal pads.

[0164] As described above, the high-frequency amplification semiconductor device 100C1 of this modification includes a plurality of resistors (for example, the first resistor 603 and the second resistor 604 ).

[0165] Thus, even if one resistor is disconnected, the temperature change can be detected as a change in resistance value through the other resistors, thereby improving the reliability of the high-frequency amplification semiconductor device 100C1.

[0166] In addition, for example, if the length of the high-frequency amplification semiconductor device 100C1 in the second direction (for example, the X-axis direction) perpendicular to the first direction (for example, the Y-axis direction) when viewed in a planar manner is set to L1, then in the second direction, the resistor body is arranged within a range of L1 / 8 from the center of the active region 701.

[0167] Thus, the resistor can detect temperature changes near the center of the active region 701 (a portion where heat is generated more) where heat is most likely to be concentrated when the devices are arranged at equal intervals as changes in resistance value.

[0168] Furthermore, for example, if the length of the active region 701 in the first direction when viewed in plan (i.e., the length of the active region 701 in the first direction) is L2, the length of the resistor in the first direction is less than L2 / 2. Furthermore, for example, the resistor is positioned within a range of L2 / 4 from the center of the active region 701 in the first direction when viewed in plan.

[0169] Thus, the resistor can detect a temperature change near the center of the gate electrode 401 in the Y-axis direction, where heat is most likely to be concentrated, as a resistance value change.

[0170] (Variation 4 of Implementation 1)

[0171] In this modification, referring to Figures 6A to 6C Another arrangement example of a plurality of resistors will be described. Figures 6A to 6C 1 is a plan view showing various examples of the structure of a high-frequency amplifying semiconductor device according to a fourth variation of the first embodiment. Figure 6A The structure of the high-frequency amplification semiconductor device 100C2 is shown in FIG. Figure 6B The structure of the high-frequency amplification semiconductor device 100C3 is shown in FIG. Figure 6C The structure of a high-frequency amplification semiconductor device 100C4 is shown in FIG.

[0172] like Figure 6A 、 Figure 6B and Figure 6CAs shown, the first resistor 603 and the second resistor 604 are connected to different terminal pads. Specifically, the two ends of the first resistor 603 are connected to the first resistor terminal 805 and the second resistor terminal 806, and the two ends of the second resistor 604 are connected to the third resistor terminal 807 and the fourth resistor terminal 808. This allows temperature changes at any two locations within the active area 701 to be detected as changes in their respective resistance values. The third resistor terminal 807 and the fourth resistor terminal 808 are examples of second terminal pads.

[0173] like Figures 6A to 6C As shown, the first resistor 603 is arranged within a range of a length L1 / 8 in the X-axis direction from the center (single-dotted dashed line Cx) of the active region 701, and within a range of a length L2 / 4 in the Y-axis direction from the center (single-dotted dashed line Cy) of the active region 701. Thus, the high-frequency amplification semiconductor devices 100C2 to 100C4 can selectively detect temperature changes in the heat-concentrating portion near the center of the active region 701 as changes in resistance value.

[0174] In addition, if Figure 6A As shown, the second resistor 604 can be positioned further away from the X-axis center of the active region 701 than the first resistor 603 in the X-axis direction. The second resistor 604 can be positioned within the active region 701, outside the X-axis center by more than L1 / 8 in the X-axis direction, and within the Y-axis center by less than L2 / 4 in the Y-axis direction. Consequently, the high-frequency amplification semiconductor devices 100C2 to 100C4 can selectively detect temperature changes in the active region 701, where heat generation is most likely to concentrate near the ends of the active region 701 when the devices are arranged at equal intervals, as changes in resistance value.

[0175] like Figure 6B As shown, the second resistor 604 can be arranged within a range within the active region 701 that is within a length L1 / 8 from the center of the active region 701 in the X-axis direction and outside a length L2 / 4 from the center of the active region 701 in the Y-axis direction. Consequently, the high-frequency amplification semiconductor devices 100C2 to 100C4 can selectively detect temperature changes in the active region 701, where heat generation is least concentrated near the center of the active region 701 when the devices are arranged at equal intervals, as changes in resistance value.

[0176] like Figure 6CAs shown, the second resistor 604 can be arranged within the active region 701, extending more than a length L1 / 8 in the X-axis direction from the center of the active region 701, and also extending more than a length L2 / 4 in the Y-axis direction from the center of the active region 701. Thus, the high-frequency amplification semiconductor devices 100C2-C4 can selectively detect, as resistance changes, temperature changes in the portion of the active region 701 where heat generation is least concentrated when the devices are arranged at equal intervals.

[0177] As described above, the high-frequency amplifying semiconductor device 100C2 of this modified example includes a resistor body including a first resistor body 603 and a second resistor body 604. In the second direction when viewed in a planar manner, the first resistor body 603 is arranged within a range of L1 / 8 from the center of the active region 701, and the second resistor body 604 is arranged outside the center of the active region 701 beyond L1 / 8.

[0178] This allows detection of temperature changes in the active region 701 as resistance changes at locations with high and low heat generation in the second direction. This allows detection of temperature differences in the active region 701.

[0179] In addition, for example, the resistor body includes a first resistor body 603 and a second resistor body 604, and in the first direction when observed in a plane, the first resistor body 603 is arranged in a range within L2 / 4 from the center of the active area 701, and the second resistor body 604 is arranged in a range further outward than L2 / 4 from the center of the active area 701.

[0180] Thus, the temperature changes of the portion with high heat generation and the portion with low heat generation in the first direction in the active region 701 can be converted into resistance value changes.

[0181] (Variation 5 of Implementation 1)

[0182] In this modification, referring to Figures 7A to 7C An example in which the length of the resistor is different from that in the first embodiment and the like will be described. Figures 7A to 7C These are plan views showing various examples of the structure of a high-frequency amplification semiconductor device according to a fifth modification of the first embodiment. Figure 7A The high frequency amplifying semiconductor device 100D1 shown has a Figure 1 The high-frequency amplification semiconductor device 100 shown in FIG. 1 has a structure in which the length of the resistor 601 is increased. Figure 7B The high frequency amplifying semiconductor device 100D2 shown has a Figure 5The high-frequency amplification semiconductor device 100C1 shown in FIG. 1 has a structure in which the lengths of the first resistor 603 and the second resistor 604 are increased. Figure 7C The high frequency amplifying semiconductor device 100D3 shown has a Figure 6A The high-frequency amplification semiconductor device 100C2 shown has a structure in which the lengths of the first resistor 603 and the second resistor 604 are increased.

[0183] like Figure 7A As shown in FIG. 1 , the resistor 601 may be arranged in the active region 701 with a length L2 / 2 or greater in the Y-axis direction. Figure 7B and Figure 7C As shown, the first resistor 603 and the second resistor 604 may be arranged in the active region 701 with a length L2 / 2 or greater in the Y-axis direction. This allows the average temperature change of the total heat generation to be detected as a change in resistance value. Furthermore, the resistor 601, the first resistor 603, and the second resistor 604 may be arranged with a length L2 or less in the Y-axis direction of the active region 701.

[0184] As described above, for the resistor body of the high-frequency amplification semiconductor devices 100D1 to 100D3 of this variant, if the length of the active region 701 in the first direction (i.e., the length of the active region 701 in the first direction) in planar observation is L2, then the length in the first direction is greater than L2 / 2.

[0185] Thus, the length of the resistor in the first direction is longer than L2 / 2, so that the average temperature change of the entire gate electrode 401 can be detected as a resistance value change.

[0186] (Variation 6 of Implementation 1)

[0187] In this modification, referring to Figures 8A to 8C A structure without the second wiring layer 901 will be described. Figures 8A to 8C 1 and 2 are plan views showing various examples of the structure of a high-frequency amplifying semiconductor device according to a sixth variation of the first embodiment. Figure 8A The structure of the high-frequency amplification semiconductor device 100E1 is shown in FIG. Figure 8B The structure of the high-frequency amplification semiconductor device 100E2 is shown in FIG. Figure 8C The structure of the high-frequency amplification semiconductor device 100E3 is shown in FIG.

[0188] like Figure 8A and Figure 8BAs shown, the resistor 601 is arranged from the center of the active region 701 in the Y-axis direction to a range outside the length L2 / 2 in the Y-axis direction, that is, outside the active region 701. The resistor 601 is provided across the active region 701 and the inactive region 704. For example, the resistor 601 is provided in a range from the inactive region 704 on the negative side of the Y-axis of the active region 701 to the inactive region 704 on the positive side of the Y-axis of the active region 701.

[0189] Furthermore, the resistor 601 extends to the first resistor terminal 805 and the second resistor terminal 806, and is directly connected to the first resistor terminal 805 and the second resistor terminal 806 without passing through the second wiring layer 901. The first resistor terminal 805 and the second resistor terminal 806 cover the resistor connection opening 801e that connects the resistor 601 from both ends to the first wiring layer 801, thereby enabling the present disclosure to be implemented even without the second wiring layer 901. The resistor connection opening 801e is an opening for directly connecting the resistor 601 to the first resistor terminal 805 and the second resistor terminal 806. The resistor connection opening 801e is an opening that penetrates the third insulating layer 203 and the fourth insulating layer 204.

[0190] Such a resistor 601 has a first portion extending in the Y-axis direction for temperature detection and a second portion extending from both ends of the first portion in the X-axis direction and functioning as a wiring. The second portion is formed in the inactive region 704 in plan view. Figure 8A and Figure 8B In the example of FIG, the resistor 601 has a U-shaped shape rotated 90 degrees counterclockwise and having an angle (a shape formed by three straight lines) when viewed in plan.

[0191] In addition, if Figure 8C As shown, the first resistor 603 and the second resistor 604 are arranged from the center of the active region 701 in the Y-axis direction to a range outside the length L2 / 4 in the Y-axis direction, for example, outside the active region 701. The first resistor 603 and the second resistor 604 are arranged astride the active region 701 and the inactive region 704. For example, the first resistor 603 and the second resistor 604 are arranged in a range from the inactive region 704 on the negative side of the Y-axis of the active region 701 to the inactive region 704 on the positive side of the Y-axis of the active region 701.

[0192] The first resistor 603 and the second resistor 604 have a first portion extending in the Y-axis direction for temperature detection and a second portion extending from both ends of the first portion in the X-axis direction and functioning as wiring. The second portion is formed in the inactive region 704 in plan view.

[0193] As described above, the resistor 601 included in the high-frequency amplification semiconductor devices 100E1 to 100E3 of this modification has a length in the first direction (eg, the Y-axis direction) of not less than L2 and is disposed extending to the inactive region 704 .

[0194] Thus, when connecting the resistor 601 to a wiring layer (e.g., the second wiring layer 901), no complex connection is formed on the active region 701. This facilitates wiring overlap, that is, connection between the resistor 601 and the wiring layer. Furthermore, the resistor 601 can be electrically connected to the first resistor terminal 805 and the second resistor terminal 806 without further providing the second wiring layer 901. This simplifies the structure of the high-frequency amplifying semiconductor devices 100E1 to 100E3.

[0195] (Implementation Method 2)

[0196] [2-1. Structure of a High-Frequency Amplification Semiconductor Device]

[0197] Next, refer to Figure 9 A high-frequency amplification semiconductor device according to a second embodiment will be described. Figure 9 This is a plan view showing the structure of a high-frequency amplification semiconductor device 200 according to Embodiment 2. In this embodiment, components common to or similar to those in Embodiment 1 are denoted by the same reference numerals as in Embodiment 1, and detailed descriptions thereof are omitted.

[0198] like Figure 9 As shown in FIG. 1 , the resistor 601 of the high-frequency amplification semiconductor device 200 extends parallel to the X-axis direction. The resistor 601 has a rectangular shape that is longer in the X-axis direction, that is, in the direction in which the plurality of gate electrodes 401 are arranged. Therefore, the resistor 601 is provided across the plurality of gate electrodes 401, so that the temperature change of the plurality of gate electrodes 401 can be detected as a change in resistance value. In this embodiment, when viewed in plan, the long side direction of the gate electrode 401 intersects the long side direction of the resistor 601. Figure 9 In the example of , the source-drain electrode connection opening 801 a is not provided in the portion overlapping with the resistor 601 in plan view.

[0199] For example, in a planar observation, the resistor 601 is arranged within a range of a length L1 / 4 in the X-axis direction from the center of the active area 701 in the X-axis direction (single-dotted line Cx), and within a range of a length L2 / 4 in the Y-axis direction from the center of the active area 701 in the Y-axis direction (single-dotted line Cy).

[0200] This allows detecting temperature changes in heat concentrated areas as resistance changes across multiple gate electrodes 401. The length of the resistor 601 in the X-axis direction is not limited to L1 / 4 and may be provided across at least two gate electrodes 401.

[0201] As described above, the long side direction of the resistor 601 included in the high-frequency amplification semiconductor device 200 of this embodiment is the second direction (eg, X-axis direction) orthogonal to the first direction (eg, Y-axis direction) in which the gate electrode 401 extends, in plan view.

[0202] Thus, since the resistor 601 is provided across the plurality of gate electrodes 401 , temperature changes in the plurality of gate electrodes 401 can be detected as changes in resistance values.

[0203] In addition, for example, in plane observation, if the length of the active area 701 in the first direction (i.e., the length of the active area 701 in the first direction) is set to L2, then in the first direction in plane observation, the resistor 601 is configured within a range of L2 / 4 from the center of the active area 701.

[0204] Thus, temperature changes of the plurality of gate electrodes 401 near the center of the active region 701 where heat is likely to concentrate (a portion where heat is generated relatively heavily) can be detected as changes in resistance value.

[0205] (Variation of Embodiment 2)

[0206] In this modification, referring to Figure 10A and Figure 10B A high-frequency amplifying semiconductor device including a plurality of resistors arranged parallel to the X-axis direction will be described. Figure 10A and Figure 10B are plan views showing various examples of the structure of a high-frequency amplifying semiconductor device according to a modified example of the second embodiment. Figure 10A The structure of the high frequency amplification semiconductor device 200A is shown in FIG. Figure 10B The structure of the high-frequency amplification semiconductor device 200B is shown in . In this modification, the first resistor 603 and the second resistor 604 are each provided across two or more gate electrodes 401 .

[0207] like Figure 10A and Figure 10B As shown, there may be a plurality of resistors extending parallel to the X-axis direction. The two ends of the first resistor 603 are connected to the first resistor terminal 805 and the second resistor terminal 806, and the two ends of the second resistor 604 are connected to the third resistor terminal 807 and the fourth resistor terminal 808. In this way, temperature changes at two locations within the active region 701 can be detected by changes in their respective resistance values.

[0208] The first resistor 603 is arranged within a range of a length L1 / 4 in the X-axis direction from the center (single-dot chain line Cx) of the active region 701, and within a range of a length L2 / 4 in the Y-axis direction from the center (single-dot chain line Cy) of the active region 701. This allows temperature changes in heat-concentrated areas across multiple gate electrodes 401 to be detected as changes in resistance.

[0209] like Figure 10A As shown, the second resistor 604 can be arranged outside the X-axis direction by a length L1 / 4 from the X-axis center of the active region 701, and outside the Y-axis direction by a length L2 / 4 from the Y-axis center of the active region 701. This allows temperature changes in the portion of the active region 701 where heat generation is least concentrated to be detected as resistance changes across multiple gate electrodes 401.

[0210] In this case, the first resistor 603 and the second resistor 604 are arranged so as to straddle different gate electrodes 401, but each may be arranged so as to straddle at least one gate electrode 401. Furthermore, the length of the first resistor 603 in the X-axis direction may be different from the length of the second resistor 604 in the X-axis direction, but they may also be the same. For example, the length of the first resistor 603 in the X-axis direction, which is arranged closer to the center in the Y-axis direction, may be longer than the length of the second resistor 604 in the X-axis direction, which is arranged farther from the center in the Y-axis direction.

[0211] like Figure 10B As shown, the second resistor 604 can be positioned farther from the Y-axis center of the active region 701 than the first resistor 603. The second resistor 604 can be positioned within a length L1 / 4 from the X-axis center of the active region 701 and further outward from the Y-axis center of the active region 701 than the length L2 / 4. This allows temperature changes in the area near the center of the active region 701, where heat generation is least concentrated, to be detected as resistance changes across multiple gate electrodes.

[0212] In this case, the first resistor 603 and the second resistor 604 are provided across a plurality of common gate electrodes 401 , but each of them may be provided across at least one different gate electrode 401 .

[0213] As described above, the high-frequency amplification semiconductor devices 200A and 200B of this modified example include a first resistor 603 and a second resistor 604. In the first direction when viewed in a planar manner, the first resistor 603 is arranged within a range of L2 / 4 from the center of the active region 701, and the second resistor 604 is arranged outside the center of the active region 701 by more than L2 / 4.

[0214] Thus, temperature changes in each of the portion where heat is concentrated and the portion where heat is not concentrated in the active region 701 can be detected as changes in resistance values across the plurality of gate electrodes 401 .

[0215] (Manufacturing Method)

[0216] Next, refer to Figures 11 to 21B A method for manufacturing the high-frequency amplifying semiconductor device configured as described above will be described. Hereinafter, a method for manufacturing the high-frequency amplifying semiconductor device 100 according to the first embodiment will be described as an example. Figures 11 to 21B The cross-sectional views are used to illustrate the method for manufacturing the high-frequency amplifying semiconductor device 100 according to the first embodiment, and are cross-sectional views showing the structure of the high-frequency amplifying semiconductor device 100 during manufacturing. Figure 18A 、 Figure 19A 、 Figure 20A and Figure 21A is with Figure 1 The cross-sectional view corresponding to the IIa-IIa line, Figure 18B 、 Figure 19B 、 Figure 20B and Figure 21B is with Figure 1 The high-frequency amplifying semiconductor devices of each modification of the first embodiment, the second embodiment, and the modification of the second embodiment are manufactured in the same manner as in the first embodiment, and therefore their description is omitted.

[0217] like Figure 11 As shown, on a substrate 101 composed of Si, a buffer layer 102 having a thickness of 2 μm and a stacked structure of AlN and AlGaN, a first nitride semiconductor layer 103 having a thickness of 200 nm and composed of i-type GaN, and a second nitride semiconductor layer 104 having a thickness of 20 nm and composed of i-type AlGaN with an Al composition ratio of 25% are grown in this order in the +c-plane direction ( <0001> A two-dimensional electron gas layer 105 is formed on the first nitride semiconductor layer 103 side of the heterojunction interface between the first nitride semiconductor layer 103 and the second nitride semiconductor layer 104.

[0218] Then, if Figure 12 As shown, on the second nitride semiconductor layer 104, 20 nm of Ti and 200 nm of Al are sequentially deposited by vapor deposition in the openings of the photoresist 300 that define the source electrode 301 and drain electrode 302 regions, thereby forming the source electrode 301 and the drain electrode 302. Subsequently, after the photoresist 300 is removed with an organic solvent, an alloying treatment is performed by heat treatment using RTA (Rapid Thermal Annealing), thereby establishing ohmic contact between the source electrode 301 and the drain electrode 302 and the two-dimensional electron gas layer 105.

[0219] Then, if Figure 13 As shown, on the second nitride semiconductor layer 104 , 50 nm of Ni and 500 nm of Au are sequentially stacked by vapor deposition in the opening of the photoresist 400 where the gate electrode 401 region is opened, thereby forming the gate electrode 401 .

[0220] Next, after removing the photoresist 400 with an organic solvent, Figure 14 As shown, SiN is formed as the first insulating layer 201 with a thickness of 150 nm on the second nitride semiconductor layer 104 , the source electrode 301 , the drain electrode 302 , and the gate electrode 401 by a plasma CVD (Chemical Vapor Deposition) method.

[0221] Then, if Figure 15 As shown, 150 nm of Ni and 400 nm of Au are sequentially deposited by vapor deposition in the opening of the photoresist 500 in which the source field plate electrode 501 region is opened on the first insulating layer 201 , thereby forming the source field plate electrode 501 .

[0222] Next, after removing the photoresist 500 with an organic solvent, Figure 16 As shown, SiN is formed as the second insulating layer 202 to a thickness of 100 nm on the first insulating layer 201 and the source field plate electrode 501 by a plasma CVD method.

[0223] Then, if Figure 17 As shown, Al is deposited to a thickness of 200 nm by vapor deposition in the opening of the photoresist 600 in which the resistor 601 region is opened on the second insulating layer 202 , thereby forming the resistor 601 .

[0224] Next, after removing the photoresist 600 with an organic solvent, Figure 18A and Figure 18BAs shown, a 200 nm thick SiN layer is formed as a third insulating layer 203 on the second insulating layer 202 and the resistor 601 by plasma CVD. A photoresist 900a is formed thereon to form an opening 901a for connecting the resistor. The third insulating layer 203 in the opening of the photoresist 900a is then removed by dry etching. Figure 18A As shown, the third insulating layer 203 is not removed from the portion where the second wiring layer 901 is not formed.

[0225] Next, after the photoresist 900a is removed by ashing, Figure 19A and Figure 19B As shown, a photoresist 900 with an opening in the second wiring layer 901 area is formed on the third insulating layer 203 and the opening portion 901a for connecting the resistor body, 50nm of Ti and 50nm of Au are sequentially deposited in the opening portion of the photoresist 900 by vapor deposition, and then 2.0μm of Au is formed by plating. The photoresist 900 is removed with an organic solvent to form the second wiring layer 901.

[0226] Then, if Figure 20A and Figure 20B As shown, a 200 nm SiN layer is formed as the fourth insulating layer 204 on the third insulating layer 203 and the second wiring layer 901 by a plasma CVD method, and a photoresist 800a is formed in which an opening portion 801a for connecting the source and drain electrodes is opened. Then, the fourth insulating layer 204, the third insulating layer 203, the second insulating layer 202 and the first insulating layer 201 in the opening portion of the photoresist 800a are opened by dry etching.

[0227] Next, after the photoresist 800a is removed by ashing, as shown in FIG. Figure 21A and Figure 21B As shown, a photoresist 800 is formed on the fourth insulating layer 204 and the opening 801a for connecting the source and drain electrodes, with the first wiring layer 801 region opened. 50nm of Ti and 50nm of Au are deposited in the opening of the photoresist 800 by vapor deposition, and then 3.0μm of Au is deposited by plating to form the first wiring layer 801. In addition, openings are also formed in the photoresist 800 at positions corresponding to the first resistor terminal 805 and the second resistor terminal 806. Figure 21A and Figure 21B In addition to the first wiring layer 801 shown, a first resistance terminal 805 and a second resistance terminal 806 are formed.

[0228] Next, the photoresist 800 is removed by using an organic solvent to form Figure 1 、 Figure 2A and Figure 2B A high-frequency amplifying semiconductor device 100 according to the first embodiment is shown.

[0229] While the semiconductor device for high-frequency amplification according to one or more technical aspects of the present disclosure has been described above based on the embodiments, the present disclosure is not limited to these embodiments. Various modifications conceived by those skilled in the art to these embodiments, or configurations constructed by combining components from different embodiments, are also encompassed within the scope of one or more technical aspects of the present disclosure, provided they do not depart from the spirit of the present disclosure.

[0230] For example, the high-frequency amplifying semiconductor device of the above-described embodiment can be used as a carrier amplifier performing class AB or class B operation, or as a peak amplifier performing class C operation. For example, the high-frequency amplifying semiconductor device can also be used as a Doherty amplifier that combines a carrier amplifier and a peak amplifier.

[0231] Furthermore, the first terminal pad and the second terminal pad in the above-described embodiments and the like are provided at the uppermost portion of the high-frequency amplifying semiconductor device, and are exposed by forming an opening in an insulating layer (not shown) covering the uppermost wiring layer (e.g., the first wiring layer 801 and the second wiring layer 901). The opening has an opening size smaller than the shape of the uppermost wiring layer including the first terminal pad and the second terminal pad, when viewed in plan.

[0232] Furthermore, in the above-described embodiments and the like, an example is described in which the high-frequency amplifying semiconductor device is mounted in a so-called face-up mounting method, in which the first terminal pads and the second terminal pads are mounted on a mounting substrate or the like with their surfaces facing upward (opposite to the mounting substrate). However, the high-frequency amplifying semiconductor device may also be mounted in a so-called face-down mounting method, in which the first terminal pads and the second terminal pads are mounted on a mounting substrate or the like with their surfaces facing downward (toward the mounting substrate).

[0233] For example, in the case of face-up mounting, a source pad (not shown) is formed on the first wiring layer 801 of the source potential as the first terminal pad, and the source pad is connected to the GND pattern on the mounting substrate with a wire or the like to supply the source voltage, or the back metal is connected to the GND pattern of the mounting substrate to supply the source voltage.

[0234] For example, in the case of face-down mounting, a source pad may be formed as a first terminal pad on the first wiring layer 801 at source potential, and the source pad may be connected to a GND pattern on the mounting substrate using a solder bump or the like to supply a source voltage.

[0235] Industrial Applicability

[0236] The high-frequency amplification semiconductor device disclosed herein is excellent in detection responsiveness to temperature changes during operation and is therefore useful for communication amplifiers and the like that are combined with temperature detection technology.

[0237] Marking Description

[0238] 100, 100A1, 100A2, 100B1 to 100B9, 100C1 to 100C4, 100D1 to 100D3, 100E1 to 100E3, 200, 200A, 200B High-Frequency Amplification Semiconductor Devices (Power Amplification Semiconductor Devices)

[0239] 101 substrate

[0240] 102 buffer layer

[0241] 103 first nitride semiconductor layer

[0242] 104 second nitride semiconductor layer

[0243] 105 Two-dimensional electron gas layer

[0244] 201 1st insulation layer

[0245] 202 second insulation layer

[0246] 202a concave part

[0247] 203 third insulation layer

[0248] 204 4th insulation layer

[0249] 300, 400, 500, 600, 800, 800a, 900, 900a photoresist

[0250] 301 source electrode

[0251] 302 drain electrode

[0252] 401 gate electrode

[0253] 501 source field plate electrode (field plate)

[0254] 601 resistor

[0255] 601a Resistor - Source field plate electrode connection opening

[0256] 602a imaginary line (imaginary straight line)

[0257] 602b, 602d, 602e imaginary lines

[0258] 603 first resistor (first resistor)

[0259] 604 second resistor (second resistor)

[0260] 701 active area

[0261] 704 non-active area

[0262] 801 1st wiring layer

[0263] 801a Opening for connecting source and drain electrodes

[0264] 801b Source field plate electrode connection opening

[0265] 801c Gate electrode connection opening

[0266] 801d second wiring layer connection opening

[0267] 801e, 901a resistor connection openings

[0268] 802 source via

[0269] 803 drain terminal (first terminal pad)

[0270] 804 gate terminal (first terminal pad)

[0271] 805 first resistor terminal (second terminal pad)

[0272] 806 second resistor terminal (second terminal pad)

[0273] 807 third resistor terminal (second terminal pad)

[0274] 808 4th resistor terminal (2nd terminal pad)

[0275] 901 2nd wiring layer

[0276] Cx, Cy single-dot dash line

[0277] L1, L2 length

[0278] Points P1 and P2

[0279] P3 intersection

[0280] R dotted line area

Claims

1. A semiconductor device for power amplification, characterized in that: have: substrate; a first nitride semiconductor layer provided on the substrate; a second nitride semiconductor layer provided on the first nitride semiconductor layer and having a larger band gap than the first nitride semiconductor layer; a two-dimensional electron gas layer provided on the first nitride semiconductor layer side of an interface between the first nitride semiconductor layer and the second nitride semiconductor layer; a source electrode and a drain electrode, spaced apart from each other above the first nitride semiconductor layer and electrically connected to the two-dimensional electron gas layer; a gate electrode spaced apart from the source electrode and the drain electrode and in contact with the second nitride semiconductor layer; as well as a field plate having the same potential as the source electrode and having an end portion on the drain electrode side between the gate electrode and the drain electrode; In a planar view of the substrate, the substrate is divided into an active region where the two-dimensional electron gas layer exists and an inactive region where the two-dimensional electron gas layer does not exist; In the active area above, there are: A high electron mobility transistor comprising the source electrode, the drain electrode, and the gate electrode; and a temperature detection resistor disposed above the second nitride semiconductor layer; In the above-mentioned inactive area, there are: a first terminal pad connected to the drain electrode or the gate electrode; and The second terminal pad is connected to the resistor.

2. The semiconductor device for power amplification according to claim 1, wherein In the planar view, the longitudinal direction of the resistor is the first direction which is the extending direction of the gate electrode.

3. The semiconductor device for power amplification according to claim 2, wherein: The field plate is provided above the second nitride semiconductor layer; In a cross-sectional view of the substrate, the entire resistor is arranged closer to the gate electrode than an imaginary straight line passing through the lowest point of the end of the gate electrode on the drain electrode side and the lowest point of the end of the field plate on the drain electrode side; An end portion of the resistor on the source electrode side is arranged closer to the drain electrode than an end portion of the source electrode on the drain electrode side.

4. The semiconductor device for power amplification according to claim 2 or 3, wherein: In the second direction perpendicular to the first direction in the planar view, the end portion of the resistor on the drain electrode side is arranged closer to the source electrode than the end portion of the field plate on the drain electrode side.

5. The semiconductor device for power amplification according to claim 2 or 3, wherein: In a second direction perpendicular to the first direction in planar view, an end portion of the resistor on the source electrode side is arranged closer to the drain electrode than an end portion of the field plate on the source electrode side.

6. The semiconductor device for power amplification according to claim 2 or 3, wherein: In the above-mentioned planar view, when the length of the above-mentioned active region in the second direction perpendicular to the above-mentioned first direction is L1, In the second direction, the resistor is arranged within a range of L1 / 8 from the center of the active region.

7. The semiconductor device for power amplification according to claim 6, wherein: The resistor includes a first resistor and a second resistor; In the second direction when viewed in plan, the first resistor is arranged within L1 / 8 from the center of the active region, and the second resistor is arranged outside L1 / 8 from the center.

8. The semiconductor device for power amplification according to claim 2 or 3, wherein: In the above-mentioned planar view, when the length of the above-mentioned active region in the above-mentioned first direction is set as L2, The length of the resistor in the first direction is smaller than L2 / 2.

9. The semiconductor device for power amplification according to claim 8, wherein The resistor is arranged within a range of L2 / 4 from the center of the active region in the first direction when viewed in the planar direction.

10. The semiconductor device for power amplification according to claim 9, wherein The resistor includes a first resistor and a second resistor; In the first direction when viewed in the planar view, the first resistor is arranged within a range of L2 / 4 from the center of the active region, and the second resistor is arranged outside the center by more than L2 / 4.

11. The semiconductor device for power amplification according to claim 2 or 3, wherein: In the above-mentioned planar view, when the length of the above-mentioned active region in the above-mentioned first direction is set as L2, The length of the resistor in the first direction is greater than or equal to L2 / 2.

12. The semiconductor device for power amplification according to claim 11, wherein The length of the resistor in the first direction is greater than or equal to L2, and the resistor is arranged until it reaches the inactive region.

13. The semiconductor device for power amplification according to claim 1, wherein In the planar view, the longitudinal direction of the resistor is a second direction perpendicular to the first direction, which is an extending direction of the gate electrode.

14. The semiconductor device for power amplification according to claim 13, wherein In the above-mentioned planar view, when the length of the above-mentioned active region in the above-mentioned first direction is set as L2, The resistor is arranged within a range of L2 / 4 from the center of the active region in the first direction when viewed in the planar direction.

15. The semiconductor device for power amplification according to claim 14, wherein The resistor includes a first resistor and a second resistor; In the first direction when viewed in the planar view, the first resistor is arranged within a range of L2 / 4 from the center of the active region, and the second resistor is arranged outside the center by more than L2 / 4.

16. The semiconductor device for power amplification according to any one of claims 1 to 3 and 13 to 15, wherein: The resistor is provided in plurality.

17. The semiconductor device for power amplification according to any one of claims 1 to 3 and 13 to 15, wherein: In the above plane observation, The first terminal pad is arranged in the inactive region parallel to the active region in the extending direction of the gate electrode; The second terminal pad is arranged in the inactive region parallel to the active region in a direction perpendicular to the extending direction.

18. The semiconductor device for power amplification according to any one of claims 1 to 3 and 13 to 15, wherein: The potential of one end of the resistor is the same as that of the source electrode.

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