A method, device and equipment for detecting the overcurrent capacity of a power chip

Abstract

The present invention relates to the technical field of power chip detection, and particularly to a method for detecting the overcurrent capacity of a power chip. This method is applied to the detection module of the power chip, and the method includes: obtaining the driving mode of the power chip, where the driving mode includes a three-phase full-bridge mode and an H-bridge mode; under the driving mode, controlling the detection module to detect the overcurrent capacity of each phase of the three-phase electricity of the power chip; during the process of detecting the overcurrent capacity of each phase of the power chip, performing current tests on each phase of the power chip for a preset number of test cycles to obtain the effective current value of each phase; if the effective current values of each phase are all within the preset current threshold range, outputting the result information that the power chip is a qualified product. This method is compatible with the overcurrent capacity detection of the H-bridge module and the three-phase full-bridge module, improves the detection efficiency of the overcurrent capacity of the power chip, and enhances the detection reliability and accuracy.

Description

Technical Field

[0001] The present invention relates to the technical field of power chip detection, and particularly to a method, device and equipment for detecting the overcurrent capacity of a power chip. Background Art

[0002] Generally, the method for detecting the overcurrent capacity of a power chip is to combine the power chip and a power module into one, and detect the overcurrent capacity of the power chip by detecting the overcurrent capacity of the power module. At present, the overcurrent capacity detection method of the power module only adopts a single detection method, such as the overcurrent detection method for an H-bridge module or the overcurrent detection method for a three-phase full-bridge module. The overcurrent detection for the H-bridge module and the three-phase full-bridge module can only adopt different test methods respectively, which requires more costs, and thus leads to a more complex detection method and lower flexibility. Moreover, the existing overcurrent capacity detection methods of the power module are all tested by loading an actual load, resulting in more power losses and lower accuracy of the detection results. For example, the reliability of the power module is detected by the phenomenon of mechanical stall of the motor causing overcurrent, which will lead to uncontrollable current and time, serious heating of the load, easy to cause load loss or even burnout, and the mechanical stall is extremely dangerous.

[0003] Therefore, the existing overcurrent capacity detection methods of the power module have the problem of low detection efficiency. Summary of the Invention

[0004] By providing a method, device and equipment for detecting the overcurrent capacity of a power chip, embodiments of the present application solve the technical problem of low detection efficiency existing in the overcurrent capacity detection method of the power module in the prior art, realize the overcurrent capacity detection compatible with the H-bridge module and the three-phase full-bridge module, improve the detection efficiency of the overcurrent capacity of the power chip, enhance the detection reliability and accuracy, have higher detection flexibility, simple operation, reduce the detection cost, and save power losses and other technical effects.

[0005] In a first aspect, an embodiment of the present invention provides a method for detecting the overcurrent capacity of a power chip, which is applied to a detection module of the power chip. The detection module includes N bridge arm branches connected in parallel, N≥2, and each bridge arm branch includes two switching tubes connected in series. A first intersection point on the line between the two switching tubes of each bridge arm branch is sequentially connected to a second intersection point through a corresponding switch and an inductor; the method includes:

[0006] Obtain the driving mode of the power chip, where the driving mode includes a three-phase full-bridge mode and an H-bridge mode;

[0007] In the driving mode, control the detection module to detect the overcurrent capacity of each phase of the three-phase electricity of the power chip;

[0008] During the process of detecting the overcurrent capacity of each phase of electricity of the power chip, current tests are performed on each phase of electricity of the power chip for a preset number of test cycles to obtain the effective current value of each phase of electricity.

[0009] If the effective current values of each phase of electricity are all within the preset current threshold range, the result information indicating that the power chip is a qualified product is output.

[0010] Preferably, in the driving mode, controlling the detection module to detect the overcurrent capacity of each phase of electricity in the three-phase electricity of the power chip includes:

[0011] If the driving mode is the three-phase full-bridge mode, then in the three-phase full-bridge mode, in each phase of electricity, control the corresponding first bridge arm branch and second bridge arm branch in the detection module to be in the conduction test state to obtain the current test value of each phase of electricity in each test cycle.

[0012] Preferably, in each phase of electricity, controlling the corresponding first bridge arm branch and second bridge arm branch in the detection module to be in the conduction test state to obtain the current test value of each phase of electricity in each test cycle includes:

[0013] For each phase of electricity, control the switches of the first bridge arm branch and the switches of the second bridge arm branch to be in the closed state, and the switches of the bridge arm branches other than the first bridge arm branch and the second bridge arm branch in the detection module are all in the open state;

[0014] Each of the test cycles includes a first time period, a second time period, and a third time period connected in sequence;

[0015] In each of the test cycles, in the first time period and the third time period, control the first switching tube of the first bridge arm branch and the second switching tube of the second bridge arm branch to be in the conduction state, and the second switching tube of the first bridge arm branch and the first switching tube of the second bridge arm branch to be in the cut-off state;

[0016] In the second time period, control the second switching tube of the first bridge arm branch and the first switching tube of the second bridge arm branch to be in the conduction state, and the first switching tube of the first bridge arm branch and the second switching tube of the second bridge arm branch to be in the cut-off state;

[0017] Through one test cycle, obtain the current test value of this phase of electricity in one test cycle, and further obtain the current test value of this phase of electricity in each test cycle;

[0018] Each phase of electricity performs the operations of each of the above test cycles to obtain the current test value of each phase of electricity in each test cycle.

[0019] Preferably, during the first time period and the third time period, it further includes:

[0020] Under this phase of electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current sequentially flows through the first switching tube, the first intersection point, the switch, and the inductor of the first bridge arm branch, the second intersection point, and the inductor, switch, first intersection point, and second switching tube of the second bridge arm branch until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0021] Preferably, during the second time period, it further includes:

[0022] Under this phase of electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current sequentially flows through the first switching tube, the first intersection point, the switch, and the inductor of the second bridge arm branch, the second intersection point, and the inductor, switch, first intersection point, and second switching tube of the first bridge arm branch until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0023] Preferably, during the conversion period between the first time period and the second time period or during the conversion period between the second time period and the third time period, it further includes:

[0024] Under the action of the inductor electromotive forces of the first bridge arm branch and the second bridge arm branch, there is a freewheeling current.

[0025] Preferably, in the driving mode, controlling the detection module to detect the overcurrent capacity of each phase of the three-phase electricity of the power chip includes:

[0026] If the driving mode is the H-bridge mode, then in the H-bridge mode, in a certain phase of electricity, control the corresponding first bridge arm branch and second bridge arm branch in the detection module to be in the conduction test state to obtain the current test value of this phase of electricity in each test cycle.

[0027] Preferably, performing current tests on each phase of the power chip for a preset number of test cycles to obtain the effective current value of each phase of electricity includes:

[0028] In each phase of electricity, according to the median or average value of the current test values of the phase of electricity in the preset number of test cycles, obtain the effective current value of the phase of electricity, where the median or average value is obtained when the phase of electricity is in a stable test state;

[0029] Perform the above-mentioned operation of the median or average value of the current test values of the phase of electricity in the preset number of test cycles for each phase of electricity to obtain the effective current value of each phase of electricity.

[0030] Based on the same inventive concept, in a second aspect, the present invention further provides a detection device for the overcurrent capacity of a power chip, including: a control module, a detection module and a chip placement module connected to the control module, and the detection module is further connected to the chip placement module;

[0031] The chip placement module is used to place the power chip;

[0032] The detection module is used to detect the overcurrent capacity of the power chip. Among them, the detection module includes N parallel-connected arm branches, N≥2, and each arm branch includes two switching tubes connected in series. The first intersection of the line between the two switching tubes of each arm branch is sequentially connected to the second intersection through a corresponding switch and an inductor;

[0033] The control module is used to control the detection module and the chip placement module, and execute the detection method for the overcurrent capacity of the power chip described in the first aspect.

[0034] Based on the same inventive concept, in a third aspect, the present invention provides a device, including: the detection device for the overcurrent capacity of the power chip described in the second aspect.

[0035] One or more technical solutions in the embodiments of the present invention have at least the following technical effects or advantages:

[0036] In the embodiments of the present invention, first, the driving mode of the power chip is obtained. The driving mode includes a three-phase full-bridge mode and an H-bridge mode. Then, in the driving mode, the control detection module detects the overcurrent capacity of each phase of the three-phase electricity of the power chip. During the process of detecting the overcurrent capacity of each phase of the power chip, a current test is performed on each phase of the power chip for a preset number of test cycles to obtain the effective current value of each phase. Here, the overcurrent capacity of the power chip is detected by the detection module. The detection module is compatible with the overcurrent capacity detection of the H-bridge module mode and the three-phase full-bridge module mode. The detection circuit of the detection module is simple, which improves the detection efficiency of the overcurrent capacity of the power chip, enhances the detection reliability and accuracy, has a high detection flexibility, is easy to operate, reduces the detection cost, and saves the power loss during the detection process. Moreover, the detection module can be reused to detect multiple power chips, making the detection method and detection module in the embodiments of the present invention have the characteristics of high flexibility, and further realizing the process of detecting the overcurrent capacity of the power chip with low cost, low loss and high efficiency.

[0037] After obtaining the effective current value of each phase, if the effective current value of each phase is within the preset current threshold range, the result information that the power chip is a qualified product is output. Since the effective current value of each phase is obtained through the detection module, the effective current value of each phase has the advantages of high accuracy and high reliability, which can facilitate the efficient and accurate determination of the overcurrent capacity of the power chip. Description of the Drawings

[0038] By reading the following detailed description of the preferred embodiments, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of showing the preferred embodiments and are not considered to be a limitation of the present invention. Moreover, throughout the drawings, the same reference numerals are used to represent the same components. In the drawings:

[0039] Figure 1 A schematic diagram of the step flow of the method for detecting the overcurrent capacity of the power chip in the embodiment of the present invention is shown;

[0040] Figure 2 A schematic diagram of the structure of the detection module with N = 3 bridge arm branches in the embodiment of the present invention is shown;

[0041] Figure 3 A schematic diagram of the test period and the corresponding switching states of the A-phase electricity of the power chip in the embodiment of the present invention is shown;

[0042] Figure 4 A schematic diagram of the test current flow direction of the A-phase electricity of the power chip in the first time period and the third time period in the embodiment of the present invention is shown;

[0043] Figure 5 A schematic diagram of the freewheeling current during the conversion of the A-phase electricity of the power chip between the first time period and the second time period in the embodiment of the present invention is shown;

[0044] Figure 6 A schematic diagram of the test current flow direction of the A-phase electricity of the power chip in the second time period in the embodiment of the present invention is shown;

[0045] Figure 7 A schematic diagram of the freewheeling current during the conversion of the A-phase electricity of the power chip between the second time period and the third time period in the embodiment of the present invention is shown;

[0046] Figure 8 A schematic diagram of the test period and the corresponding test current waveform of the A-phase electricity of the power chip in the embodiment of the present invention is shown;

[0047] Figure 9 A schematic diagram of the test period and the corresponding switching states of the B-phase electricity of the power chip in the embodiment of the present invention is shown;

[0048] Figure 10 A schematic diagram of the test current flow direction of the B-phase electricity of the power chip in the first time period and the third time period in the embodiment of the present invention is shown;

[0049] Figure 11Shows a schematic diagram of the freewheeling current during the conversion of the B-phase power of the power chip in the first time period and the second time period in the embodiment of the present invention;

[0050] Figure 12 Shows a schematic diagram of the test current flow direction of the B-phase power of the power chip in the second time period in the embodiment of the present invention;

[0051] Figure 13 Shows a schematic diagram of the freewheeling current during the conversion of the B-phase power of the power chip in the second time period and the third time period in the embodiment of the present invention;

[0052] Figure 14 Shows a schematic diagram of the test period of the B-phase power of the power chip and the corresponding test current waveform in the embodiment of the present invention;

[0053] Figure 15 Shows a schematic diagram of the test period of the C-phase power of the power chip and the corresponding switching state in the embodiment of the present invention;

[0054] Figure 16 Shows a schematic diagram of the test current flow direction of the C-phase power of the power chip in the first time period and the third time period in the embodiment of the present invention;

[0055] Figure 17 Shows a schematic diagram of the freewheeling current during the conversion of the C-phase power of the power chip in the first time period and the second time period in the embodiment of the present invention;

[0056] Figure 18 Shows a schematic diagram of the test current flow direction of the C-phase power of the power chip in the second time period in the embodiment of the present invention;

[0057] Figure 19 Shows a schematic diagram of the freewheeling current during the conversion of the C-phase power of the power chip in the second time period and the third time period in the embodiment of the present invention;

[0058] Figure 20 Shows a schematic diagram of the test period of the C-phase power of the power chip and the corresponding test current waveform in the embodiment of the present invention;

[0059] Figure 21 Shows a schematic diagram of another test period of the C-phase power of the power chip and the corresponding test current waveform in the embodiment of the present invention;

[0060] Figure 22 Shows a schematic diagram of another test period of the C-phase power of the power chip and the corresponding test current waveform in the embodiment of the present invention;

[0061] Figure 23 Shows a schematic diagram of the waveform of the detection result of the A-phase power of a certain power chip in the embodiment of the present invention;

[0062] Figure 24 The module schematic diagram of the detection device for the overcurrent capacity of the power chip in the embodiment of the present invention is shown. Specific implementation manners

[0063] Hereinafter, the exemplary embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be fully conveyed to those skilled in the art.

[0064] Embodiment 1

[0065] The first embodiment of the present invention provides a method for detecting the overcurrent capacity of a power chip, as Figure 1 shown, including:

[0066] S101, obtaining the driving mode of the power chip, where the driving mode includes a three-phase full-bridge mode and an H-bridge mode;

[0067] S102, in the driving mode, controlling the detection module to detect the overcurrent capacity of each phase of the three-phase electricity of the power chip;

[0068] S103, during the process of detecting the overcurrent capacity of each phase of the power chip, performing current tests for a preset number of test cycles on each phase of the power chip to obtain the effective current value of each phase;

[0069] S104, if the effective current value of each phase is within the preset current threshold range, outputting the result information that the power chip is a qualified product.

[0070] The detection method of this embodiment is applied to the detection module of the power chip. The detection module includes N bridge arm branches connected in parallel, where N≥2. Each bridge arm branch includes two switching tubes connected in series, and the first intersection of the line between the two switching tubes of each bridge arm branch is connected to the second intersection through the corresponding switch and inductor in sequence. As Figure 2 shown, taking the detection module having N = 3 bridge arm branches as an example to illustrate the structure of the detection module.

[0071] In Figure 2In it, the detection module is connected to an external DC power supply voltage Udc. The detection module includes three bridge arm branches connected in parallel. Each bridge arm branch includes two switching tubes connected in series. The first intersection of the line between the two switching tubes of each bridge arm branch is sequentially connected to the second intersection through the corresponding switch and inductor. The first bridge arm branch Laa’ includes the switching tube Sa and the switching tube Sa’ connected in series. The first intersection of the line between the switching tube Sa and the switching tube Sa’ is sequentially connected to the second intersection through the switch S1 and the inductor A. The second bridge arm branch Lbb’ includes the switching tube Sb and the switching tube Sb’ connected in series. The first intersection of the line between the switching tube Sb and the switching tube Sb’ is sequentially connected to the second intersection through the switch S2 and the inductor B. The third bridge arm branch Lcc’ includes the switching tube Sc and the switching tube Sc’ connected in series. The first intersection of the line between the switching tube Sc and the switching tube Sc’ is sequentially connected to the second intersection through the switch S3 and the inductor C.

[0072] In the detection module of this embodiment, there is no need to load an actual load, but an inductor load is used to realize the detection of the overcurrent capacity of the power chip by the detection module, which greatly improves the detection efficiency of the overcurrent capacity of the power chip and enhances the detection reliability and accuracy. Moreover, the detection module has the advantages of simple circuit, easy operation, low cost, and low power loss.

[0073] In this embodiment, first, the driving mode of the power chip is obtained. The driving mode includes a three-phase full-bridge mode and an H-bridge mode. Then, in the driving mode, the detection module is controlled to detect the overcurrent capacity of each phase of the three-phase electricity of the power chip. During the process of detecting the overcurrent capacity of each phase of the power chip, a current test with a preset number of test cycles is performed on each phase of the power chip to obtain the effective current value of each phase. Here, by using the detection module to detect the overcurrent capacity of the power chip, the detection module is compatible with the overcurrent capacity detection of the H-bridge module mode and the three-phase full-bridge module mode. The detection circuit of the detection module is simple, which improves the detection efficiency of the overcurrent capacity of the power chip, enhances the detection reliability and accuracy, has a high detection flexibility, is easy to operate, reduces the detection cost, and saves the power loss during the detection process. Moreover, the detection module can be reused to detect multiple power chips, making the detection method and detection module of this embodiment have the characteristics of high flexibility, and further realizing the process of detecting the overcurrent capacity of the power chip with low cost, low loss, and high efficiency.

[0074] After obtaining the effective current value of each phase, if the effective current value of each phase is within the preset current threshold range, the result information that the power chip is a qualified product is output. Since the effective current value of each phase is obtained through the detection module, the effective current value of each phase has the advantages of high accuracy and high reliability, which can facilitate the efficient and accurate determination of the overcurrent capacity of the power chip.

[0075] Next, in combination withFigure 1 and Figure 2 The specific implementation steps of the method for detecting the overcurrent capacity of the power chip provided in this embodiment will be introduced in detail as follows:

[0076] First, perform step S101 to obtain the driving mode of the power chip. The driving mode includes a three-phase full-bridge mode and an H-bridge mode. Specifically, the driving mode of the power chip to be tested can be manually input or automatically detected. The driving mode of the power chip is usually a three-phase full-bridge mode or an H-bridge mode.

[0077] Secondly, perform step S102. In the driving mode, control the detection module to detect the overcurrent capacity of each phase of the three-phase electricity of the power chip.

[0078] Specifically, if the driving mode is a three-phase full-bridge mode, then in the three-phase full-bridge mode, in each phase of electricity, control the corresponding first bridge arm branch and the second bridge arm branch in the detection module to be in the conduction test state, and obtain the current test value of each phase of electricity in each test cycle. Among them, the corresponding first bridge arm branch and the second bridge arm branch are the first bridge arm branch and the second bridge arm branch that have a test correspondence relationship with a certain phase of electricity. Taking Figure 2 the structure of the detection module shown as an example, the power chip has three-phase electricity, namely phase A electricity, phase B electricity, and phase C electricity, that is, U, V, and W phase electricity. The first bridge arm corresponding to the phase A electricity of the power chip is the bridge arm branch formed by the switching tubes Sa and Sa', that is, Laa', and the corresponding second bridge arm is the bridge arm branch formed by the switching tubes Sb and Sb', that is, Lbb'. The first bridge arm corresponding to the phase B electricity of the power chip is the bridge arm branch formed by the switching tubes Sb and Sb', that is, Lbb', and the corresponding second bridge arm is the bridge arm branch formed by the switching tubes Sc and Sc', that is, Lcc'. The first bridge arm corresponding to the phase C electricity of the power chip is the bridge arm branch formed by the switching tubes Sc and Sc', that is, Lcc', and the corresponding second bridge arm is the bridge arm branch formed by the switching tubes Sa and Sa', that is, Laa'. The conduction test state is a state in which the corresponding first bridge arm branch and the second bridge arm branch of a certain phase of electricity are in the conduction state, so as to detect the overcurrent capacity of this phase of electricity.

[0079] In the three-phase full-bridge mode, in each phase of electricity, the specific process of controlling the corresponding first bridge arm branch and the second bridge arm branch in the detection module to be in the conduction test state and obtaining the current test value of each phase of electricity in each test cycle is as follows:

[0080] For each phase of electricity, in step (1), control the switches of the first bridge arm branch and the second bridge arm branch to be in the closed state, and the switches of the bridge arm branches other than the first bridge arm branch and the second bridge arm branch in the detection module are all in the open state.

[0081] Step (2): Each test cycle includes a first time period, a second time period, and a third time period that are connected in sequence. In each test cycle, during the first time period and the third time period, the first switch tube of the first arm branch and the second switch tube of the second arm branch are controlled to be in the conducting state, and the second switch tube of the first arm branch and the first switch tube of the second arm branch are in the cut-off state. Moreover, during the first time period and the third time period, under this phase of electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current sequentially flows through the first switch tube of the first arm branch, the first intersection point, the switch, and the inductor, the second intersection point, and then through the inductor, the switch, the first intersection point, and the second switch tube of the second arm branch until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0082] During the second time period, the second switch tube of the first arm branch and the first switch tube of the second arm branch are controlled to be in the conducting state, and the first switch tube of the first arm branch and the second switch tube of the second arm branch are in the cut-off state. Moreover, during the second time period, under this phase of electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current sequentially flows through the first switch tube of the second arm branch, the first intersection point, the switch, and the inductor, the second intersection point, and then through the inductor, the switch, the first intersection point, and the second switch tube of the first arm branch until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0083] In addition, during the transition period between the first time period and the second time period or during the transition period between the second time period and the third time period, there is a freewheeling current under the action of the inductor electromotive force of the first arm branch and the second arm branch.

[0084] Step (3): Through one test cycle, obtain the current test value of this phase of electricity in one test cycle, and then obtain the current test value of this phase of electricity in each test cycle.

[0085] Step (4): Each phase of electricity performs the operations of each of the above test cycles, that is, each phase of electricity performs steps (1)-(3) to obtain the current test value of each phase of electricity in each test cycle.

[0086] Taking Figure 2 the structure of the detection module shown as an example, elaborate in detail how to obtain the current test value of each phase of electricity in each test cycle:

[0087] The power chip has three phases of electricity, namely phase A electricity, phase B electricity, and phase C electricity. The first arm corresponding to the phase A electricity of the power chip is the arm branch formed by the switch tubes Sa and Sa', that is, Laa', and the second arm corresponding to it is the arm branch formed by the switch tubes Sb and Sb', that is, Lbb'.

[0088] During the detection process of the overcurrent capacity of the A-phase electricity of the power chip, the switches of the first bridge arm branch and the second bridge arm branch corresponding to the A-phase electricity are controlled to be in the closed state, that is, switch S1 and switch S2 are in the closed state. The switches of the bridge arm branches other than the first bridge arm branch and the second bridge arm branch in the detection module are all in the open state, that is, switch S3 is in the open state.

[0089] As Figure 3 shown, each test cycle is a single PWM cycle. Each test cycle of the A-phase electricity includes a first duration, a second duration, and a third duration connected in sequence. The first duration is from time t0 to time t2, the second duration is from time t2 to time t3, and the third duration is from time t3 to time t5. The t0 moment and the t5 moment of two adjacent test cycles overlap, such as the t5 moment of the first test cycle is the t0 moment of the second test cycle.

[0090] Combined with Figure 3 and Figure 4 , in the first duration, that is, in the stage from t0 to t2, the drive signals of switch tubes Sa and Sb' are positive signals, and the drive signals of switch tubes Sa' and Sb are 0 signals, controlling switch tubes Sa and Sb' to be in the conducting state, and Sa' and Sb to be in the cut-off state. Among them, the drive signals can be set according to the actual situation. For example, they can be set as positive signals and zero 0 signals, or they can also be set as positive signals and negative signals. As Figure 4 shown by the arrow dotted line, under the A-phase electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through Sa, the first intersection of Laa', switch S1 and inductor A, the second intersection, and inductor B, switch S2, the first intersection of Lbb' and Sb' in sequence, until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0091] During the conversion period between the first duration and the second duration, there is a freewheeling current under the action of the inductive electromotive force of the first bridge arm branch and the second bridge arm branch. Specifically, within each test cycle, when t is in the stage from t2 to t3, the drive signals of switch tubes Sa and Sb' are 0 signals, and the drive signals of switch tubes Sa' and Sb are positive signals. Switch tubes Sa and Sb' are in the cut-off state, and Sa' and Sb are in the conducting state, but Sa' and Sb will not conduct immediately because there is a freewheeling current under the action of the inductive electromotive force. The direction of this freewheeling current is as Figure 5 shown by the arrow dotted line. In Figure 5 , the freewheeling current starts from Sa', and flows through the first intersection of Laa', switch S1, inductor A, the second intersection, inductor B, switch S2, and the first intersection of Lbb' in sequence, and flows to Sb.

[0092] Combined with Figure 3 and Figure 6, during the second time period, i.e., the stage from t2 to t3, the driving signals of switching transistors Sa and Sb' are 0 signals, and the driving signals of switching transistors Sa' and Sb are positive signals, controlling switching transistors Sa and Sb' to be in the cut-off state, and Sa' and Sb to be in the conducting state. As shown by the arrow dotted line in Figure 6 , under the A-phase electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through Sb, the first intersection of Lbb', switch S2 and inductor B, the second intersection, and inductor A, switch S1, the first intersection of Laa' and Sa' in sequence, until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0093] During the conversion between the second time period and the third time period, there is a freewheeling current under the action of the inductance electromotive force of the first bridge arm branch and the second bridge arm branch. Specifically, within each test cycle, when t is in the stage from t3 to t5, the driving signals of switching transistors Sa and Sb' are positive signals, and the driving signals of switching transistors Sa' and Sb are 0 signals. Switching transistors Sa and Sb' are in the conducting state, and Sa' and Sb are in the cut-off state. However, Sa and Sb' will not conduct immediately because there is also a freewheeling current under the action of the inductance electromotive force. The direction of this freewheeling current is as shown by the arrow dotted line in Figure 7 . In Figure 7 , the freewheeling current starts from Sb', and flows through the first intersection of Lbb', switch S2, inductor B, the second intersection, inductor A, switch S1, and the first intersection of Laa' in sequence, and flows to Sa.

[0094] Combined with Figure 3 and Figure 4 , during the third time period, i.e., the stage from t3 to t5, the driving signals of switching transistors Sa and Sb' are positive signals, and the driving signals of switching transistors Sa' and Sb are 0 signals, controlling switching transistors Sa and Sb' to be in the conducting state, and Sa' and Sb to be in the cut-off state. As shown by the arrow dotted line in Figure 4 , under the A-phase electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through Sa, the first intersection of Laa', switch S1 and inductor A, the second intersection, and inductor B, switch S2, the first intersection of Lbb' and Sb' in sequence, until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0095] In this way, the detection process of one test cycle of the A-phase electricity is completed, and the current test value of the A-phase electricity in one test cycle is obtained. Repeat the detection process of the preset number of test cycles of the A-phase electricity above to obtain the current test value of each test cycle of the A-phase electricity in the preset number of test cycles. The preset number can be set according to actual requirements. As shown in Figure 8As shown, repeat the detection process of the test cycle of the A-phase power supply, and evaluate its overcurrent capacity by detecting the test current waveform of the A-phase power supply during the detection process. In the first few, or more than a dozen, or dozens of test cycles at the beginning of the detection process of the overcurrent capacity of the A-phase power supply, the test current waveform lab of the A-phase power supply shows a gradually increasing trend. As Figure 8 shown, in the first test cycle, that is, in the first PWM cycle, and in the second test cycle, that is, in the second PWM cycle, the test current waveform lab of the A-phase power supply shows a gradually increasing trend. This indicates that the test current of the A-phase power supply is gradually increasing, avoiding a sudden increase in current and breakdown of the power chip during the process of detecting the overcurrent capacity of the phase power supply. At the same time, gradually make the test current approach the target current, and evaluate the overcurrent capacity of the power chip under test through this process. In subsequent test cycles, the test current waveform lab of the A-phase power supply shows a regular and periodic waveform, indicating that the A-phase power supply is in a stable test state, that is, the test current of the A-phase power supply is in a stable test state, so as to accurately measure the overcurrent capacity of the A-phase power supply.

[0096] The first bridge arm corresponding to the B-phase power supply of the power chip is the bridge arm branch formed by the switching tubes Sb and Sb’, that is, Lbb’, and the corresponding second bridge arm is the bridge arm branch formed by the switching tubes Sc and Sc’, that is, Lcc’. During the detection process of the overcurrent capacity of the B-phase power supply of the power chip, control the switches of the first bridge arm branch and the second bridge arm branch corresponding to the B-phase power supply to be in the closed state, that is, the switch S2 and the switch S3 are in the closed state. The switches of the bridge arm branches other than the first bridge arm branch and the second bridge arm branch in the detection module are all in the open state, that is, the switch S1 is in the open state.

[0097] As Figure 9 shown, each test cycle is a single PWM cycle. Each test cycle of the B-phase power supply includes a first duration, a second duration, and a third duration connected in sequence. The first duration is from the moment t0 to the moment t2, the second duration is from the moment t2 to the moment t3, and the third duration is from the moment t3 to the moment t5. The moment t0 and the moment t5 of two adjacent test cycles overlap, for example, the moment t5 of the first test cycle is the moment t0 of the second test cycle.

[0098] Combined with Figure 9 and Figure 10 , in the first duration, that is, in the stage from t0 to t2, the driving signals of the switching tubes Sb and Sc’ are positive signals, and the driving signals of the switching tubes Sb’ and Sc are 0 signals, controlling the switching tubes Sb and Sc’ to be in the conducting state, and Sb’ and Sc to be in the cut-off state. Among them, the driving signals can be set according to the actual situation, for example, set as positive signals and zero 0 signals, or can also be set as positive signals and negative signals. As Figure 10As shown by the arrow dotted line, under the B-phase power, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through Sb, the first intersection of Lbb', switch S2 and inductor B, the second intersection, and inductor C, switch S3, the first intersection of Lcc' and Sc' in sequence, until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0099] During the conversion between the first time period and the second time period, there is a freewheeling current under the action of the inductive electromotive forces of the first arm branch and the second arm branch. Specifically, within each test cycle, when t is in the stage from t2 to t3, the drive signals of switch transistors Sb and Sc' are 0 signals, and the drive signals of switch transistors Sb' and Sc are positive signals. Switch transistors Sb and Sc' are in the cut-off state, and Sb' and Sc are in the conducting state, but Sb' and Sc do not conduct immediately because there is a freewheeling current under the action of the inductive electromotive force. The direction of this freewheeling current is as Figure 11 shown by the arrow dotted line. In Figure 11 , the freewheeling current starts from Sb', and successively flows through the first intersection of Lbb', switch S2, inductor B, the second intersection, inductor C, switch S3, and the first intersection of Lcc', and flows to Sc.

[0100] Combined with Figure 9 and Figure 12 , in the second time period, that is, in the stage from t2 to t3, by setting the drive signals of switch transistors Sb and Sc' to 0 signals and the drive signals of switch transistors Sb' and Sc to positive signals, it is controlled that switch transistors Sb and Sc' are in the cut-off state, and Sb' and Sc are in the conducting state. As Figure 12 shown by the arrow dotted line, under the B-phase power, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through Sc, the first intersection of Lcc', switch S3 and inductor C, the second intersection, and inductor B, switch S2, the first intersection of Lbb' and Sb' in sequence, until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0101] During the conversion between the second time period and the third time period, there is a freewheeling current under the action of the inductive electromotive forces of the first arm branch and the second arm branch. Specifically, within each test cycle, when t is in the stage from t3 to t5, the drive signals of switch transistors Sb and Sc' are positive signals, and the drive signals of switch transistors Sb' and Sc are 0 signals. Switch transistors Sb and Sc' are in the conducting state, and Sb' and Sc are in the cut-off state, but Sb and Sc' do not conduct immediately because there is also a freewheeling current under the action of the inductive electromotive force. The direction of this freewheeling current is as Figure 13 shown by the arrow dotted line. In Figure 13 , the freewheeling current starts from Sc', and successively flows through the first intersection of Lcc', switch S3, inductor C, the second intersection, inductor B, switch S2, and the first intersection of Lbb', and flows to Sb.

[0102] Combined with Figure 9 and Figure 10 In the third time period, that is, in the stage from t3 to t5, the drive signals of the switching transistors Sb and Sc' are positive signals, and the drive signals of the switching transistors Sb' and Sc are 0 signals, controlling the switching transistors Sb and Sc' to be in the conducting state, and Sb' and Sc to be in the cut-off state. As shown by the arrow dashed line in Figure 10 Under the B-phase electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through the first intersection of Sb and Lbb', the switch S2 and the inductor B, the second intersection, and the inductor C, the switch S3, the first intersection of Lcc' and Sc' in sequence, and then flows back to the negative pole of the external DC power supply voltage of the detection module.

[0103] In this way, the detection process of a test cycle of the B-phase electricity is completed, and the current test value of the B-phase electricity in one test cycle is obtained. Repeat the detection process of the preset number of test cycles of the B-phase electricity to obtain the current test value of each test cycle of the B-phase electricity in the preset number of test cycles. As shown in Figure 14 By repeating the detection process of the test cycle of the B-phase electricity, the overcurrent capacity of the B-phase electricity is evaluated through the test current waveform of the B-phase electricity during the detection process. In the first few or a dozen or dozens of test cycles at the beginning of the detection process of the overcurrent capacity of the B-phase electricity, the test current waveform lbc of the B-phase electricity shows a gradually increasing trend. As shown in Figure 14 In the first test cycle, that is, in the first PWM cycle, and in the second test cycle, that is, in the second PWM cycle, the test current waveform lbc of the B-phase electricity shows a gradually increasing trend. This indicates that the test current of the B-phase electricity is gradually increasing, avoiding a sudden increase in current and breaking down the power chip during the process of detecting the overcurrent capacity of the phase electricity. At the same time, gradually making the test current approach the target current and evaluating the overcurrent capacity of the power chip to be tested through this process. In the subsequent test cycles, the test current waveform lbc of the B-phase electricity shows a regular periodic waveform, indicating that the B-phase electricity is in a stable test state, that is, the test current of the B-phase electricity is in a stable test state, so as to accurately measure the overcurrent capacity of the B-phase electricity.

[0104] The first bridge arm corresponding to the C-phase electricity of the power chip is the bridge arm branch formed by the switching transistors Sc and Sc', that is, Lcc', and the corresponding second bridge arm is the bridge arm branch formed by the switching transistors Sa and Sa'. During the detection process of the overcurrent capacity of the C-phase electricity of the power chip, control the switches of the first bridge arm branch and the second bridge arm branch corresponding to the C-phase electricity to be in the closed state, that is, the switch S3 and the switch S1 are in the closed state. The switches of the bridge arm branches other than the first bridge arm branch and the second bridge arm branch in the detection module are all in the open state, that is, the switch S2 is in the open state.

[0105] As Figure 15 shown, each test cycle is a single PWM cycle. Each test cycle of the C-phase electricity includes a first duration, a second duration, and a third duration connected in sequence. The first duration is from the moment t0 to the moment t2, the second duration is from the moment t2 to the moment t3, and the third duration is from the moment t3 to the moment t5. The moments t0 and t5 of two adjacent test cycles overlap. For example, the moment t5 of the first test cycle is the moment t0 of the second test cycle.

[0106] Combined with Figure 15 and Figure 16 , in the first duration, that is, in the stage from t0 to t2, the driving signals of the switching tubes Sc and Sa' are positive signals, and the driving signals of the switching tubes Sc' and Sa are 0 signals, controlling the switching tubes Sc and Sa' to be in the conducting state, and Sc' and Sa to be in the cut-off state. Among them, the driving signals can be set according to the actual situation. For example, they can be set as positive signals and zero 0 signals, or they can be set as positive signals and negative signals. As Figure 16 shown by the arrow dashed line in

[0107] , under the C-phase electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through Sc, the first intersection of Lcc', the switch S3, and the inductor C, the second intersection, and the inductor A, the switch S1, the first intersection of Laa', and Sa' in sequence, and then flows back to the negative pole of the external DC power supply voltage of the detection module. Figure 17 During the conversion between the first duration and the second duration, there is a freewheeling current under the action of the inductance electromotive force of the first bridge arm branch and the second bridge arm branch. Specifically, within each test cycle, when t is in the stage from t2 to t3, the driving signals of the switching tubes Sc and Sa' are 0 signals, and the driving signals of the switching tubes Sc' and Sa are positive signals. The switching tubes Sc and Sa' are in the cut-off state, and Sc' and Sa are in the conducting state, but Sc' and Sa do not conduct immediately because there is a freewheeling current under the action of the inductance electromotive force. The direction of this freewheeling current is as Figure 17 shown by the arrow dashed line in

[0108] Combined with Figure 15 and Figure 18 , in the second duration, that is, in the stage from t2 to t3, the driving signals of the switching tubes Sc and Sa' are 0 signals, and the driving signals of the switching tubes Sc' and Sa are positive signals, controlling the switching tubes Sc and Sa' to be in the cut-off state, and Sc' and Sa to be in the conducting state. As Figure 18As shown by the arrowed dotted line, under phase C power, starting from the positive pole of the external DC power supply voltage of the detection module, the test current sequentially flows through Sa, the first intersection of Laa', switch S1 and inductor A, the second intersection, and inductor C, switch S3, the first intersection of Lcc' and Sc', until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0109] During the conversion between the second time period and the third time period, there is a freewheeling current under the action of the inductance electromotive force of the first bridge arm branch and the second bridge arm branch. Specifically, within each test cycle, when t is in the stage from t3 to t5, the drive signals of switch tubes Sc and Sa' are positive signals, the drive signals of switch tubes Sc' and Sa are 0 signals, switch tubes Sc and Sa' are in the conducting state, Sc' and Sa are in the cut-off state, but Sc and Sa' do not conduct immediately because there is also a freewheeling current under the action of the inductance electromotive force. The direction of this freewheeling current is as Figure 19 shown by the arrowed dotted line. In Figure 19 it, the freewheeling current starts from Sa', sequentially flows through the first intersection of Laa', switch S1, inductor A, the second intersection, inductor C, switch S3, and the first intersection of Lcc', and flows to Sc.

[0110] Combined with Figure 15 and Figure 16 , in the third time period, that is, the stage from t3 to t5, by setting the drive signals of switch tubes Sc and Sa' as positive signals and the drive signals of switch tubes Sc' and Sa as 0 signals, control switch tubes Sc and Sa' to be in the conducting state and Sc' and Sa to be in the cut-off state. As Figure 16 shown by the arrowed dotted line, under phase C power, starting from the positive pole of the external DC power supply voltage of the detection module, the test current sequentially flows through Sc, the first intersection of Lcc', switch S3 and inductor C, the second intersection, and inductor A, switch S1, the first intersection of Laa' and Sa', until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0111] In this way, the detection process of one test cycle of phase C power is completed, and the current test value of phase C power in one test cycle is obtained. Repeat the detection process of the preset number of test cycles of phase C power to obtain the current test value of each test cycle of phase C power in the preset number of test cycles. As Figure 20 shown, repeat the detection process of the test cycle of phase C power, and evaluate its overcurrent capacity through the test current waveform of phase C power during the detection process. In the first few or more than a dozen or dozens of test cycles at the beginning of the detection process of the overcurrent capacity of phase C power, the test current waveform lca of phase C power shows a gradually increasing trend. As Figure 20As shown, in the first test cycle, that is, in the first PWM cycle, and in the second test cycle, that is, in the second PWM cycle, the test current waveform lca of the C phase electricity shows a gradually increasing trend. This means that the test current of the C phase electricity is gradually increasing, avoiding a current surge and breakdown of the power chip during the process of detecting the overcurrent capacity of the phase electricity. In subsequent test cycles, the test current waveform lca of the C phase electricity shows a regular periodic waveform, indicating that the C phase electricity is in a stable test state, that is, the test current of the C phase electricity is in a stable test state, so as to accurately measure the overcurrent capacity of the C phase electricity.

[0112] In this embodiment, by controlling the opening and closing of the bridge arm branch corresponding to the phase electricity in the detection module, the inductance on the corresponding bridge arm branch is used to replace the load and play the role of freewheeling, and then the overcurrent capacity of the power chip is detected by adjusting the test current to the target current. In addition, the detection results are accurate and reliable. Compared with the three-phase full-bridge module with actual load, the detection power module of the phenomenon of overcurrent caused by mechanical stalling of the motor, the current and time compared with the three-phase full-bridge module with actual load are uncontrollable, and its load will heat up seriously and easily cause load loss or even burn, and the mechanical stalling is extremely dangerous. Moreover, no matter how the power chip of the three-phase full-bridge module with actual load is switched, the load end needs to be used, resulting in more power loss, and there is a certain error in the test result. In contrast, through the detection process of the three-phase full-bridge mode of the detection module of this embodiment, the detection efficiency of the overcurrent capacity of the power chip is improved, the detection reliability and accuracy are improved, the circuit structure is simple, the detection flexibility is high, the operation is simple, the detection cost is reduced, and the power loss in the detection process is saved.

[0113] In addition, it can be seen from the test cycle of single-phase electricity that the test time of a single PWM cycle is short, indicating that the detection module responds quickly and has less loss. Figure 3 , Figure 8 , Figure 9 , Figure 14 , Figure 15 , Figure 20 , Figure 21 and Figure 22 The vertex of a single PWM cycle in represents the maximum calculated value of the PWM cycle, that is, the maximum value of the PWM cycle.

[0114] For each phase of the power chip, there is not necessarily a one-to-one correspondence with the arm branches in the detection module, but only a test correspondence. For example, for the C-phase power of the power chip, the first arm is the arm branch formed by switching transistors Sc and Sc', i.e., Lcc', and the corresponding second arm is the arm branch formed by switching transistors Sa and Sa', i.e., Laa'. Or for the C-phase power of the power chip, the first arm is the arm branch formed by switching transistors Sa and Sa', i.e., Laa, and the corresponding second arm is the arm branch formed by switching transistors Sc and Sc', i.e., Lcc'. Or for the C-phase power of the power chip, the first arm is the arm branch formed by switching transistors Sb and Sb', i.e., Lbb, and the corresponding second arm is the arm branch formed by switching transistors Sc and Sc', i.e., Lcc'. Or for the C-phase power of the power chip, the first arm is the arm branch formed by switching transistors Sa and Sa', i.e., Laa', and the corresponding second arm is the arm branch formed by switching transistors Sb and Sb', i.e., Lbb'.

[0115] Taking the example that for the C-phase power of the power chip, the first arm is the arm branch formed by switching transistors Sa and Sa', i.e., Laa, and the corresponding second arm is the arm branch formed by switching transistors Sc and Sc', i.e., Lcc', the detection process of the C-phase power of the power chip is described as follows:

[0116] For the C-phase power of the power chip, the first arm is the arm branch formed by switching transistors Sa and Sa', i.e., Laa, and the corresponding second arm is the arm branch formed by switching transistors Sc and Sc', i.e., Lcc'. During the detection process of the over-current capacity of the C-phase power of the power chip, control the switches of the first arm branch and the second arm branch corresponding to the C-phase power to be in the closed state, i.e., switch S1 and switch S3 are in the closed state. The switches of the arm branches other than the first arm branch and the second arm branch in the detection module are all in the open state, i.e., switch S2 is in the open state. As Figure 21 shown, each test period is a single PWM period. Each test period of the C-phase power includes a first duration, a second duration, and a third duration connected in sequence. The first duration is from time t0 to time t2, the second duration is from time t2 to time t3, and the third duration is from time t3 to time t5. The t0 and t5 moments of adjacent two test periods overlap, such as the t5 moment of the first test period is the t0 moment of the second test period.

[0117] Combined with Figure 21 and Figure 18, during the first time period, i.e., the stage from t0 to t2, the driving signals of switch tubes Sa and Sc' are positive signals, and the driving signals of switch tubes Sa' and Sc are 0 signals, controlling switch tubes Sa and Sc' to be in the conducting state and Sa' and Sc to be in the cut-off state. Among them, the driving signals can be set according to the actual situation. For example, they can be set as positive signals and 0 signals, or they can be set as positive signals and negative signals. As Figure 18 shown, under the C-phase electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through the first intersection of Sa and Laa', switch S1 and inductor A, the second intersection, and inductor C, switch S3, the first intersection of Lcc' and Sc' in sequence, until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0118] During the conversion period between the first time period and the second time period, there is a freewheeling current under the action of the inductance electromotive force of the first bridge arm branch and the second bridge arm branch. Specifically, within each test cycle, when t is in the stage from t2 to t3, the driving signals of switch tubes Sa and Sc' are 0 signals, and the driving signals of switch tubes Sa' and Sc are positive signals. Switch tubes Sa and Sc' are in the cut-off state, and Sa' and Sc are in the conducting state, but Sa' and Sc do not conduct immediately because there is a freewheeling current under the action of the inductance electromotive force. The flow direction of this freewheeling current is as Figure 19 shown. In Figure 19 , the freewheeling current starts from Sa', and flows through the first intersection of Laa', switch S1, inductor A, the second intersection, inductor C, switch S3, and the first intersection of Lcc' in sequence, and flows to Sc.

[0119] Combined with Figure 21 and Figure 16 , during the second time period, i.e., the stage from t2 to t3, the driving signals of switch tubes Sa and Sc' are 0 signals, and the driving signals of switch tubes Sa' and Sc are positive signals, controlling switch tubes Sa and Sc' to be in the cut-off state and Sa' and Sc to be in the conducting state. As Figure 16 shown, under the C-phase electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current flows through the first intersection of Sc and Lcc', switch S3 and inductor C, the second intersection, and inductor A, switch S1, the first intersection of Laa' and Sa' in sequence, until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0120] During the conversion between the second time period and the third time period, there is a freewheeling current under the action of the inductance electromotive force of the first bridge arm branch and the second bridge arm branch. Specifically, within each test cycle, when t is in the stage from t3 to t5, the drive signals of the switching transistors Sa and Sc' are positive signals, and the drive signals of the switching transistors Sa' and Sc are 0 signals. The switching transistors Sa and Sc' are in the conducting state, and Sa' and Sc are in the cutoff state. However, Sa and Sc' do not conduct immediately because there is also a freewheeling current under the action of the inductance electromotive force. The direction of this freewheeling current is as Figure 17 shown. In Figure 17 , the freewheeling current starts from Sc', and successively flows through the first intersection of Lcc', switch S3, inductor C, the second intersection, inductor A, switch S1, the first intersection of Laa', and flows to Sa.

[0121] Combined with Figure 21 and Figure 18 , in the third time period, that is, in the stage from t3 to t5, the drive signals of the switching transistors Sa and Sc' are positive signals, and the drive signals of the switching transistors Sa' and Sc are 0 signals, to control the switching transistors Sa and Sc' to be in the conducting state, and Sa' and Sc to be in the cutoff state. As Figure 18 shown, under the C-phase electricity, starting from the positive pole of the external DC power supply voltage of the detection module, the test current successively flows through Sa, the first intersection of Laa', switch S1, and inductor A, the second intersection, as well as inductor C, switch S3, the first intersection of Lcc', and Sc', until it flows back to the negative pole of the external DC power supply voltage of the detection module.

[0122] In this way, the detection process of one test cycle of the C-phase electricity is completed, and the current test value of the C-phase electricity in one test cycle is obtained. Repeat the detection process of the preset number of test cycles of the C-phase electricity to obtain the current test value of each test cycle of the C-phase electricity in the preset number of test cycles. As Figure 22 shown, repeat the detection process of the test cycle of the C-phase electricity, and evaluate its overcurrent capacity through the test current waveform of the C-phase electricity during the detection process. In the first few or more than a dozen or dozens of test cycles at the beginning of the detection process of the overcurrent capacity of the C-phase electricity, the test current waveform lac of the C-phase electricity shows a gradually increasing trend. As Figure 22 shown, in the first test cycle, that is, in the first PWM cycle, and in the second test cycle, that is, in the second PWM cycle, the test current waveform lac of the C-phase electricity shows a gradually increasing trend. This indicates that the test current of the C-phase electricity is gradually increasing, avoiding a sudden increase in current and breaking down the power chip during the process of detecting the overcurrent capacity of the phase electricity. In the subsequent test cycles, the test current waveform lac of the C-phase electricity shows a regular periodic waveform, indicating that the C-phase electricity is in a stable test state, that is, the test current of the C-phase electricity is in a stable test state, so as to accurately measure the overcurrent capacity of the C-phase electricity.

[0123] If the driving mode is the H-bridge mode, then in the H-bridge mode, in a certain phase of electricity, the corresponding first arm branch and the second arm branch in the control detection module are in the conduction test state, and the current test value of this phase of electricity in each test cycle is obtained. Specifically, the principle of the H-bridge mode is the same as that of the three-phase full-bridge mode. In the H-bridge mode, to detect the overcurrent capacity of any phase of electricity of the power chip, only refer to the overcurrent capacity detection process of any phase of electricity of the power chip in the three-phase full-bridge mode, and close the switches of the two arm branches corresponding to this phase of electricity for testing.

[0124] The working principle of the detection module and the detection method in this embodiment is: through the externally connected DC power supply voltage Udc of the detection module, a test current is generated in the power chip to be tested. Combining the detection method and the detection module in this embodiment, the test current of the power chip to be tested is gradually increased to the target current through the test cycle. The target current is the maximum current that the power chip can withstand in the stable state, and it can be set according to the actual requirements of the power chip manufacturer. There is a freewheeling current in each test cycle. The function of the freewheeling current is during the conversion period between the first time period and the second time period or during the conversion period between the second time period and the third time period, that is, during the conversion period of the switch tube states of the corresponding first arm branch and the second arm branch, under the action of the inductance potential, the inductor will freewheel and discharge, and during this period, there is still a part of the current in the inductor. After the conversion of the switch tube states of the corresponding first arm branch and the second arm branch, the superposition of the current already existing in the inductor and the current in the detection module after the conversion of the switch tube states of the corresponding first arm branch and the second arm branch enables the test current of the power chip to be tested to approach or even reach the target current more efficiently, more quickly and more safely.

[0125] Taking the first arm corresponding to the A phase of electricity of the power chip as the arm branch formed by the switch tubes Sa and Sa', that is, Laa', and the second arm corresponding to the switch tubes Sb and Sb' as the arm branch formed by the switch tubes Sb and Sb', that is, Lbb' as an example to illustrate the working principle of the detection module and the detection method in this embodiment:

[0126] During the detection process of the overcurrent capacity of the A-phase electricity of the power chip, a test current is generated in the power chip to be tested by detecting the external DC power supply voltage Udc of the detection module. In the first test cycle, in the first time period, assume that the current value of the test circuit is 1 A (ampere). After charging for the first time period, inductors A and B have electrical energy. During the transition between the first time period and the second time period, that is, when t is in the stage from t2 to t3, the drive signals of switching transistors Sa and Sb' are 0 signals, and the drive signals of switching transistors Sa' and Sb are positive signals. Switching transistors Sa and Sb' are in the cut-off state, and Sa' and Sb are in the conducting state. However, Sa' and Sb do not conduct immediately because there is a freewheeling current under the action of the inductor potential. Then, inductors A and B discharge, but they do not discharge completely, and there is still a part of electrical energy left in themselves, that is, the current value of the remaining electrical energy is 0.5 A. After the first time period is converted to the second time period, that is, after controlling switching transistors Sa and Sb' to be in the cut-off state and Sa' and Sb to be in the conducting state, there is a current in the detection module. Assume that the current value of the current in the detection module at this time is 1 A. The current value of the current in the detection module, which is 1 A, is superimposed with the current value of 0.5 A to obtain the current value of 1.5 A of the test current in the second time period. Moreover, in the second time period, electrical energy is also charged to inductors A and B. And so on, the process during the transition between the second time period and the third time period, the test current in the third time period, and the principle process of the next test cycle.

[0127] In this way, through the detection method, detection module, and test cycle settings of this embodiment, the test current of the power chip to be tested can approach or even reach the target current more efficiently, quickly, and safely. Moreover, it can quickly, efficiently, reliably, and accurately complete the over-capacity detection process of the power chip and obtain reliable and accurate results. By using the freewheeling current to superimpose the test current, it further prevents the next added current from directly hitting the power chip after a certain cycle is completed, resulting in the breakdown of the power chip to be tested, and improves the safety and reliability.

[0128] It should also be noted that for each phase of electricity, the specific method of obtaining the current test value of this phase of electricity in a test cycle is as follows: The first method is that during the process of this phase of electricity executing a test cycle, the current test value of this test cycle is directly measured through devices such as an oscilloscope. The second method is that test current acquisition processing is performed at the output terminals of the three phases A (i.e., the U phase), B (i.e., the V phase), and C (i.e., the W phase), that is, the test current is collected at the corresponding output terminals. By loading a current sensor at the output phase wire terminal, a test current signal will be collected, and it is output to the analog-to-digital converter ADC (Analog to Digital Converter) of the microcontroller unit MCU (Microcontroller Unit) through a comparison and amplification circuit. In the comparison and amplification circuit, the test current is filtered through an RC filter to filter out AC signals and noise in a specific frequency stage. In the MCU, first-order filtering processing is performed on the collected signal data to make the signal smoother and stably output the test current signal.

[0129] In this embodiment, the detection module is compatible with the over-current capacity detection of the H-bridge module mode and the three-phase full-bridge module mode, and the detection circuit of the detection module is simple. Specifically, the detection module and detection method of this embodiment control the current loop through the switches of the corresponding bridge arm branches, making the current loop shorter, with less loss, and the test results more accurate and reliable. Therefore, the detection module and detection process of this embodiment have stronger flexibility and require less system resources.

[0130] Different from the existing technology external load scheme, in which all load resources need to participate in the test, the current loop of the existing technology external load scheme is complex and only applicable to the three-phase full-bridge module or the H-bridge module, that is, it is only applicable singly. The detection module and detection method of this embodiment can improve the detection efficiency of the over-current capacity of the power chip, enhance the detection reliability and accuracy, are easy to operate, reduce the detection cost, and save power loss during the detection process. Moreover, the detection module can be reused to detect multiple power chips, making the detection method and detection module of this embodiment highly flexible, and further realizing the process of detecting the over-current capacity of the power chip with low cost, low loss, and high efficiency.

[0131] Next, step S103 is executed. During the process of detecting the over-current capacity of each phase of electricity of the power chip, current tests are performed on each phase of electricity of the power chip for a preset number of test cycles to obtain the root mean square value of the current of each phase of electricity.

[0132] Specifically, in each phase of electricity, according to the median or average value of the current test values of the phase electricity in a preset number of test cycles, the effective current value of the phase electricity is obtained, where the median or average value is obtained when the phase electricity is in a stable test state. Each phase of electricity performs the above operation of the median or average value of the current test values of the phase electricity in a preset number of test cycles to obtain the effective current value of each phase of electricity.

[0133] An example of the detection result of the A-phase electricity of a certain power chip. Through the above detection process of the A-phase electricity in the three-phase full-bridge mode, the detection process of the overcurrent capacity of the A-phase electricity of the power chip is realized. The detection result of the A-phase electricity of the power chip is to test whether the test current of the power chip of the A-phase electricity can reach the target current of 382A under the conditions of a carrier frequency of 2KHz, an output voltage of 336V, an outlet temperature of 25°C, and a flow rate of 8L. The waveform is as Figure 23 shown. Figure 23 The waveform shows that the test current of the A-phase electricity is in a stable test state. When the test current of the A-phase electricity is in a stable test state, the median operation (i.e., calculating the median value) or average operation (i.e., calculating the average value) is performed on the current test values of the A-phase electricity in multiple test cycles to obtain the effective current value of the A-phase electricity. As Figure 23 shown, the average value of 382.073A is the effective current value of the A-phase electricity.

[0134] Then, step S104 is executed. If the effective current value of each phase of electricity is within the preset current threshold range, the result information indicating that the power chip is a qualified product is output. Among them, the preset current threshold range can be set according to actual needs.

[0135] Specifically, if the effective current value of each phase of electricity is within the preset current threshold range, it means that the overcurrent capacity of each phase of electricity of the power chip meets the conditions, and the result information indicating that the power chip is a qualified product is output. If the effective current value of a certain phase of electricity is not within the preset current threshold range, it means that the overcurrent capacity of the phase of electricity of the power chip does not meet the conditions, and the result information indicating that the power chip is unqualified is output. In this way, since the effective current value of each phase of electricity is obtained through the detection module, the effective current value of each phase of electricity has the advantages of high accuracy and high reliability, which can facilitate the efficient and accurate determination of the overcurrent capacity of the power chip, thereby improving the detection efficiency of the overcurrent capacity of the power chip and enhancing the detection reliability and accuracy of the judgment result.

[0136] Taking the detection result example of the A-phase electricity of a certain power chip as described above, through the above detection process of the A-phase electricity in the three-phase full-bridge mode, the detection process of the over-current capacity of the A-phase electricity of the power chip is realized. The detection result of the A-phase electricity of the power chip is to test whether the test current of the power chip of the A-phase electricity can reach the target current of 382A under the conditions of a carrier frequency of 2KHz, an output voltage of 336V, an outlet temperature of 25°C, and a flow rate of 8L. The waveform is as Figure 23 shown. The target current of the A-phase electricity is 382A. Since the detected test current of the A-phase electricity is 382A, it indicates that the over-current capacity of the A-phase electricity of the power chip meets the conditions. If the power chip to be tested for the A-phase electricity is broken down and damaged before reaching 382A, that is, the detected test current of the A-phase electricity is less than 382A, it means that the over-current capacity of the A-phase electricity of the power chip does not meet the conditions.

[0137] One or more technical solutions in the embodiments of the present invention have at least the following technical effects or advantages:

[0138] In this embodiment, first, the driving mode of the power chip is obtained. The driving mode includes the three-phase full-bridge mode and the H-bridge mode. Then, in the driving mode, the detection module is controlled to detect the over-current capacity of each phase of the three-phase electricity of the power chip. During the process of detecting the over-current capacity of each phase of the power chip, a current test with a preset number of test cycles is performed on each phase of the power chip to obtain the effective current value of each phase. Here, the over-current capacity of the power chip is detected by the detection module. The detection module is compatible with the over-current capacity detection of the H-bridge module mode and the three-phase full-bridge module mode. The detection circuit of the detection module is simple, which improves the detection efficiency of the over-current capacity of the power chip, enhances the detection reliability and accuracy, has a high detection flexibility, is easy to operate, reduces the detection cost, and saves the power loss during the detection process. Moreover, the detection module can be reused to detect multiple power chips, making the detection method and detection module of this embodiment have the characteristics of high flexibility, and further realizing the process of detecting the over-current capacity of the power chip with low cost, low loss, and high efficiency.

[0139] After obtaining the effective current value of each phase, if the effective current value of each phase is within the preset current threshold range, the result information that the power chip is a qualified product is output. Since the effective current value of each phase is obtained through the detection module, the effective current value of each phase has the advantages of high accuracy and high reliability, which can facilitate the efficient and accurate determination of the over-current capacity of the power chip.

[0140] Embodiment Two

[0141] Based on the same inventive concept, the second embodiment of the present invention also provides a detection device for the over-current capacity of a power chip, as Figure 24As shown in the figure, it includes: a control module 201, a detection module 202 and a chip placement module 203 connected to the control module 201, and the detection module 202 is also connected to the chip placement module 203.

[0142] The chip placement module 203 is used to place power chips.

[0143] The detection module 202 is used to detect the overcurrent capacity of the power chip. Among them, the detection module 202 includes N parallel-connected bridge arm branches, N≥2, and each bridge arm branch includes two switch tubes connected in series, and the first intersection point of the line between the two switch tubes of each bridge arm branch is sequentially connected to the second intersection point through the corresponding switch and inductor.

[0144] The control module 201 is used to control the detection module 202 and the chip placement module 203, and execute the steps of the method for detecting the overcurrent capacity of the power chip as described in the first embodiment. Specifically, the control module can be a micro control unit MCU (Micro Control Unit).

[0145] Embodiment Three

[0146] Based on the same inventive concept, the third embodiment of the present invention also provides a device, including: the device for detecting the overcurrent capacity of the power chip described in the second embodiment.

[0147] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, a system, or a computer program product. Although the preferred embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications once they know the basic creative concept. Therefore, the appended claims are intended to be construed as including the preferred embodiments and all changes and modifications falling within the scope of the present invention.

[0148] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these changes and modifications.

Claims

1. A method for detecting the overcurrent capacity of a power chip, characterized in that, A detection module applied to a power chip, the detection module includes N bridge arm branches connected in parallel, N≥2, each bridge arm branch includes two switching tubes connected in series, and a first intersection of the line between the two switching tubes of each bridge arm branch is sequentially connected to a second intersection through a corresponding switch and an inductor; the method includes: Obtain the driving mode of the power chip, where the driving mode includes a three-phase full-bridge mode and an H-bridge mode; Under the driving mode, control the detection module to detect the overcurrent capacity of each phase of the three-phase electricity of the power chip, including: If the driving mode is the three-phase full-bridge mode, then in the three-phase full-bridge mode, in each phase of electricity, control the corresponding first bridge arm branch and the second bridge arm branch in the detection module to be in a conduction test state, and obtain the current test value of each phase of electricity in each test cycle; In each phase of electricity, control the corresponding first bridge arm branch and the second bridge arm branch in the detection module to be in a conduction test state, and obtain the current test value of each phase of electricity in each test cycle, including: For each phase of electricity, control the switches of the first bridge arm branch and the switches of the second bridge arm branch to be in a closed state, and the switches of the bridge arm branches other than the first bridge arm branch and the second bridge arm branch in the detection module are all in an open state; Each of the test cycles includes a first time period, a second time period, and a third time period connected in sequence; In each of the test cycles, in the first time period and the third time period, control the first switching tube of the first bridge arm branch and the second switching tube of the second bridge arm branch to be in a conducting state, and the second switching tube of the first bridge arm branch and the first switching tube of the second bridge arm branch to be in a cutoff state; In the second time period, control the second switching tube of the first bridge arm branch and the first switching tube of the second bridge arm branch to be in a conducting state, and the first switching tube of the first bridge arm branch and the second switching tube of the second bridge arm branch to be in a cutoff state; Through one of the test cycles, obtain the current test value of this phase of electricity in one test cycle, and further obtain the current test value of this phase of electricity in each test cycle; Each phase of electricity performs the operations of each of the above test cycles to obtain the current test value of each phase of electricity in each test cycle; Among them, through the test cycle, the test current of the power chip to be tested is gradually increased to the target current; The process in the H-bridge mode is the same as the process in the three-phase full-bridge mode; During the process of detecting the overcurrent capacity of each phase of the power chip, perform current tests on each phase of the power chip for a preset number of test cycles to obtain the effective current value of each phase of electricity; If the effective current values of each phase of electricity are all within the preset current threshold range, output the result information that the power chip is a qualified product.

2. The method according to claim 1, wherein In the first time period and the third time period, it further includes: Under this phase voltage, starting from the positive pole of the external DC power supply voltage of the detection module, the test current sequentially flows through the first switching tube, the first intersection point, the switch, and the inductor of the first bridge arm branch, the second intersection point, and the inductor, the switch, the first intersection point, and the second switching tube of the second bridge arm branch, and then returns to the negative pole of the external DC power supply voltage of the detection module.

3. The method according to claim 1, characterized in that, During the second time period, it further includes: Under this phase voltage, starting from the positive pole of the external DC power supply voltage of the detection module, the test current sequentially flows through the first switching tube, the first intersection point, the switch, and the inductor of the second bridge arm branch, the second intersection point, and the inductor, the switch, the first intersection point, and the second switching tube of the first bridge arm branch, and then returns to the negative pole of the external DC power supply voltage of the detection module.

4. The method according to claim 1, characterized in that, During the conversion between the first time period and the second time period or during the conversion between the second time period and the third time period, it further includes: Under the action of the inductor electromotive forces of the first bridge arm branch and the second bridge arm branch, there is a freewheeling current.

5. The method according to claim 1, wherein In the driving mode, controlling the detection module to detect the overcurrent capacity of each phase of the three-phase electricity of the power chip includes: If the driving mode is the H-bridge mode, then in the H-bridge mode, in a certain phase of electricity, control the corresponding first bridge arm branch and the second bridge arm branch in the detection module to be in the conduction test state, and obtain the current test value of this phase of electricity in each test cycle.

6. The method according to claim 1, wherein Performing current tests on each phase of the power chip for a preset number of test cycles to obtain the effective current value of each phase of electricity includes: In each phase of electricity, according to the median or average value of the current test values of the phase of electricity in the preset number of test cycles, obtain the effective current value of the phase of electricity, where the median or average value is obtained when the phase of electricity is in a stable test state; Each phase of electricity performs the above operation of the median or average value of the current test values of the phase of electricity in the preset number of test cycles to obtain the effective current value of each phase of electricity.

7. A detection device for the over-current capacity of a power chip, characterized in that, It includes: A control module, and a detection module and a chip placement module connected to the control module, and the detection module is also connected to the chip placement module; The chip placement module is used to place the power chip; The detection module is used to detect the overcurrent capacity of the power chip, where the detection module includes N parallel-connected bridge arm branches, N≥2, and each bridge arm branch includes two switching tubes connected in series, and the first intersection point of the line between the two switching tubes of each bridge arm branch is sequentially connected to the second intersection point through the corresponding switch and inductor; The control module is used to control the detection module and the chip placement module, and execute the steps of the method for detecting the overcurrent capacity of the power chip according to any one of claims 1-6.

8. An apparatus, comprising: The detection device for the overcurrent capacity of the power chip as claimed in claim 7.

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