Circuit and method for testing capacitor by charge and discharge method

Abstract

The invention discloses a charge-discharge method for testing a capacitance circuit and method, wherein the capacitance testing circuit comprises a first branch, a second branch, an inherent resistor, a third branch, a fourth branch and a sampling and processing device; the first branch comprises a first switch and a first standard resistor connected in series; the second branch comprises a second switch and a second standard resistor connected in series; one end of the first branch and the second branch both receive a power supply voltage, and the other end is connected to the first end of the inherent resistor; the first standard resistor and the second standard resistor have different resistance values; the third branch comprises a third switch and a test capacitor connected in series; the fourth branch comprises a stray capacitance; one end of the third branch and the fourth branch are both connected to the second end of the inherent resistor, and are also connected to the sampling and processing device, and the other end is grounded. The invention can obtain a more accurate capacitance value of the test capacitance by obtaining the charging time of the charging capacitor under different branch connections, thereby realizing a wide range and high-precision capacitance test.

Description

Technical Field

[0001] The present invention relates to the field of circuit electronic technology, and in particular to a circuit and method for testing a capacitor using a charge-discharge method. Background Art

[0002] The existing charge and discharge method for testing capacitor circuits uses a test capacitor C, a standard resistor R and a power supply to construct an RC charge and discharge loop, charges the capacitor through the power supply, or allows the capacitor to discharge naturally, measures parameters such as voltage or time, and calculates the capacitance value based on the charge and discharge characteristics of the capacitor.

[0003] However, the capacitance value obtained by the prior art cannot reach the required accuracy under certain factors. The factors affecting the test accuracy are mainly the inherent resistance of the circuit connected in series with the standard resistor and the stray capacitance of the circuit itself. Based on this, it is necessary to design a circuit to eliminate the influence of these inherent parameters of the circuit and realize a wide range and high-precision capacitance test. Summary of the invention

[0004] In view of the above problems, the purpose of the present invention is to provide a circuit and method for testing capacitance by a charge-discharge method, which can eliminate the influence of the inherent impedance and stray capacitance of the charge-discharge circuit, realize the detection of PCBA circuit boards and various types of single capacitors, and realize high-precision capacitance testing with a wide range of pf~uF.

[0005] The present invention provides a circuit for testing a capacitor using a charge-discharge method, comprising a first branch, a second branch, an inherent resistor, a third branch, a fourth branch and a sampling and processing device; the first branch comprises a first switch and a first standard resistor connected in series; the second branch comprises a second switch and a second standard resistor connected in series; one end of the first branch and one end of the second branch both receive a power supply voltage, and the other end of the first branch and the other end of the second branch are both connected to the first end of the inherent resistor; wherein the first standard resistor and the second standard resistor have different resistance values; the third branch comprises a third switch and a test capacitor connected in series; the fourth branch comprises a stray capacitor; one end of the third branch and one end of the fourth branch are both connected to the second end of the inherent resistor and are also connected to the sampling and processing device, and the other end of the third branch and the other end of the fourth branch are both grounded.

[0006] Optionally, the sampling and processing device includes a 555 timer and a processing module; the 555 timer includes a power supply end, a high trigger end and an output end, the power supply end of the 555 timer receives the power supply voltage, and the high trigger end of the 555 timer is connected to the second end of the inherent resistor; the processing module includes a receiving end, and the receiving end of the processing module is connected to the output end of the 555 timer.

[0007] Optionally, the 555 timer further includes a low trigger terminal, and the low trigger terminal of the 555 timer is used to receive an external pulse trigger signal.

[0008] Optionally, the processing module further includes a trigger terminal, and the trigger terminal of the processing module is connected to the low trigger terminal of the 555 timer.

[0009] Optionally, the low trigger terminal of the 555 timer receives the power supply voltage through a pull-up resistor.

[0010] The present invention also provides a method for testing a capacitor circuit based on the above-mentioned charge and discharge method, comprising: controlling the third switch to be disconnected, the first switch to be closed, and the second switch to be disconnected, to obtain a first charging time of the stray capacitance from a first voltage to a second voltage; controlling the third switch to be disconnected, the first switch to be disconnected, and the second switch to be closed, to obtain a second charging time of the stray capacitance from the first voltage to the second voltage; controlling the third switch to be closed, the first switch to be closed, and the second switch to be disconnected, to obtain a third charging time of the test capacitor from the first voltage to the second voltage; controlling the third switch to be closed, the first switch to be disconnected, and the second switch to be closed, to obtain a fourth charging time of the test capacitor from the first voltage to the second voltage; determining the capacitance value of the test capacitor according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage, and the second voltage.

[0011] Optionally, determining the capacitance value of the test capacitor according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage and the second voltage includes: determining the capacitance value of the test capacitor according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-(Tw1-Tw2) / ((R1-R2)*ln((V cc-Uc(t1)) / (Vcc-Uc(t2)))), determine the capacitance value of the test capacitor, wherein C represents the capacitance value of the test capacitor, R1 represents the resistance value of the first standard resistor, R2 represents the resistance value of the second standard resistor, Tw1 represents the first charging time, Tw2 represents the second charging time, Tw1' represents the third charging time, Tw2' represents the fourth charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

[0012] Optionally, determining the capacitance value of the test capacitor according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage and the second voltage includes: determining the capacitance value of the stray capacitance according to the first charging time, the second charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage and the second voltage; determining the capacitance value of the test capacitor according to the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage, the second voltage and the capacitance value of the stray capacitance.

[0013] Optionally, determining the capacitance value of the stray capacitance according to the first charging time, the second charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage and the second voltage includes: determining the capacitance value of the stray capacitance according to the formula Cs=(Tw1-Tw2) / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2)))), wherein Cs represents the capacitance value of the stray capacitance, R1 represents the resistance value of the first standard resistor, R2 represents the resistance value of the second standard resistor, Tw1 represents the first charging time, Tw2 represents the second charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

[0014] Optionally, determining the capacitance value of the test capacitor according to the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage, the second voltage and the capacitance value of the stray capacitance includes: determining the capacitance value of the test capacitor according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-Cs, wherein C represents the capacitance value of the test capacitor, Cs represents the capacitance value of the stray capacitance, R1 represents the resistance value of the first standard resistor, R2 represents the resistance value of the second standard resistor, Tw1' represents the third charging time, Tw2' represents the fourth charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

[0015] The present invention provides a circuit and method for testing a capacitor by a charge-discharge method. By controlling a first switch, a second switch, and a third switch, the charging time of a charging capacitor under different branch connections is obtained, and a first charging time, a second charging time, a third charging time, and a fourth charging time are obtained. A more accurate capacitance value of the test capacitor is obtained according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of a first standard resistor, the resistance value of a second standard resistor, a power supply voltage, a first voltage, and a second voltage. The inherent impedance and stray capacitance influence of the charge-discharge circuit can be eliminated, and the PCBA circuit board and various monomer capacitors can be tested to achieve a high-precision capacitance test with a wide range of pf~uF levels. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A circuit connection diagram of a charge-discharge method capacitor test circuit according to a first embodiment of the present invention is shown.

[0018] Figure 2 Shows Figure 1 The charge and discharge method is used to test the equivalent circuit diagram of the capacitor circuit when the capacitor is charged.

[0019] Figure 3 A circuit connection diagram of a capacitor testing circuit using a charge-discharge method according to a second embodiment of the present invention is shown.

[0020] Figure 4 Shows Figure 3 The voltage timing diagram on the port of the 555 timer in the charge and discharge method to test the capacitor circuit.

[0021] Figure 5 A schematic flow chart of a method for testing a capacitor using a charge-discharge method according to a third embodiment of the present invention is shown. DETAILED DESCRIPTION

[0022] The aforementioned and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of the preferred embodiments with reference to the drawings. Through the description of the specific implementation methods, the technical means and effects adopted by the present invention to achieve the intended purpose can be more deeply and specifically understood. However, the attached drawings are only for reference and illustration purposes, and are not used to limit the present invention. Some well-known parts may not be shown. In each of the drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the drawings are not necessarily drawn strictly in accordance with the actual proportions.

[0023] It should be understood that the terms "first", "second", "third", "fourth", etc. are only used to distinguish components or circuits with similar properties, rather than indicating or implying relative importance or a specific order. The terms "include", "comprises", or any other variation thereof, are intended to cover non-exclusive inclusion, and may include other elements not explicitly listed in addition to those listed elements.

[0024] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0025] First embodiment

[0026] Figure 1 FIG. 1 is a schematic diagram showing the circuit connection of a capacitor test circuit using a charge-discharge method according to a first embodiment of the present invention. Figure 1 As shown, this embodiment provides a charge-discharge method for testing a capacitor circuit, which includes a first branch, a second branch, an inherent resistor 15, a third branch, a fourth branch, and a sampling and processing device 20. The first branch includes a first switch 11 and a first standard resistor 12 connected in series; the second branch includes a second switch 13 and a second standard resistor 14 connected in series; one end of the first branch and one end of the second branch both receive a power supply voltage Vcc, and the other end of the first branch and the other end of the second branch are both connected to the first end of the inherent resistor 15; wherein the resistance values ​​of the first standard resistor 12 and the second standard resistor 14 are different. The third branch includes a third switch 17 and a test capacitor 16 connected in series; the fourth branch includes a stray capacitor 18; one end of the third branch and one end of the fourth branch are both connected to the second end of the inherent resistor 15, and are also connected to the sampling and processing device 20, and the other end of the third branch and the other end of the fourth branch are both grounded.

[0027] In one embodiment, if Figure 1 As shown, in the first branch, the first end of the first switch 11 receives the power supply voltage Vcc, the first end of the first standard resistor 12 is connected to the second end of the first switch 11, and the second end of the first standard resistor 12 is connected to the first end of the inherent resistor 15.

[0028] In one embodiment, if Figure 1 As shown, in the second branch, the first end of the second switch 13 receives the power supply voltage Vcc, the first end of the second standard resistor 14 is connected to the second end of the second switch 13 , and the second end of the second standard resistor 14 is connected to the first end of the inherent resistor 15 .

[0029] In one embodiment, if Figure 1 As shown, in the third branch, the first end of the test capacitor 16 is connected to the second end of the inherent resistor 15 and is also connected to the sampling processing device 20, the first end of the third switch 17 is connected to the second end of the test capacitor 16, and the second end of the third switch 17 is grounded.

[0030] Specifically, the charge-discharge method test capacitor circuit of this embodiment can be a capacitor charge-discharge circuit, which forms different branch connections by controlling the on-off of the first switch 11, the second switch 13 and the third switch 17. When charging the charging capacitor, the sampling processing device 20 is connected to the third branch and the fourth branch, and the voltage of the charging capacitor can be sampled to obtain the charging time of the charging capacitor under different branch connections, and the capacitance value of the test capacitor 16 can be calculated. Among them, when the third switch 17 is disconnected, the charging capacitor connected to the circuit for charging is the stray capacitor 18, and when the third switch 17 is closed, the charging capacitor connected to the circuit for charging is the parallel test capacitor 16 and the stray capacitor 18. Wherein, if the third switch 17 is disconnected, the first switch 11 is closed, and the second switch 13 is disconnected, the sampling and processing device 20 obtains the first charging time of the stray capacitance 18 from the first voltage to the second voltage; if the third switch 17 is disconnected, the first switch 11 is disconnected, and the second switch 13 is closed, the sampling and processing device 20 obtains the second charging time of the stray capacitance 18 from the first voltage to the second voltage; if the third switch 17 is closed, the first switch 11 is closed, and the second switch 13 is disconnected, the sampling and processing device 20 obtains the third charging time of the test capacitor 16 from the first voltage to the second voltage; if the third switch 17 is closed, the first switch 11 is disconnected, and the second switch 13 is closed, the sampling and processing device 20 obtains the fourth charging time of the test capacitor 16 from the first voltage to the second voltage. When discharging the charging capacitor, the test capacitor 16 and the stray capacitance 18 can be discharged by connecting the sampling and processing device 20 with the third branch and the fourth branch, so that the voltage of the test capacitor 16 and the stray capacitance 18 drops to the first voltage or below, so as to obtain the first charging time, the second charging time, the third charging time, and the fourth charging time in batches when charging multiple times.

[0031] Figure 2 Shows Figure 1The equivalent circuit diagram of the capacitor charging when the capacitor of the capacitor circuit is tested by the charge and discharge method. Among them, the total resistance is connected in series with the charging capacitor, and the excitation source charges the charging capacitor through the total resistance. The resistance of the total resistance is R, the capacitance of the charging capacitor is C, the excitation source is Us(t), and the real-time voltage across the capacitor is Uc(t). When the charging capacitor is charged, the charging time from the first voltage to the second voltage can be obtained by differential calculation; according to Kirchhoff's voltage law, the loop voltage equation of the equivalent circuit is:

[0032] R*i(t)+Uc(t)=Us(t)................................(1)

[0033] Right now,

[0034] ............................(2)

[0035] Rewritten as the following differential equation:

[0036] ..........................(3)

[0037] Get the answer,

[0038] ..............................(4)

[0039] in, is the unknown constant, the capacitor voltage at t=0 is Uc(0), and the constant is obtained:

[0040] ..................................(5)

[0041] (5) Substitute (4) into:

[0042] .............................(6)

[0043] have to:

[0044] ..........................................(7)

[0045] The following will Figure 1 and Figure 2Combined, the voltage of the excitation source Us(t) corresponds to the power supply voltage Vcc, then the charging voltage of the charging capacitor after the maximum charging time is the power supply voltage Vcc, the capacitor voltage when t=t1 is set to the first voltage Uc(t1), and the capacitor voltage when t=t2 is set to the second voltage Uc(t2); then the charging time Tw is:

[0046] .

[0047] If the third switch 17 is controlled to be disconnected, the first switch 11 is closed, and the second switch 13 is disconnected, the total resistance is the first standard resistor 12 and the inherent resistor 15 connected in series, the charging capacitor is the stray capacitor 18, and the first charging time of the stray capacitor 18 from the first voltage to the second voltage is obtained. The first charging time is Tw1, the resistance value of the first standard resistor 12 is R1, the resistance value of the inherent resistor 15 is R0, and the capacitance value of the stray capacitor 18 is Cs, then:

[0048] ............................(8)

[0049] If the third switch 17 is controlled to be disconnected, the first switch 11 is disconnected, and the second switch 13 is closed, the total resistance is the second standard resistor 14 and the inherent resistor 15 connected in series, the charging capacitor is the stray capacitor 18, and the second charging time of the stray capacitor 18 from the first voltage to the second voltage is obtained. The first charging time is Tw2, the resistance value of the second standard resistor 14 is R2, the resistance value of the inherent resistor 15 is R0, and the capacitance value of the stray capacitor 18 is Cs, then:

[0050] ............................(9)

[0051] (8)-(9) have

[0052] ................................ (10)

[0053] Then Cs=(Tw1-Tw2) / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2)))).........(11)

[0054] If the third switch 17 is controlled to be closed, the first switch 11 is closed, and the second switch 13 is opened, the total resistance is the first standard resistor 12 and the inherent resistor 15 connected in series, the charging capacitor is the test capacitor 16 and the stray capacitor 18 connected in parallel, and the third charging time of the test capacitor 16 from the first voltage to the second voltage is obtained. The third charging time is Tw1', the resistance value of the first standard resistor 12 is R1, the resistance value of the inherent resistor 15 is R0, the capacitance value of the test capacitor 16 is C, and the capacitance value of the stray capacitor 18 is Cs, then:

[0055] ......................(12)

[0056] If the third switch 17 is controlled to be closed, the first switch 11 is opened, and the second switch 13 is closed, the total resistance is the second standard resistor 14 and the inherent resistor 15 connected in series, the charging capacitor is the test capacitor 16 and the stray capacitor 18 connected in parallel, and the fourth charging time of the test capacitor 16 from the first voltage to the second voltage is obtained. The fourth charging time is Tw2', the resistance value of the second standard resistor 14 is R2, the resistance value of the inherent resistor 15 is R0, the capacitance value of the test capacitor 16 is C, and the capacitance value of the stray capacitor 18 is Cs, then:

[0057] .....................(13)

[0058] (12)-(13) have

[0059] ;

[0060] Then C = (Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-Cs......(14)

[0061] Substituting (11) into (14), we have

[0062] C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-(Tw1-Tw2) / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))……………………(15)

[0063] It can be seen that the sampling processing device 20 can determine the capacitance value of the test capacitor 16 according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage and the second voltage, and eliminate the influence of the inherent resistance 15 and the stray capacitance 18. Therefore, the method for testing the capacitor 16 of the charge and discharge method for testing the capacitor circuit of this embodiment may include:

[0064] The third switch 17 is controlled to be disconnected, the first switch 11 is controlled to be closed, and the second switch 13 is controlled to be disconnected, so as to obtain a first charging time of the stray capacitance 18 from the first voltage to the second voltage; the third switch 17 is controlled to be disconnected, the first switch 11 is controlled to be disconnected, and the second switch 13 is controlled to be closed, so as to obtain a second charging time of the stray capacitance 18 from the first voltage to the second voltage; the third switch 17 is controlled to be closed, the first switch 11 is controlled to be closed, and the second switch 13 is controlled to be disconnected, so as to obtain a third charging time of the test capacitor 16 from the first voltage to the second voltage; the third switch 17 is controlled to be closed, the first switch 11 is controlled to be disconnected, and the second switch 13 is controlled to be closed, so as to obtain a fourth charging time of the test capacitor 16 from the first voltage to the second voltage; the sampling and processing device 20 determines the capacitance value of the test capacitor 16 according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage, and the second voltage. Among them, when the first charging time, the second charging time, the third charging time and the fourth charging time are obtained, the charging capacitor should be discharged first. The test capacitor 16 and the stray capacitor 18 can be discharged by connecting the sampling processing device 20 with the third branch and the fourth branch, so that the voltage of the test capacitor 16 and the stray capacitor 18 drops to the first voltage or below.

[0065] In one embodiment, the sampling processing device 20 determines the capacitance value of the test capacitor 16 according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-(Tw1-Tw2) / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2)))), wherein C represents the capacitance value of the test capacitor 16, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1 represents the first charging time, Tw2 represents the second charging time, Tw1' represents the third charging time, Tw2' represents the fourth charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage. The derivation of the formula can be seen in (1)-(15) above.

[0066] In one embodiment, the sampling and processing device 20 determines the capacitance value of the stray capacitor 18 according to the first charging time, the second charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage, and the second voltage; and determines the capacitance value of the test capacitor 16 according to the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage, the second voltage, and the capacitance value of the stray capacitor 18.

[0067] In one embodiment, the sampling processing device 20 determines the capacitance value of the stray capacitor 18 according to the formula Cs=(Tw1-Tw2) / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2)))), wherein Cs represents the capacitance value of the stray capacitor 18, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1 represents the first charging time, Tw2 represents the second charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage. The derivation of the formula can be seen in (1)-(11) above.

[0068] In one embodiment, the sampling processing device 20 determines the capacitance value of the test capacitor 16 according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-Cs, wherein C represents the capacitance value of the test capacitor 16, Cs represents the capacitance value of the stray capacitor 18, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1 represents the first charging time, Tw2 represents the second charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage. The derivation of the formula can be seen in (1)-(14) above.

[0069] Thus, this embodiment obtains the charging time of the charging capacitor under different branch connections through the control of the first switch 11, the second switch 13 and the third switch 17, and obtains the first charging time, the second charging time, the third charging time and the fourth charging time, and obtains a more accurate capacitance value of the test capacitor 16 according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage and the second voltage, which can eliminate the influence of the inherent impedance and stray capacitance 18 of the charging and discharging circuit, can detect PCBA circuit boards and various types of single capacitors, and realize pf~uF level wide range and high-precision capacitance testing.

[0070] In one embodiment, the circuit of the test capacitor 16 further includes a voltage-dividing resistor, which is arranged between the power supply voltage Vcc and the first branch and the second branch, so that the first branch and the second branch can receive the power supply voltage Vcc only through the voltage-dividing resistor. In the calculation of the capacitance value of the test capacitor 16, the voltage-dividing resistor can be eliminated similar to the inherent resistor 15, and does not affect the calculation result of the capacitance value of the test capacitor 16.

[0071] In one embodiment, the circuit of the test capacitor 16 further includes an auxiliary capacitor, which is connected in parallel with the stray capacitor 18 in the fourth branch and can be used to better form a circuit loop. In the calculation of the capacitance value of the test capacitor 16, the auxiliary capacitor can be eliminated like the stray capacitor 18, and does not affect the calculation result of the capacitance value of the test capacitor 16.

[0072] In one embodiment, the sampling and processing device 20 is provided with a power supply terminal for receiving a power supply voltage Vcc.

[0073] In one embodiment, the sampling and processing device 20 is provided with a ground terminal for grounding.

[0074] Second embodiment

[0075] Figure 3 The circuit connection diagram of the charge-discharge method test capacitor circuit of the second embodiment of the present invention is shown. This embodiment provides a charge-discharge method test capacitor circuit, and its principle and technical effects are the same as those of the first embodiment. For the sake of brief description, the parts not mentioned in this embodiment can refer to the corresponding contents in the first embodiment.

[0076] In one embodiment, the sampling and processing device 20 includes a 555 timer 21 and a processing module 22; the 555 timer 21 includes a power supply terminal VDD, a high trigger terminal THR and an output terminal OUT, the power supply terminal VDD of the 555 timer 21 receives the power supply voltage Vcc, and the high trigger terminal THR of the 555 timer 21 is connected to the second end of the inherent resistor 15; the processing module 22 includes a receiving terminal ICP, and the receiving terminal ICP of the processing module 22 is connected to the output terminal OUT of the 555 timer 21.

[0077] Specifically, the 555 timer 21 in this embodiment can be connected to a monostable trigger circuit or an oscillation circuit, and can be used to output a high level to the processing module 22 at the output end OUT of the 555 timer 21 when the charging voltage of the charging capacitor is between the first voltage and the second voltage. The processing module 22 determines the charging time according to the duration of the high level, and can determine the capacitance value of the test capacitor 16 according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12 and the resistance value of the second standard resistor 14.

[0078] If the 555 timer 21 is connected as a monostable trigger circuit, the 555 timer 21 will be used for one charging and one discharging of the charging capacitor. The first voltage during charging can be set to 0V, and the second voltage can be set to a voltage value of 2 / 3 of the power supply voltage Vcc, i.e., 2 / 3 Vcc. Then, when the 555 timer 21 is triggered, the charging capacitor starts to charge and rises from the first voltage, i.e., 0V, and the voltage of the high trigger terminal THR of the 555 timer 21 rises from 0V accordingly. The output terminal OUT of the 555 timer 21 starts to become a high level and is sent to the receiving terminal ICP of the processing module 22, and the processing module 22 starts timing. When the charging capacitor rises to the second voltage, i.e., 2 / 3 Vcc, the voltage of the high trigger terminal THR of the 555 timer 21 reaches 2 / 3 Vcc turns on the internal discharge tube of the 555 timer 21, and the charging capacitor starts to discharge through the internal discharge tube of the 555 timer 21. The output terminal OUT of the 555 timer 21 starts to become a low level and is sent to the receiving terminal ICP of the processing module 22. The processing module 22 stops timing, and the processing module 22 obtains the charging time of the charging capacitor.

[0079] If the 555 timer 21 is connected to an oscillation circuit, the 555 timer 21 will be used for repeated charging and discharging of the charging capacitor. The first voltage during charging can be set to a voltage value of 1 / 3 of the power supply voltage Vcc, i.e., 1 / 3 Vcc, and the second voltage can be set to a voltage value of 2 / 3 of the power supply voltage Vcc, i.e., 2 / 3 Vcc. Then, the 555 timer 21 receives the charging capacitor discharge to the first voltage, i.e., 1 / 3 Vcc, according to the low trigger terminal TRI. The internal discharge tube of the 555 timer 21 is cut off, the charging capacitor starts to charge and rises from the first voltage, i.e., 1 / 3 Vcc. The voltage of the high trigger terminal THR of the 555 timer 21 rises from 1 / 3 Vcc accordingly. The output terminal OUT of the 555 timer 21 starts to become a high level and is sent to the receiving terminal ICP of the processing module 22. The processing module 22 starts timing. When the charging capacitor rises to the second voltage, i.e., 2 / 3 Vcc, the voltage of the high trigger terminal THR of the 555 timer 21 reaches 2 / 3 Vcc turns on the internal discharge tube of the 555 timer 21, and the charging capacitor starts to discharge through the internal discharge tube of the 555 timer 21. The output terminal OUT of the 555 timer 21 starts to become a low level and is sent to the receiving terminal ICP of the processing module 22. The processing module 22 stops timing, and the processing module 22 obtains the charging time of the charging capacitor.

[0080] The following takes the 555 timer 21 connected to a monostable trigger circuit as an example to illustrate the structure of the test circuit and the test method.

[0081] In one embodiment, if Figure 3As shown, the 555 timer 21 also includes a low trigger terminal TRI, and the low trigger terminal TRI of the 555 timer 21 is used to receive an external pulse trigger signal.

[0082] In one embodiment, if Figure 3 As shown, the 555 timer 21 also includes a ground terminal GND, a reset terminal RST, a control terminal CON and a discharge terminal DIS. The ground terminal GND of the 555 timer 21 is grounded, the reset terminal RST of the 555 timer 21 receives the power supply voltage Vcc, the control terminal CON of the 555 timer 21 is grounded through an anti-interference capacitor 211, such as 0.1μF, and the discharge terminal DIS of the 555 timer 21 is connected to the high trigger terminal THR of the 555 timer 21.

[0083] In one embodiment, if Figure 3 As shown, the processing module 22 also includes a trigger terminal TRI, and the trigger terminal TRI of the processing module 22 is connected to the low trigger terminal TRI of the 555 timer 21. The processing module 22 sends an external pulse trigger signal to the low trigger terminal TRI of the 555 timer 21 through the trigger terminal TRI. However, the present application is not limited to this, and the low trigger terminal TRI of the 555 timer 21 can also be set to be grounded through the fourth switch, and by controlling the closing of the fourth switch, the low trigger terminal TRI of the 555 timer 21 receives a low-level external pulse trigger signal.

[0084] In one embodiment, the low trigger terminal TRI of the 555 timer 21 receives the power supply voltage Vcc through a pull-up resistor, which can be used to ensure that the low trigger terminal TRI of the 555 timer 21 always maintains a high level when it does not receive an external pulse trigger signal.

[0085] Specifically, Figure 4 Shows Figure 3 The voltage timing diagram of the port 21 of the 555 timer in the charge and discharge method test capacitor circuit is as follows: Figure 3 and Figure 4 The first voltage during charging can be set to 0V, and the second voltage can be set to a voltage value of 2 / 3 of the power supply voltage Vcc, that is, 2 / 3 Vcc. Then, the 555 timer 21 is triggered by the external pulse trigger signal received by the low trigger terminal TRI. Figure 4 Vi in the figure, the internal discharge tube of the 555 timer 21 starts to be cut off, the charging capacitor starts to charge and rises from the first voltage, i.e., 0V, and the voltage of the high trigger terminal THR of the 555 timer 21 rises from 0V accordingly. Figure 4 The output terminal OUT of the 555 timer 21 starts to become a high level, such as Figure 4The Vo in the 555 timer is sent to the receiving terminal ICP of the processing module 22, and the processing module 22 starts timing; when the charging capacitor rises to the second voltage, that is, 2 / 3 Vcc, the voltage of the high trigger terminal THR of the 555 timer 21 reaches 2 / 3 Vcc, so that the internal discharge tube of the 555 timer 21 is turned on, and the charging capacitor starts to discharge through the internal discharge tube of the 555 timer 21, and the voltage of the high trigger terminal THR of the 555 timer 21 decreases from 2 / 3 Vcc to 0V accordingly. Figure 4 The output terminal OUT of the 555 timer 21 starts to become a low level, such as Figure 4 Vi in the circuit is sent to the receiving end ICP of the processing module 22, and the processing module 22 stops timing, and the processing module 22 obtains the charging time Tw of the charging capacitor. The method for testing the capacitor 16 of the charge-discharge method for testing the capacitor circuit of this embodiment may include:

[0086] The third switch 17 is controlled to be disconnected, the first switch 11 is controlled to be closed, and the second switch 13 is controlled to be disconnected, so as to obtain a first charging time of the stray capacitance 18 from the first voltage to the second voltage; the third switch 17 is controlled to be disconnected, the first switch 11 is controlled to be disconnected, and the second switch 13 is controlled to be closed, so as to obtain a second charging time of the stray capacitance 18 from the first voltage to the second voltage; the third switch 17 is controlled to be closed, the first switch 11 is controlled to be closed, and the second switch 13 is controlled to be disconnected, so as to obtain a third charging time of the test capacitor 16 from the first voltage to the second voltage; the third switch 17 is controlled to be closed, the first switch 11 is controlled to be disconnected, and the second switch 13 is controlled to be closed, so as to obtain a fourth charging time of the test capacitor 16 from the first voltage to the second voltage; the sampling and processing device 20 determines the capacitance value of the test capacitor 16 according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage, and the second voltage. Among them, when the first charging time, the second charging time, the third charging time and the fourth charging time are obtained, the charging capacitor should be discharged first. The test capacitor 16 and the stray capacitor 18 can be discharged by connecting the sampling processing device 20 with the third branch and the fourth branch, so that the voltage of the test capacitor 16 and the stray capacitor 18 drops to the first voltage or below.

[0087] In one embodiment, the sampling and processing device 20 determines the capacitance value of the test capacitor 16 according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln3)-(Tw1-Tw2) / ((R1-R2)*ln3), wherein C represents the capacitance value of the test capacitor 16, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1 represents the first charging time, Tw2 represents the second charging time, Tw1' represents the third charging time, and Tw2' represents the fourth charging time. The derivation of the formula can be seen in (1)-(15) above, and the voltage value of the first voltage Uc(t1)=0V and the voltage value of the second voltage Uc(t2)=2 / 3 Vcc are substituted into (15) to obtain.

[0088] In one embodiment, the sampling and processing device 20 determines the capacitance value of the stray capacitor 18 according to the first charging time, the second charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage, and the second voltage; and determines the capacitance value of the test capacitor 16 according to the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage, the second voltage, and the capacitance value of the stray capacitor 18.

[0089] In one embodiment, the sampling and processing device 20 determines the capacitance value of the stray capacitor 18 according to the formula Cs=(Tw1-Tw2) / ((R1-R2)*ln3), where Cs represents the capacitance value of the stray capacitor 18, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1 represents the first charging time, and Tw2 represents the second charging time. The derivation of the formula can be seen in (1)-(11) above, and the voltage value of the first voltage Uc(t1)=0V and the voltage value of the second voltage Uc(t2)=2 / 3 Vcc are substituted into (11) to obtain.

[0090] In one embodiment, the sampling and processing device 20 determines the capacitance value of the test capacitor 16 according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln3)-Cs, where C represents the capacitance value of the test capacitor 16, Cs represents the capacitance value of the stray capacitor 18, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1' represents the third charging time, and Tw2' represents the fourth charging time. The derivation of the formula can be seen in (1)-(14) above, and the voltage value of the first voltage Uc(t1)=0V and the voltage value of the second voltage Uc(t2)=2 / 3 Vcc are substituted into (14) to obtain.

[0091] Third embodiment

[0092] Figure 5 The flowchart of the method for testing capacitors by the charge-discharge method of the third embodiment of the present invention is shown. This embodiment provides a method for testing capacitors by the charge-discharge method, which can be applied to the test capacitor circuit by the charge-discharge method of the above embodiment. Its principle and technical effects are the same as those of the above embodiment. For the sake of brief description, the parts not mentioned in this embodiment can refer to the corresponding contents in the above embodiment. Figure 5 As shown, the charge-discharge method for testing capacitance in this embodiment includes the following steps:

[0093] S1, controlling the third switch 17 to be opened, the first switch 11 to be closed, and the second switch 13 to be opened, so as to obtain a first charging time of the stray capacitance 18 from a first voltage to a second voltage;

[0094] S2, controlling the third switch 17 to be opened, the first switch 11 to be opened, and the second switch 13 to be closed, so as to obtain a second charging time of the stray capacitance 18 from the first voltage to the second voltage;

[0095] S3, controlling the third switch 17 to close, the first switch 11 to close, and the second switch 13 to open, to obtain a third charging time of the test capacitor 16 from the first voltage to the second voltage;

[0096] S4, controlling the third switch 17 to close, the first switch 11 to open, and the second switch 13 to close, to obtain a fourth charging time of the test capacitor 16 from the first voltage to the second voltage;

[0097] S5, determining the capacitance value of the test capacitor 16 according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage and the second voltage.

[0098] In one embodiment, the capacitance value of the test capacitor 16 is determined according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage and the second voltage, including: according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-(Tw1-Tw2) / ((R1-R2)*ln( (Vcc-Uc(t1)) / (Vcc-Uc(t2)))), determine the capacitance value of the test capacitor 16, wherein C represents the capacitance value of the test capacitor 16, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1 represents the first charging time, Tw2 represents the second charging time, Tw1' represents the third charging time, Tw2' represents the fourth charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

[0099] In one embodiment, the capacitance value of the test capacitor 16 is determined according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage and the second voltage, including:

[0100] Determine the capacitance value of the stray capacitance 18 according to the first charging time, the second charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage and the second voltage;

[0101] The capacitance value of the test capacitor 16 is determined according to the third charging time, the fourth charging time, the resistance value of the first standard resistor 12 , the resistance value of the second standard resistor 14 , the power supply voltage Vcc, the first voltage, the second voltage and the capacitance value of the stray capacitor 18 .

[0102] In one embodiment, the capacitance value of the stray capacitance 18 is determined according to the first charging time, the second charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage, and the second voltage, including:

[0103] According to the formula Cs=(Tw1-Tw2) / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2)))), the capacitance value of the stray capacitance 18 is determined, wherein Cs represents the capacitance value of the stray capacitance 18, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1 represents the first charging time, Tw2 represents the second charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

[0104] In one embodiment, the capacitance value of the test capacitor 16 is determined according to the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage, the second voltage and the capacitance value of the stray capacitor 18, including: determining the capacitance value of the test capacitor 16 according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-Cs, wherein C represents the capacitance value of the test capacitor 16, Cs represents the capacitance value of the stray capacitor 18, R1 represents the resistance value of the first standard resistor 12, R2 represents the resistance value of the second standard resistor 14, Tw1' represents the third charging time, Tw2' represents the fourth charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

[0105] Thus, the charge-discharge method for testing a capacitor circuit and a capacitor method provided in the present application obtains the charging time of the charging capacitor under different branch connections through the control of the first switch 11, the second switch 13 and the third switch 17, and obtains the first charging time, the second charging time, the third charging time and the fourth charging time. According to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor 12, the resistance value of the second standard resistor 14, the power supply voltage Vcc, the first voltage and the second voltage, a more accurate capacitance value of the test capacitor 16 is obtained, which can eliminate the influence of the inherent impedance and stray capacitance 18 of the charge-discharge circuit, can detect PCBA circuit boards and various types of single capacitors, and realize pf~uF level wide range and high-precision capacitance testing.

[0106] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept. For example, the above features are replaced with (but not limited to) technical features with similar functions disclosed in the present application.

Claims

1. A charge-discharge method for testing a capacitor circuit, characterized in that: It includes a first branch, a second branch, an inherent resistor, a third branch, a fourth branch and a sampling and processing device; The first branch includes a first switch and a first standard resistor connected in series; the second branch includes a second switch and a second standard resistor connected in series; one end of the first branch and one end of the second branch both receive a power supply voltage, and the other end of the first branch and the other end of the second branch are both connected to the first end of the inherent resistor; wherein the first standard resistor and the second standard resistor have different resistance values; The third branch includes a third switch and a test capacitor connected in series; the fourth branch includes a stray capacitor; one end of the third branch and one end of the fourth branch are both connected to the second end of the inherent resistor and to the sampling and processing device, and the other end of the third branch and the other end of the fourth branch are both grounded.

2. The charge-discharge method for testing a capacitor circuit according to claim 1, characterized in that: The sampling and processing device includes a 555 timer and a processing module; the 555 timer includes a power supply end, a high trigger end and an output end, the power supply end of the 555 timer receives the power supply voltage, and the high trigger end of the 555 timer is connected to the second end of the inherent resistor; the processing module includes a receiving end, and the receiving end of the processing module is connected to the output end of the 555 timer.

3. The charge-discharge method for testing a capacitor circuit according to claim 2, characterized in that: The 555 timer also includes a low trigger terminal, and the low trigger terminal of the 555 timer is used to receive an external pulse trigger signal.

4. The charge-discharge method for testing a capacitor circuit according to claim 3, characterized in that: The processing module further comprises a trigger terminal, and the trigger terminal of the processing module is connected to the low trigger terminal of the 555 timer.

5. The charge-discharge method for testing a capacitor circuit according to claim 4, characterized in that: The low trigger terminal of the 555 timer receives the power supply voltage through a pull-up resistor.

6. A method for testing capacitance by charge and discharge method, characterized in that: The charge-discharge method for testing a capacitor circuit according to any one of claims 1 to 5, wherein the charge-discharge method for testing a capacitor comprises: Controlling the third switch to be opened, the first switch to be closed, and the second switch to be opened, to obtain a first charging time of the stray capacitance from a first voltage to a second voltage; Controlling the third switch to be opened, the first switch to be opened, and the second switch to be closed, to obtain a second charging time of the stray capacitance from the first voltage to the second voltage; Controlling the third switch to be closed, the first switch to be closed, and the second switch to be opened, to obtain a third charging time of the test capacitor from the first voltage to the second voltage; Controlling the third switch to be closed, the first switch to be opened, and the second switch to be closed, to obtain a fourth charging time of the test capacitor from the first voltage to the second voltage; The capacitance value of the test capacitor is determined according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage and the second voltage.

7. The method for testing capacitance by charge and discharge method according to claim 6, characterized in that: The determining the capacitance value of the test capacitor according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage and the second voltage comprises: according to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-(Tw1-Tw2) / ((R1-R2)*ln((Vcc -Uc(t1)) / (Vcc-Uc(t2)))), determine the capacitance value of the test capacitor, wherein C represents the capacitance value of the test capacitor, R1 represents the resistance value of the first standard resistor, R2 represents the resistance value of the second standard resistor, Tw1 represents the first charging time, Tw2 represents the second charging time, Tw1' represents the third charging time, Tw2' represents the fourth charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

8. The method for testing capacitance by charge and discharge method according to claim 6, characterized in that: The determining the capacitance value of the test capacitor according to the first charging time, the second charging time, the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage and the second voltage includes: Determine the capacitance value of the stray capacitance according to the first charging time, the second charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage, and the second voltage; The capacitance value of the test capacitor is determined according to the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage, the second voltage and the capacitance value of the stray capacitance.

9. The method for testing capacitance by charge and discharge method according to claim 8, characterized in that: The determining the capacitance value of the stray capacitance according to the first charging time, the second charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage and the second voltage includes: According to the formula Cs=(Tw1-Tw2) / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2)))), the capacitance value of the stray capacitance is determined, wherein Cs represents the capacitance value of the stray capacitance, R1 represents the resistance value of the first standard resistor, R2 represents the resistance value of the second standard resistor, Tw1 represents the first charging time, Tw2 represents the second charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

10. The method for testing capacitance by charge and discharge method according to claim 8, characterized in that: The determining the capacitance value of the test capacitor according to the third charging time, the fourth charging time, the resistance value of the first standard resistor, the resistance value of the second standard resistor, the power supply voltage, the first voltage, the second voltage and the capacitance value of the stray capacitance includes: According to the formula C=(Tw1'-Tw2') / ((R1-R2)*ln((Vcc-Uc(t1)) / (Vcc-Uc(t2))))-Cs, the capacitance value of the test capacitor is determined, wherein C represents the capacitance value of the test capacitor, Cs represents the capacitance value of the stray capacitance, R1 represents the resistance value of the first standard resistor, R2 represents the resistance value of the second standard resistor, Tw1' represents the third charging time, Tw2' represents the fourth charging time, Vcc represents the power supply voltage, Uc(t1) represents the first voltage, and Uc(t2) represents the second voltage.

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