Dynamic mapping system for multi-bank access

Abstract

The present invention relates to the field of chip design, and in particular to a dynamic mapping system for multi-bank access. The system comprises a command storage unit, a mapping management table unit, a mapping / demapping logic unit, a dynamic mapping execution unit, and a refresh management unit. The mapping / demapping logic unit dynamically establishes a mapping relationship between a state machine and a bank, and then releases a mapping relationship based on the status of an assigned state machine, so that a target bank accessed by a command in a memory controller can always be assigned a corresponding state machine. The number of state machines does not need to increase linearly one-to-one with the increase in the number of banks, thereby reducing area overhead caused by a surge in the number of state machines. The reduction in the number of state machines also improves the timing of logic design.

Description

Technical Field

[0001] The present invention relates to the field of chip design, in particular to a dynamic mapping system for multi-bank access. Background Art

[0002] The processor accesses memory through a memory controller (MC). During memory access, the MC must strictly adhere to the access timing requirements of the memory dies. This means the MC must strictly control the access state and maintain consistency with the internal dies' state. Memory is typically divided into multiple banks. The timing requirements for access commands between banks are significantly better than the timing requirements for access commands within the same bank. Interleaving bank access significantly improves memory access efficiency and throughput. A state machine is allocated within the memory controller to control legitimate access to banks within the memory dies. The state machine manages each bank's state, such as idle, active, and precharged, ensuring maximum interleaved access while adhering to the dies' access timing requirements, thereby improving overall data throughput. Typically, the number of banks in the memory is equal to the number of state machines in the memory controller, with one state machine assigned to each bank, forming a one-to-one mapping. For example, if the dies to be accessed have 64 banks, the memory controller will simultaneously map 64 state machines.

[0003] Currently, increasing the number of memory banks is being used to further improve overall memory system efficiency. In theory, a larger number of banks allows the memory to process more requests simultaneously, which is particularly important for high-efficiency, high-capacity applications. However, when the number of banks increases to 128, 256, or even higher, relying on the traditional approach of adding a one-to-one state machine within the memory controller will introduce the following drawbacks:

[0004] First, the rapid growth of design area;

[0005] Second, as the number of banks increases, the complexity within the memory controller also increases, making design timing convergence more difficult. Summary of the Invention

[0006] In order to solve the above technical problems, the present invention adopts a technical solution: a dynamic mapping system for multi-bank access, the system comprising:

[0007] The command storage unit is used to store a command queue and a waiting queue. The commands in the command queue carry a unique identifier of a target memory bank.

[0008] The mapping management table unit is used to record and manage the mapping relationship between the state machine and the memory bank.

[0009] A mapping and demapping logic unit is configured to obtain an access request command cmd0 from the command queue. If the number of mapping relationships in the mapping management table unit is greater than a preset allocation threshold, it is determined whether there is a state machine with an unallocated bank. If so, an unallocated bank state machine FSM0 is allocated to the target memory bank bank0 of cmd0. The FSM0 establishes a mapping relationship between FSM0 and bank0 by binding the address of bank0, so that the FSM0 tracks and manages the access status of bank0. At the same time, the state machine FSM0 is released. i with bank i The mapping relationship between them is used to obtain the state machine FSM of the unassigned bank. i If there is no state machine of an unallocated bank, the cmd0 is placed in the waiting queue to wait for the state machine of an unallocated bank; the established mapping relationship and the released mapping relationship are sent as dynamic mapping information to the dynamic mapping execution unit.

[0010] The dynamic mapping execution unit is used to manage the legal switching between the established mapping relationship and the released mapping relationship according to the dynamic mapping information.

[0011] The refresh management unit is used to manage the refresh operation of the bank after the mapping relationship is released.

[0012] In addition, the present invention also provides a non-transitory computer-readable storage medium, which stores at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by a processor to implement the above method.

[0013] In addition, the present invention also provides an electronic device including a processor and the above-mentioned non-transitory computer-readable storage medium.

[0014] The present invention has at least the following beneficial effects:

[0015] The system includes a command storage unit, a mapping management table unit, a mapping and demapping logic unit, a dynamic mapping execution unit, and a refresh management unit. It dynamically establishes a mapping relationship between a state machine and a bank and then releases a mapping relationship, so that the target bank accessed by a command in the memory controller can always be assigned a corresponding state machine. The number of state machines does not need to increase linearly one-to-one with the increase in the number of banks, thereby reducing the area overhead caused by the surge in the number of state machines. The reduction in the number of state machines also improves the timing of the logic design, reduces complexity, and is easier to converge than the existing technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A flow chart of a dynamic mapping method for multi-bank access provided in the first embodiment of the present invention;

[0018] Figure 2 A flowchart of the steps of dynamic mapping provided in Example 1 of the present invention;

[0019] Figure 3 This is a schematic diagram of the structure of a dynamic mapping system for multi-bank access provided by the second embodiment of the present invention. DETAILED DESCRIPTION

[0020] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.

[0021] See also Figure 1 , which shows a dynamic mapping method for multi-bank access, the method comprising the following steps:

[0022] S100, parsing the access request command cmd0 to obtain the address of the target memory bank bank0 to be accessed.

[0023] The dynamic mapping method is applicable to a memory controller.

[0024] The access request command carries the bank address and command type, along with the timing parameters specified for each memory type. Command types, such as ACTIVATE, READ, WRITE, and PRECHARGE, instruct the memory controller to execute the corresponding operation sequence. Timing parameters define the minimum number of cycles required between commands to ensure correct execution.

[0025] A bank is an independent storage area in memory that can independently read and write data. A memory can contain multiple banks.

[0026] S200 , if the number of state machines currently allocated to the memory bank bank is greater than a preset allocation threshold, a mapping relationship between the bank0 and the target state machine FSM0 is established through dynamic mapping.

[0027] The state machine has multiple states, each of which represents a different stage or preparation of the bank operation. For example, the "idle" state may indicate waiting for a new command.

[0028] The state machine in the memory controller manages and controls the complex timing of memory accesses, ensuring that all operations adhere to the strict timing requirements of the memory chips. The memory controller first receives an access request command, cmd0, from the CPU and parses it to determine the command type and target bank. Based on the parsed command type and current state, the memory controller directs the state machine to transition to the appropriate state. Based on the command type and current state parsed by the memory controller, the state machine generates specific control signals, such as row address strobe (RAS), column address strobe (CAS), and write enable (WE), that direct the bank to perform various operations, such as read, write, refresh, and precharge. Once the operation is complete, the state machine transitions to the next appropriate state based on the operation results and any new commands received.

[0029] The mapping relationship is a one-to-one mapping relationship between a bank and a state machine. This mapping relationship is not fixed. After the mapping relationship between a state machine and a bank is removed, the mapping relationship between the state machine and other banks can be re-established.

[0030] See also Figure 2 , further, the step of dynamic mapping includes:

[0031] S210, if there is currently a state machine with an unassigned bank, an unassigned bank state machine FSM0 is assigned to the bank0, and the FSM0 establishes a mapping relationship between FSM0 and the bank0 by binding the address of the bank0, so that the FSM0 tracks and manages the access status of the bank0; at the same time, the state machine FSM0 is released i with bank i The mapping relationship between them is used to obtain the state machine FSM of the unassigned bank. i .

[0032] The state machine with no bank assigned means that the state machine has not established a mapping relationship with any bank in the memory and is not occupied.

[0033] It should be noted that when the number of state machines in allocated banks is greater than the allocation threshold, a small number of state machines in unallocated banks may also exist in the memory controller.

[0034] As an example, when the total number of state machines in the memory controller is 10, the total number of banks in the memory is 64, and the preset allocation threshold is 7. When the number of allocated state machines is 8, there may be two state machines left in the system and one state machine can be allocated to bank 0.

[0035] To ensure reusable state machines within the memory controller, when a state machine is consumed, the memory controller attempts to unmap the pair, releasing the corresponding state machine for use in subsequent access requests. This dynamic mapping eliminates the need for a linear one-to-one increase in the number of state machines as the number of banks increases, reducing the area overhead associated with a surge in the number of state machines. This reduction in the number of state machines also improves logic design timing.

[0036] As a preferred embodiment, in S210, the release state machine FSM i with bank i The demapping conditions satisfied by the mapping relationship between the two include: when the FSM i An access request command is detected that hits an activated bank. i When FSM is not released i with bank i The mapping relationship between them; until the current continuous access ends, the FSM is released i with bank i When a bank has been hit, maintaining the current mapping relationship can reduce state transition time and reallocation overhead, directly speeding up the execution of subsequent commands and improving access efficiency.

[0037] As a preferred embodiment, in S210, the release state machine FSM i with bank i The demapping conditions satisfied by the mapping relationship between the two also include: when there is a command in the command queue that is about to time out, and the target memory bank accessed by the command that is about to time out is bank i , without releasing the FSM i with bank i The mapping relationship between them; until there is no access to the bank in the queue i After the command is about to time out, release the FSM i with bank iBy prioritizing commands that are about to time out, we can effectively reduce the overall execution time and waiting time of tasks, improving the system's response speed to external requests or internal scheduling. This prevents command timeouts and reduces the need for error handling and retransmissions caused by timeouts, thereby reducing the waste of system resources.

[0038] Optionally, the commands in the command queue have a timeout tag, which is used to count the remaining time of the current command. Other methods for marking commands that are about to time out fall within the scope of protection of the present invention.

[0039] As a preferred embodiment, in S210, the release state machine FSM i with bank i The mapping relationship between the two also satisfies the demapping conditions: if bank i Can be interleaved with other commands in the command queue, then the FSM is not released i with bank i The interleaving operation can improve the processing efficiency of commands, so the interleaving operation needs to be considered before demapping to improve processing efficiency.

[0040] As a preferred embodiment, the method further includes: S10, obtaining a new command, and when the priority of an existing command in the command queue is higher than the new command, adding the new command to the waiting queue. That is, if the priority of the new command is lower than that of the existing command, the command with the higher priority is processed first.

[0041] It should be noted that, ideally, the demapping speed is equal to the remapping speed, so that the memory controller reaches a balanced state. However, due to the release of the state machine FSM i with bank i The mapping relationship between them is subject to the restrictions of the demapping conditions. Therefore, it may happen that: a state machine FSM0 of an unassigned bank is assigned to bank0, but the current mapping relationship cannot be released due to the restrictions of the demapping conditions. As a result, no mapping relationship is released, that is, the demapping speed is slower than the remapping speed.

[0042] S220: If there is no state machine with an unallocated bank currently, the cmd0 is placed in a waiting queue to wait for a state machine with an unallocated bank.

[0043] As a preferred embodiment, S220 further includes:

[0044] S221, when there is an unassigned bank state machine FSM j When a candidate access request command cmd is taken out from the waiting queue w,j .

[0045] S222, obtaining the cmd w,j The address of the target bank.

[0046] S223, the address of the target bank is compared with the FSM j Establish a mapping relationship between them.

[0047] As a preferred embodiment, in S221, the cmd is taken out from the waiting queue. w,j Follow the efficiency priority principle. The efficiency priority principle means that when scheduling tasks or allocating resources, tasks that can generate the greatest efficiency or benefits will be given a higher execution priority.

[0048] Optionally, the effectiveness priority principle can be a command priority principle or an efficiency priority principle. The task priority principle sets the priority of tasks based on preset criteria such as their urgency and importance, ensuring that critical or high-priority commands are executed first. The efficiency priority principle is based on how to schedule tasks to achieve the highest efficiency in resource utilization, that is, prioritizing those commands that can be completed with the least resource consumption or the shortest time, thereby improving the overall work efficiency of the system.

[0049] In summary, the first embodiment of the present invention provides a dynamic mapping method for multi-bank access, which obtains the address of the target memory bank bank0 by parsing the access request command cmd0; if the number of state machines of the currently allocated memory bank bank is greater than the preset allocation threshold, a mapping relationship between the bank0 and the target state machine FSM0 is established through dynamic mapping. The steps of dynamic mapping include: if there is a state machine of an unallocated bank, an unallocated bank state machine FSM0 is allocated to the bank0, and a mapping relationship between the FSM0 and the bank0 is established; at the same time, the state machine FSM0 is released. i with bank i The mapping relationship between them is used to obtain the state machine FSM of the unassigned bank. i If no state machine in an unassigned bank exists, cmd0 is placed in a waiting queue, waiting for a state machine in an unassigned bank. Dynamic mapping eliminates the need for a linear one-to-one increase in the number of state machines as the number of banks increases, reducing the area overhead caused by a surge in the number of state machines. This reduction in the number of state machines also improves the timing of the logic design.

[0050] Embodiment 1 of the present invention also provides a non-transitory computer-readable storage medium, which can be set in an electronic device to store at least one instruction or at least one program related to implementing a method in the method embodiment. The at least one instruction or the at least one program is loaded and executed by the processor to implement the method provided in the above embodiment.

[0051] Embodiment 1 of the present invention further provides an electronic device, including a processor and the aforementioned non-transitory computer-readable storage medium.

[0052] Embodiment 1 of the present invention further provides a computer program product, which includes program code. When the program product is run on an electronic device, the program code is used to enable the electronic device to execute the steps of the method according to various exemplary embodiments of the present invention described above in this specification.

[0053] Example 2

[0054] A second embodiment of the present invention provides a multi-bank access dynamic mapping system, which includes a command storage unit, a mapping management table unit, a mapping / demapping logic unit, a dynamic mapping execution unit, and a refresh management unit.

[0055] Furthermore, the command storage unit is used to store a command queue and a waiting queue, and the commands in the command queue carry the address of the target memory bank.

[0056] It should be noted that the command queue and waiting queue in the first embodiment are also applicable to the second embodiment and will not be described in detail.

[0057] The address of the target memory bank is the same as that in the first embodiment and will not be described in detail.

[0058] Furthermore, the mapping management table unit is used to record and manage the mapping relationship between the state machine and the memory bank.

[0059] The mapping management table records the current mapping relationships in the memory controller. Each mapping relationship is a mapping relationship between a state machine and a bank. The mapping management table synchronizes the status of each bank in the current mapping relationship with the dynamic mapping execution unit and the refresh management unit. If an existing mapping relationship is subsequently terminated and a new mapping relationship is reestablished, the new mapping relationship is also synchronized to the mapping management table in a timely manner.

[0060] Furthermore, a mapping / demapping logic unit is configured to obtain an access request command cmd0 from the command queue, and if the number of mapping relationships in the mapping management table unit is greater than a preset allocation threshold, determine whether there is a state machine with an unallocated bank. If so, allocate an unallocated bank state machine FSM0 to the target memory bank bank0 of cmd0, and establish a mapping relationship between FSM0 and bank0 by binding the address of bank0, so that FSM0 tracks and manages the access status of bank0; and at the same time, release the state machine FSM0. i with bank i The mapping relationship between them is used to obtain the state machine FSM of the unassigned bank. i If there is no state machine of an unallocated bank, the cmd0 is placed in the waiting queue to wait for the state machine of an unallocated bank; the established mapping relationship and the released mapping relationship are sent as dynamic mapping information to the dynamic mapping execution unit.

[0061] The function of the mapping and demapping logic unit is the same as that of S200 in the first embodiment, and will not be described in detail.

[0062] As a preferred embodiment, the release state machine FSM i with bank i The demapping conditions satisfied by the mapping relationship between the two include: when the FSM i An access request is detected hitting an activated bank. i When FSM is not released i with bank i The mapping relationship between them; until the current continuous access ends, the FSM is released i with bank i The mapping relationship between them.

[0063] As a preferred embodiment, the release state machine FSM i with bank i The demapping conditions satisfied by the mapping relationship between the two also include: when there is a command in the command queue that is about to time out, and the target memory bank accessed by the command that is about to time out is bank i , without releasing the FSM i with bank i The mapping relationship between them; until there is no access to the bank in the queue i After the command is about to time out, release the FSM i with bank i The mapping relationship between them.

[0064] As a preferred embodiment, the release state machine FSMi with bank i The mapping relationship between the two also satisfies the demapping conditions: if bank i Can be interleaved with other commands in the command queue, then the FSM is not released i with bank i The mapping relationship between them.

[0065] Furthermore, the dynamic mapping execution unit is used to manage the legal switching between the established mapping relationship and the released mapping relationship according to the dynamic mapping information.

[0066] Legal switching refers to a seamless transition process that flexibly and efficiently reallocates resources and control logic while ensuring data integrity and system stability, adapting to dynamic task demands. Examples include state consistency checks, state machine synchronization, timing and protocol compliance, and resource release and allocation. State consistency checks verify that the current system state allows such an operation before attempting a mapping switch. They ensure that no read or write operations are in progress or that critical states (such as refresh cycles) are in progress to prevent data loss or corruption. State machine synchronization ensures that the state of the state machine is consistent with the new mapping and accurately reflects the current bank activity. This includes updating the state machine's internal state, control signals, and timing parameters. Timing and protocol compliance ensures that mapping switches strictly adhere to the timing specifications of the memory controller and DRAM, including but not limited to precharge cycles and delays between activation and read and write commands, to avoid errors caused by timing violations. Resource release and allocation releases all associated hardware resources, such as control lines, address buses, and data buses, before removing a mapping. These resources are then efficiently reallocated when the new mapping is established.

[0067] As a preferred embodiment, the dynamic mapping execution unit is further configured to synchronize the mapping relationship established after execution to the mapping management table unit, and synchronize the mapping relationship released after execution to the refresh management unit. Synchronizing the established mapping relationship to the mapping management table unit enables it to more efficiently schedule memory resources, allocate appropriate banks to new tasks or processes, and improve the utilization efficiency of system resources. Synchronizing the released mapping relationship to the refresh management unit can reduce operational errors and system failures that may be caused by information asynchrony.

[0068] As a preferred embodiment, the dynamic mapping execution unit is further configured to synchronize the state information of the state machine for the unmapping relationship to the refresh management unit. This allows the refresh management unit to accurately determine which banks have been unmapped based on the latest state information, thereby executing refresh operations only on valid banks that require maintenance, avoiding invalid processing of unmapped or invalid banks and improving the efficiency and accuracy of refresh operations.

[0069] Furthermore, the refresh management unit is used to manage the refresh operation of the bank after the mapping relationship is released.

[0070] The data stored in the unmapped bank remains valid and must be maintained for future remapping and reuse. Without refresh, the data stored in the bank may become unreliable due to charge loss, ultimately leading to data errors or even loss.

[0071] As a preferred embodiment, the system further includes an access management unit configured to categorize access request commands based on the current state of the state machine, assign tag information, and then send the categorized access request commands to the command storage unit. It should be noted that the access management unit categorizes access commands based on the current state of the bank and command type, and assigns specific tags to each type of command. This tag information helps the command storage unit more efficiently parse and execute commands, while also facilitating subsequent management and optimization, such as prioritizing high-priority commands.

[0072] Optionally, the label information is a priority label, an operation type label, a timeout label, etc. Other label information also falls within the protection scope of the present invention.

[0073] As a preferred embodiment, the access management unit is further configured to obtain a new command and, when the priority of an existing command in the command queue is higher than that of the new command, add the new command to the waiting queue. By giving priority to high-priority tasks, limited system resources can be utilized more efficiently.

[0074] In summary, the second embodiment of the present invention provides a dynamic mapping system for multi-bank access, which includes a command storage unit, a mapping management table unit, a mapping and demapping logic unit, a dynamic mapping execution unit, and a refresh management unit. The system dynamically establishes a mapping relationship between a state machine and a bank, and then releases a mapping relationship, so that the target bank accessed by a command in the memory controller can always be assigned a corresponding state machine. The number of state machines does not need to increase linearly one-to-one with the increase in the number of banks, thereby reducing the area overhead caused by the surge in the number of state machines. The reduction in the number of state machines also improves the timing of the logic design.

[0075] Embodiment 2 of the present invention also provides a non-transitory computer-readable storage medium, which can be set in an electronic device to store at least one instruction or at least one program related to implementing a method in the method embodiment. The at least one instruction or the at least one program is loaded and executed by the processor to implement the method provided in the above embodiment.

[0076] A second embodiment of the present invention further provides an electronic device, including a processor and the aforementioned non-transitory computer-readable storage medium.

[0077] The second embodiment of the present invention further provides a computer program product, which includes program code. When the program product is run on an electronic device, the program code is used to enable the electronic device to execute the steps of the method according to various exemplary embodiments of the present invention described above in this specification.

[0078] Those skilled in the art will clearly understand that for the sake of convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0079] Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. Dynamic mapping system for multi-bank access, characterized by: The system comprises: A command storage unit, used to store a command queue and a waiting queue, wherein the commands in the command queue carry a unique identifier of a target memory bank; The mapping management table unit is used to record and manage the mapping relationship between the state machine and the memory bank; A mapping and demapping logic unit is configured to obtain an access request command cmd0 from the command queue. If the number of mapping relationships in the mapping management table unit is greater than a preset allocation threshold, it is determined whether there is a state machine with an unallocated bank. If so, an unallocated bank state machine FSM0 is allocated to the target memory bank bank0 of cmd0. The FSM0 establishes a mapping relationship between FSM0 and bank0 by binding the address of bank0, so that the FSM0 tracks and manages the access status of bank0. At the same time, the state machine FSM0 is released. i with bank i The mapping relationship between them is used to obtain the state machine FSM of the unassigned bank. i If there is no state machine for an unallocated bank, the cmd0 is placed in the waiting queue to wait for the state machine for an unallocated bank; the established mapping relationship and the released mapping relationship are sent to the dynamic mapping execution unit as dynamic mapping information; A dynamic mapping execution unit, configured to manage legal switching between established mapping relationships and released mapping relationships based on the dynamic mapping information; legal switching refers to reallocating resources and control logic while ensuring data integrity and system stability; The refresh management unit is used to manage the refresh operation of the bank after the mapping relationship is released.

2. The system according to claim 1, wherein: The system further comprises: The access management unit mainly classifies and manages the types of access commands according to the mapping status of the bank state machine, assigns tag information, and then sends it to the command storage unit.

3. The system according to claim 1, wherein: The dynamic mapping execution unit is further configured to synchronize the established mapping relationship after execution to the mapping management table unit, and synchronize the released mapping relationship after execution to the refresh management unit.

4. The system according to claim 1, wherein: The dynamic mapping execution unit is further configured to synchronize the state information of the state machine whose mapping relationship has been released to the refresh management unit.

5. The system according to claim 1, wherein: The release state machine FSM i with bank i The demapping conditions satisfied by the mapping relationship between include: When the FSM i An access request is detected hitting an activated bank. i When FSM is not released i with bank i The mapping relationship between them; until the current continuous access ends, the FSM is released i with bank i The mapping relationship between them.

6. The system according to claim 1, wherein: The release state machine FSM i with bank i The demapping conditions satisfied by the mapping relationship between them also include: When there is a command in the command queue that is about to time out, and the target memory bank accessed by the command that is about to time out is bank i , without releasing the FSM i with bank i The mapping relationship between them; until there is no access to the bank in the queue i After the command is about to time out, release the FSM i with bank i The mapping relationship between them.

7. The system according to claim 1, wherein: The release state machine FSM i with bank i The demapping conditions satisfied by the mapping relationship between them also include: If the bank i Can be interleaved with other commands in the command queue, then the FSM is not released i with bank i The mapping relationship between them.

8. The system according to claim 2, wherein: The access management unit is further configured to obtain a new command, and when the priority of an existing command in the command queue is higher than that of the new command, add the new command to the waiting queue.

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