PD controller and PD adapter

Abstract

The application discloses a PD controller and a PD adapter. The PD controller comprises a voltage sampling branch, a voltage difference branch, a sample-and-hold branch, a level conversion branch, a comparison branch and a control branch. The voltage sampling branch outputs a third voltage which is N times of a first voltage and a fourth voltage which is N times of a second voltage. The voltage difference branch outputs a fifth voltage based on a difference between the third voltage and the fourth voltage. The sample-and-hold branch samples and holds the fifth voltage. The level conversion branch increases the third voltage and outputs a sixth voltage, and increases the fourth voltage and outputs a seventh voltage. The comparison branch outputs a comparison result of the sixth voltage and the seventh voltage. The control branch outputs a sampling signal or a holding signal based on the comparison result, and determines primary side information of a flyback power supply based on the fifth voltage and the comparison result. In this way, the primary side information of the flyback power supply can be accurately and effectively detected, so that functions such as short-circuit protection and overcurrent protection can be realized, and the safety requirements can be met.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of electronic circuit, in particular to a PD controller and a PD adapter. BACKGROUND

[0002] USB Power Delivery (PD) protocol is a power delivery protocol promoted by USB standardization organization. Due to the wide use of the protocol and the popularity of gallium nitride (GaN) material technology, a USB PD adapter based on GaN has more compatibility and a more portable form.

[0003] A USB PD controller and a flyback power supply are provided in the USB PD adapter. With the continuous increase of power transmission power, the USB PD controller is required to accurately and effectively detect the primary side information of the flyback power supply, such as bus voltage, switching frequency, on duration and off duration of the switch connected to the primary side in the flyback power supply, and to monitor the transmission power of the system in real time according to the information, so as to realize system short circuit protection, overcurrent protection and other functions, thereby maintaining the safety of the USB PD adapter.

[0004] However, the current USB PD controller cannot detect the above information, thereby failing to meet the safety requirements. SUMMARY

[0005] Embodiments of the present application provide a PD controller and a PD adapter, which can accurately and effectively detect the primary side information of the flyback power supply, thereby realizing short circuit protection, overcurrent protection and other functions, and meeting the safety requirements.

[0006] In a first aspect, the embodiments of the present application provide a PD controller applied to a flyback power supply, wherein the flyback power supply includes a flyback transformer, a freewheeling unit, a first switch and a second switch, the opposite name end of the primary side of the flyback transformer is connected to the positive pole of an input power supply, the same name end of the primary side of the flyback transformer is grounded through the first switch, the same name end of the secondary side of the flyback transformer outputs a first voltage through the freewheeling unit and the second switch, and the PD controller includes:

[0007] a voltage sampling branch connected to the same name end of the secondary side of the flyback transformer and the second switch, configured to output a third voltage N times of the first voltage and output a fourth voltage N times of a second voltage of the same name end of the secondary side of the flyback transformer, wherein N is greater than 0 and less than 1;

[0008] a voltage difference branch connected with the voltage sampling branch, configured to output a fifth voltage based on a difference between the third voltage and the fourth voltage;

[0009] a sample-and-hold branch connected with the voltage difference branch, configured to sample the fifth voltage in response to a sampling signal and hold the sampled fifth voltage in response to a holding signal;

[0010] a level conversion branch connected with the voltage sampling branch, configured to increase the third voltage by a preset voltage value and output a sixth voltage, and increase the fourth voltage by the preset voltage value and output a seventh voltage;

[0011] a comparison branch connected with the level conversion branch, configured to output a comparison result between the sixth voltage and the seventh voltage;

[0012] a control branch connected with the comparison branch and the sample-and-hold branch respectively, configured to output the sampling signal when the comparison result switches from a first level to a second level, and output the holding signal when the comparison result switches from the second level to the first level, and determine primary side information of the flyback power supply based on the sampled and held fifth voltage and the comparison result, wherein the comparison result is the first level when the sixth voltage is less than or equal to the seventh voltage, and the comparison result is the second level when the sixth voltage is greater than the seventh voltage, and the primary side information of the flyback power supply includes an effective value of the input power supply and a switching frequency, a conduction time and an off time of the first switch tube.

[0013] In one or more embodiments, the control branch is further configured to:

[0014] delay for a preset time length when the comparison result switches from the first level to the second level, and output the sampling signal at the end of the preset time length;

[0015] delay for the preset time length when the comparison result switches from the second level to the first level, and output the holding signal at the end of the preset time length.

[0016] In one or more embodiments, the PD controller further comprises:

[0017] an analog-to-digital converter connected between the sample-and-hold branch and the control branch, configured to convert the sampled and held fifth voltage into a digital signal, and input the digital signal to the control branch, so that the control branch determines the primary side information of the flyback power supply based on the digital signal.

[0018] In one or more embodiments, the voltage sampling branch comprises:

[0019] The first voltage dividing unit is connected with the second switch tube and configured to output the third voltage after dividing the first voltage, and the dividing ratio is N.

[0020] The second voltage dividing unit is connected with the same end of the secondary side of the flyback transformer and configured to output the fourth voltage after dividing the second voltage, and the dividing ratio is N.

[0021] In one or more embodiments, the first voltage dividing unit comprises a first resistor and a second resistor, and the second voltage dividing unit comprises a third resistor and a fourth resistor.

[0022] The first resistor and the second resistor are connected in series between the second end of the second switch tube and the ground, and the third resistor and the fourth resistor are connected in series between the same end of the secondary side of the flyback transformer and the ground.

[0023] In one or more embodiments, the voltage difference branch comprises a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, and a first operational amplifier.

[0024] The fifth resistor and the sixth resistor are connected in series between one end outputting the third voltage of the voltage sampling branch and the ground, the connection point between the fifth resistor and the sixth resistor is connected with the first input end of the first operational amplifier, the seventh resistor and the eighth resistor are connected in series between one end outputting the fourth voltage of the voltage sampling branch and the output end of the first operational amplifier, the connection point between the seventh resistor and the eighth resistor is connected with the second input end of the first operational amplifier, and the output end of the first operational amplifier is connected with the sample and hold branch.

[0025] In one or more embodiments, the sample and hold branch comprises a first transmission gate, a second transmission gate, a first capacitor, a second capacitor, and a buffer.

[0026] The input end of the first transmission gate is connected with the voltage difference branch, the output end of the first transmission gate is respectively connected with the input end of the second transmission gate and the first end of the first capacitor, the control end of the first transmission gate is connected with the control branch, the output end of the second transmission gate is respectively connected with the first end of the second capacitor and the input end of the buffer, the control end of the second transmission gate is connected with the control branch, the second end of the first capacitor and the second end of the second capacitor are grounded, and the output end of the buffer is connected with the control branch.

[0027] In one or more embodiments, the voltage conversion branch comprises a first transistor, a second transistor, a ninth resistor, a tenth resistor, a first current source and a second current source;

[0028] A first end of the first transistor is connected to an end of the voltage sampling branch outputting the third voltage, a second end of the first transistor is connected to a positive pole of the first current source through the ninth resistor, a third end of the first transistor and a third end of the second transistor are both grounded, a negative pole of the first current source is connected to a first power supply, a positive pole of the first current source is connected to the comparison branch, a second end of the second transistor is connected to a positive pole of the second current source through the tenth resistor, a third end of the second transistor is grounded, a negative pole of the second current source is connected to the first power supply, and a positive pole of the second current source is connected to the comparison branch.

[0029] In one or more embodiments, the comparison branch comprises a comparator;

[0030] A first input end of the comparator is connected to an end of the level conversion branch outputting the sixth voltage, a second input end of the comparator is connected to an end of the level conversion branch outputting the seventh voltage, and an output end of the comparator is connected to the control branch.

[0031] In a second aspect, the embodiments of the present application provide a PD adapter, comprising a flyback power supply and a PD controller as described above.

[0032] The beneficial effects of the present application are: the PD controller of the embodiment of the present application comprises a voltage sampling branch, a voltage difference branch, a sample and hold branch, a level conversion branch, a comparison branch and a control branch. The voltage sampling branch is configured to output a third voltage which is N times of a first voltage, and output a fourth voltage which is N times of a second voltage of the same name end of the secondary side of the flyback transformer, wherein N is greater than 0 and less than 1. The voltage difference branch is configured to output a fifth voltage based on the difference between the third voltage and the fourth voltage. The sample and hold branch is configured to sample the fifth voltage in response to a sampling signal, and hold the sampled fifth voltage in response to a holding signal. The level conversion branch is configured to increase the third voltage by a preset voltage value and output a sixth voltage, and increase the fourth voltage by the preset voltage value and output a seventh voltage. The comparison branch is configured to output a comparison result between the sixth voltage and the seventh voltage. The control branch is configured to output the sampling signal when the comparison result switches from a first level to a second level, and output the holding signal when the comparison result switches from the second level to the first level, and determine the primary side information of the flyback power supply based on the sampled and held fifth voltage and the comparison result, wherein the comparison result is the first level when the sixth voltage is less than or equal to the seventh voltage, and the comparison result is the second level when the sixth voltage is greater than the seventh voltage, and the primary side information of the flyback power supply includes the effective value of the input power supply and the switching frequency, the conduction time and the off time of the first switch tube. Wherein, the effective value of the input power supply can be obtained based on the fifth voltage, and the switching frequency, the conduction time and the off time of the first switch tube can be determined based on the eighth voltage. It can be seen that through the above process, the primary side information of the flyback power supply can be accurately and effectively detected, so that the functions of short circuit protection, overcurrent protection and the like can be realized, and the safety requirements can be met. BRIEF DESCRIPTION OF DRAWINGS

[0033] One or more embodiments are illustrated by way of example in the drawings in which elements of the same or like reference label represent similar elements or features. It should be noted that the reference labels used in the drawings are by way of illustration only and should not be construed in a limiting sense.

[0034] Figure 1 is a schematic diagram of a constituent block diagram of a PD adapter provided by an embodiment of the present application;

[0035] Figure 2 is a schematic diagram of a circuit structure of a flyback power supply provided by an embodiment of the present application;

[0036] Figure 3 is Figure 2 a schematic diagram of signals in the circuit structure of the flyback power supply shown;

[0037] Figure 4 is a schematic diagram of a constituent block diagram of a PD controller provided by an embodiment of the present application Figure 1 ;

[0038] Figure 5 is a schematic diagram of a constituent block diagram of a PD controller provided by embodiments of the present application Figure 2 ;

[0039] Figure 6 is a circuit structure corresponding to the constituent block diagram of the PD controller shown in Figure 5 ;

[0040] Figure 7 is a schematic diagram of each signal in the circuit structure of the PD controller shown in Figure 6 . DETAILED DESCRIPTION

[0041] In order to make the objects, technical solutions and advantages of embodiments of the present application clearer, the technical solutions in embodiments of the present application will be described clearly and in detail below with reference to the drawings in embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.

[0042] It should be noted that when one element is described as being “connected” to another element, it can be directly connected to the other element or one or more intermediate elements can be present therebetween.

[0043] In addition, the technical features involved in each of the embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0044] Please refer to Figure 1 , Figure 1 is a schematic diagram of a constituent block diagram of a PD adapter provided by embodiments of the present application. As shown in Figure 1 , the PD adapter 1000 includes the PD controller 100 in any embodiment of the present application and the flyback power supply 200.

[0045] The PD controller 100 is connected with the flyback power supply 200. The PD controller 100 is configured to control the devices (such as the switching tube) in the flyback power supply 200. The PD controller 100 is also configured to acquire various information in the flyback power supply 200, such as the switching frequency, the on duration and the off duration of the switching tube in the flyback power supply 200.

[0046] Please refer to Figure 2 , Figure 2 exemplarily shows a circuit structure of the flyback power supply 200. As shown in Figure 2 , the flyback power supply 200 includes the flyback transformer T1, the freewheeling unit 201, the first switching tube Q1 and the second switching tube Q2.

[0047] The opposite end of the primary side of the flyback transformer T1 is connected to the positive pole of the input power supply VIN, and the negative pole of the input power supply VIN is grounded. The same end of the primary side of the flyback transformer T1 is connected to the third end of the first switch tube Q1 through the ground GND, that is, the same end of the primary side of the flyback transformer T1 is connected to the third end of the first switch tube Q1, and the second end of the first switch tube Q1 is grounded GND. The first end of the first switch tube Q1 inputs a pulse width modulation (PWM) signal F1, so as to be alternately turned on and turned off under the action of the pulse width modulation signal F1. The same end of the secondary side of the flyback transformer T1 is connected to the first end of the freewheeling unit 201 and outputs the first voltage V1, that is, the same end of the secondary side of the flyback transformer T1 is connected to the first end of the freewheeling unit 201, the second end of the freewheeling unit 201 is connected to the third end of the second switch tube Q2, and the second end of the second switch tube Q2 is the positive pole of the first voltage V1, that is, the second end of the second switch tube Q2 outputs the first voltage V1. The first end of the second switch tube Q2 is connected to the PD controller 100, so as to be turned on or turned off under the control of the signal output by the PD controller 100.

[0048] In this embodiment, the PD controller 100 is also connected to the same end of the secondary side of the flyback transformer T1 and the second end of the second switch tube Q2 respectively, so as to obtain the second voltage V2 and the first voltage V1 respectively. Then, the PD controller 100 can determine various information in the flyback power supply 200 based on the first voltage V1 and the second voltage V2, such as the effective value of the input power supply VIN (that is, the effective value of the voltage of the input power supply VIN), the switching frequency, the on duration and the off duration of the first switch tube Q1 and other information, and based on the obtained signal, the functions such as short circuit protection and overcurrent protection can be realized to meet the safety requirements, and the specific implementation process will be described later. The safety requirements refer to the safety standards and specifications that must be followed when designing, manufacturing and using various products. These standards ensure that products do not harm users in normal use and can reduce potential safety risks.

[0049] In this embodiment, the freewheeling unit 201 includes a first diode D1, the anode of the first diode D1 is connected to the same end of the secondary side of the flyback transformer T1, and the cathode of the first diode D1 is connected to the third end of the second switch tube Q2. In other embodiments, the freewheeling unit 201 can also include a switch tube (such as an NMOS tube), which is controlled by the PD controller 100 and turned on when freewheeling is needed, and turned off when freewheeling is not needed.

[0050] In this embodiment, the flyback power supply 200 further comprises a first filter capacitor CA1 and a second filter capacitor CA2 for filtering. The first filter capacitor CA1 is connected between the positive and negative poles of the input power supply VIN, and the second filter capacitor CA2 is connected between the third terminal of the second switch tube Q2 and the ground GND.

[0051] In this embodiment, the first and second switch tubes Q1 and Q2 are MOS tubes. The gate of the MOS tube is the first terminal of the first and second switch tubes Q1 and Q2, the source of the MOS tube is the second terminal of the first and second switch tubes Q1 and Q2, and the drain of the MOS tube is the third terminal of the first and second switch tubes Q1 and Q2.

[0052] In addition, the first and second switch tubes Q1 and Q2 can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate-commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled rectifier (SCR) device, a junction gate field-effect transistor (JFET) device, a MOS-controlled thyristor (MCT) device, etc.

[0053] The principle of the circuit structure of the flyback power supply 200 shown in Figure 3 is described below. In this embodiment, the PD controller 100 controls the second switch tube Q2 to remain conductive. Figure 2 The schematic diagram of the parameters in the flyback power supply 200 when the flyback power supply 200 has operated for a certain period and is in a stable state is shown. Figure 3 As shown in the figure, the abscissa is time, with the unit of s (seconds); the ordinate is voltage, with the unit of v (volts). The parameters in the flyback power supply 200 include the first voltage V1, the second voltage V2, and the pulse width modulation signal F1. In this embodiment, the PD controller 100 controls the second switch tube Q2 to remain conductive. Figure 3 As shown in the figure, when the pulse width modulation signal F1 is high, the first switch tube Q1 is conductive (for example, the first switch tube Q1 is conductive in the time period TON), the input voltage VIN is applied to the primary side of the flyback transformer T1, and the primary side of the flyback transformer T1 is charged, and the energy is stored in the magnetic core of the flyback transformer T1 in the form of magnetic energy. Since the same name terminals of the primary and secondary sides of the flyback transformer T1 are reversed, the first diode D1 is reverse biased at this time, and the voltage of the same name terminal of the secondary side of the flyback transformer T1 is -VIN*(NP / NS). NP / NS is the turns ratio of the primary and secondary sides of the flyback transformer T1, and VIN is the effective value of the input power supply VIN.

[0054] Figure 3 Figure 2

[0055] ​​​When the pulse width modulation signal F1 is low, the first switch tube Q1 is turned off (for example, the first switch tube Q1 is turned off in the time period TOFF), the primary side of the flyback transformer T1 is open, the first diode D1 is forward biased, and the energy stored in the magnetic core of the flyback transformer T1 is transmitted to the load through the second switch tube Q2 via the first diode D1. At this time, the voltage of the same name end of the secondary side of the flyback transformer T1 is V1+VD1, and VD1 is the on-voltage drop of the first diode D1.

[0056] It can be seen that the flyback power supply 200 includes the effective value of the input power Vin, the switching frequency of the first switch tube Q1, the on duration and the off duration, and the like. These information are all information related to the primary side of the flyback transformer T1, for example, the input power Vin is the power input to the primary side, and the first switch tube Q1 is the switch tube connected to the primary side, so it is called primary side information. With the continuous improvement of power transmission power, based on the requirements of safety regulations, the PD controller needs to accurately and effectively detect the above information, and also needs to be able to realize short-circuit protection, over-current protection and the like according to these information, so as to improve the use safety of the PD adapter. Based on this, the PD controller provided by the embodiments of the present application sets a corresponding circuit structure to realize the detection of the above information.

[0057] Please refer to Figure 4 , Figure 4 for the structure schematic diagram of the composition block diagram of the PD controller provided by the embodiments of the present application. The PD controller is applied to a flyback power supply. The flyback power supply includes a flyback transformer, a freewheeling unit, a first switch tube and a second switch tube. The opposite name end of the primary side of the flyback transformer is connected with the positive pole of an input power supply, the same name end of the primary side of the flyback transformer is grounded through the first switch tube, and the same name end of the secondary side of the flyback transformer outputs a first voltage through the freewheeling unit and the second switch tube. The specific implementation process of the flyback power supply can be referred to the description of the flyback power supply Figure 2 and Figure 3 . Here, the description is not repeated.

[0058] As shown in Figure 4 , the PD controller includes a voltage sampling branch 101, a voltage difference branch 102, a sample and hold branch 103, a level conversion branch 104, a comparison branch 105 and a control branch 106. In a specific embodiment, the control branch 106 can adopt a microcontroller unit (MCU).

[0059] The voltage sampling branch 103 is connected with the same end of the secondary side of the flyback transformer T1 and the second switch tube Q2, the voltage difference branch 102 is connected with the voltage sampling branch 101, the sampling holding branch 103 is connected with the voltage difference branch 102, the level conversion branch 104 is connected with the voltage sampling branch 101, the comparison branch 105 is connected with the level conversion branch 104, and the control branch 105 is connected with the comparison branch 105 and the sampling holding branch 103.

[0060] Specifically, the first end of the voltage sampling branch 103 is connected with the same end of the secondary side of the flyback transformer T1 and inputs the second voltage V2. The second end of the voltage sampling branch 103 is connected with the second end of the second switch tube Q2 and inputs the first voltage V1. The first end of the voltage difference branch 102 is connected with the third end of the voltage sampling branch 101 and the first end of the level conversion branch 104. The second end of the voltage difference branch 102 is connected with the fourth end of the voltage sampling branch 101 and the second end of the level conversion branch 104. The third end of the voltage difference branch 102 is connected with the first end of the sampling holding branch 103. The second end of the sampling holding branch 103 is connected with the first end of the control branch 106. The second end of the control branch 106 is connected with the second end of the sampling holding branch 103 and outputs the sampling signal S1 to the second end of the sampling holding branch 103. The third end of the control branch 106 is connected with the third end of the sampling holding branch 103 and outputs the holding signal H1 to the second end of the sampling holding branch 103. The fourth end of the control branch 106 is connected with the first end of the comparison branch 105, the second end of the comparison branch 105 is connected with the third end of the level conversion branch 104, and the third end of the comparison branch 105 is connected with the fourth end of the level conversion branch 104.

[0061] Specifically, the voltage sampling branch 101 is configured to output a third voltage V3 which is N times of the first voltage VI, and output a fourth voltage V4 which is N times of the second voltage V2 of the same name end of the secondary side of the flyback transformer T1, where N is greater than 0 and less than 1. The voltage difference obtaining branch 102 is configured to output a fifth voltage V5 based on the difference between the third voltage V3 and the fourth voltage V4. The sample-and-hold branch 103 is configured to sample the fifth voltage V5 in response to the sampling signal SI, and hold the sampled fifth voltage V5 in response to the holding signal HI. The level conversion branch 104 is configured to increase the third voltage V3 by a preset voltage value and output a sixth voltage V6, and increase the fourth voltage V4 by the preset voltage value and output a seventh voltage V7. Wherein, the preset voltage value is a voltage value set in advance, which can be set based on the actual application scenario, and the embodiments of the present application do not make specific limitations thereto. The comparison branch 105 is configured to output a comparison result between the sixth voltage V6 and the seventh voltage V7. The control branch 106 is configured to output the sampling signal SI when the comparison result switches from a first level to a second level, and output the holding signal HI when the comparison result switches from the second level to the first level, wherein the first level and the second level are different levels, when the first level is a high level, the second level is a low level; when the first level is a low level, the second level is a high level. The control branch 106 is also configured to determine the information of the flyback power supply 200 based on the fifth voltage V5 after sampling and holding and the comparison result (i.e. the eighth voltage V8), the information of the flyback power supply 200 including the effective value of the input power VI N and the switching frequency, the on duration and the off duration of the first switch tube Q1. Wherein, the comparison result is the first level when the sixth voltage V6 is less than or equal to the seventh voltage V7, and the comparison result is the second level when the sixth voltage V6 is greater than the seventh voltage V7, in combination with the above description of the flyback power supply 200, it can be obtained that the time period when the sixth voltage V6 is greater than the seventh voltage V7 corresponds to the time period when the first switch tube Q1 is turned on, and the time period when the sixth voltage V6 is less than or equal to the seventh voltage V7 corresponds to the time period when the first switch tube Q1 is turned off. Further, it can be obtained that the control branch 106 can output the sampling signal SI when the first switch tube Q1 is turned on, and can output the holding signal HI when the first switch tube Q1 is turned off.

[0062] Through the above process, firstly, the switching frequency, the on duration and the off duration of the first switch Q1 can be determined based on the eighth voltage V8. Secondly, the difference between the third voltage V3 and the fourth voltage V4, i.e., the relationship between the third voltage V3 and the fourth voltage V4, can be obtained based on the fifth voltage V5, and then the relationship between the first voltage V1 and the second voltage V2 can be obtained. Since the relationship between the first voltage V1 and the second voltage V2 is determined, the relationship between the second voltage V2 and the effective value of the input power Vin when the first switch Q1 is on is also determined, and then the relationship between the first voltage V1 and the effective value of the input power Vin can be determined. Since the first voltage V1 is a constant voltage, the effective value of the input power Vin can be determined based on the relationship between the first voltage V1 and the effective value of the input power Vin. It can be seen that through the above process, the information of the flyback power supply 200 can be accurately and effectively detected, so that the functions such as short circuit protection and overcurrent protection can be realized, and the safety requirements can be met. Taking the short circuit protection as an example, a current detection circuit (usually realized by setting a detection resistor) is usually provided in the circuit to detect the current, and the current is fed back, and the on duration of the first switch Q1 is controlled in combination with the feedback. However, when the current detection circuit fails (such as the detection resistor is short-circuited) and cannot receive the related feedback, the on duration of the first switch Q1 will continue to increase. Therefore, by determining the on duration of the first switch Q1, when the on duration is greater than a preset duration threshold, it can be judged that there is a short circuit, and then the short circuit protection (for example, the first switch Q1 is kept off) can be realized.

[0063] In some embodiments, the control branch 106 is further configured to: delay for a preset duration when the comparison result switches from the first level to the second level, and output the sampling signal at the end of the preset duration; delay for a preset duration when the comparison result switches from the second level to the first level, and output the hold signal at the end of the preset duration.

[0064] The preset duration is a preset duration, which can be set based on the actual application scenario, and the embodiments of the present application do not make specific limitations thereto. By setting the preset duration, the anti-shake effect can be achieved to eliminate the influence of the false output of the comparison branch 105 caused by the resonance ripple of the second voltage V2, so that the sampling and holding circuit 103 is not mis-triggered, and the signal output by the sampling and holding circuit 103 is more accurate and stable.

[0065] In an embodiment, as shown in FIG. 1, the PD controller 100 further includes an analog-to-digital converter 107. Figure 5

[0066] ​The analog-to-digital converter 107 is connected between the sample-and-hold branch 103 and the control branch 106. The analog-to-digital converter 107 is configured to convert the fifth voltage V5 that has been sampled and held into a digital signal, and input the digital signal to the control branch 106, so that the control branch 106 determines information of the flyback power supply 200 based on the digital signal. The analog-to-digital converter (ADC) 107 is an electronic device that converts an analog signal that continuously changes into a digital signal.

[0067] Please refer to Figure 6 , Figure 6 Exemplarily shown is a circuit structure corresponding to the block diagram shown in Figure 5 . As shown in Figure 5 , the voltage sampling branch 101 includes a first voltage dividing unit 1011 and a second voltage dividing unit 1012.

[0068] The first voltage dividing unit 1011 is connected with the second end of the second switch tube Q2, inputs the first voltage V1, and is configured to output a third voltage V3 after dividing the first voltage V1, and the division ratio is N.

[0069] The second voltage dividing unit 1012 is connected with the same end of the secondary side of the flyback transformer T1, inputs the second voltage V2, and is configured to output a fourth voltage V4 after dividing the second voltage V2, and the division ratio is N.

[0070] In this embodiment, the first voltage dividing unit 1011 includes a first resistor R1 and a second resistor R2, and the second voltage dividing unit 1012 includes a third resistor R3 and a fourth resistor R4.

[0071] The first resistor R1 and the second resistor R2 are connected in series between the second end of the second switch tube Q2 and the ground GND, and the third resistor R3 and the fourth resistor R4 are connected in series between the same end of the secondary side of the flyback transformer T1 and the ground GND. R1 / (R1+R2)=R3 / (R3+R4)=N.

[0072] In this embodiment, the voltage difference branch 102 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a first operational amplifier U1.

[0073] The fifth resistor R5 and the sixth resistor R6 are connected in series between one end of the third voltage V3 output by the voltage sampling branch 101 and the ground GND, the connection point between the fifth resistor R5 and the sixth resistor R6 is connected to the first input terminal of the first operational amplifier U1, the seventh resistor R7 and the eighth resistor R8 are connected in series between one end of the fourth voltage V4 output by the voltage sampling branch 101 and the output terminal of the first operational amplifier U1, the connection point between the seventh resistor R7 and the eighth resistor R8 is connected to the second input terminal of the first operational amplifier U1, and the output terminal of the first operational amplifier U1 is connected to the sample-and-hold branch 103. In this embodiment, the first input terminal of the first operational amplifier U1 is taken as the non-inverting input terminal and the second input terminal is taken as the inverting input terminal.

[0074] In this embodiment, the sample-and-hold branch 103 includes the first transmission gate TG1, the second transmission gate TG2, the first capacitor C1, the second capacitor C2 and the buffer U3.

[0075] The input terminal of the first transmission gate TG1 is connected to the voltage difference branch 102, the output terminal of the first transmission gate TG1 is connected to the input terminal of the second transmission gate TG2 and the first terminal of the first capacitor C1 respectively, the control terminal of the first transmission gate TG1 is connected to the control branch 106, the output terminal of the second transmission gate TG2 is connected to the first terminal of the second capacitor C2 and the input terminal of the buffer U3 respectively, the control terminal of the second transmission gate TG2 is connected to the control branch 106, the second terminal of the first capacitor C1 and the second terminal of the second capacitor C2 are both connected to the ground GND, and the output terminal of the buffer U3 is connected to the control branch 106 through the analog-to-digital converter 107.

[0076] The first transmission gate TG1 and the second transmission gate TG2 are a kind of electronic switch circuit, usually used in digital logic design, which allows data signals to pass under the activation of control signals, such as the first transmission gate TG1 allowing the fifth voltage V5 to pass under the activation of the sampling signal S1 to charge the first capacitor C1, and the first transmission gate TG1 allowing the voltage VS1 on the first capacitor C1 to pass under the activation of the holding signal H1 to charge the second capacitor C2.

[0077] In this embodiment, the voltage conversion branch 104 includes the first transistor PM1, the second transistor PM2, the ninth resistor R9, the tenth resistor R10, the first current source I1 and the second current source I2.

[0078] The first end of the first transistor PM1 is connected with one end of the third voltage V3 output by the voltage sampling branch 101, the second end of the first transistor PM1 is connected to the positive pole of the first current source I1 through the ninth resistor R9, the third end of the first transistor PM1 and the third end of the second transistor PM2 are both grounded GND, the negative pole of the first current source I1 is connected to the first power supply VA1, the positive pole of the first current source I1 is connected with the comparison branch 105, the second end of the second transistor PM2 is connected to the positive pole of the second current source I2 through the tenth resistor R10, the third end of the second transistor PM2 is grounded GND, the negative pole of the second current source I2 is connected to the first power supply VA1, and the positive pole of the second current source I2 is connected with the comparison branch 105.

[0079] Specifically, the third voltage V3 is input to the gate of the first transistor PM1 to make the first transistor PM1 conductive. The voltage between the gate and the source of the first transistor PM1 is the threshold voltage Vth of the first transistor PM1, and the threshold voltage Vth is the minimum voltage difference between the gate and the source of the first transistor PM1 to start conducting. The fourth voltage V4 is input to the gate of the second transistor PM2 to make the second transistor PM2 conductive. The voltage between the gate and the source of the second transistor PM2 is the threshold voltage Vth of the second transistor PM2, and the threshold voltage Vth is the minimum voltage difference between the gate and the source of the second transistor PM2 to start conducting. It can be obtained that V6=V3+Vth+I1*R9 and V7=V4+Vth+I2*R10, and I1*R9=I2*R10 should be configured. It can be understood that Vth+I1*R9=Vth+I2*R10, and it is the preset voltage value in the above embodiment.

[0080] In this embodiment, the comparison branch 105 includes a comparator U2.

[0081] The first input end of the comparator U2 is connected with one end of the sixth voltage V6 output by the level conversion branch 104, the second input end of the comparator U2 is connected with one end of the seventh voltage V7 output by the level conversion branch 104, and the output end of the comparator U2 is connected with the control branch 106.

[0082] The principles of the circuit structure shown in FIG. 1 will be described again below. Figure 7 The principles of the circuit structure shown in FIG. 1 will be described again below. Figure 6 The principles of the circuit structure shown in FIG. 1 will be described again below. Figure 7 The schematic diagram of each signal in the PD controller 100 when the flyback power supply 200 has run for a certain period and is in a stable state is exemplarily shown. As shown in FIG. 2, the third voltage V3 is input to the gate of the first transistor PM1 to make the first transistor PM1 conductive. The voltage between the gate and the source of the first transistor PM1 is the threshold voltage Vth of the first transistor PM1, and the threshold voltage Vth is the minimum voltage difference between the gate and the source of the first transistor PM1 to start conducting. The fourth voltage V4 is input to the gate of the second transistor PM2 to make the second transistor PM2 conductive. The voltage between the gate and the source of the second transistor PM2 is the threshold voltage Vth of the second transistor PM2, and the threshold voltage Vth is the minimum voltage difference between the gate and the source of the second transistor PM2 to start conducting. It can be obtained that V6=V3+Vth+I1*R9 and V7=V4+Vth+I2*R10, and I1*R9=I2*R10 should be configured. It can be understood that Vth+I1*R9=Vth+I2*R10, and it is the preset voltage value in the above embodiment. Figure 7As shown, the horizontal axis represents time, in seconds (s); the vertical axis represents voltage, in volts (v). The signals in the PD controller 100 include a first voltage V1, a second voltage V2, a fifth voltage V5, a sixth voltage V6, a seventh voltage V7, an eighth voltage V8, a ninth voltage V9, a sampling signal S1, and a hold signal H1. Furthermore, in this embodiment, the PD controller 100 controls the second switch Q2 to remain on as an example.

[0083] like Figure 6 and Figure 7 As shown, when the first switch Q1 is turned on, the first voltage V1 is -VI N*NP / NS (a negative value). The third voltage V3 after passing through the voltage sampling branch 101 is also a negative value. Therefore, the negative voltage can be converted into a positive voltage by the level conversion circuit 104, that is, the sixth voltage V6 becomes a positive value. From the above embodiment, we can obtain: V6 = V3 + Vth + I1*R9, V7 = V4 + Vth + I2*R10. Next, comparator U2 compares the sixth voltage V6 and the seventh voltage V7. When the first switch Q1 is turned on, V6 > V7, and the comparator U2 outputs a high level (i.e., the first level in this embodiment is high), that is, V8 = 1. For example, V8 = 1 is maintained during the time period between time T1 and time T5 or between time T6 and time T7. When the first switch Q1 is turned off, V6 ≤ V7, and the comparator U2 outputs a low level (i.e., the second level in this embodiment is low), that is, V8 = 0. For example, V8 = 0 is maintained during the time period between time T5 and time T6. Subsequently, control branch 106 performs statistical analysis on the output (i.e., V8) of comparator U2 over multiple consecutive cycles. Specifically, this includes: calculating the time interval between two consecutive high levels of V8 to obtain the switching frequency of the first switch Q1, for example, the switching frequency of the first switch Q1 can be determined based on the time interval between the high level of V8 during the time period from time T1 to time T5 and the high level during the time period from time T6 to time T7; calculating the duration of any high level of V8 to obtain the on-time of the first switch Q1, for example, the duration of the high level of V8 during the time period from time T1 to time T5 is the on-time of the first switch Q1; calculating the duration of any low level of V8 to obtain the off-time of the first switch Q1, for example, the duration of the low level of V8 during the time period from time T5 to time T7 is the on-time of the first switch Q1.

[0084] As can be known from the working principle of the flyback power supply 200, the second voltage V2 contains the information of the input power Vin only in the time when the first switch Q1 is turned on, and thus the second voltage V2 must be sampled in the time when the first switch Q1 is turned on. The voltage difference branch 102 can convert the second voltage V2 in the time when the first switch Q1 is turned on into V1+Vin*NP / NS by performing a difference operation on the third voltage V3 and the fourth voltage V4. Of course, in some embodiments, the converted voltage can be amplified by K*(V1+Vin*NP / NS) for subsequent processing, where K is the amplification multiple. Since the fifth voltage V5 converted by the voltage difference branch 102 is a pulse signal, the high level information of the pulse signal needs to be taken out and kept by the sample-and-hold branch 103.

[0085] In the sample-and-hold branch 103, the control signal of the first transmission gate TG1 is the sampling signal S1, which is generated by the control branch 106. When the output of the comparator U2 is converted from low level to high level, the control branch 106 first performs a debounce process on the rising edge of the output of the comparator U2, which can be implemented by delaying for a preset time length. After the preset time length ends, a pulse signal with a fixed pulse width is generated, and the pulse width is smaller than the turn-on time of the first switch Q1. This pulse signal is the sampling signal S1. For example, at time T1, V8 is converted from low level to high level, and the delay for the preset time length starts. Until time T2, the preset time length ends, and the pulse signal starts to be generated from time T2. The pulse signal ends at time T3, and the time period between time T2 and time T3 is the pulse width of the pulse signal (i.e., the sampling signal S1). It can be understood that the reason for performing the debounce process is to eliminate the influence of the false output of the comparator U2 caused by the resonant ripple (for example, the part of the second voltage V2 that fluctuates up and down and gradually decreases is the resonant ripple), so as to avoid the false triggering of the sample-and-hold branch 103, and make the obtained sampling signal more accurate and stable. When the sampling signal S1 is high, the first transmission gate TG1 is turned on, the first capacitor C1 samples the fifth voltage V5 to obtain the sampling voltage VS1, and the hold signal H1 is low to make the second transmission gate TG2 in the off state; when the sampling signal S1 is low, the first transmission gate TG1 is turned off.

[0086] When the output of the comparator U2 is converted from high level to low level, the control branch 106 first performs anti-jitter processing on the falling edge of the output of the comparator U2, which can be achieved by delaying for a preset time length. After the preset time length ends, a pulse signal with a fixed pulse width is generated, and the pulse width is the off time length of the first switch tube Q1. The pulse signal is the holding signal H1. For example, at time T4, V8 is converted from low level to high level, and the delay for the preset time length starts. Until time T5, the preset time length ends, and the pulse signal is generated from time T5 until time T6, where the time period between time T5 and time T6 is the pulse width of the pulse signal (i.e., the holding signal H1). When the holding signal H1 is high, the second transmission gate TG2 is turned on, and the sampling voltage VS1 stored in the first capacitor C1 is transmitted to the second capacitor C2, i.e., the sampling voltage VS1 is held on the second capacitor C2 to obtain the holding voltage VH1. When the holding signal H1 is low, the second transmission gate TG2 is turned off. Then, the output of the sampling and holding branch 103 is converted into a digital signal by the analog-to-digital converter 107 at the back end, and the converted digital signal is transmitted to the control branch 106. Based on the received digital signal, the control branch 106 can calculate the effective value of the input power VIN. In this embodiment, in order to provide the conversion accuracy of the digital-to-analog converter 107, a buffer U3 is also provided to isolate the holding voltage VH1 and the sampling voltage of the digital-to-analog converter 107.

[0087] At this point, the acquisition process of the effective value of the input power VIN, the switching frequency, the on time and the off time of the first switch tube Q1, and other information is realized, and then the short circuit protection, overcurrent protection and other functions can be realized based on the acquired information.

[0088] The above description is only an embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent flow transformation based on the content of the specification and drawings, or direct or indirect application in other related technical fields, is also included in the patent protection scope of the present application.

[0089] The above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them. Under the idea of the present application, the technical features of the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order. Those skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A PD controller characterized by, The application is applied to a flyback power supply, the flyback power supply includes a flyback transformer, a freewheeling unit, a first switch tube and a second switch tube, the non-identical end of the primary side of the flyback transformer is connected with the positive pole of an input power supply, the identical end of the primary side of the flyback transformer is grounded through the first switch tube, the identical end of the secondary side of the flyback transformer is connected with the second switch tube through the freewheeling unit to output a first voltage, and the PD controller includes: a voltage sampling branch connected with the identical end of the secondary side of the flyback transformer and the second switch tube respectively, configured to output a third voltage which is N times of the first voltage and output a fourth voltage which is N times of a second voltage of the identical end of the secondary side of the flyback transformer, wherein N is greater than 0 and less than 1; a voltage difference branch connected with the voltage sampling branch, configured to output a fifth voltage based on the difference between the third voltage and the fourth voltage; a sample-and-hold branch connected with the voltage difference branch, configured to sample the fifth voltage in response to a sampling signal and hold the sampled fifth voltage in response to a holding signal; a level conversion branch connected with the voltage sampling branch, configured to increase the third voltage by a preset voltage value and output a sixth voltage and increase the fourth voltage by the preset voltage value and output a seventh voltage; a comparison branch connected with the level conversion branch, configured to output a comparison result between the sixth voltage and the seventh voltage; a control branch connected with the comparison branch and the sample-and-hold branch respectively, configured to output the sampling signal when the comparison result switches from a first level to a second level, output the holding signal when the comparison result switches from the second level to the first level, and determine the primary side information of the flyback power supply based on the sampled and held fifth voltage and the comparison result, wherein the comparison result is the first level when the sixth voltage is less than or equal to the seventh voltage, the comparison result is the second level when the sixth voltage is greater than the seventh voltage, and the primary side information of the flyback power supply includes the effective value of the input power supply and the switching frequency, the on duration and the off duration of the first switch tube.

2. The PD controller of claim 1, wherein, The control branch is further configured to: delay for a preset time duration when the comparison result switches from the first level to the second level, and output the sampling signal when the preset time duration ends; delay for the preset time duration when the comparison result switches from the second level to the first level, and output the holding signal when the preset time duration ends.

3. The PD controller of claim 1, wherein, The PD controller further includes: an analog-to-digital converter connected between the sample-and-hold branch and the control branch, configured to convert the sampled and held fifth voltage into a digital signal and input the digital signal to the control branch, so that the control branch determines the primary side information of the flyback power supply based on the digital signal.

4. The PD controller according to any one of claims 1 to 3, characterized in that, The voltage sampling branch includes: A first voltage dividing unit connected with the second switch tube is configured to output the third voltage after dividing the first voltage, and the dividing ratio is N; A second voltage dividing unit connected with the same terminal of the secondary side of the flyback transformer is configured to output the fourth voltage after dividing the second voltage, and the dividing ratio is N.

5. The PD controller of claim 4, wherein, The first voltage dividing unit comprises a first resistor and a second resistor, and the second voltage dividing unit comprises a third resistor and a fourth resistor; The first resistor and the second resistor are connected in series between the second terminal of the second switch tube and the ground, and the third resistor and the fourth resistor are connected in series between the same terminal of the secondary side of the flyback transformer and the ground.

6. The PD controller according to any one of claims 1 to 3, wherein The voltage difference branch comprises a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and a first operational amplifier; The fifth resistor and the sixth resistor are connected in series between one end outputting the third voltage of the voltage sampling branch and the ground, the connection point between the fifth resistor and the sixth resistor is connected with the first input terminal of the first operational amplifier, the seventh resistor and the eighth resistor are connected in series between one end outputting the fourth voltage of the voltage sampling branch and the output terminal of the first operational amplifier, the connection point between the seventh resistor and the eighth resistor is connected with the second input terminal of the first operational amplifier, and the output terminal of the first operational amplifier is connected with the sample and hold branch.

7. The PD controller of any one of claims 1-3, wherein, The sample and hold branch comprises a first transmission gate, a second transmission gate, a first capacitor, a second capacitor and a buffer; The input terminal of the first transmission gate is connected with the voltage difference branch, the output terminal of the first transmission gate is respectively connected with the input terminal of the second transmission gate and the first terminal of the first capacitor, the control terminal of the first transmission gate is connected with the control branch, the output terminal of the second transmission gate is respectively connected with the first terminal of the second capacitor and the input terminal of the buffer, the control terminal of the second transmission gate is connected with the control branch, the second terminal of the first capacitor and the second terminal of the second capacitor are both grounded, and the output terminal of the buffer is connected with the control branch.

8. The PD controller of any one of claims 1-3, wherein, The level conversion branch comprises a first transistor, a second transistor, a ninth resistor, a tenth resistor, a first current source and a second current source; The first terminal of the first transistor is connected with one end outputting the third voltage of the voltage sampling branch, the second terminal of the first transistor is connected with the positive electrode of the first current source through the ninth resistor, the third terminal of the first transistor and the third terminal of the second transistor are both grounded, the negative electrode of the first current source is connected with a first power supply, the positive electrode of the first current source is connected with the comparison branch, the second terminal of the second transistor is connected with the positive electrode of the second current source through the tenth resistor, the third terminal of the second transistor is grounded, the negative electrode of the second current source is connected with the first power supply, and the positive electrode of the second current source is connected with the comparison branch.

9. The PD controller of any one of claims 1-3, wherein, The comparison branch comprises a comparator. A first input of the comparator is connected to one end of the level conversion branch outputting the sixth voltage, a second input of the comparator is connected to one end of the level conversion branch outputting the seventh voltage, and an output of the comparator is connected to the control branch.

10. A PD adapter, characterized by, The power supply comprises a flyback power supply and a PD controller as claimed in any one of claims 1-9.

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