Three-dimensional memory and method for manufacturing the same

Abstract

The present invention relates to the field of semiconductor manufacturing technology, and in particular to a three-dimensional memory and a manufacturing method thereof. The manufacturing method of the three-dimensional memory comprises the following steps: forming a base, the base comprising a substrate, a first dielectric layer located on the substrate, and a first contact structure penetrating the first dielectric layer along a first direction; depositing a first conductive material on the first dielectric layer to form a conductive portion electrically connected to the first contact structure; depositing a second conductive material on the substrate to form a supporting portion covering the surface of the conductive portion; etching the supporting portion to form a groove penetrating the supporting portion along the first direction and exposing the conductive portion; forming a storage layer that continuously covers the surface of the supporting portion and the inner wall of the groove; depositing a metal material or a polysilicon material on the substrate to form an upper electrode covering the storage layer. The present invention does not require a deep hole etching process for forming a storage hole, and can improve the sensitivity, stability and reliability of the storage structure.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a three-dimensional memory and a manufacturing method thereof. Background Art

[0002] Phase change memory or ferroelectric memory (FeRAM) and other memories are devices that integrate memory cells in the back end of line (BEOL), which are structures in which the memory cells are inserted between two adjacent metal layers. The memory cell is generally composed of an upper and lower electrode layer and a ferroelectric memory layer in the middle. The storage performance of the ferroelectric memory is proportional to the effective area of ​​the ferroelectric memory layer and the electrode layer in the memory cell. The traditional two-dimensional structure memory is composed of a vertically stacked upper electrode layer, a lower electrode layer, and a ferroelectric material layer or a phase change material layer located between the upper electrode layer and the lower electrode layer. However, as the size of the memory continues to shrink, the effective area of ​​the storage structure in the traditional two-dimensional structure memory continues to shrink, thereby limiting the further improvement of the memory performance. Moreover, in traditional storage structures, the upper and lower electrodes are mostly made of TiN material. When the storage structure performs operations such as reading and writing, the TiN material needs to be polarized, for example, converted from a cubic lattice to an oblique cubic lattice. In order to ensure the storage performance of the storage structure, the manufacturing process of the TiN material is relatively high, and the storage structure is easily damaged when a lead-out structure is formed above the upper electrode, thereby increasing the difficulty and manufacturing cost of the memory manufacturing process.

[0003] Therefore, how to increase the effective area of ​​the storage structure while reducing the difficulty and manufacturing cost of the storage structure manufacturing process, thereby improving the performance and manufacturing yield of the memory, is a technical problem that needs to be solved urgently. Summary of the invention

[0004] The present invention provides a three-dimensional memory and a manufacturing method thereof, which are used to increase the effective area of ​​the memory structure while reducing the difficulty and manufacturing cost of the memory structure manufacturing process, thereby improving the performance and manufacturing yield of the memory.

[0005] According to some embodiments, the present invention provides a method for manufacturing a three-dimensional memory, comprising the following steps:

[0006] Forming a substrate, the substrate comprising a substrate, a first dielectric layer located on the substrate, and a first contact structure penetrating the first dielectric layer along a first direction, the substrate comprising a top surface and a bottom surface that are relatively distributed, and the first direction perpendicularly intersects with the top surface of the substrate;

[0007] Depositing a first conductive material on the first dielectric layer to form a conductive portion electrically connected to the first contact structure;

[0008] Depositing a second conductive material onto the substrate to form a support portion covering the surface of the conductive portion;

[0009] Etching the support portion to form a groove that penetrates the support portion along the first direction and exposes the conductive portion, and using the conductive portion and the support portion together as a lower electrode;

[0010] forming a storage layer that continuously covers the surface of the support portion and the inner wall of the groove;

[0011] A metal material or a polysilicon material is deposited on the substrate to form an upper electrode covering the storage layer. The lower electrode, the storage layer and the upper electrode together constitute a storage structure.

[0012] In some embodiments, the specific steps of forming the substrate include:

[0013] Providing a substrate, wherein the substrate includes an active region;

[0014] forming a first dielectric layer on the top surface of the substrate;

[0015] A first contact structure is formed that penetrates the first dielectric layer along a first direction and is electrically connected to the active area in the substrate.

[0016] In some embodiments, the substrate further includes two second contact structures penetrating the first dielectric layer and distributed along a second direction on opposite sides of the first contact structure, wherein the second direction is parallel to the top surface of the substrate; the specific steps of depositing a first conductive material on the first dielectric layer to form a conductive portion electrically connected to the first contact structure include:

[0017] The first conductive material is deposited onto the substrate to form the conductive portion that continuously covers the top surface of the first dielectric layer, the first contact structure, and the two second contact structures.

[0018] In some embodiments, the specific step of etching the support portion to form the groove penetrating the support portion along the first direction and exposing the conductive portion includes:

[0019] The supporting portion above the first contact structure is etched to form the groove above the first contact structure.

[0020] In some embodiments, after forming the upper electrode covering the storage layer, the method further includes the following steps:

[0021] A lead-out structure is formed above the storage structure and electrically connected to the upper electrode.

[0022] In some embodiments, the substrate further includes two second contact structures penetrating the first dielectric layer and distributed along a second direction on opposite sides of the first contact structure, wherein the second direction is parallel to the top surface of the substrate; the specific steps of depositing a first conductive material on the first dielectric layer to form a conductive portion electrically connected to the first contact structure include:

[0023] Depositing a first conductive material on the substrate to form a first conductive layer continuously covering the top surface of the first dielectric layer, the first contact structure and the two second contact structures;

[0024] The first conductive layer is etched to form a plurality of independent conductive portions, and the plurality of independent conductive portions are respectively located on the first contact structure surface and the second contact structure surface.

[0025] In some embodiments, a plurality of independent support portions are distributed one by one on a plurality of independent conductive portions; and the specific steps of etching the support portions to form grooves penetrating the support portions along a first direction and exposing the conductive portions include:

[0026] The plurality of support portions are etched to form a groove in each of the support portions that penetrates the support portion along the first direction and exposes the conductive portion.

[0027] In some embodiments, the conductive part is made of metal material, polysilicon material or TiN.

[0028] According to some other embodiments, the present invention further provides a three-dimensional memory, comprising:

[0029] A base, comprising a substrate, a first dielectric layer located above the substrate, and a first contact structure penetrating the first dielectric layer along a first direction, wherein the substrate comprises a top surface and a bottom surface that are relatively distributed, and the first direction intersects the top surface of the substrate perpendicularly;

[0030] A storage structure is located on the first dielectric layer along the first direction, the storage structure includes a lower electrode, a storage layer and an upper electrode, the lower electrode includes a conductive part electrically connected to the first contact structure and a supporting part covering the surface of the conductive part, the conductive part is made of a first conductive material, the supporting part is made of a second conductive material, and the supporting part is in contact with and electrically connected to the conductive part, the supporting part has a groove that penetrates the supporting part along the first direction and exposes the conductive part, the storage layer continuously covers the surface of the supporting part and the inner wall of the groove, the upper electrode covers the storage layer, and the material of the upper electrode is a metal material or a polysilicon material.

[0031] In some embodiments, the substrate further includes two second contact structures penetrating the first dielectric layer and distributed along a second direction on opposite sides of the first contact structure, and the second direction is parallel to the top surface of the substrate;

[0032] The conductive portion continuously covers the top surface of the first dielectric layer, the first contact structure and the two second contact structures.

[0033] In some embodiments, the groove in the supporting portion is located above the first contact structure along the first direction.

[0034] In some embodiments, the substrate further includes two second contact structures penetrating the first dielectric layer and distributed along a second direction on opposite sides of the first contact structure, and the second direction is parallel to the top surface of the substrate;

[0035] A plurality of independent conductive portions are respectively located on the first contact structure surface and the second contact structure surface.

[0036] In some embodiments, the conductive part is made of metal material, polysilicon material or TiN.

[0037] The three-dimensional memory and its manufacturing method provided by the present invention do not need to perform a deep hole etching process for forming a storage hole, simplifying the manufacturing process of the three-dimensional memory and improving the manufacturing yield of the three-dimensional memory. At the same time, by using a conductive part and a supporting part to jointly form the lower electrode of the storage structure, and the supporting part has a groove exposing the conductive part, so that the storage layer can continuously cover the surface of the supporting part and the inner wall of the groove, and the storage layer is stably supported by the supporting part, thereby forming a three-dimensional structure memory, which helps to increase the storage density and integration of the memory and improve the overall structural stability of the memory. Moreover, the material of the supporting part is a conductive material, thereby increasing the area of ​​the storage structure, so that the polarization area of ​​the storage structure is increased under the same plane area, so that the storage structure can store more polarized charges under the same voltage, increasing the storage capacity of the storage structure, and effectively improving the storage performance of the three-dimensional memory. Moreover, the present invention sets the material of the upper electrode to a metal material or a polysilicon material, which not only increases the etching selectivity when the lead-out hole is subsequently formed, thereby avoiding damage to the storage structure when the lead-out hole is formed, but also can greatly improve the sensitivity, stability and reliability of the storage structure, and extend the service life of the three-dimensional memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 is a flow chart of a method for manufacturing a three-dimensional memory in a specific embodiment of the present invention;

[0039] Figure 2 is a schematic structural diagram of a substrate in a specific embodiment of the present invention;

[0040] Figure 3 is a schematic diagram of a structure after a conductive portion is formed in a specific embodiment of the present invention;

[0041] Figure 4 is a schematic diagram of a structure after a support portion is formed in a specific embodiment of the present invention;

[0042] Figure 5 is a schematic diagram of a structure after forming a storage layer and an upper electrode in a specific embodiment of the present invention;

[0043] Figure 6 is a structural schematic diagram after adjacent storage units are separated in a specific implementation manner of the present invention;

[0044] Figure 7 is a schematic diagram of a structure after forming a second dielectric layer and a third dielectric layer in a specific embodiment of the present invention;

[0045] Figure 8 is a schematic diagram of a structure after a lead-out structure and a conductive connection pad are formed in a specific embodiment of the present invention;

[0046] Fig. 9 is another structural schematic diagram after the conductive portion is formed in a specific embodiment of the present invention;

[0047] Fig.10 is another structural schematic diagram after the support portion is formed in a specific embodiment of the present invention;

[0048] Fig.11 It is another structural schematic diagram after the conductive connection pad is formed in a specific embodiment of the present invention. DETAILED DESCRIPTION

[0049] The specific implementation of the three-dimensional memory and the manufacturing method thereof provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0050] This specific embodiment provides a method for manufacturing a three-dimensional memory. Figure 1 FIG. 1 is a flow chart of a method for manufacturing a three-dimensional memory in a specific embodiment of the present invention. Figure 1 As shown, the manufacturing method of the three-dimensional memory comprises the following steps:

[0051] Step S11, forming a base, the base comprising a substrate, a first dielectric layer located on the substrate, and a first contact structure penetrating the first dielectric layer along a first direction, the substrate comprising a top surface and a bottom surface that are relatively distributed, and the first direction intersects the top surface of the substrate perpendicularly;

[0052] Step S12, depositing a first conductive material on the first dielectric layer to form a conductive portion electrically connected to the first contact structure;

[0053] Step S13, depositing a second conductive material onto the substrate to form a supporting portion covering the surface of the conductive portion;

[0054] Step S14, etching the support portion to form a groove that penetrates the support portion along the first direction and exposes the conductive portion, and using the conductive portion and the support portion together as a lower electrode;

[0055] Step S15, forming a storage layer that continuously covers the surface of the support portion and the inner wall of the groove;

[0056] Step S16, depositing a metal material or a polysilicon material on the substrate to form an upper electrode covering the storage layer, wherein the lower electrode, the storage layer and the upper electrode together constitute a storage structure.

[0057] Figure 2 Schematic diagram of the structure of the substrate in a specific embodiment of the present invention. In some embodiments, the specific steps of forming the substrate include:

[0058] Providing a substrate 20, wherein the substrate 20 includes an active region, and the substrate 20 includes a top surface and a bottom surface that are relatively distributed;

[0059] forming a first dielectric layer 21 on the top surface of the substrate 20;

[0060] The first contact structure 25 is formed along a first direction D1 that penetrates the first dielectric layer 21 and is electrically connected to the active region in the substrate 20. The first direction D1 intersects the top surface of the substrate 20 perpendicularly. Figure 2 shown.

[0061] Figure 3 2 is a schematic diagram of a structure after the conductive part is formed in a specific embodiment of the present invention. In some embodiments, the substrate further includes two second contact structures 26 penetrating the first dielectric layer 21 and distributed along the second direction D2 on opposite sides of the first contact structure 25, and the second direction D2 is parallel to the top surface of the substrate 20; the specific steps of depositing the first conductive material on the first dielectric layer 21 to form the conductive part 30 electrically connected to the first contact structure 25 include:

[0062] The first conductive material is deposited onto the substrate to form the conductive portion 30 that continuously covers the top surface of the first dielectric layer 21, the first contact structure 25 and the two second contact structures 26. Figure 3 shown.

[0063] Specifically, the substrate 20 may be, but is not limited to, a silicon substrate. This specific embodiment is described by taking the substrate 20 as a silicon substrate as an example. The substrate 20 includes at least a plurality of active regions spaced apart along the second direction D2. The active region includes a channel region and a source region and a drain region located on opposite sides of the channel region along the second direction D2. The base also includes a gate structure located on the substrate 20, the gate structure including a gate dielectric layer 22 located above the channel region, a gate conductive layer 23 covering the surface of the gate dielectric layer 22, and an isolation sidewall 24 covering the sidewalls of the gate dielectric layer 22 and the sidewalls of the gate conductive layer 23, as shown in FIG. Figure 2 As shown. The first dielectric layer 21 covers the top surface of the substrate 20 and the gate structure. The material of the first dielectric layer 21 can be an oxide material, such as silicon dioxide. In one example, the first contact structure 25 penetrates the first dielectric layer 21 along the first direction D1 and is electrically connected to the drain region, and the second contact structure 26 penetrates the first dielectric layer 21 along the first direction D1 and is electrically connected to the source region. In this specific embodiment, by setting the first contact structure 25 to penetrate the first dielectric layer 21, the storage structure subsequently formed is suitable for the control of single and multiple circuit structures, and the process level is suitable for after the contact through hole or after the metal process, which has a wider range.

[0064] In one example, the substrate may include a plurality of memory cells arranged along the second direction D2, each of the memory cells including the substrate 20, the two active regions located in the substrate 20, the two gate structures located one above the two active regions, the first contact structure 25 located between the two gate structures, and the two second contact structures 26 located on one side of the two gate structures away from the first contact structure 25, such as Figure 2 Atomic layer deposition process can be used to deposit metal material, polysilicon material or TiN on the top surface of the first dielectric layer 21 to form the conductive portion 30 that continuously covers the top surface of the first dielectric layer 21, the first contact structure 25 and the second contact structure 26 in the plurality of storage cells. Figure 3 As shown, the requirements of the three-dimensional memory circuit design are met and the diversity of the three-dimensional memory circuit design is realized. The conductive part 30 is flattened by chemical mechanical polishing process and reduced to a required thickness to meet the size requirements of the three-dimensional memory.

[0065] Figure 44 is a schematic diagram of a structure after forming a support portion in a specific embodiment of the present invention. In some embodiments, the specific steps of forming a support portion 40 covering the surface of the conductive portion 30, wherein the support portion 40 has a groove 41 exposing the conductive portion 30, include:

[0066] Depositing a second conductive material onto the substrate to form a supporting portion 40 covering the conductive portion 30;

[0067] The support portion 40 is etched to form the groove 41 penetrating the support portion 40 along the first direction D1 and exposing the conductive portion 30. Figure 4 shown.

[0068] In some embodiments, the specific steps of etching the support portion 40 to form the groove 41 penetrating the support portion 40 along the first direction D1 and exposing the conductive portion 30 include:

[0069] The support portion 40 above the first contact structure 25 is etched to form the groove 41 above the first contact structure 25 .

[0070] Specifically, the second conductive material should have a high etching selectivity ratio with the first conductive material (for example, the etching selectivity ratio between the second conductive material and the first conductive material is greater than 3) to avoid damage to the conductive part 30 during the process of etching the support part 40 to form the groove 41. The support part 40 is formed by a conductive material (i.e., the second conductive material) so that the support part 40 is in contact and electrically connected with the conductive part 30, thereby increasing the area of ​​the storage structure, so that the polarization area of ​​the storage structure is increased under the same plane area, so that the storage structure can store more polarized charges under the same voltage, increase the storage capacity of the storage structure, and effectively improve the storage performance of the three-dimensional memory. The support part 40 in this specific embodiment is not only used to form the lower electrode, but also used to support the storage layer, so that the manufacturing process of the three-dimensional memory can be further simplified while increasing the polarization area of ​​the storage layer. For example, TiN material is deposited on the substrate to form the support part 40 covering the entire top surface of the conductive part 30 (i.e., the surface of the conductive part 30 away from the substrate 20). Next, a hard mask material such as silicon oxynitride is deposited on the substrate to form a first mask layer covering the support portion 40. The first mask layer is patterned to form a first etching window exposing the support portion 40. The support portion 40 is etched downward along the first etching window to form the groove 41 that penetrates the support portion 40 along the first direction D1 and exposes the conductive portion 30. Figure 4As shown. In one example, the projection of the groove 41 on the top surface of the first dielectric layer 21 covers the first contact structure 25. In another example, the projection of the groove 41 on the top surface of the first dielectric layer 21 is symmetrically distributed about the first contact structure 25. The groove 41 is arranged above the first contact structure 25 along the first direction D1. On the one hand, the polarization charge in the storage structure can be evenly distributed, thereby further improving the performance of the storage structure; on the other hand, it helps to further increase the size of the groove 41 (for example, the width of the groove 41 along the second direction D2), thereby further increasing the polarization area of ​​the storage structure and further improving the storage capacity of the three-dimensional memory.

[0071] This specific embodiment uses a phase change material or a ferroelectric material to form the storage layer, however, the phase change material or the ferroelectric material is a compound with a special cubic crystal phase. By using the conductive part 30 and the supporting part 40 together as the lower electrode of the storage structure, and the second conductive material should have a higher etching selectivity with the first conductive material, that is, the first conductive material constituting the conductive part 30 is different from the second conductive material constituting the supporting part 40, so that the phase change material or the ferroelectric material constituting the storage layer can be better and more effectively activated through the mutual cooperation of two different conductive materials (for example, the synergistic effect of two different conductive materials in crystal structure and polarization performance). For example, when the first conductive material is metal tungsten and the second conductive material is TiN, the tungsten crystal orientation of the metal tungsten and the crystal orientation of TiN can be used in combination to more effectively activate the crystal phase of the phase change material or the ferroelectric material, thereby improving the polarization performance of the phase change material or the ferroelectric material. Among them, the ferroelectric material can be Si-doped HfO, Zr-doped HfO, La-doped HfO, Si-doped HfO, Si-doped HfO, SBT (strontium bismuth tantalate) or PZT (lead zirconate titanate), etc.; the phase change material can be GST (germanium antimony telluride), SST (scandium antimony telluride), etc.

[0072] Figure 5 is a schematic diagram of a structure after forming a storage layer and an upper electrode in a specific embodiment of the present invention, Figure 6It is a schematic diagram of a structure after separating adjacent storage units in a specific embodiment of the present invention. After forming the support portion 40 having the groove 41, a phase change material or a ferroelectric material is deposited on the substrate to form the storage layer 50 that continuously covers the plurality of support portions 40 and the inner wall of the groove 41 (including the side wall and the bottom wall of the groove 41). Afterwards, a metal material or a polysilicon material is deposited on the substrate to form the upper electrode 51 covering the storage layer 50. The metal material may be metal tungsten or metal copper. Next, a hard mask material such as silicon oxynitride is deposited on the substrate to form a second mask layer 52 covering the upper electrode 51, as shown in FIG. Figure 5 The second mask layer 52 is patterned to form a second etching window exposing the upper electrode 51. The upper electrode 51, the storage layer 50 and the conductive portion 30 are etched downward along the second etching window to expose the top surface of the first dielectric layer 21, so as to separate the electrical connection between the storage structures in the adjacent storage cells, as shown in FIG. Figure 6 shown.

[0073] Figure 7 is a schematic diagram of a structure after forming the second dielectric layer and the third dielectric layer in a specific embodiment of the present invention, Figure 8 1 is a schematic diagram of a structure after forming a lead-out structure and a conductive connection pad in a specific embodiment of the present invention. In some embodiments, after forming the upper electrode 51 covering the storage layer 50, the following steps are also included:

[0074] A lead-out structure 80 is formed above the storage structure and electrically connected to the upper electrode 51, such as Figure 8 shown.

[0075] For example, after separating the electrical connections between the storage structures in adjacent storage cells, a silicon nitride material is deposited on the substrate to form a second dielectric layer 70 that continuously covers the top surface of the first dielectric layer 21 and the surface of the upper electrode 51. A silicon dioxide material is deposited on the surface of the second dielectric layer 70 to form a third dielectric layer 71 that covers the second dielectric layer 70. Next, a hard mask material such as silicon oxynitride is deposited on the third dielectric layer 71 to form a third mask layer 72 that covers the third dielectric layer 71, such as Figure 7 As shown. The third mask layer 72 is patterned to form a third etching window exposing the third dielectric layer 71. The third dielectric layer 71 and the second dielectric layer 70 are etched downward along the third etching window to form an extraction hole exposing the upper electrode 51. Metal tungsten and other materials are deposited in the extraction hole to form the extraction structure 80 electrically connected to the upper electrode 51. Thereafter, a conductive material such as copper is deposited on the third dielectric layer 71 to form a conductive connection pad 81 electrically connected to the extraction structure 80, as shown. Figure 8 As shown. Since the upper electrode 51 continuously covers the storage layer 50 on the surfaces of the two support parts 40, it can not only expand the process window for forming the lead-out hole, further simplify the manufacturing process of the three-dimensional memory, but also can increase the distance between the lead-out hole and the storage layer 50 along the first direction D1 by setting the projection of the lead-out hole between the two support parts 40, thereby further avoiding damage to the storage layer 50 caused by the process of etching to form the lead-out hole, thereby ensuring the performance stability of the storage structure.

[0076] Fig. 9 2 is another structural schematic diagram after the conductive part is formed in a specific embodiment of the present invention. In order to further expand the function of the three-dimensional memory, in other embodiments, the substrate further includes two second contact structures 26 penetrating the first dielectric layer 21 and distributed along the second direction D2 on opposite sides of the first contact structure 25, and the second direction D2 is parallel to the top surface of the substrate 20; the specific steps of depositing the first conductive material on the first dielectric layer 21 to form the conductive part 30 electrically connected to the first contact structure 25 include:

[0077] Depositing a first conductive material on the substrate to form a first conductive layer continuously covering the top surface of the first dielectric layer 21, the first contact structure 25 and the two second contact structures 26;

[0078] The first conductive layer is etched to form a plurality of independent conductive portions 30 , and the plurality of independent conductive portions 30 are respectively located on the surface of the first contact structure 25 and the surface of the second contact structure 26 .

[0079] Fig.10 2 is another structural schematic diagram after forming the support portion in a specific embodiment of the present invention. In other embodiments, the specific steps of forming the support portion 40 covering the surface of the conductive portion 30, wherein the support portion 40 has a groove 41 exposing the conductive portion 30, include:

[0080] forming a plurality of independent supporting parts 40 distributed one by one on the plurality of conductive parts 30;

[0081] The plurality of support portions 40 are etched to form a groove 41 in each of the support portions 40 to expose the conductive portion 30 .

[0082] In one example, a metal material, a polysilicon material or TiN is deposited on the substrate to form a first conductive layer that continuously covers the top surface of the first dielectric layer 21, the first contact structure 25 and the two second contact structures 26. By etching the first conductive layer, a plurality of independent conductive portions 30 electrically connected to the plurality of first contact structures 25 and the second contact structures 26 are formed, such as Fig. 9 Then, a plurality of supporting portions 40 are formed on the plurality of conductive portions 30 in a one-to-one correspondence, and each supporting portion 40 is etched to form a groove 41 in each supporting portion 40 to expose the conductive portion 30, as shown in FIG. Fig.10 shown.

[0083] In another example, a metal material, a polysilicon material or TiN is deposited on the substrate to form a first conductive layer that continuously covers the top surface of the first dielectric layer 21, the first contact structure 25 and the two second contact structures 26. Next, a TiN material, an oxide material or a nitride material is deposited on the first conductive layer to form a support layer covering the first conductive layer. Thereafter, the first conductive layer and the support layer are etched to form a plurality of independent conductive portions 30 that are electrically connected to the plurality of first contact structures 25 and the second contact structures 26 in a one-to-one correspondence and a plurality of independent support portions 40 that are located one by one on the plurality of conductive portions 30. Thereafter, by etching each support portion 40, a groove 41 that exposes the conductive portion 30 is formed in each support portion 40, such as Fig.10 shown.

[0084] Fig.11 is another structural schematic diagram after the conductive connection pad is formed in a specific embodiment of the present invention. For example, after the support portion 40 is formed, a phase change material or a ferroelectric material is deposited on the substrate to form the storage layer 50 that continuously covers the multiple support portions 40 and the inner wall of the groove 41 (including the side wall and the bottom wall of the groove 41). Afterwards, a metal material or a polysilicon material is deposited on the substrate to form the upper electrode 51 that covers the storage layer 50. Next, the electrical connection between the storage structures in adjacent storage cells is separated. Afterwards, the second dielectric layer 70 that continuously covers the multiple upper electrodes 51, the third dielectric layer 71 that covers the second dielectric layer 70, and the multiple lead-out structures 80 that penetrate the third dielectric layer 71 and the second dielectric layer 70 and are electrically connected to the multiple upper electrodes 51 one-to-one are formed. Then, a plurality of the conductive connection pads 81 that are electrically connected to the multiple lead-out structures 80 one-to-one are formed on the top surface of the third dielectric layer 71, as shown in FIG. Fig.11 shown.

[0085] In some embodiments, the material of the conductive part 30 is a metal material, a polysilicon material or TiN, and the metal material is metal tungsten or metal copper, so that the process of forming the lead-out hole can be further avoided from causing damage to the storage structure by increasing the etching selectivity, and the sensitivity, stability and reliability of the storage structure can be greatly improved, and the service life of the three-dimensional memory can be extended.

[0086] This specific embodiment also provides a three-dimensional memory. The three-dimensional memory provided in this specific embodiment can be used as follows Figure 1-Figure 11 The manufacturing method of the three-dimensional memory is formed, and the structural schematic diagram of the three-dimensional memory can be seen in Figure 8 and Fig.11 .like Figure 1-Figure 11 As shown, the three-dimensional memory comprises:

[0087] A base, comprising a substrate 20, a first dielectric layer 21 located above the substrate 20, and a first contact structure 25 penetrating the first dielectric layer 21 along a first direction D1, wherein the substrate 20 comprises a top surface and a bottom surface that are relatively distributed, and the first direction D1 intersects the top surface of the substrate 20 vertically;

[0088] A storage structure is located on the first dielectric layer 21 along the first direction D1, and the storage structure includes a lower electrode, a storage layer 50 and an upper electrode 51. The lower electrode includes a conductive part 30 electrically connected to the first contact structure 25 and a support part 40 covering the surface of the conductive part 30. The material of the conductive part 30 is a first conductive material, and the material of the support part 40 is a second conductive material. The support part 40 is in contact with and electrically connected to the conductive part 30. The support part 40 has a groove 41 that penetrates the support part 40 along the first direction D1 and exposes the conductive part 30. The storage layer 50 continuously covers the surface of the support part 40 and the inner wall of the groove 41. The upper electrode 51 covers the storage layer 50, and the material of the upper electrode 51 is a metal material or a polysilicon material.

[0089] Specifically, by using the conductive part 30 and the supporting part 40 to jointly constitute the lower electrode of the storage structure, and making the storage layer 50 continuously cover the surface of the supporting part 40 and the inner wall of the groove 41, not only a three-dimensional structure memory is formed, but also it helps to increase the area of ​​the storage structure, so that the polarization area of ​​the storage structure is increased under the same plane area, so that the storage structure can store more polarized charges under the same voltage, thereby increasing the storage capacity of the storage structure and effectively improving the storage performance of the three-dimensional memory.

[0090] In some embodiments, the base further includes two second contact structures 26 penetrating the first dielectric layer 21 and distributed along a second direction D2 on opposite sides of the first contact structure 25 , and the second direction D2 is parallel to the top surface of the substrate 20 ;

[0091] The conductive portion 30 continuously covers the top surface of the first dielectric layer 21 , the first contact structure 25 , and the two second contact structures 26 .

[0092] In some embodiments, the groove 41 in the support portion 40 is located above the first contact structure 25 along the first direction D1. On the one hand, it can make the polarization charge in the storage structure evenly distributed, thereby further improving the performance of the storage structure; on the other hand, it helps to further increase the size of the groove 41 (for example, the width of the groove 41 along the second direction D2), thereby further increasing the polarization area of ​​the storage structure and further improving the storage capacity of the three-dimensional memory.

[0093] In some other embodiments, the base further includes two second contact structures 26 penetrating the first dielectric layer 21 and distributed along a second direction D2 on opposite sides of the first contact structure 25, and the second direction D2 is parallel to the top surface of the substrate 20;

[0094] The plurality of independent conductive portions 30 are respectively located on the surface of the first contact structure 25 and the surface of the second contact structure 26 .

[0095] In some embodiments, the material of the conductive part 30 is a metal material, a polysilicon material or TiN, and the metal material is metal tungsten or metal copper, so that the process of forming the lead-out hole can be further avoided from causing damage to the storage structure by increasing the etching selectivity, and the sensitivity, stability and reliability of the storage structure can be greatly improved, and the service life of the three-dimensional memory can be extended.

[0096] The three-dimensional memory and its manufacturing method provided in this specific embodiment do not need to perform a deep hole etching process for forming a storage hole, which simplifies the manufacturing process of the three-dimensional memory and improves the manufacturing yield of the three-dimensional memory. At the same time, by using a conductive part and a supporting part to jointly form the lower electrode of the storage structure, and the supporting part has a groove exposing the conductive part, so that the storage layer can continuously cover the surface of the supporting part and the inner wall of the groove, and the storage layer is stably supported by the supporting part, thereby forming a three-dimensional structure memory, which helps to increase the storage density and integration of the memory and improve the overall structural stability of the memory. Moreover, the material of the supporting part is a conductive material, thereby increasing the area of ​​the storage structure, so that the polarization area of ​​the storage structure is increased under the same plane area, so that the storage structure can store more polarized charges under the same voltage, increasing the storage capacity of the storage structure, and effectively improving the storage performance of the three-dimensional memory. Moreover, the present invention sets the material of the upper electrode to a metal material or a polysilicon material, which not only increases the etching selectivity when the lead-out hole is subsequently formed, thereby avoiding damage to the storage structure when the lead-out hole is formed, but also can greatly improve the sensitivity, stability and reliability of the storage structure, and extend the service life of the three-dimensional memory.

[0097] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for manufacturing a three-dimensional memory, characterized in that: The steps include: Forming a substrate, the substrate comprising a substrate, a first dielectric layer located on the substrate, and a first contact structure penetrating the first dielectric layer along a first direction, the substrate comprising a top surface and a bottom surface that are relatively distributed, and the first direction perpendicularly intersects with the top surface of the substrate; Depositing a first conductive material on the first dielectric layer to form a conductive portion electrically connected to the first contact structure; Depositing a second conductive material onto the substrate to form a support portion covering the surface of the conductive portion; Etching the support portion above the first contact structure to form a groove above the first contact structure, wherein the groove penetrates the support portion along the first direction and exposes the conductive portion, and the conductive portion and the support portion are used together as a lower electrode; forming a storage layer that continuously covers the surface of the support portion and the inner wall of the groove; A metal material or a polysilicon material is deposited on the substrate to form an upper electrode covering the storage layer. The lower electrode, the storage layer and the upper electrode together constitute a storage structure.

2. The method for manufacturing a three-dimensional memory according to claim 1, characterized in that: The specific steps of forming the substrate include: Providing a substrate, wherein the substrate includes an active region; forming a first dielectric layer on the top surface of the substrate; A first contact structure is formed that penetrates the first dielectric layer along a first direction and is electrically connected to the active area in the substrate.

3. The method for manufacturing a three-dimensional memory according to claim 2, characterized in that: The substrate further includes two second contact structures penetrating the first dielectric layer and distributed along a second direction on opposite sides of the first contact structure, wherein the second direction is parallel to the top surface of the substrate; The specific steps of depositing a first conductive material on the first dielectric layer to form a conductive portion electrically connected to the first contact structure include: The first conductive material is deposited onto the substrate to form the conductive portion that continuously covers the top surface of the first dielectric layer, the first contact structure, and the two second contact structures.

4. The method for manufacturing a three-dimensional memory according to claim 3, characterized in that: After forming the upper electrode covering the storage layer, the method further comprises the following steps: A lead-out structure is formed above the storage structure and electrically connected to the upper electrode.

5. The method for manufacturing a three-dimensional memory according to claim 2, characterized in that: The substrate further includes two second contact structures penetrating the first dielectric layer and distributed along a second direction on opposite sides of the first contact structure, wherein the second direction is parallel to the top surface of the substrate; The specific steps of depositing a first conductive material on the first dielectric layer to form a conductive portion electrically connected to the first contact structure include: Depositing a first conductive material on the substrate to form a first conductive layer continuously covering the top surface of the first dielectric layer, the first contact structure and the two second contact structures; The first conductive layer is etched to form a plurality of independent conductive portions, and the plurality of independent conductive portions are respectively located on the first contact structure surface and the second contact structure surface.

6. The method for manufacturing a three-dimensional memory according to claim 5, characterized in that: A plurality of independent supporting parts are distributed one by one on the plurality of independent conductive parts; The specific steps of etching the support portion to form a groove penetrating the support portion along a first direction and exposing the conductive portion include: The plurality of support portions are etched to form a groove in each of the support portions that penetrates the support portion along the first direction and exposes the conductive portion.

7. The method for manufacturing a three-dimensional memory according to claim 1, characterized in that: The conductive part is made of metal material, polysilicon material or TiN.

8. A three-dimensional memory, characterized in that: include: A base, comprising a substrate, a first dielectric layer located above the substrate, and a first contact structure penetrating the first dielectric layer along a first direction, wherein the substrate comprises a top surface and a bottom surface that are relatively distributed, and the first direction intersects the top surface of the substrate perpendicularly; A storage structure is located on the first dielectric layer along the first direction, the storage structure includes a lower electrode, a storage layer and an upper electrode, the lower electrode includes a conductive part electrically connected to the first contact structure and a supporting part covering the surface of the conductive part, the conductive part is made of a first conductive material, the supporting part is made of a second conductive material, and the supporting part is in contact and electrically connected with the conductive part, the supporting part has a groove that penetrates the supporting part along the first direction and exposes the conductive part, the groove in the supporting part is located above the first contact structure along the first direction, the storage layer continuously covers the surface of the supporting part and the inner wall of the groove, the upper electrode covers the storage layer, and the material of the upper electrode is a metal material or a polysilicon material.

9. The three-dimensional memory according to claim 8, characterized in that: The substrate further includes two second contact structures penetrating the first dielectric layer and distributed along a second direction on opposite sides of the first contact structure, wherein the second direction is parallel to the top surface of the substrate; The conductive portion continuously covers the top surface of the first dielectric layer, the first contact structure and the two second contact structures.

10. The three-dimensional memory according to claim 8, characterized in that: The substrate further includes two second contact structures penetrating the first dielectric layer and distributed along a second direction on opposite sides of the first contact structure, wherein the second direction is parallel to the top surface of the substrate; A plurality of independent conductive portions are respectively located on the first contact structure surface and the second contact structure surface.

11. The three-dimensional memory according to claim 8, characterized in that: The conductive part is made of metal material, polysilicon material or TiN.

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