A design method and system for a ring filter inductor with minimum parasitic capacitance

Abstract

The present invention relates to the field of electronic information technology, and in particular to a method and system for designing a ring filter inductor with minimum parasitic capacitance. The shortest distance between a first-layer single-turn winding and a magnetic core is adjusted, and a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core is used to obtain the parasitic capacitance between the first-layer single-turn winding and the magnetic core. The shortest distance between the first full-layer winding and a second partial-layer winding is adjusted, and a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and a single-turn winding of the second partial-layer winding is used to obtain the parasitic capacitance between the first-layer single-turn winding and the second-layer single-turn winding. The magnetic core potential is adjusted, and a turns percentage calculation model is used to obtain the percentage of the second partial-layer winding and the first full-layer winding turns, thereby obtaining a target ring filter inductor. The present invention minimizes the parasitic capacitance of the ring filter inductor and, by taking into account the curvature of the conductor, makes the calculation of the parasitic capacitance more accurate.

Description

Technical Field

[0001] The present invention relates to the field of electronic information technology, and in particular to a design method and system for a ring filter inductor with minimum parasitic capacitance. Background Art

[0002] With advances in power semiconductor devices, power electronic converters are generally designed to operate at high switching frequencies, offering advantages such as high power density and high efficiency. A key component in power electronic converters is the ring filter inductor, which filters electromagnetic interference. Because the ring filter inductor occupies a large volume within the power electronic converter, it becomes a key obstacle to improving the power density of the power electronic converter. When power electronic converters operate at high switching frequencies, the required inductance of the ring filter inductor decreases, allowing for smaller ring filter inductors, effectively improving the power density and efficiency of the power electronic converter. At high frequencies, the equivalent parallel capacitance of the ring filter inductor resonates with the inductor, forming a capacitive impedance above the self-resonant frequency. This capacitive impedance above the self-resonant frequency effectively reduces the impact of high-frequency noise generated during power electronic converter operation, improving the efficiency and stability of the power electronic converter. However, at high frequencies, the parasitic elements of the ring filter inductor significantly affect its filtering performance. Therefore, how to effectively reduce the parasitic capacitance of the ring filter inductor has become a new problem.

[0003] At present, researchers have proposed a variety of methods to reduce the parasitic components of ring filter inductors, including the removal method of elimination technology. The core of these methods is to optimize the physical structure and material selection of the ring filter inductor to minimize unnecessary capacitance. An effective winding scheme is also very important. As the core component of the ring filter inductor, the winding has a vital impact on the parasitic capacitance of the ring filter inductor. Today, the most common winding schemes are two full-layer winding schemes, including the reverse connection winding scheme and the direct connection winding scheme. Some researchers have proposed that the use of a partial layer winding scheme can significantly reduce the total parasitic capacitance of the ring filter inductor compared with the two existing full-layer winding schemes. The researcher also studied the reverse connection partial layer winding scheme and the direct connection partial layer winding scheme respectively. The research results show that the total parasitic capacitance value of the ring filter inductor using the reverse connection partial layer winding scheme is lower than that of the ring filter inductor using the direct connection partial layer winding scheme.

[0004] Existing research has proposed using a partial-layer winding scheme with inverted connections to reduce the parasitic capacitance of the inductor, but it has not addressed the problem of how to design a ring filter inductor that can minimize the parasitic capacitance while maintaining the inductance value. In addition, because the hardness of the copper wire with an insulating layer prevents it from completely conforming to the surface of the core when it is wound around the magnetic core, the copper wire has a certain curvature. When calculating the parasitic capacitance between a single turn of the first full-layer winding of the ring filter inductor and the magnetic core, the curvature generated when the copper wire is wound around the magnetic core is often not taken into account, resulting in a certain degree of error in the calculated parasitic capacitance between the single turn of the first full-layer winding of the ring filter inductor and the magnetic core. Summary of the Invention

[0005] To this end, the technical problem to be solved by the present invention is to overcome the problem in the prior art of how to design a ring filter inductor that can minimize the parasitic capacitance value while keeping the inductance value unchanged, and the problem that when calculating the parasitic capacitance of the ring filter inductor, the curvature generated when the copper wire is wound is not taken into account, resulting in a certain degree of error in the calculated parasitic capacitance of the ring filter inductor.

[0006] To solve the above technical problems, the present invention provides a method for designing a ring filter inductor with minimum parasitic capacitance, comprising the following steps:

[0007] Adjusting the shortest distance between a single-turn winding of a first full-layer winding of the ring filter inductor and a magnetic core until the shortest distance between the single-turn winding of the first full-layer winding and the magnetic core is at a first maximum critical value, inputting the adjusted shortest distance between the single-turn winding of the first full-layer winding and the magnetic core, the winding structure parameters, the magnetic core height, and the magnetic core width of the ring filter inductor into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core, and obtaining the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core;

[0008] Adjusting the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor until the shortest distance between the first full-layer winding and the second partial-layer winding is at a second maximum critical value, inputting the adjusted shortest distance between the first full-layer winding and the second partial-layer winding and the winding structure parameters of the ring filter inductor into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and a single-turn winding of the second partial-layer winding, and obtaining the parasitic capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding;

[0009] Adjust the core potential so that it is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient;

[0010] Substitute the target voltage proportional coefficient into the total parasitic capacitance expression of the ring filter inductor to obtain a turns percentage calculation model. Input the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core, and the parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding into the turns percentage calculation model to obtain the turns percentage of the second partial-layer winding and the first full-layer winding.

[0011] Based on the total number of turns of the ring filter inductor and the percentage of the number of turns of the second-layer partial winding and the first-layer full winding, the number of turns of the first-layer full winding and the number of turns of the second-layer partial winding are calculated respectively, so as to obtain a target ring filter inductor with the lowest parasitic capacitance;

[0012] The process of obtaining the parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the magnetic core includes:

[0013] The arc produced when the copper wire is wound around the magnetic core is regarded as a parabola, and the parabola height function is used to simulate the shortest distance between a single turn of the first full-layer winding and the magnetic core;

[0014] Based on the shortest distance between a single-turn winding of the first full-layer winding and the magnetic core, the electric field line path equation between a single-turn winding of the first full-layer winding and the magnetic core is constructed;

[0015] The winding arc length function is used to simulate the winding length of the single-turn winding on the inner, outer, upper and lower surfaces of the magnetic core respectively;

[0016] The air gap capacitance between a single turn of the first full-layer winding and the magnetic core is equivalent to a parallel plate capacitance. The air gap capacitance between a single turn of the first full-layer winding and the magnetic core is obtained according to the calculation formula of the parallel plate capacitance.

[0017] The insulation layer capacitance between a single turn of the first full-layer winding and the magnetic core is equivalent to the capacitance of a cylindrical capacitor. The insulation layer capacitance between a single turn of the first full-layer winding and the magnetic core is obtained according to the calculation formula of the cylindrical capacitor capacitance.

[0018] Based on the air gap capacitance between a single-turn winding of the first full-layer winding and the magnetic core and the insulation layer capacitance, a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core is obtained.

[0019] Preferably, obtaining the calculation model of the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core includes:

[0020] The arc produced when the copper wire is wound around the magnetic core is regarded as a parabola, and the parabola height function is used to simulate the shortest distance between the single-turn winding and the magnetic core on the inside, outside, top surface and bottom surface of the magnetic core respectively;

[0021] Based on the shortest distance between the single-turn winding on the inner side, outer side, upper surface and lower surface of the magnetic core and the magnetic core, the electric field line path equations between the single-turn winding on the inner side, outer side, upper surface and lower surface of the magnetic core and the magnetic core are constructed;

[0022] The winding arc length function is used to simulate the winding length of the single-turn winding on the inner side, outer side, upper surface and lower surface of the magnetic core respectively;

[0023] Based on the winding lengths of the single-turn windings on the inside, outside, top and bottom surfaces of the magnetic core and the electric field line path equations between the single-turn windings on the inside, outside, top and bottom surfaces of the magnetic core and the magnetic core, the capacitance in the air gap between the single-turn winding of the first full-layer winding and the magnetic core is equivalent to a parallel plate capacitor. According to the calculation formula of the parallel plate capacitor, the air gap capacitance between the single-turn winding of the first full-layer winding on the inside, outside, top and bottom surfaces of the magnetic core and the magnetic core is obtained respectively;

[0024] The insulation layer capacitance between a single turn of the first full-layer winding and the magnetic core is equivalent to the capacitance of a cylindrical capacitor. According to the calculation formula of the capacitance of a cylindrical capacitor, the insulation layer capacitance between a single turn of the first full-layer winding and the magnetic core on the inner, outer, upper and lower surfaces of the magnetic core is obtained respectively.

[0025] Based on the air gap capacitance and insulation layer capacitance between a single-turn winding of the first full-layer winding on the inner, outer, upper and lower surfaces of the core and the core, the parasitic capacitance between a single-turn winding of the first full-layer winding on the inner, outer, upper and lower surfaces of the core and the core is obtained respectively;

[0026] Based on the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core on the inner side, outer side, upper surface and lower surface of the magnetic core, a parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the magnetic core is obtained;

[0027] The parasitic capacitance calculation model between the single-turn winding and the magnetic core of the first full-layer winding is expressed as:

[0028]

[0029] Among them, C tc It represents the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core, C tc_in It represents the parasitic capacitance between the single-turn winding of the first full-layer winding inside the core and the core, C tc_out It represents the parasitic capacitance between the single-turn winding of the first full-layer winding outside the core and the core, C tc_ul It represents the parasitic capacitance between the single-turn winding of the first full-layer winding on the upper or lower surface of the core and the core;

[0030] h represents the core height, w represents the core width, ε rrepresents the dielectric constant of the winding insulation layer, ε0 represents the dielectric constant of vacuum, D0 represents the outermost diameter of the copper wire in the winding, D i represents the inner diameter of the copper wire in the winding, θ1 represents the angle between the electric field line from the single turn winding of the first full layer winding to the magnetic core and the horizontal axis of the coordinate system where the electric field line is located, and f in (y) represents the winding arc length function about the vertical axis y, simulating the winding length of a single turn winding inside or outside the core, f ul (x) represents the arc length function of the winding about the horizontal axis x, simulating the winding length of a single turn winding on the upper or lower surface of the core, δ tc_in (y) represents the parabolic height function about the vertical axis y, simulating the shortest distance between a single-turn winding of the first full-layer winding inside or outside the core and the core, δ tc_ul (x) represents the parabolic height function about the horizontal axis x, simulating the shortest distance between a single-turn winding of the first full-layer winding on the upper or lower surface of the core and the core.

[0031] Preferably, the process of obtaining the parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is:

[0032] The air gap capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is equivalent to a parallel plate capacitance, and the air gap capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is obtained according to the calculation formula of the parallel plate capacitance; the insulation layer capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is equivalent to the capacitance of a cylindrical capacitor, and the insulation layer capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is obtained according to the calculation formula of the capacitance of a cylindrical capacitor;

[0033] Based on the air gap capacitance and insulation layer capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding, a parasitic capacitance calculation model between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is obtained;

[0034] The parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and a single-turn winding of the second partial-layer winding is expressed as:

[0035]

[0036] Among them, C ll1 The parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is C. tti It represents the insulation capacitance between a single turn of the second partial layer winding and a single turn of the first full layer winding, C ttgThe air gap capacitance between a single turn of the second partial layer winding and a single turn of the first full layer winding, dC tti The infinitesimal element representing the insulation capacitance between a single turn of the second partial winding and a single turn of the first full winding, dC ttg The infinitesimal element representing the air gap capacitance between a single turn of the second partial layer winding and a single turn of the first full layer winding;

[0037] d ll Indicates the shortest distance between the first full layer winding and the second partial layer winding, L T Indicates the average turn length of a single-turn winding, ε r represents the dielectric constant of the winding insulation layer, ε0 represents the dielectric constant of vacuum, D0 represents the outermost diameter of the copper wire in the winding, D i represents the inner diameter of the copper wire in the winding, and θ2 represents the angle between the electric field line from the single-turn winding of the second partial layer to the single-turn winding of the first full layer and the vertical axis of the coordinate system where the electric field line is located.

[0038] Preferably, obtaining a turns percentage calculation model based on the total parasitic capacitance expression of the ring filter inductor includes:

[0039] Substitute the target voltage proportional coefficient into the total parasitic capacitance expression of the loop filter inductor, take the derivative of the total parasitic capacitance expression of the loop filter inductor, and set it equal to zero to obtain the turns percentage calculation model; the turns percentage calculation model is expressed as:

[0040]

[0041] Among them, γ c Indicates the percentage of the second layer partial winding and the first layer full winding turns, C ll1 The parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is C. tc It represents the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core.

[0042] Preferably, the minimum parasitic capacitance of the target ring filter inductor is:

[0043]

[0044] Among them, C eq_min represents the minimum parasitic capacitance of the target ring filter inductor, C ll1 The parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is C. tc It represents the parasitic capacitance between a single-turn winding of the first full-layer winding and the magnetic core, and N represents the total number of turns of the target ring filter inductor.

[0045] Preferably, the ring filter inductor includes: a first-layer full-layer winding and a partial-layer winding are connected in a reverse manner.

[0046] Preferably, the structural parameters of the ring filter inductor include: the dielectric constant of the winding insulation layer, the inner diameter of the copper wire in the winding, the outermost diameter of the copper wire in the winding, the average length of a single-turn winding, the shortest distance between the first full-layer winding and the second partial-layer winding, the shortest distance from a single-turn winding of the first full-layer winding on the inside and outside of the magnetic core to the magnetic core, and the shortest distance from a single-turn winding of the first full-layer winding on the upper surface and lower surface of the magnetic core to the magnetic core.

[0047] Preferably, the adjustment of the shortest distance between a single-turn winding of the first full-layer winding of the annular filter inductor and the magnetic core includes: increasing the shortest distance between a single-turn winding of the first full-layer winding of the annular filter inductor and the magnetic core by adding a plastic gasket between the first full-layer winding and the magnetic core; the adjustment of the shortest distance between the first full-layer winding and the second partial-layer winding of the annular filter inductor includes: increasing the shortest distance between the first full-layer winding and the second partial-layer winding by increasing the thickness of the insulation layer between the first full-layer winding and the second partial-layer winding.

[0048] Preferably, the adjusting the magnetic core potential so that the magnetic core potential is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient includes: connecting the middle turn of the first full-layer winding to the outer surface of the magnetic core by soldering so that the magnetic core potential is equal to the middle potential of the first full-layer winding.

[0049] The present invention also provides a minimum parasitic capacitance design system for a ring filter inductor, comprising: a single-turn winding to magnetic core parasitic capacitance calculation module, configured to adjust the shortest distance between a single-turn winding of a first full-layer winding of the ring filter inductor and the magnetic core until the shortest distance between a single-turn winding of the first full-layer winding and the magnetic core reaches a first maximum critical value; the adjusted shortest distance between a single-turn winding of the first full-layer winding and the magnetic core, along with winding structure parameters, magnetic core height, and magnetic core width of the ring filter inductor, are input into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core, thereby obtaining the parasitic capacitance between a single-turn winding of the first full-layer winding and the magnetic core;

[0050] a layer-to-layer parasitic capacitance calculation module, configured to adjust the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor until the shortest distance between the first full-layer winding and the second partial-layer winding is at a second maximum critical value, input the adjusted shortest distance between the first full-layer winding and the second partial-layer winding, along with the winding structure parameters, magnetic core height, and magnetic core width of the ring filter inductor, into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and a single-turn winding of the second partial-layer winding, and obtain the parasitic capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding;

[0051] A target voltage proportional coefficient acquisition module is used to adjust the core potential so that the core potential is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient;

[0052] A turns percentage calculation module is used to substitute the target voltage proportional coefficient into the total parasitic capacitance expression of the ring filter inductor to obtain a turns percentage calculation model, and input the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core, and the parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding into the turns percentage calculation model to obtain the turns percentage of the second partial-layer winding and the first full-layer winding;

[0053] The target ring filter inductor acquisition module is used to calculate the number of turns of the first layer full winding and the number of turns of the second layer partial winding based on the total number of turns of the ring filter inductor and the percentage of the number of turns of the second layer partial winding and the first layer full winding, so as to obtain the target ring filter inductor with the lowest parasitic capacitance.

[0054] The above technical solution of the present invention has the following beneficial effects compared with the prior art:

[0055] The present invention discloses a method for designing a ring filter inductor with minimum parasitic capacitance, which adjusts the shortest distance between a single-turn winding of the first full-layer winding of the ring filter inductor and the magnetic core, and obtains the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core through a parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the magnetic core; adjusts the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor, and obtains the parasitic capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding through a parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding. Capacitor; adjust the core potential so that the core potential is equal to the middle potential of the first full-layer winding, and obtain the target voltage proportional coefficient; substitute the target voltage proportional coefficient into the total parasitic capacitance expression of the ring filter inductor to obtain the turn percentage calculation model, input the parasitic capacitance between the single turn winding of the first full-layer winding and the core, and the parasitic capacitance between the single turn winding of the first full-layer winding and the single turn winding of the second partial-layer winding into the turn percentage calculation model, obtain the percentage of the second partial-layer winding and the first full-layer winding, calculate the number of turns of the first full-layer winding and the number of turns of the second partial winding, and obtain the target ring filter inductor with the lowest parasitic capacitance. The above method can obtain a ring filter inductor with the lowest parasitic capacitance, effectively reduce the parasitic effects caused by the ring filter inductor in the power electronic circuit, and improve the working efficiency of the inductor.

[0056] In addition, when calculating the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core, the arc generated when the copper wire is wound around the magnetic core is regarded as a parabola, and the parabola height function is used to simulate the shortest distance between the single-turn winding on the inside, outside, upper surface and lower surface of the magnetic core and the magnetic core respectively. Based on the shortest distance between the single-turn winding on the inside, outside, upper surface and lower surface of the magnetic core and the magnetic core, the electric field line path equation between the single-turn winding on the inside, outside, upper surface and lower surface of the magnetic core and the magnetic core is constructed, and the winding arc length function is used to simulate the electric field line path equation between the single-turn winding on the inside, outside, upper surface and lower surface of the magnetic core and the magnetic core respectively. The winding length of the single-turn winding on the surface of the magnetic core is calculated; the air gap capacitance and insulation layer capacitance between the single-turn winding of the first layer of full-layer winding on the inner, outer, upper and lower surfaces of the magnetic core and the magnetic core are calculated respectively. Based on the air gap capacitance and insulation layer capacitance between the single-turn winding of the first layer of full-layer winding on the inner, outer, upper and lower surfaces of the magnetic core and the magnetic core, the parasitic capacitance between the single-turn winding of the first layer of full-layer winding and the magnetic core is obtained; the curvature generated when the copper wire is wound around the magnetic core is fully considered, making the calculated parasitic capacitance between the single-turn winding of the first layer of full-layer winding and the magnetic core more accurate. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] In order to make the content of the present invention more clearly understood, the present invention is further described in detail below based on specific embodiments of the present invention in conjunction with the accompanying drawings, wherein:

[0058] Figure 1 The present invention is a flowchart of the steps of a method for designing a ring filter inductor with minimum parasitic capacitance.

[0059] Figure 2 It is a schematic diagram of the interior, exterior, upper surface and lower surface of a magnetic core in a design method of a ring filter inductor with minimum parasitic capacitance according to the present invention.

[0060] Figure 3 The diagram is a schematic diagram of the cross-sectional area of ​​a magnetic core and the shape of a single-turn winding wound on the magnetic core in a design method of a ring filter inductor with minimum parasitic capacitance according to the present invention.

[0061] Figure 4 The diagram is a schematic diagram of the distance from the cross section of a single-turn winding with an insulating layer to the magnetic core in a design method of a ring filter inductor with minimum parasitic capacitance according to the present invention.

[0062] Figure 5 The diagram is a schematic diagram of the arc produced when the copper wire inside the magnetic core is wound around the magnetic core in a design method of a ring filter inductor with minimum parasitic capacitance according to the present invention.

[0063] Figure 6 It is a schematic diagram of the arc generated when the copper wire on the upper surface of the magnetic core is wound around the magnetic core in a design method of a ring filter inductor with minimum parasitic capacitance of the present invention.

[0064] Figure 7 The electric field line path diagram of a single-turn winding of a first full-layer winding and a single-turn winding of a second partial-layer winding in a design method of a ring filter inductor with minimum parasitic capacitance of the present invention.

[0065] Figure 8 The present invention is a schematic diagram of a reverse connection scheme of a first-layer full-layer winding and a second-layer partial-layer winding in a design method of a ring filter inductor with minimum parasitic capacitance.

[0066] Figure 9 This is a system structure diagram of a ring filter inductor design system with minimum parasitic capacitance according to the present invention. DETAILED DESCRIPTION

[0067] The present invention will be further described below with reference to the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it. However, the embodiments are not intended to limit the present invention.

[0068] Reference Figure 1 As shown, the present invention provides a method for designing a ring filter inductor with minimum parasitic capacitance, comprising the following steps:

[0069] In the embodiment of the present invention, preferably, Figure 8 As shown, Figure 8 This is a schematic diagram of a reverse connection scheme for a first-layer full-layer winding and a second-layer partial-layer winding. The ring filter inductor includes: a magnetic core and a winding. The winding includes a first-layer full-layer winding and a second-layer partial-layer winding. The number of turns of the first-layer full-layer winding is greater than that of the second-layer partial-layer winding, and the total number of turns of the first-layer full-layer winding and the second-layer partial-layer winding is constant. The first-layer full-layer winding and the partial-layer winding are connected in a reverse manner. The use of the second-layer partial-layer winding can effectively reduce the parasitic capacitance of the inductor. Ensuring that the total number of turns remains constant in the design can ensure that the inductance value of the designed inductor remains stable.

[0070] The structural parameters of the ring filter inductor include: the total number of turns N of the ring filter inductor, the relative dielectric constant ε of the winding insulation layer r , the inner diameter D of the copper wire in the winding i , the outermost diameter of the copper wire in the winding D0, the average turn length of a single turn winding L T The shortest distance d between the first full layer winding and the second partial layer winding ll , the shortest distance δ from the single-turn winding of the first full-layer winding inside and outside the core to the core tc_in , the shortest distance δ from the first full-layer winding of the single-turn winding on the upper and lower surfaces of the core to the core tc_ul .

[0071] Step S1: adjusting the shortest distance between a single-turn winding of a first full-layer winding of a ring filter inductor and a magnetic core until the shortest distance between a single-turn winding of the first full-layer winding and the magnetic core is at a first maximum critical value, inputting the adjusted shortest distance between a single-turn winding of the first full-layer winding and the magnetic core and the winding structure parameters, magnetic core height, and magnetic core width of the ring filter inductor into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core to obtain the parasitic capacitance between a single-turn winding of the first full-layer winding and the magnetic core;

[0072] In this embodiment, preferably, the process of obtaining the parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the magnetic core includes:

[0073] like Figure 2 As shown, Figure 2 Figure 3 is a schematic diagram of the inside, outside, top and bottom surfaces of the magnetic core. The capacitance in the air gap between a single turn of the first full-layer winding and the magnetic core is equivalent to a parallel plate capacitor. According to the calculation formula of the parallel plate capacitor, the air gap capacitance between a single turn of the first full-layer winding and the magnetic core is obtained on the inside, outside, top and bottom surfaces of the magnetic core respectively.

[0074] The capacitance of a parallel plate capacitor satisfies: Where S is the plate area and x is the distance between the plates.

[0075] like Figure 4 As shown, Figure 4 The shortest distance between the single-turn winding of the first full-layer winding and the core is δ tc_in , X(θ1) is the length of the path that the electric field lines take in the air between the single turn winding of the first full layer winding and the magnetic core.

[0076] like Figure 3 As shown, Figure 3 The cross-sectional area of ​​the core and the shape of the single-turn winding wound on the core are shown in the figure. It can be seen that the shortest distance δ between the single-turn winding of the first full-layer winding and the core is tc_in It is not a constant. When the copper wire with an insulating layer is wound around the magnetic core, the hardness of the copper wire prevents it from completely fitting the surface of the magnetic core, so the copper wire will have a certain curvature.

[0077] For more accurate calculations, the arc produced when the copper wire is wound around the magnetic core is considered as a parabola, and the parabola height function δ about the vertical axis y is used. tc_in (y) Simulate the shortest distance between the single-turn winding inside and outside the core and the core, using the parabolic height function δ about the horizontal axis x tc_ul (x) Simulate the shortest distance between the single-turn winding on the upper and lower surfaces of the core and the core.

[0078] like Figure 5 As shown, Figure 5 This is a schematic diagram of the arc generated when the copper wire inside the core is wound onto the core. The path taken by the electric field lines in the air gap between the single-turn winding and the core adopts a traditional straight path, that is, X(θ1) takes a straight path, and the winding length L inside the core is T_in is the arc length of the parabola, using the winding arc length function f about the vertical axis y in (y) The winding lengths of the single-turn windings inside and outside the simulated core.

[0079] like Figure 4 、 Figure 5 As shown in the figure, the length of the electric field line path between the single-turn winding of the first full-layer winding inside and outside the core and the air gap of the core satisfies the equation:

[0080]

[0081] Then the arc length of the single-turn winding of the first full-layer winding inside the core is:

[0082]

[0083] The infinitesimal expression of the air gap capacitance between the single-turn winding inside the core and the core is:

[0084]

[0085] dC tcg_in It is the infinitesimal element of the parasitic capacitance of the air gap between the single-turn winding inside the core and the core.

[0086] The air gap capacitance between the single-turn winding inside the core and the core is expressed as:

[0087]

[0088] Without considering the core insulation capacitance, the insulation capacitance from a single turn of the first full-layer winding to the core is the insulation capacitance of the single turn winding itself. Considering it as a cylindrical capacitor, the formula for calculating the parasitic insulation capacitance from a single turn of the first full-layer winding to the core is:

[0089]

[0090] Among them, C tci is the parasitic capacitance of the insulation layer between the single-turn winding of the first full-layer winding and the magnetic core. The length of the single-turn winding inside the magnetic core satisfies: The insulation capacitance between a single-turn winding of the first full-layer winding inside the core and the core is expressed as:

[0091]

[0092] Based on the air gap capacitance and insulation layer capacitance between the single-turn winding inside the core and the core, the parasitic capacitance between the single-turn winding inside the core and the core is obtained, which is expressed as:

[0093]

[0094] Depend on Figure 3 It can be seen that the shortest distance between the single-turn winding on the outside of the core and the core is equal to the shortest distance between the single-turn winding on the inside of the core and the core. Therefore, the air gap capacitance between the single-turn winding on the outside of the core and the core is also equal to the air gap capacitance between the single-turn winding on the inside of the core and the core. In addition, the insulation layer capacitance between the single-turn winding on the outside of the core and the core is also equal to the insulation layer capacitance between the single-turn winding on the inside of the core and the core. Since the length of the single-turn winding on the outside of the core is equal to the length of the single-turn winding on the inside of the core, it can be concluded that the total capacitance between the single-turn winding on the outside of the core and the core is equal to that inside the core, that is, C tc_out =C tc_in .

[0095] like Figure 6As shown, Figure 6 This is a schematic diagram of the arc generated when the copper wire on the upper surface of the core is wound around the core. It can be seen that the winding length L on the upper surface or lower surface of the core T_ul is the arc length of a parabola. The present invention uses the winding arc length function f about the horizontal axis x ul (x) The winding lengths of the single-turn windings on the upper and lower surfaces of the simulated core.

[0096] The infinitesimal element of the arc length of the winding on the upper surface or lower surface of the core is: The parasitic capacitance between a single turn of the first full layer winding on the top surface of the core and the core is equal to the parasitic capacitance between a single turn of the first full layer winding on the bottom surface of the core and the core. The total parasitic capacitance between a single turn of the first full layer winding on the top or bottom surface of the core and the core is expressed as:

[0097]

[0098] Based on the air gap capacitance and insulation layer capacitance between a single-turn winding of the first full-layer winding and the core on the inner, outer, upper, and lower surfaces of the core, the parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the core is obtained, which is expressed as:

[0099]

[0100] Among them, C tc It represents the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core, C tc_in It represents the parasitic capacitance between the single-turn winding of the first full-layer winding inside the core and the core, C tc_out It represents the parasitic capacitance between the single-turn winding of the first full-layer winding outside the core and the core, C tc_ul It represents the parasitic capacitance between the single-turn winding of the first full-layer winding on the upper or lower surface of the core and the magnetic core, θ1 represents the angle between the electric field line from the single-turn winding of the first full-layer winding to the magnetic core and the horizontal axis of the coordinate system in which the electric field line is located, and ε0 represents the dielectric constant of vacuum.

[0101] In an embodiment of the present invention, preferably, the adjusting the shortest distance between a single-turn winding of the first full-layer winding of the ring filter inductor and the magnetic core includes: increasing the shortest distance between a single-turn winding of the first full-layer winding of the ring filter inductor and the magnetic core by adding a plastic gasket between the first full-layer winding and the magnetic core. According to the parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core, it can be known that the shortest distance between a single-turn winding of the first full-layer winding and the magnetic core is inversely proportional to the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core. Therefore, increasing the shortest distance between a single-turn winding of the first full-layer winding of the ring filter inductor and the magnetic core can effectively reduce the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core.

[0102] Step S2: adjusting the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor until the shortest distance between the first full-layer winding and the second partial-layer winding is at a second maximum critical value, inputting the adjusted shortest distance between the first full-layer winding and the second partial-layer winding, along with the winding structure parameters, magnetic core height, and magnetic core width of the ring filter inductor, into a parasitic capacitance calculation model between a single turn of the first full-layer winding and a single turn of the second partial-layer winding, to obtain the parasitic capacitance between the single turn of the first full-layer winding and the single turn of the second partial-layer winding;

[0103] The parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and a single-turn winding of the second partial-layer winding is obtained by:

[0104] Around the core, the shortest distance from a single turn of the first full-layer winding to a single turn of the second partial-layer winding is consistent.

[0105] The infinitesimal capacitance in the air gap between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is:

[0106]

[0107] like Figure 6 As shown, Figure 6 is the electric field line path diagram from the single-turn winding of the second partial layer winding to the single-turn winding of the first full layer winding, x(θ2) is the length of the path taken by the electric field line in the air gap from the single-turn winding of the second partial layer winding to the single-turn winding of the first full layer winding, satisfying:

[0108] x(θ2)=D0(1-cosθ2)+d ll ,

[0109] The infinitesimal capacitance in the air gap between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is:

[0110]

[0111] On the other hand, there are two layers of insulation between the single-turn winding of the second partial layer winding and the single-turn winding of the first full layer winding. Therefore, the calculation formula for the parasitic capacitance of the insulation layer between the single-turn winding of the first full layer winding and the single-turn winding of the second partial layer winding is:

[0112]

[0113] Among them, C tti It is the parasitic capacitance of the insulation layer between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding.

[0114] The infinitesimal element of the parasitic capacitance of the insulation layer between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is:

[0115]

[0116] According to the air gap capacitance and insulation layer capacitance of the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding, the parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is obtained, which is expressed as:

[0117]

[0118] Among them, C ll1 The parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is C. tti It represents the insulation capacitance between a single turn of the second partial layer winding and a single turn of the first full layer winding, C ttg The air gap capacitance dC between a single turn of the second partial layer winding and a single turn of the first full layer winding is represented tti The infinitesimal element representing the insulation capacitance between a single turn of the second partial winding and a single turn of the first full winding, dC ttg The infinitesimal element representing the air gap capacitance between a single turn of the second partial layer winding and a single turn of the first full layer winding;

[0119] d ll Indicates the shortest distance between the first full layer winding and the second partial layer winding, L T Indicates the average turn length of a single-turn winding, ε r represents the dielectric constant of the winding insulation layer, ε0 represents the dielectric constant of vacuum, D0 represents the outermost diameter of the copper wire in the winding, D irepresents the inner diameter of the copper wire in the winding, and θ2 represents the angle between the electric field line from the single-turn winding of the second partial layer to the single-turn winding of the first full layer and the vertical axis of the coordinate system where the electric field line is located.

[0120] In an embodiment of the present invention, preferably, the adjusting the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor includes: increasing the shortest distance between the first full-layer winding and the second partial-layer winding by increasing the thickness of the insulation layer between the first full-layer winding and the second partial-layer winding. According to the parasitic capacitance calculation model between a single turn of the first full-layer winding and a single turn of the second partial-layer winding, it can be known that the shortest distance between the first full-layer winding and the second partial-layer winding is inversely proportional to the parasitic capacitance between the single turn of the first full-layer winding and the single turn of the second partial-layer winding. Therefore, increasing the shortest distance between the first full-layer winding and the second partial-layer winding can effectively reduce the parasitic capacitance between the single turn of the first full-layer winding and the single turn of the second partial-layer winding.

[0121] Step S3: adjusting the core potential so that the core potential is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient;

[0122] The parasitic capacitance expression between the first full layer winding and the magnetic core is:

[0123]

[0124] Among them, C1′ ,0 represents the parasitic capacitance between the first full-layer winding and the magnetic core, N represents the total number of turns of the ring filter inductor, γ represents the percentage of the second partial-layer winding and the first full-layer winding turns, k represents the voltage proportional coefficient, C lc,plate represents the parasitic capacitance when the first full layer of winding is not connected to the core, and

[0125] C tc It represents the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core.

[0126] Based on the calculation formula of the parasitic capacitance between the first full-layer winding and the magnetic core, it is found that when the voltage proportional coefficient is -0.5, that is, the target voltage proportional coefficient is -0.5, the parasitic capacitance between the first full-layer winding and the magnetic core reaches the minimum. Therefore, the magnetic core potential is adjusted so that the magnetic core potential is equal to the middle potential of the first full-layer winding.

[0127] In an embodiment of the present invention, preferably, the adjusting the magnetic core potential so that the magnetic core potential is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient includes: connecting the middle turn of the first full-layer winding to the outer surface of the magnetic core by soldering, so that the magnetic core potential is equal to the middle potential of the first full-layer winding.

[0128] Step S4: Substituting the target voltage proportional coefficient into the total parasitic capacitance expression of the ring filter inductor to obtain a turns percentage calculation model, inputting the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core, and the parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding into the turns percentage calculation model, and obtaining the turns percentage of the second partial-layer winding to the first full-layer winding;

[0129] Assume that the first full-layer winding has N0 turns and the second partial-layer winding has γN0 turns, then:

[0130]

[0131] Where N0 is the number of turns of the first full-layer winding, γ is the percentage of the number of turns of the second partial-layer winding to the number of turns of the first full-layer winding, γN0 is the number of turns of the second partial-layer winding, the length of the first full-layer winding is: w = N0D0, and the length of the winding of the second partial layer is: γw = γN0D0.

[0132] If the capacitance between the layers of two independent, unconnected full-layer windings is considered as a parallel plate capacitance, then:

[0133]

[0134] Among them, C LL The capacitance of the independent unconnected full-layer winding and full-layer winding, C ll1 is the capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding;

[0135] The total parasitic capacitance of the ring filter inductor is expressed as:

[0136]

[0137] C′ 1,0 Represents the parasitic capacitance between the first full layer winding and the core, C' 2,1 It represents the parasitic capacitance between the second partial layer winding and the first full layer winding, and k represents the voltage proportional coefficient.

[0138] C LL , C lc,plate , target voltage proportional coefficient K c =-0.5Substitute into C eq In the expression, we get:

[0139]

[0140] in, Based on the total parasitic capacitance expression of the loop filter inductor, the total parasitic capacitance expression of the loop filter inductor is derived and set equal to zero to obtain a turns percentage calculation model;

[0141]

[0142] Among them, γ c Indicates the percentage of the second layer partial winding and the first layer full winding turns, C ll1 It represents the parasitic capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding. N represents the total number of turns of the ring filter inductor. C tc It represents the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core, C LL Represents the parasitic capacitance between two independent full-layer winding layers.

[0143] Step S5: Based on the total number of turns of the ring filter inductor and the percentage of the number of turns of the second partial layer winding to the first full layer winding, respectively, the number of turns of the first full layer winding and the number of turns of the second partial layer winding are calculated to obtain a target ring filter inductor with the lowest parasitic capacitance;

[0144] In this embodiment, preferably, the minimum parasitic capacitance of the target ring filter inductor is:

[0145]

[0146] Among them, C eq_min represents the minimum parasitic capacitance of the target ring filter inductor, C ll1 The parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is C. tc It represents the parasitic capacitance between a single-turn winding of the first full-layer winding and the magnetic core, and N represents the total number of turns of the target ring filter inductor.

[0147] According to the number of turns N0 of the first layer winding and the number of turns γ of the second layer partial layer winding c N0 is used to wind the ring filter inductor, and the two layers are connected using a reverse winding scheme. This allows the ring filter inductor to achieve the lowest parasitic capacitance while maintaining the same inductance value. Based on the parasitic capacitance calculation formula of the target ring filter inductor, the specific value of the designed minimum parasitic capacitance can be calculated, providing a pre-estimation method for inductor design.

[0148] like Figure 9As shown, the second embodiment of the present invention further provides a system for designing the minimum parasitic capacitance of a ring filter inductor, including:

[0149] The single-turn winding to magnetic core parasitic capacitance calculation module 10 is used to adjust the shortest distance between the single-turn winding of the first full-layer winding of the ring filter inductor and the magnetic core until the shortest distance between the single-turn winding of the first full-layer winding and the magnetic core is at a first maximum critical value, and the adjusted shortest distance between the single-turn winding of the first full-layer winding and the magnetic core and the winding structure parameters, magnetic core height and magnetic core width of the ring filter inductor are input into the parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the magnetic core to obtain the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core;

[0150] The layer-to-layer parasitic capacitance calculation module 20 is configured to adjust the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor until the shortest distance between the first full-layer winding and the second partial-layer winding reaches a second maximum critical value, input the adjusted shortest distance between the first full-layer winding and the second partial-layer winding, and the winding structure parameters, magnetic core height, and magnetic core width of the ring filter inductor into a parasitic capacitance calculation model between a single turn of the first full-layer winding and a single turn of the second partial-layer winding, and obtain the parasitic capacitance between the single turn of the first full-layer winding and the single turn of the second partial-layer winding;

[0151] The target voltage proportional coefficient acquisition module 30 is used to adjust the core potential so that the core potential is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient;

[0152] The turns percentage calculation module 40 is configured to substitute the target voltage proportional coefficient into the total parasitic capacitance expression of the ring filter inductor to obtain a turns percentage calculation model, input the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core, and the parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding into the turns percentage calculation model, and obtain the turns percentage of the second partial-layer winding to the first full-layer winding;

[0153] The target ring filter inductor acquisition module 50 is used to calculate the number of turns of the first full-layer winding and the number of turns of the second partial-layer winding based on the total number of turns of the ring filter inductor and the percentage of the number of turns of the second partial-layer winding and the first full-layer winding, respectively, to obtain a target ring filter inductor with the lowest parasitic capacitance.

[0154] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0155] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0156] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0157] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 The steps for the function specified in one or more boxes.

[0158] Obviously, the above embodiments are merely examples for clarity of explanation and are not intended to limit the implementation methods. Those skilled in the art will appreciate that other variations or modifications can be made based on the above description. It is not necessary and impossible to enumerate all implementation methods here. Obvious variations or modifications arising therefrom remain within the scope of protection of the present invention.

Claims

1. A method for designing a ring filter inductor with minimum parasitic capacitance, characterized in that: The following steps are involved: Adjusting the shortest distance between a single-turn winding of a first full-layer winding of the ring filter inductor and a magnetic core until the shortest distance between the single-turn winding of the first full-layer winding and the magnetic core is at a first maximum critical value, inputting the adjusted shortest distance between the single-turn winding of the first full-layer winding and the magnetic core, the winding structure parameters, the magnetic core height, and the magnetic core width of the ring filter inductor into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core, and obtaining the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core; Adjusting the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor until the shortest distance between the first full-layer winding and the second partial-layer winding is at a second maximum critical value, inputting the adjusted shortest distance between the first full-layer winding and the second partial-layer winding and the winding structure parameters of the ring filter inductor into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and a single-turn winding of the second partial-layer winding, and obtaining the parasitic capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding; Adjust the core potential so that it is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient; Substitute the target voltage proportional coefficient into the total parasitic capacitance expression of the ring filter inductor to obtain a turns percentage calculation model. Input the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core, and the parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding into the turns percentage calculation model to obtain the turns percentage of the second partial-layer winding and the first full-layer winding. Based on the total number of turns of the ring filter inductor and the percentage of the number of turns of the second-layer partial winding and the first-layer full winding, the number of turns of the first-layer full winding and the number of turns of the second-layer partial winding are calculated respectively, so as to obtain a target ring filter inductor with the lowest parasitic capacitance; The process of obtaining the parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the magnetic core includes: considering the arc generated when the copper wire is wound around the magnetic core as a parabola, and using the parabola height function to simulate the shortest distance between the single-turn winding of the first full-layer winding and the magnetic core; Based on the shortest distance between a single-turn winding of the first full-layer winding and the magnetic core, the electric field line path equation between a single-turn winding of the first full-layer winding and the magnetic core is constructed; The winding arc length function is used to simulate the winding length of the single-turn winding on the inner, outer, upper and lower surfaces of the magnetic core respectively; The air gap capacitance between a single turn of the first full-layer winding and the magnetic core is equivalent to a parallel plate capacitance. The air gap capacitance between a single turn of the first full-layer winding and the magnetic core is obtained according to the calculation formula of the parallel plate capacitance. The insulation layer capacitance between a single turn of the first full-layer winding and the magnetic core is equivalent to the capacitance of a cylindrical capacitor. The insulation layer capacitance between a single turn of the first full-layer winding and the magnetic core is obtained according to the calculation formula of the cylindrical capacitor capacitance. Based on the air gap capacitance between a single-turn winding of the first full-layer winding and the magnetic core and the insulation layer capacitance, a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core is obtained.

2. The method for designing a ring filter inductor with minimum parasitic capacitance according to claim 1, wherein: Obtaining the parasitic capacitance calculation model between the single-turn winding and the magnetic core of the first full-layer winding, including: The arc produced when the copper wire is wound around the magnetic core is regarded as a parabola, and the parabola height function is used to simulate the shortest distance between the single-turn winding and the magnetic core on the inside, outside, top surface and bottom surface of the magnetic core respectively; Based on the shortest distance between the single-turn winding on the inside, outside, top and bottom surfaces of the core and the core, the electric field line path equations between the single-turn winding on the inside, outside, top and bottom surfaces of the core and the core are constructed; the winding arc length function is used to simulate the winding length of the single-turn winding on the inside, outside, top and bottom surfaces of the core respectively; Based on the winding lengths of the single-turn windings on the inside, outside, top and bottom surfaces of the magnetic core and the electric field line path equations between the single-turn windings on the inside, outside, top and bottom surfaces of the magnetic core and the magnetic core, the capacitance in the air gap between the single-turn winding of the first full-layer winding and the magnetic core is equivalent to a parallel plate capacitor. According to the calculation formula of the parallel plate capacitor, the air gap capacitance between the single-turn winding of the first full-layer winding on the inside, outside, top and bottom surfaces of the magnetic core and the magnetic core is obtained respectively; The insulation layer capacitance between a single turn of the first full-layer winding and the magnetic core is equivalent to the capacitance of a cylindrical capacitor. According to the calculation formula of the capacitance of a cylindrical capacitor, the insulation layer capacitance between a single turn of the first full-layer winding and the magnetic core on the inner, outer, upper and lower surfaces of the magnetic core is obtained respectively. Based on the air gap capacitance and insulation layer capacitance between a single-turn winding of the first full-layer winding on the inner, outer, upper and lower surfaces of the core and the core, the parasitic capacitance between a single-turn winding of the first full-layer winding on the inner, outer, upper and lower surfaces of the core and the core is obtained respectively; Based on the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core on the inner side, outer side, upper surface, and lower surface of the magnetic core, a parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the magnetic core is obtained; the parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the magnetic core is expressed as: Among them, C tc It represents the parasitic capacitance between the single-turn winding of the first full-layer winding and the magnetic core, C tc_in It represents the parasitic capacitance between the single-turn winding of the first full-layer winding inside the core and the core, C tc_out It represents the parasitic capacitance between the single-turn winding of the first full-layer winding outside the core and the core, C tc_ul It represents the parasitic capacitance between the single-turn winding of the first full-layer winding on the upper or lower surface of the core and the core; h represents the core height, w represents the core width, ε r represents the dielectric constant of the winding insulation layer, ε0 represents the dielectric constant of vacuum, D0 represents the outermost diameter of the copper wire in the winding, D i represents the inner diameter of the copper wire in the winding, θ1 represents the angle between the electric field line from the single turn winding of the first full layer winding to the magnetic core and the horizontal axis of the coordinate system where the electric field line is located, and f in (y) represents the winding arc length function about the vertical axis y, simulating the winding length of a single turn winding inside or outside the core, f ul (x) represents the arc length function of the winding about the horizontal axis x, simulating the winding length of a single turn winding on the upper or lower surface of the core, δ tc_in (y) represents the parabolic height function about the vertical axis y, simulating the shortest distance between a single-turn winding of the first full-layer winding inside or outside the core and the core, δ tc_ul (x) represents the parabolic height function about the horizontal axis x, simulating the shortest distance between a single-turn winding of the first full-layer winding on the upper or lower surface of the core and the core.

3. The method for designing a ring filter inductor with minimum parasitic capacitance according to claim 1, wherein: The process of obtaining the parasitic capacitance calculation model between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding is as follows: Equivalently equate the air gap capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding to a parallel plate capacitance, and obtain the air gap capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding according to a calculation formula for parallel plate capacitance; Equivalently equate the insulation layer capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding to the capacitance of a cylindrical capacitor, and obtain the insulation layer capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding according to a calculation formula for the capacitance of a cylindrical capacitor; Based on the air gap capacitance and insulation layer capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding, a parasitic capacitance calculation model between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is obtained; The parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and a single-turn winding of the second partial-layer winding is expressed as: Among them, C ll1 The parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is C. tti It represents the insulation capacitance between a single turn of the second partial layer winding and a single turn of the first full layer winding, C ttg The air gap capacitance between a single turn of the second partial layer winding and a single turn of the first full layer winding, dC tti The infinitesimal element representing the insulation capacitance between a single turn of the second partial winding and a single turn of the first full winding, dC ttg The infinitesimal element representing the air gap capacitance between a single turn of the second partial layer winding and a single turn of the first full layer winding; d ll Indicates the shortest distance between the first full layer winding and the second partial layer winding, L T Indicates the average turn length of a single-turn winding, ε r represents the dielectric constant of the winding insulation layer, ε0 represents the dielectric constant of vacuum, D0 represents the outermost diameter of the copper wire in the winding, D i represents the inner diameter of the copper wire in the winding, and θ2 represents the angle between the electric field line from the single-turn winding of the second partial layer to the single-turn winding of the first full layer and the vertical axis of the coordinate system where the electric field line is located.

4. The method for designing a ring filter inductor with minimum parasitic capacitance according to claim 1, wherein: The method of obtaining a turns percentage calculation model based on the total parasitic capacitance expression of the ring filter inductor includes: Substitute the target voltage proportional coefficient into the total parasitic capacitance expression of the loop filter inductor, take the derivative of the total parasitic capacitance expression of the loop filter inductor, and set it equal to zero to obtain the turns percentage calculation model; the turns percentage calculation model is expressed as: Among them, γ c Indicates the percentage of the second layer partial winding and the first layer full winding turns, C ll1 The parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is C. tc It represents the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core.

5. The method for designing a ring filter inductor with minimum parasitic capacitance according to claim 1, wherein: The minimum parasitic capacitance of the target ring filter inductor is: Among them, C eq_min represents the minimum parasitic capacitance of the target ring filter inductor, C ll1 The parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding is C. tc It represents the parasitic capacitance between a single-turn winding of the first full-layer winding and the magnetic core, and N represents the total number of turns of the target ring filter inductor.

6. The method for designing a ring filter inductor with minimum parasitic capacitance according to claim 1, wherein: The annular filter inductor includes: a first layer of full-layer winding and a partial-layer winding connected in a reverse manner.

7. The method for designing a ring filter inductor with minimum parasitic capacitance according to claim 1, wherein: The structural parameters of the ring filter inductor include: the dielectric constant of the winding insulation layer, the inner diameter of the copper wire in the winding, the diameter of the outermost layer of the copper wire in the winding, the average length of a single-turn winding, the shortest distance between the first full-layer winding and the second partial-layer winding, the shortest distance from a single-turn winding of the first full-layer winding on the inner and outer sides of the magnetic core to the magnetic core, and the shortest distance from a single-turn winding of the first full-layer winding on the upper and lower surfaces of the magnetic core to the magnetic core.

8. The method for designing a ring filter inductor with minimum parasitic capacitance according to claim 1, wherein: The adjusting the shortest distance between a single-turn winding of the first full-layer winding of the ring filter inductor and the magnetic core includes: increasing the shortest distance between a single-turn winding of the first full-layer winding of the ring filter inductor and the magnetic core by adding a plastic spacer between the first full-layer winding and the magnetic core; The adjusting the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor includes: increasing the shortest distance between the first full-layer winding and the second partial-layer winding by increasing the thickness of the insulation layer between the first full-layer winding and the second partial-layer winding.

9. The method for designing a ring filter inductor with minimum parasitic capacitance according to claim 1, wherein: The adjusting the magnetic core potential so that the magnetic core potential is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient includes: connecting the middle turn of the first full-layer winding to the outer surface of the magnetic core by soldering so that the magnetic core potential is equal to the middle potential of the first full-layer winding.

10. A system for designing the minimum parasitic capacitance of a ring filter inductor, characterized in that: include: a single-turn winding to magnetic core parasitic capacitance calculation module, configured to adjust the shortest distance between a single-turn winding of a first full-layer winding of a ring filter inductor and the magnetic core until the shortest distance between a single-turn winding of the first full-layer winding and the magnetic core reaches a first maximum critical value, input the adjusted shortest distance between a single-turn winding of the first full-layer winding and the magnetic core, and the winding structure parameters, magnetic core height, and magnetic core width of the ring filter inductor into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and the magnetic core, thereby obtaining the parasitic capacitance between a single-turn winding of the first full-layer winding and the magnetic core; a layer-to-layer parasitic capacitance calculation module, configured to adjust the shortest distance between the first full-layer winding and the second partial-layer winding of the ring filter inductor until the shortest distance between the first full-layer winding and the second partial-layer winding is at a second maximum critical value, input the adjusted shortest distance between the first full-layer winding and the second partial-layer winding and the winding structure parameters of the ring filter inductor into a parasitic capacitance calculation model between a single-turn winding of the first full-layer winding and a single-turn winding of the second partial-layer winding, and obtain the parasitic capacitance between the single-turn winding of the first full-layer winding and the single-turn winding of the second partial-layer winding; A target voltage proportional coefficient acquisition module is used to adjust the core potential so that the core potential is equal to the middle potential of the first full-layer winding to obtain the target voltage proportional coefficient; A turns percentage calculation module is used to substitute the target voltage proportional coefficient into the total parasitic capacitance expression of the ring filter inductor to obtain a turns percentage calculation model, and input the parasitic capacitance between a single turn of the first full-layer winding and the magnetic core, and the parasitic capacitance between a single turn of the first full-layer winding and a single turn of the second partial-layer winding into the turns percentage calculation model to obtain the turns percentage of the second partial-layer winding and the first full-layer winding; The target ring filter inductor acquisition module is used to calculate the number of turns of the first layer full winding and the number of turns of the second layer partial winding based on the total number of turns of the ring filter inductor and the percentage of the number of turns of the second layer partial winding and the first layer full winding, so as to obtain the target ring filter inductor with the lowest parasitic capacitance.

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