A scheduling method for a single processing path of a wafer

By building the ROPN model and establishing relevant constraints, planning the robot scheduling strategy in the semiconductor chip manufacturing system, solving the problems of system deadlock and capacity utilization, and achieving coordinated control of the robot and improving production efficiency.

CN118983249BActive Publication Date: 2025-08-05XIANGNAN UNIV
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Patent Information

Application Number
CN202411060489.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-08-05
Publication Date
2025-08-05
Estimated Expiration
2044-08-05

AI Technical Summary

Technical Problem

In the existing semiconductor chip manufacturing system, how to fully utilize the system production capacity while avoiding deadlocks and meeting various constraints, maximize and reduce the impact of wafer product quality, and effectively control the coordination between the pick-and-place robot and the main robot.

Method used

Build a ROPN model, establish constraints for the deadlock processing of the main robot, plan the process production area scheduling algorithm, and establish the wafer dispatching strategy and feeding strategy of the pick-and-place robot through the ROPN model to ensure that the controls of the pick-and-place robot and the main robot are coordinated with each other.

Benefits of technology

The coordinated control of the pick-and-place robot and the main robot is achieved, avoiding deadlocks, and improving the system's production efficiency and overall operation coordination.

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Abstract

The present invention discloses a scheduling method for a single wafer processing path, belonging to the field of semiconductor chip manufacturing technology. The method comprises the following steps: constructing a ROPN model; establishing constraints for handling deadlocks of a main robot, using the ROPN model and the constraints for handling deadlocks of the main robot to establish a process production area scheduling algorithm for the main robot; establishing constraints for handling deadlocks of a pick-and-place robot, using the ROPN model and the constraints for handling deadlocks of the pick-and-place robot to establish a wafer dispatching strategy for the pick-and-place robot; and using the ROPN model and the constraints for handling deadlocks of the pick-and-place robot to establish a wafer feeding strategy for the pick-and-place robot. The scheduling method for a single wafer processing path solves the problem that existing scheduling strategies are difficult to ensure the coordination of overall operations.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chip manufacturing, and in particular to a scheduling method for a single processing path of a wafer. Background Art

[0002] The essence of semiconductor chip manufacturing is the manufacture of wafers. The complexity of the wafer flow determines the difficulty of the wafer in the manufacturing process. In the manufacturing field, the wafer fabrication system (SWFS) is classified as a third type of manufacturing system, different from the flow shop and the job shop. Kumar has conducted in-depth research on the unique properties of SWFS and pointed out the complexity it faces in optimizing scheduling. Figure 1 As shown in the figure, the production layout can be divided into two areas: the material (wafer) merging area and the process production area. The material merging area has two main responsibilities: one is to control the flow of wafers within the area, and the other is to merge two wafers with the same wafer flow pattern into a combined material. The process production area is responsible for wafer processing according to the requirements of the wafer flow.

[0003] According to the above layout diagram, the functions of each module in the workshop are as follows:

[0004] The entrance station is the entrance for wafers to enter the system; the exit station is the exit for wafers to leave the system; O1 is the inspection station responsible for inspecting wafers to be processed; O2 is the inspection station responsible for inspecting processed wafers; the storage position is a module for storing unfinished wafers and finished wafers, with limited capacity; the rotation table is a module for rotating wafers, rotating the wafers to a reasonable angle; the merging station merges two wafers into a group of materials; the pick-and-place robot R1 is responsible for picking up and placing wafers, and can interact with O1, the storage position, the rotation table, and the pick-and-place robot R2; the pick-and-place robot R2 is responsible for picking up and placing wafers, and can interact with the rotation table, the merging station, and the pick-and-place robot R1; it is adjacent to the processing station P i-1 and P i , where i = 2, 4, ..., 2N, N∈N * , responsible for processing materials, a total of N units, with a capacity of 2 wafers, and a residence time requirement, that is, the material needs to be taken out within a specified time after completion, N * is a positive integer. The adjacent processing stations can be regarded as a processing unit. The order in which the materials pass must be the smaller numbered ones first and then the larger numbered ones, and there will be no process path that only passes through one of the adjacent processing stations. For example, the adjacent processing stations P1 and P2 can be regarded as a processing unit; the non-adjacent processing station P N+j , where j = 1, 2, ..., D, D∈N *, the module responsible for processing materials, a total of D stations, with a capacity of 2 wafers, has a residence time requirement, that is, the materials need to be taken out within the specified time after completion, N is the upper limit value of the adjacent processing station; the main robot R3, the "main robot" of the processing area, is responsible for taking and placing materials, and can interact with the merging station, storage position, processing station, and cleaning station. The material transportation between different processing units is the responsibility of the only main robot R3; the sub-robot r, the "sub-robot" of the processing area, is responsible for moving materials between adjacent processing stations, with a capacity of 2 materials. Taking the sub-robot r1 as an example, when the material is completed at the processing station P1, the sub-robot r1 moves the material to the processing station P2; the cleaning station is responsible for cleaning the module of the main robot R3. When the main robot R3 enters two designated processing stations before and after, it needs to go to the cleaning station for cleaning before entering the next processing station.

[0005] At the initial stage of the production process, wafers must first pass through the merging station. After the wafers to be processed enter the system, they are inspected at O1. Only qualified wafers can be removed by the pick-and-place robot R1 and placed in storage, awaiting subsequent operation instructions. After receiving the start command, the pick-and-place robot R1 will remove two wafers of the same type of wafer flow and two unfinished wafers from the storage location and send them to the turntable in turn. The turntable rotates to a specified angle, and the pick-and-place robot R1 then places the wafers and wafers in turn to the merging station to merge them into a combined material for subsequent processing.

[0006] Robot R then delivers the combined material to the corresponding processing station along its processing path for processing. Once the material completes all process steps, the secondary robot R returns the finished wafer to the merging station, where it is reassembled into two completed wafers and one wafer. The two wafers then return along the original path, using the pick-and-place robot R2 and the turntable. The pick-and-place robot R2 then returns them from the turntable to their storage location. Finally, the pick-and-place robot R2 receives a reclaim command and moves the completed wafer from the storage location to O2, where it finally leaves the system.

[0007] The core of semiconductor chip manufacturing lies in the production of wafers. The wafer processing path is also called the wafer flow pattern (WaferFlowPattern), also known as wafer flow. Wafer flow is usually divided into four modes: serial, parallel, re-entrant and mixed. Figure 2 As shown. The wafer flow without re-entry can be described by symbols (m1, m2, ..., m n ), where n represents the number of process steps that need to be completed on the wafer, i represents the i-th process step, and m i Indicates that there are m steps in the i-th process (1≤i≤n) i parallel processing stations. When m1=m2=…=m n =1, the wafer flow is in serial mode. The wafer flow is in parallel mode. Additionally, a reentrant wafer flow can generally be expressed as {m1,..., [(m i ) b ,..., m e ,..(m j ,..., m g ) k ,..., m n}, 1 < i < e < j ≤ g < n. Among them, if reentry occurs in a certain step, [(m i ) b ,... m e means that after the wafer completes the e-th step, the wafer will be moved by the robot to the processing module of the i-th step and processed repeatedly b times, and then the e + 1-th step of processing will be carried out. If certain consecutive steps are repeated, (m j ,..., m g ) k represents that after the wafer is completed in the (j - 1)-th step, the wafer will be processed repeatedly k times from the j-th step to the g-th step. After the repeated processing is completed, the robot will move the wafer to the (g + 1)-th step, and then the wafer will continue to be processed step by step.

[0008] The existing reentrant wafer flow pattern is as follows: [(m1, m2),..., (m i-1 , m … i ) k ,...,(m N-1 , m N ),...,m N+j ,..., m N+g ,...,m N+M [[ID=...]] , where i = 2, 4,..., 2n, n ∈ N * , j = 1, 2,..., m, m ∈ N * , 1 ≤ i < N, 1 ≤ j ≤ g < M, that is, the wafer has N + M processing steps. There are N adjacent processing stations P i and M non-adjacent processing stations P N+j in the system. The reentry times b and k values are determined by the wafer processing technology.

[0009] During the initial system operation, wafers are fed into the system according to a pre-defined feeding plan, ensuring that the storage capacity limit is not exceeded. During this process, the pick-and-place robots R1 and R2 follow a preset dispatching strategy, handling wafers from the storage locations without causing system deadlock. Simultaneously, the main robot R3 ensures smooth wafer processing through scheduling, meeting various constraints, and effectively preventing deadlock during processing. Furthermore, the movements of the main robot R3 are affected by the dispatching strategy, requiring coordination between the control of the pick-and-place robots R1, R2, and R3 to ensure overall operational coordination. Therefore, the question arises of how to effectively control the pick-and-place robots R1, R2, and R3, in order to fully utilize the system's production capacity while avoiding deadlock and meeting various constraints, and minimizing the impact on wafer product quality. Summary of the Invention

[0010] In order to overcome the defects of the prior art, the present invention provides a scheduling method for a single processing path of a wafer to solve the above-mentioned problems.

[0011] The technical solution adopted by the present invention to solve the technical problem is: a scheduling method for a single processing path of a wafer, comprising the following steps:

[0012] S0: Construct the ROPN model using the inspection station, storage location, rotation station, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot R and cleaning station;

[0013] S1: Establish the constraint conditions for the deadlock processing of the main robot, and use the ROPN model and the process production area scheduling algorithm for the main robot according to the constraint conditions for the deadlock processing of the main robot;

[0014] S2: Establish the constraints for handling deadlocks of the pick-and-place robot. Use the ROPN model and establish a wafer dispatching strategy for the pick-and-place robot based on the constraints for handling deadlocks of the pick-and-place robot.

[0015] S3: Using the ROPN model and based on the constraints of the pick-and-place robot deadlock handling, a wafer feeding strategy for the pick-and-place robot is established.

[0016] The beneficial effect of the present invention is that in the scheduling method of the single processing path of the wafer, the constraint conditions of the deadlock processing of the main robot are used to plan the process production area scheduling algorithm for the main robot, and the constraint conditions of the deadlock processing of the pick-and-place robot are used to plan the wafer dispatching strategy for the pick-and-place robot and the wafer feeding strategy for the pick-and-place robot, which can ensure that the control needs of the pick-and-place robot R1, the pick-and-place robot R2 and the main robot R3 cooperate with each other, so as to coordinate the overall operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A workshop layout diagram for multi-agent chip manufacturing;

[0018] Figure 2 Schematic diagram of three wafer flow modes;

[0019] Figure 3 Flowchart of a method for scheduling a single processing path of a wafer in one embodiment of the present invention;

[0020] Figure 4 A structural diagram of a ROPN model according to an embodiment of the present invention;

[0021] Figure 5 The solution process of the PAFR algorithm in one embodiment of the present invention is as follows;

[0022] Figure 6 The following is a flow chart of the algorithm PAPR solution in one embodiment of the present invention;

[0023] Figure 7 The solution process of the PSFW algorithm in one embodiment of the present invention is as follows;

[0024] Figure 8 The solution process of the algorithm PSUW in one embodiment of the present invention is as follows;

[0025] Figure 9 It is the overall framework of the combined heuristic algorithm in one embodiment of the present invention. DETAILED DESCRIPTION

[0026] The following is a further description of specific embodiments of the present invention in conjunction with the accompanying drawings. It should be noted that the description of these embodiments is intended to facilitate understanding of the present invention and does not constitute a limitation of the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

[0027] As a unique third-category manufacturing system, the wafer fabrication system (SWFS) has the following main features:

[0028] (1) Complex manufacturing process: The wafer production process and its complexity are mainly reflected in two core aspects: one is the diversity of wafer flow patterns, and the other is that multiple different types of wafer flows are mixed together for processing.

[0029] (2) Reentrant processing: Semiconductor wafers are hierarchical structures. The processing methods between layers are similar in basic principles. Each layer will be processed in several designated areas, and the processing between layers is only adjusted in terms of processing accuracy or processing environment. At the same time, processing equipment is expensive and companies cannot purchase it in large quantities. Therefore, the same equipment can be used to process different types of products with similar structures, thus creating a "reentrant" processing method. The reentrant nature is the most essential feature of wafer manufacturing processing, which is an important feature that distinguishes it from other production systems. When products of multiple wafer flows are mixed in production, different types of wafers will compete for the same equipment resources. In addition, even for the same type of wafers, multiple process steps may be performed on the same equipment, which may lead to resource competition due to the similarity of the processes.

[0030] (3) Strict Residency Time Constraint: The residency time refers to the time it takes for a wafer to leave the processing station after the processing module completes the current processing. During wafer processing, the wafer must leave the processing module within a certain time range. For example, the low-pressure chemical vapor deposition (LPCVD) process requires that the wafer must be unloaded from the processing module within a very short time after completion, otherwise the wafer will be damaged or even scrapped.

[0031] (4) Deadlock: System deadlock requires significant attention during wafer manufacturing. When wafers compete for resources such as buffers between reentrant processing equipment and adjacent equipment, deadlock can occur in the limited resource allocation without efficient scheduling and control. Once deadlock occurs, system operation is permanently restricted.

[0032] (5) Uncertain production conditions: There are many uncertainties in wafer production, such as equipment failure and maintenance, changes in customer orders, fluctuations in processing time, automatic equipment cleaning, new product trials, temporary process changes, rework, and changes in customer demand. These factors have caused wafer processing to be in an unstable production environment, affecting the normal operation of the system.

[0033] The implementation of the solution of the present invention is described based on the following premises:

[0034] 1) The capacity of one storage position is 1 wafer, and one position can only store one wafer, and one wafer can only occupy one position; 2) The capacity of the turntable is 1 wafer; 3) The capacity of the merging station is 2 wafers; 4) Robot R3 can operate one combined material, i.e. two wafers, at a time, while other robots can only operate one wafer at a time; 5) Each processing station can only process one combined material at a time, and one combined material can only be processed by one processing station; 6) None of the above equipment resources will fail; 7) The cleaning time of robot R3 is much less than the range of the residence time constraint; 8) Each robot will have a corresponding rotation time when operating, but the rotation time is relatively short, much shorter than the processing time of the equipment; 9) The distance between each processing station is constant and will not exceed the movement range of the robot.

[0035] The ROPN model has elements such as transition, place, token and directed arc, which form a directed graph. Transition is represented by rectangle “▍”, place is represented by circle “○”, token is represented by “●”, directed arc is represented by A ROPN model can be defined by a sextuple, represented as: ∑ = (P, T, I, O, M, K), where: (1) the finite set of places is: P = {p1, p2, ..., p n}, n>0; (2) The finite transition set is: T={t1,t2,...,t m}, m>0; (3) I: Directed arc from transition to place; (4) O: Directed arc from place to transition; (5) M: Token number identifier of place, M0 is the initial identifier of the system, for example, M(p i )=f, that is, place p i There are f tokens in it; (6)K:K(p i ) represents the place p i The maximum number of tokens that can be accommodated.

[0036] In the ROPN model established in this paper, firstly, the process production area is adjacent to the processing station P i-1 and P i , not adjacent to the processing station P N+j , main manipulator R3, auxiliary manipulator r i-1 and cleaning station P w All belong to the warehouse, among which K(Pi )=K(P i-1 )=m i , K(P N+j )=m N+j , K(R3)=K(r i-1 )=2;When there are two tokens in the warehouse, it means that the robot is currently available. The token can be understood as whether there are wafers in the robot. When there is a token, it means that the robot is empty and can process wafers. When there is no token, it proves that the robot is processing wafers. The number of tokens represents the number of wafers that the robot can process in this process. w , because the wafer will not enter the cleaning station, only the main robot R3 will be cleaned here, so let K(P w )=1, that is, cleaning station P w There is only one state change, occupied by the main manipulator, or idle (idle state is generally not important), K(P w )=1, it indicates that the main robot is performing a cleaning operation.

[0037] like Figure 4 As shown, the transition X0 indicates that the main manipulator R3 rotates to the merging station (with P h Indicated), using transition X w Indicates that the main robot R3 moves to the cleaning station (using P w Indicated), using transition X i-1 Indicates the auxiliary manipulator r i-1 Move to process step i-1, transition X i and Change X N+j They represent the main robot R3 turning to process step i and process step N+j respectively. h The waiting time of the main robot R3 before unloading the wafer is expressed as W w Indicates that the main robot R3 arrives at the cleaning station P w Waiting time before, use library W i-1 Indicates that the auxiliary robot r is unloading the wafer from process step i-1 i-1 The waiting time of the library W i and W N+j They represent the waiting time of the main robot R3 before unloading the wafer from process step i and process step N+j respectively. Transition U0 represents the waiting time of the main robot R3 from the merging station P h Unload the wafer using Transition U w Indicates that the main robot R3 enters the cleaning station P w Cleaning, using the U i-1 Indicates the auxiliary manipulator r i-1 Unload the wafer from process step i-1 and use transition U i and changesN+j Represents the auxiliary manipulator r i-1 Unload wafers from step i and step N+j. Use place q0 to represent the main robot R3 from the merge station P. h The waiting time before moving to process step i is expressed as Q i-1 Indicates the auxiliary manipulator r i-1 The waiting time before moving from process step i-1 to process step i is expressed as Q i and Q N+j They represent the waiting time before the main robot R3 moves from process step i to process step i+1 and from process step N+j to process step N+j+1. 0(i-1) Indicates that the main robot R3 is from the merging station P h Move to process step i and use transition t (i-1)i Indicates the auxiliary manipulator r i-1 Move from process step i-1 to process step i, using transition t in Indicates that the main robot R3 moves from process step i to process step n, using transition t N(N+j) Indicates that the main robot R3 moves from process step N to process step N+j, using transition t (N+j)(N+m) Indicates that the main robot R3 moves from process step N+j to process step N+m, using transition t (N+M)0 Indicates that the main robot R3 moves from process step N+M to the merging station P h In case of reentry, use transition t N(N-1) Indicates that the main robot R3 moves from process step N to process step N-1, which can be extended to transition t ni , Figure 4 The dotted line is used to connect the two. The Z0 represents the main robot R3 to the merging station P. h Waiting time before loading wafer, Z i Indicates the auxiliary manipulator r i Waiting time before loading wafer into process step i, place Z i-1 and Z N+j They represent the waiting time before the main robot R3 loads the wafer into the process step i-1 and the process step N+j respectively. Transition L0 represents the waiting time before the main robot R3 loads the wafer into the process step i-1 and the process step N+j respectively. h Loading wafer, transition L w Indicates that the main robot R3 has finished cleaning, and the transition L i Indicates the auxiliary manipulator r i Loading wafer into process step i, transition L i-1 and changes N+j The main robot R3 loads wafers into process steps i-1 and N+j respectively. The dotted lines represent possible re-entry.

[0038] For the material merging area, places R1 and R2 represent pick-and-place robots R1 and R2, respectively. K(R1) = K(R2) = 1. When there is a token in the place, it means the robot is currently available. The parameter symbols and meanings of the remaining transitions and places are shown in the following table:

[0039]

[0040] Scheduling wafer processing in the process production area primarily relies on the main robot R3 as a carrier, so the construction of the scheduling algorithm is closely related to the control of the main robot R3. The auxiliary robot only serves as a material handling tool between adjacent workstations. Materials must pass through adjacent workstations in the order of smaller numbers first and larger numbers. In other words, they are only delivered from workstation to workstation and will not pass through only one of the adjacent processing stations. Therefore, the auxiliary robot only serves as a handling tool and has little relevance to the overall area scheduling. Therefore, the focus is on the control of the main robot R3.

[0041] A method for scheduling a single processing path of a wafer includes the following steps:

[0042] S0: Construct the ROPN model using the inspection station, storage location, rotation station, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot R and cleaning station;

[0043] S1: Establish the constraint conditions for the deadlock processing of the main robot, and use the ROPN model and the process production area scheduling algorithm for the main robot according to the constraint conditions for the deadlock processing of the main robot;

[0044] S2: Establish the constraints for handling deadlocks of the pick-and-place robot. Use the ROPN model and establish a wafer dispatching strategy for the pick-and-place robot based on the constraints for handling deadlocks of the pick-and-place robot.

[0045] S3: Using the ROPN model and based on the constraints of the pick-and-place robot deadlock handling, a wafer feeding strategy for the pick-and-place robot is established.

[0046] In the scheduling method of the single processing path of the wafer, the constraint conditions of the deadlock processing of the main robot are used to plan the process production area scheduling algorithm for the main robot, and the constraint conditions of the deadlock processing of the pick-and-place robot are used to plan the wafer dispatching strategy for the pick-and-place robot and the wafer feeding strategy for the pick-and-place robot, which can ensure that the control needs of the pick-and-place robot R1, the pick-and-place robot R2 and the main robot R3 cooperate with each other, so as to coordinate the overall operation.

[0047] Deadlock handling for the main robot R3:

[0048] System deadlock is caused by a variety of factors, which have a negative impact on the overall system operation. Therefore, solving the deadlock problem becomes the top priority of scheduling. During the wafer processing process, the transfer of wafers between processing stations depends on the handling of the robot. Especially for the main robot R3, this dependence may lead to competition for the main robot R3 resources, thereby increasing the risk of system deadlock. Figure 4 In the example, since place R3 (i.e., master manipulator R3) has more than one output transition, when M(R3) = 2, i.e., there are two tokens in place R3, the choice of which output transition to trigger depends on the scheduling strategy. To effectively resolve the deadlock problem, the following constraints are established:

[0049] For non-adjacent processing stations, j = 1, 2, ..., D, D∈N * , total D, N * For positive integers, build:

[0050] Condition 1-1: In the system identifier M(P N+j+1 )=m N+j+1 -1, change X N+j Set to triggerable state; where M() represents the number of tokens in the library, P N+j+1 Indicates the N+j+1th non-adjacent processing station, m N+j+1 represents the number of parallel processing stations in the N+j+1th process step, and the transition X N+j Indicates that the main robot R3 rotates to process step N+j;

[0051] Condition 1-2: In the system identifier M(P N+j )=m N+j And M(P h )=2,M(P t )=M(R2)=1, the transition X N+M Set to triggerable state; where P N+j Indicates the N+jth non-adjacent processing station, m N+j P represents the number of parallel processing stations for the N+jth process step, h represents the merge station, P t Indicates the rotating table, represents the pick-and-place robot R2, X N+D Indicates that the main robot R3 rotates to process step N+D;

[0052] For adjacent processing stations, i=2, 4, ..., 2n, n∈N * , the total number is N, which is divided into two cases, the first one is for non-reentrant wafer flow, and the second one is for reentrant wafer flow;

[0053] Under non-reentrant wafer flow, establish:

[0054] Condition 2-1: When 2 ≤ i ≤ N - 2, and when the system identification M(P i+1 ) = m i+1 -1 or M(P i+2 ) = m i+2 -1 or M(r i+1 ) = 1, the transition X i is set to the triggerable state; where P i+1 represents the (i + 1)-th adjacent processing station, m i+1 represents the number of parallel processing stations for the (i + 1)-th process step, m i+2 represents the number of parallel processing stations for the (i + 2)-th process step, r i+1 represents the (i + 1)-th sub-manipulator, and the transition X i represents the main manipulator R3 rotating to the process step i;

[0055] Condition 2-2: When the system identification M(P1) = m1 - 1 or M(P2) = m2 - 1 or M(r1) = 1, the transition X0 is set to the triggerable state; where P1 represents the 1st adjacent processing station, m1 represents the number of parallel processing stations for the 1st process step, P2 represents the 2nd adjacent processing station, m2 represents the number of parallel processing stations for the 2nd process step, r1 represents the 1st sub-manipulator, and the transition X0 represents the main manipulator R3 rotating to the merging station;

[0056] Condition 2-3: When the system identification M(P i ) = m i , the transition X N is set to the triggerable state; where P i represents the i-th adjacent processing station, m i represents the number of parallel processing stations for the i-th process step, and the transition X N represents the main manipulator R3 rotating to the process step N;

[0057] Under the reentrant wafer flow, establish:

[0058] Condition 2-4: When 1 ≤ q < k, and when the system identification M(P i-1 ) = m i-1 -1 or M(r i-1 ) = 1, both the transition t i(i-1) and the transition X i are set to the triggerable state; where P i-1 represents the (i - 1)-th adjacent processing station, m i-1 represents the number of parallel processing stations for the (i - 1)-th process step, r i-1 represents the (i - 1)-th sub-manipulator, the transition t i(i-1) represents the main manipulator R3 moving from the process step i to the process step i - 1, and the transition X iIndicates that the main robot R3 rotates to process step i;

[0059] Condition 2-5: When 2≤i≤N-2, and when the system identifier M(P i+1 )=m i+1 -1 or M(P i+2 )=m i+2 -1 or M(r i+1 )=1, the transition t (i-2)(i-1) and Transition X i-2 Set to triggerable state; the transition t (i-2)(i-1) Indicates that the main robot R3 moves from process step i-2 to process step i-1, and the transition X i-2 Indicates that the main robot R3 rotates to process step i-2;

[0060] Condition 2-6: When q = k, transition t i(i+1) and Transition X i Set to triggerable state; the transition t i(i+1) Indicates that the main robot R3 moves from process step i to process step i+1, and the transition X i Indicates that the main robot R3 rotates to process step i.

[0061] Among them, re-entry wafer flow (m i-1 ,m i ) k Indicates that k is a reentrant value and 2≤i≤N-2; use W a (q) represents the wafer that enters the system and completes the last processing step m of the re-entry process. i , and completed q re-entries on behalf of the wafer.

[0062] Construction of process production area scheduling algorithm:

[0063] The construction of the process area scheduling algorithm is divided into two cases. The first is the production area scheduling algorithm based on the first-come-first-served rule (ProcessArea SchedulingAlgorithmBased onFCFS Rule, referred to as PAFR), and the second is the production area scheduling algorithm based on the pull rule (ProcessArea SchedulingAlgorithmBased onPushRule, referred to as PAPR);

[0064] The meanings of the parameter symbols in the production area scheduling algorithm based on the first-come-first-served rule and the production area scheduling algorithm based on the pull rule are as follows:

[0065]

[0066] The production area scheduling algorithm based on the first-come-first-served rule can be understood as "the earlier the workpiece arrives, the earlier it can be processed." The PAFR algorithm comprehensively considers the conditions for controlling deadlock. When M(R3)=2, that is, when there are 2 tokens in the library R3, the main robot R3 prioritizes processing wafers with an earlier estimated completion time. In short, the earlier the wafer's estimated completion time, the higher its priority in scheduling, where the completion time Equal to arrival time Wafer processing time The sum of the ath wafer W at station P i The completion time of a task is equal to the sum of its arrival time and processing time.

[0067] like Figure 5 As shown in Figure 2, the production area scheduling algorithm based on the first-come, first-served rule includes the following steps:

[0068] S111: Initialize all parameters, set e = 1. If C has no recorded value, set C = 0. e is the index standard of the wafer sequence. e starts from the initial value 1, that is, the search is established from the first wafer. C is the station number when the main robot R3 places the wafer on the station. The stations include the merging station, the processing station, and the cleaning station.

[0069] S112: When the wafer Enter Platform P i or Platform P N+j When the wafer arrives, record the arrival time Platform P i As it is adjacent to the processing station, platform P N+j Not adjacent to a processing station;

[0070] S113: Set the wafer On platform P i or Platform P N+j The processing time is Calculate the wafer Completion time in

[0071] S114: For all the completion times obtained Arrange in ascending order to obtain the wafer sequence S to be transported W ;

[0072] S115: Get wafer sequence S W In S e Position of the wafer; where S e Indicates that in wafer sequence S W The e-th wafer in ;

[0073] S116: Determine if it is in Se Position of wafer Whether the constraint conditions for the deadlock handling of the main manipulator are met;

[0074] S117: If the conditions are met, it indicates that there is no deadlock, and the process jumps to step S118; if the conditions are not met, it indicates that there is a deadlock, and e=e+1 is set, and the process jumps to step S116;

[0075] S118: Main robot R3 locks the wafer And record the wafer grabbing Platform number at the time is B;

[0076] S119: Determine whether the main robot R3 needs to be cleaned based on the changes in the values of station number B and station number C; station number B and station number C are the stations corresponding to the grab and place operations, respectively. When the system is initialized, it is set that the main robot R3 needs to be cleaned after the number of process step tasks are grabbed;

[0077] S1110: If cleaning is required, the main robot R3 is cleaned and then the process jumps to step S1111; if cleaning is not required, the process jumps to step S1111;

[0078] S1111: The main robot R3 will be in S e Position of wafer The wafer is transported to the next processing step station, and then the main robot R3 Unlock;

[0079] S1112: Update the station number C for placing the wafer this time. e The wafer information of the location is deleted, and the S e The wafer information at the subsequent positions is all moved up one position, for example, position S e+1 Rise to S e .

[0080] In the production area scheduling algorithm based on pull rules, pull rules are mostly used in the scheduling scenario of single-arm modular equipment. In this invention, the scheduling scenario of the processing area is very similar to it. The pull rule adopts the research idea of "backward deduction". In the processing process of the same type of wafers, σ={A0,A1,...,A m} is the handling operation sequence of the main robot R3, A i (0≤i≤m) indicates that the i-th transport operation is to transport the wafer completed in processing module i to the next processing module. The main robot R3 completes all operations in A, indicating that the system has completed a production cycle. Then the system repeats σ and enters the next cycle, σ U ={A m , A m-1, ..., A1} is called a Pull sequence. This algorithm is based on the idea of the pull rule, based on the situation when M(R3) = 2, that is, there are 2 tokens in the library R3, combined with the actual production environment and taking into account relevant production constraints.

[0081] like Figure 6 As shown in Figure 2, the production area scheduling algorithm based on pull rules includes the following steps:

[0082] S121: Initialize all parameters, set e = 1. If C does not have a recorded value, set C = 0. e is the index standard of the wafer sequence, and e starts from the initial value 1, that is, the search is established from the first wafer. C is the station number when the main robot R3 places the wafer on the station. The stations include the merging station, the processing station, and the cleaning station.

[0083] S122: When the wafer Enter Platform P i or Platform P N+j When the wafer arrives, record the arrival time Platform P i As it is adjacent to the processing station, platform P N+j Not adjacent to a processing station;

[0084] S123: Set the wafer On platform P i or Platform P N+j The processing time is Calculate the wafer Completion time in

[0085] S124: For all the completion times obtained Arrange in ascending order to obtain the wafer sequence S to be transported W ;

[0086] S125: Wafer judgment Whether the station required for the next processing step is free;

[0087] S126: If yes, go to step S1210; if no, go to step S127;

[0088] S127: Retain wafer In wafer sequence S W The information in the process is received and the station required for the next processing step is idle.

[0089] S128: On the wafer During the waiting process, determine whether there are new completed wafers;

[0090] S129: If yes, go to step S122; if no, go to step S1210;

[0091] S1210: Get wafer sequence S W In position S e Wafers; where Se represents the wafer sequence S W The e-th wafer in ;

[0092] S1211: in S e Position of wafer Whether the constraint conditions for the main manipulator deadlock processing are met;

[0093] S1212: If yes, jump to step S1213; if no, set e=e+1 and jump to step S1211;

[0094] S1213: Main robot R3 locks the wafer And record the station number B when grabbing the wafer;

[0095] S1214: Determine whether the main robot R3 needs to be cleaned based on the changes in the values of station number B and station number C. Station number B and station number C are the stations corresponding to the pick and place operations, respectively. During system initialization, the system sets the number of process step tasks that must be picked before the main robot R3 needs to be cleaned.

[0096] S1215: If cleaning is required, the main robot R3 is cleaned and then the process jumps to step S1216; if cleaning is not required, the process jumps to step S1216.

[0097] S1216: The main robot R3 will be in S e Position of wafer The wafer is transported to the next processing step station, and then the main robot R3 Unlock;

[0098] S1217: Update the station number C for placing the wafer this time. e The wafer information of the location is deleted, and the S e The wafer information at the subsequent positions is all moved up one position, for example, position S e+1 Rise to S e .

[0099] Construction of material merging area scheduling algorithm:

[0100] The scheduling algorithm for the material merging area is divided into wafer dispatching strategy and wafer feeding strategy.

[0101] The construction of wafer dispatching strategy focuses on the control of pick-and-place robot R1 and pick-and-place robot R2. As components of the shared channel (NSP), the two robots have a decisive impact on the smoothness of the channel. Specifically, the pick-and-place robot R1 can trigger Figure 4 Medium Change X c 、ChangeX s 、ChangeX s ' and changes X t ', and the pick-and-place robot R2 can trigger Figure 4 Medium Change X t and Change X h '. Based on the assumption that M(R1) = M(R2) = 1, that is, there is 1 token in place R1 and 1 token in place R2, the control of the two robots needs to focus on resolving the potential deadlock problem caused by the shared channel (NSP) and reasonably handle the triggering timing of each transition to ensure the smooth progress of the production process.

[0102] Deadlock handling for pick-and-place robot R1 and pick-and-place robot R2:

[0103] Condition 3-1: M(R1)=1 and M(P s )≠0, the transition X c Set to triggerable state; among them, transition X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection table O1 responsible for inspecting the wafers to be processed; indicates that if the pick-and-place robot R1 is in an available state and there is an available position in the storage bit, the pick-and-place robot R1 can rotate unloaded to the inspection table O1 to prepare for the handling operation;

[0104] Condition 3-2: M(R1)=1、M(R2)=1、M(P s )≠S、M(P t )=1 and M(P h )<2, transition X s Set to triggerable state; among them, transition X s Indicates that for unfinished wafers, the pick-and-place robot R1 and the pick-and-place robot R2 rotate to the storage position without load; indicates that if the pick-and-place robot R1 is in an available state, the pick-and-place robot R2 is in an available state, there are wafers in the storage position, the rotary table is in an available state, and there are less than 2 materials in the merge station, the pick-and-place robot R1 can rotate to the storage position without load to prepare for the handling operation;

[0105] Condition 3-3: M(R1)=1 and M(P s )≠S, transition X s 'Set to triggerable state; where transition X s'Indicates that for completed wafers, the pick-and-place robot R1 rotates to the storage position without load; indicates that if the pick-and-place robot R1 is in an available state and there are wafers in the storage position, the pick-and-place robot R1 can rotate to the storage position without load to prepare for the handling operation;

[0106] Condition 3-4: M(R1)=1, M(P s )≠0, transition X t *Set to triggerable state; where transition X t * Indicates that for finished wafers, the pick-and-place robot R1 rotates to the turntable without load; indicates that if the pick-and-place robot R1 is in an available state and there is an available storage position, the pick-and-place robot R1 can rotate to the turntable without load to prepare for the handling operation;

[0107] Condition 3-5: M(R2)=1, M(P h )<2, change X t Set to triggerable state; among them, transition X t Indicates that for unfinished wafers, the pick-and-place robot R2 rotates to the turntable without load; indicates that if the pick-and-place robot R2 is in an available state and there are less than 2 materials in the merge station, the pick-and-place robot R2 can rotate to the turntable without load to prepare for the handling operation;

[0108] Condition 3-6: M(R2)=1, M(P t )=1,M(P s )≠0, transition X h *Set to triggerable state; where transition X h *Indicates that for finished wafers, the pick-and-place robot R2 rotates to the merging station without load; indicates that if the pick-and-place robot R2 is in available state, the status of the rotary table is available, and there is an available storage position, the pick-and-place robot R2 can rotate to the merging station without load to prepare for the handling operation;

[0109] Among them, P s Indicates storage bit, used to store wafers, S indicates the maximum capacity of the storage bit, P t represents the rotating stage, P h Indicates a merge station.

[0110] By controlling the conditions for deadlock processing of the pick-and-place robot R1 and the pick-and-place robot R2, the deadlock problem caused by the chaos in the handling of the pick-and-place robot R1 and the pick-and-place robot R2 in the material merging area can be effectively solved. However, considering the existence of NSP, there is an inevitable conflict in the output of wafers from the processing area and the input of wafers into the merging area. For this reason, combined with the traffic control mode, a state control mechanism similar to a "traffic light" is implemented for NSP. When there is a wafer in the last sequence in the processing area, the Entrance is in a red light state and the Exit is in a green light state, that is, the finished wafers can be output, but the unprocessed wafers cannot be input. They will wait in the storage position. When the finished wafers are taken out, the states of Entrance and Exit can be interchanged. In this way, the conflict of wafers is eliminated. Specifically, when a wafer is in the final process step in the processing area, the Entrance light is set to red and the Exit light is set to green. This means that the finished wafer can be exported, but the unprocessed wafers must wait in the storage area and cannot be imported. When the finished wafer is removed, the Entrance and Exit states are reversed, and the unprocessed wafers can be imported.

[0111] Through observation, it was found that during the actual execution of the algorithm, when there is a wafer in the last process step in the processing area, immediately starting the channel state transition may cause the wafer that should have enough time to enter the processing area to be unable to be smoothly added and processed. Therefore, the timing of the state transition can be studied together with the processing time of the last sequence of the wafer. In the present invention, three different strategies are used to solve the above problems. The first strategy is the Prioritized Strategy for Finished Wafers (PSFW), the second strategy is the Prioritized Strategy for Unprocessed Wafers (PSUW), and the third strategy is the Randomization Strategy (RS).

[0112] Set the wafer to enter the last sequence at time 0 and the waiting time to t w , Red is set to 1 until the finished wafer is sent to P s (Storage bit), the rest of the time Red is set to 0. Waiting time before state transition t w The calculation formula is: The following table shows the parameter symbols and meanings of the work dispatch strategy:

[0113]

[0114]

[0115] The strategy of finishing wafer first is based on M(R1)=1 and M(P s )<S, the scheduling of the wafer merging area is realized by controlling the robot R1, wherein, for the wafers in P s (Storage location) of the wafer, the priority principle followed by this strategy is: first process the completed wafers in the storage location, and then consider putting the wafers to be processed into the processing area. Figure 7 As shown, the steps of the finished wafer first strategy are as follows:

[0116] S211: Determine M(P t ) is 0, if so (indicating that there is a wafer on the rotating table), then execute step S212, if not (indicating that there is no wafer on the rotating table), then execute step S214; wherein P t A rotating table;

[0117] S212: Determine if P t Is the wafer (rotating table) completed and not P h (Merge station), if yes, go to step S213, if no, go to step S2112;

[0118] S213: Trigger Transition X t *;

[0119] S214: Determine whether the wafer inspection at the inspection station O1 has been completed. If so, execute step S215; if not, execute step S216;

[0120] S215: Trigger Transition X c ;

[0121] S216: Determine M(P s ) is not equal to S, if so, execute step S217, if not, execute step S2112; wherein P s For storage location;

[0122] S217: Determine P s Is there a completed wafer W in the (storage location) f ', if yes, go to step S218, if no, go to step S219;

[0123] S218: Trigger Transition X s ';

[0124] S219: Determine whether Red is 1, if so, execute step S2112, if not, execute step S2110;

[0125] S2110: Determine Ps Are there more than two unprocessed wafers W in (storage location) f If yes, execute step S2111, if no, execute step S2112;

[0126] S2111: Trigger two transitions X consecutively s , two unprocessed wafers of the same type W f take out;

[0127] S2112: The pick-and-place robot R1 does not operate.

[0128] like Figure 8 As shown, the unprocessed wafer priority strategy is based on M(R1)=1 and M(P s )<S, for those in P s (storage bit) wafers, take priority processing P s Wafers waiting to be processed in the (storage location) are put into the processing area, and then the priority principle of completed wafers is considered. The steps of the strategy of prioritizing unprocessed wafers are as follows:

[0129] S221: Determine M(P t ) is 0, if so (indicating that there is a wafer on the rotating table), then execute step S222, if not (indicating that there is no wafer on the rotating table), then execute step S224; wherein P t A rotating table;

[0130] S222: Judge in P t Wafer W on the rotating table f Is it completed and has not passed P h (Merge station), if yes, execute step S223, if not, execute step S2212.

[0131] S223: Trigger Transition X t *;

[0132] S224: Determine whether the wafer inspection at the inspection station O1 has been completed. If so, execute step S225; otherwise, execute step S226;

[0133] S225: Trigger Transition X c ;

[0134] S226: Determine M(P s ) is not equal to S, if so, execute step S227, if not, execute step S222; wherein P s is the storage bit;

[0135] S227: Determine P s Are there more than two unprocessed wafers W in (storage location) fIf yes, go to step S228, if no, go to step S229;

[0136] S228: Determine whether Red is 1, if so, execute step S2212, if not, execute step S229;

[0137] S229: Determine P s Is there any unprocessed wafer W in the (storage location) f If yes, execute step S2210, if no, execute step S2211;

[0138] S2210: Trigger two transitions X consecutively s , two unprocessed wafers of the same type W f take out;

[0139] S2211: Trigger transition X s ';

[0140] S2212: The pick-and-place robot R1 does not operate.

[0141] The random selection strategy means that there is no clear priority order for the input of wafers to be processed or the delivery of completed wafers. The pick-and-place robot R1 will randomly select wafers that meet the requirements for operation based on the current situation.

[0142] The construction of a wafer feeding strategy aims to address the wafer flow type, optimal feeding timing, and required feeding quantity for wafers. After the wafers arrive at the entry station, their feeding into the system must follow certain rules to maximize the production capacity of the production line. In this embodiment, there are two types of wafer feeding strategies: the first is a fixed work-in-progress strategy in the process area, and the second is a fixed time interval strategy.

[0143] In the process area fixed work-in-process strategy, the number of work-in-process represents the number of workpieces being processed. The expected level of work-in-process in the system is calculated based on the little law. As the WIP level value set by the system, its formula is Where V i represents the output rate of product i, D i = represents the processing time of product i. This calculation provides a reference for setting the appropriate number of work-in-progress (WIP) in the processing area. When formulating a material feeding plan, in addition to the above calculation results, the storage capacity limitations of the wafer merging area are also considered, taking into account both production efficiency and storage capacity. The steps for the fixed WIP strategy in the process area are as follows:

[0144] S311: Initialize the wafer set Q and Set the serial number b in the wafer set Q to 1, indicating that the process will start from the first wafer.

[0145] S312: All available wafers are listed in the wafer set Q one by one according to the order of their arrival time;

[0146] S313: Determine whether the conditions M(R1)=1 and M(P s )≠0; R1 is the pick-and-place robot R1, P s is the storage bit;

[0147] S314: If the condition M(R1)=1 and M(P s )≠0, wait until the condition is met and then determine whether WIP0 is less than

[0148] S315: If yes, then the wafer Wafers that have been placed in the system Remove from wafer set Q, update wafer set Q and then jump to step S312; if not, jump directly to step S312;

[0149] Where WIP0 is the WIP level value of the current system, The WIP level value set by the system, is the bth wafer W arriving at the entrance station with wafer flow mode j.

[0150] The fixed time interval strategy is to put a corresponding number of wafers into the entire system at a fixed time interval, the time interval is τ, and τ follows an exponential distribution with mean μ. The steps are as follows:

[0151] S321: Initialize the incoming wafer set Q, set the serial number b in the wafer set Q to 1, indicating that the process will start from the first wafer, and set the wafer The time of arrival at the entrance station is the initial time τ0;

[0152] S322: All available wafers are listed in the wafer set Q one by one according to the order of their arrival time;

[0153] S323: Determine the current time τ n Is it τ0+τ?

[0154] S324: If yes, determine whether the conditions M(R1)=1 and M(P s )≠0; otherwise wait until τ n =τ0+τ, then judge whether the conditions M(R1)=1 and M(P s )≠0;

[0155] S325: If the conditions are not met, wait until the conditions are met and then go to step S326; if the conditions are met, go directly to step S326;

[0156] S326: Wafer Wafers that have been placed in the system Remove from wafer set Q, update wafer set Q, and go to step S322.

[0157] In the present invention, Figure 9 As shown in the figure, a combined heuristic algorithm is formed by combining two scheduling algorithms in process production areas (a production area scheduling algorithm based on first-come-first-served rule and a production area scheduling algorithm based on pull rule), three wafer dispatching strategies (a finished wafer priority strategy, an unprocessed wafer priority strategy and a random selection strategy) and two wafer feeding strategies (a process area fixed work-in-progress strategy and a fixed time interval strategy).

[0158] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. It is apparent to those skilled in the art that various changes, modifications, substitutions, and variations to these embodiments may be made without departing from the principles and spirit of the present invention, and these changes and modifications still fall within the scope of protection of the present invention.

Claims

1. A method for scheduling a single processing path of a wafer, characterized in that: The following steps are involved: S0: Construct the ROPN model using the inspection station, storage location, rotation station, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot R and cleaning station; S1: Establish the constraint conditions for the deadlock processing of the main robot, and use the ROPN model and the process production area scheduling algorithm for the main robot according to the constraint conditions for the deadlock processing of the main robot; S2: Establish the constraints for handling deadlocks of the pick-and-place robot. Use the ROPN model and establish a wafer dispatching strategy for the pick-and-place robot based on the constraints for handling deadlocks of the pick-and-place robot. S3: Using the ROPN model and based on the constraints of the pick-and-place robot deadlock handling, a wafer feeding strategy for the pick-and-place robot is established; In the step S0, a directed graph of the ROPN model is constructed using places, transitions, directed arcs from transitions to places, directed arcs from places to transitions, token quantity identifiers of places, and the maximum number of tokens that can be accommodated by a place; Among them, the inspection station, storage position, rotating table, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot r, cleaning station and the waiting time before each robot action all belong to the library P in the ROPN model, and are transformed into the execution actions of the inspection station, storage position, rotating table, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot r and cleaning station; The relationship between the processing stations is divided into adjacent processing stations P i-1 and P i The relationship between the non-adjacent processing station P N+j The relationship, where i = 2, 4, ..., 2N, N∈N * , a total of N adjacent processing stations, j = 1, 2, ..., D, D∈N * , a total of D non-adjacent processing stations; In step S1, the constraints for handling deadlock of the main manipulator include: For non-adjacent processing stations P N+j ,j=1,2,...,D,D∈N * , total D, N * For positive integers, build: Condition 1-1: In M(P N+j+1 )=m N+j+1 -1, change X N+j Set to triggerable state; where M() represents the number of tokens in the library, P N+j+1 Indicates the N+j+1th non-adjacent processing station, m N+j+1 represents the number of parallel processing stations in the N+j+1th process step, and the transition X N+j Indicates that the main robot R3 rotates to process step N+j; Condition 1-2: In M(P N+j )=m N+j And M(P h )=2,M(P t )=M(R2)=1, the transition X N+M Set to triggerable state; where P N+j Indicates the N+jth non-adjacent processing station, m N+j P represents the number of parallel processing stations for the N+jth process step, h represents the merge station, P t Indicates the rotating table, represents the pick-and-place robot R2, X N+D Indicates that the main robot R3 rotates to process step N+D; For the adjacent processing station P i-1 and P i , i=2, 4,..., 2N, N∈N * , the total number is N, under non-reentrant wafer flow, establish: Condition 2-1: When 2≤i≤N-2, and when M(P i+1 )=m i+1 -1 or M(P i+2 )=m i+2 -1 or M(r i+1 )=1, the transition X i Set to triggerable state; where P i+1 Indicates the i+1th adjacent processing station, m i+1 Indicates the number of parallel processing stations in the i+1th process step, m i+2 represents the number of parallel processing stations in the i+2th process step, r i+1 Indicates the i+1th auxiliary manipulator, transition X i Indicates that the main robot R3 rotates to process step i; Condition 2-2: When M(P1) = m1-1 or M(P2) = m2-1 or M(r1) = 1, transition X0 is set to the triggerable state; where P1 represents the first adjacent processing station, m1 represents the number of parallel processing stations in the first process step, P2 represents the second adjacent processing station, m2 represents the number of parallel processing stations in the second process step, r1 represents the first auxiliary manipulator, and transition X0 represents the rotation of the main manipulator R3 to the merging station; Condition 2-3: When M(P i )=m i When, change X N Set to triggerable state; where P i represents the i-th adjacent processing station, m i represents the number of parallel processing stations in the i-th process step, and the transition X N Indicates that the main robot R3 rotates to process step N; Re-entry wafer flow (m i-1 ,m i ) k Indicates that k is a reentrant value and 2≤i≤N-2; use W a (q) represents the wafer that enters the system and completes the last processing step m of the re-entry process. i , and represents that the wafer has completed q re-entry times. Under the re-entry wafer flow, establish: Condition 2-4: When 1 ≤ q < k, and when M(P i-1 ) = m i-1 -1 or M(r i-1 ) = 1, the transition t i(i-1) and the transition X i are both set to the triggerable state; where P i-1 represents the (i - 1)-th adjacent processing station, m i-1 represents the number of parallel processing stations in the (i - 1)-th process step, r i-1 represents the (i - 1)-th sub-manipulator, the transition t i(i-1) represents the main manipulator R3 moving from the process step i to the process step i - 1, and the transition X i represents the main manipulator R3 rotating to the process step i; Condition 2-5: When 2≤i≤N-2, and when the system identifier M(P i+1 )=m i+1 -1 or M(P i+2 )=m i+2 -1 or M(r i+1 )=1, the transition t (i-2)(i-1) and Transition X i-2 Set to triggerable state; the transition t (i-2)(i-1) Indicates that the main robot R3 moves from process step i-2 to process step i-1, and the transition X i-2 Indicates that the main robot R3 rotates to process step i-2; Condition 2-6: When q = k, transition t i(i+1) and Transition X i Set to triggerable state; the transition t i(i+1) Indicates that the main robot R3 moves from process step i to process step i+1, and the transition X i Indicates that the main robot R3 rotates to process step i.

2. The method for scheduling a single processing path of a wafer according to claim 1, wherein: In step S1, the process production area scheduling algorithm for the main robot includes a production area scheduling algorithm based on a first-come, first-served rule, and the production area scheduling algorithm based on a first-come, first-served rule includes the following sub-steps: S111: Initialize all parameters, set e = 1. If C has no recorded value, set C = 0, where e is the index standard of the wafer sequence, starting from the initial value 1, and C is the station number when the main robot R3 places the wafer on the station; the station includes the merging station, the processing station, and the cleaning station; S112: When the wafer Enter the adjacent processing station P i Or not adjacent to processing station P N+j When the wafer arrives, record the arrival time S113: Set the wafer Next to the processing station P i Or not adjacent to processing station P N+j The processing time is Calculate the wafer Completion time in S114: For all the completion times obtained Arrange in ascending order to obtain the wafer sequence S to be transported W ; S115: Get wafer sequence S W In S e Position of the wafer; where S e Indicates that in wafer sequence S W The e-th wafer in ; S116: Determine if it is in S e Position of wafer Whether the constraint conditions for the deadlock handling of the main manipulator are met; S117: If yes, jump to step S118; if no, set e=e+1 and jump to step S116; S118: Main robot R3 locks the wafer And record the wafer grabbing Platform number at the time is B; S119: Determine whether the main robot R3 needs to be cleaned based on the value changes of the platform number B and the platform number C; S1110: If cleaning is required, the main robot R3 is cleaned, and then the process jumps to step S1111; If cleaning is not required, jump to step S1111; S1111: The main robot R3 will be in S e Position of wafer The wafer is transported to the next processing step station, and then the main robot R3 Unlock; S1112: Update the station number C for placing the wafer this time. e The wafer information of the location is deleted, and the S e All wafer information at the subsequent positions is moved up one position.

3. The method for scheduling a single wafer processing path according to claim 2, wherein: In step S1, the process production area scheduling algorithm for the main robot further includes a production area scheduling algorithm based on a pull rule, and the production area scheduling algorithm based on a pull rule includes the following sub-steps: S121: Initialize all parameters, set e = 1. If C does not have a recorded value, set C = 0. e is the index standard of the wafer sequence, starting from the initial value 1. C is the station number when the main robot R3 places the wafer on the station. The stations include the merging station, the processing station, and the cleaning station. S122: When the wafer Enter the adjacent processing station P i Or not adjacent to processing station P N+j When the wafer arrives, record the arrival time S123: Set the wafer Next to the processing station P i Or not adjacent to processing station P N+j The processing time is Calculate the wafer Completion time in S124: For all the completion times obtained Arrange in ascending order to obtain the wafer sequence S to be transported W ; S125: Wafer judgment Whether the station required for the next processing step is free; S126: If yes, go to step S1210; if no, go to step S127; S127: Retain wafer In wafer sequence S W The information in the process is received and the station required for the next processing step is idle. S128: On the wafer During the waiting process, determine whether there are new completed wafers; S129: If yes, go to step S122; if no, go to step S1210; S1210: Get wafer sequence S W In position S e Wafers; where Se represents the wafer sequence S W The e-th wafer in ; S1211: in S e Position of wafer Whether the constraint conditions for the deadlock handling of the main manipulator are met; S1212: If yes, jump to step S1213; if no, set e=e+1 and jump to step S1211; S1213: Main robot R3 locks the wafer And record the station number B when grabbing the wafer; S1214: Determine whether the main robot R3 needs to be cleaned based on the changes in the values of station number B and station number C; S1215: If cleaning is required, the main robot R3 is cleaned and then the process jumps to step S1216; if cleaning is not required, the process jumps to step S1216; S1216: The main robot R3 will be in S e Position of wafer The wafer is transported to the next processing step station, and then the main robot R3 Unlock; S1217: Update the station number C for placing the wafer this time. e The wafer information of the location is deleted, and the S e All wafer information at the subsequent positions is moved up one position.

4. The method for scheduling a single wafer processing path according to claim 3, wherein: In step S2, for the pick-and-place robot R1 and the pick-and-place robot R2, the constraints for the pick-and-place robot deadlock processing include: Condition 3-1: M(R1)=1 and M(P s )≠0, the transition X c Set to triggerable state; among them, transition X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection table O1 responsible for inspecting the wafers to be processed; Condition 3-2: M(R1)=1、M(R2)=1、M(P s )≠S、M(P t )=1 and M(P h )<2, transition X s Set to triggerable state; among them, transition X s Indicates that for unfinished wafers, the pick-and-place robot R1 and the pick-and-place robot R2 rotate to the storage position without load; Condition 3-3: M(R1)=1 and M(P s )≠S, transition X s 'Set to triggerable state; where transition X s 'Indicates that for the completed wafer, the pick-and-place robot R1 rotates to the storage position without load; Condition 3-4: M(R1)=1, M(P s )≠0, transition X t *Set to triggerable state; where transition X t *Indicates that for finished wafers, the pick-and-place robot R1 rotates to the rotary table without load; Condition 3-5: M(R2)=1, M(P h )<2, change X t Set to triggerable state; among them, transition X t Indicates that for unfinished wafers, the pick-and-place robot R2 rotates to the rotating table without load; Condition 3-6: M(R2)=1, M(P t )=1,M(P s )≠0, transition X h *Set to triggerable state; where transition X h *Indicates that for completed wafers, the pick-and-place robot R2 rotates to the merging station without load; Among them, P s Indicates storage bit, S indicates the maximum capacity of storage bit, P t represents the rotating stage, P h Indicates a merge station.

5. The method for scheduling a single processing path of a wafer according to claim 4, wherein: In step S2, the wafer dispatching strategy for the pick-and-place robot includes a finished wafer priority strategy, and the finished wafer priority strategy includes the following sub-steps: S211: Determine M(P t ) is 0, if so, execute step S212, if not, execute step S214; wherein P t A rotating table; S212: Determine whether the wafer on the rotating table is completed and has not passed through the merging station. If so, execute step S213; otherwise, execute step S2112; S213: Trigger Transition X t *; among which changes X t *Indicates that for finished wafers, the pick-and-place robot R1 rotates to the rotary table without load; S214: Determine whether the wafer inspection at the inspection station O1 has been completed. If so, execute step S215; if not, execute step S216; S215: Trigger Transition X c ; Among them, the change X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection table O1 responsible for inspecting the wafers to be processed; S216: Determine M(P s ) is not equal to S L If yes, then execute step S217, if no, then execute step S2112; s For storage location; S L Indicates the last processing step of the workpiece; S217: Determine whether there is a completed wafer W in the storage location f ', if yes, go to step S218, if no, go to step S219; S218: Trigger Transition X s '; Among them, the transition X s 'Indicates that for the completed wafer, the pick-and-place robot R1 rotates to the storage position without load; S219: Determine whether Red is 1. If so, execute step S2112; if not, execute step S2110. When Red is 0, the entrance is in a green light state, which is passable, and the exit is in a red light state, which is impassable; when Red is 1, the entrance is in a red light state, which is impassable, and the exit is in a green light state, which is passable; S2110: Determine whether there are more than two unprocessed wafers W in the storage location f If yes, execute step S2111, if no, execute step S2112; S2111: Trigger two transitions X consecutively s , two unprocessed wafers of the same type W f Take out; the change indicates that for unfinished wafers, the pick-and-place robot and the empty rotation to the storage position; S2112: The pick-and-place robot R1 does not operate.

6. The method for scheduling a single wafer processing path according to claim 5, wherein: In step S2, the wafer dispatching strategy for the pick-and-place robot further includes a strategy of prioritizing unprocessed wafers. The strategy of prioritizing unprocessed wafers includes the following sub-steps: S221: Determine M(P t ) is 0, if so, execute step S222, if not, execute step S224; wherein P t A rotating table; S222: Determine the wafer W on the rotating table f Whether it is completed and has not passed the merging station, if so, execute step S223, if not, execute step S2212; S223: Trigger Transition X t *; among which changes X t *Indicates that for finished wafers, the pick-and-place robot R1 rotates to the rotary table without load; S224: Determine whether the wafer inspection at the inspection station O1 has been completed. If so, execute step S225; otherwise, execute step S226; S225: Trigger Transition X c ; Among them, the change X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection table O1 responsible for inspecting the wafers to be processed; S226: Determine M(P s ) is not equal to S, if so, execute step S227, if not, execute step S222; wherein P s is the storage bit; S227: Determine whether there are more than two unprocessed wafers W in the storage location f If yes, go to step S228, if no, go to step S229; S228: Determine whether Red is 1. If so, execute step S2212; otherwise, execute step S229. When Red is 0, the entrance is in a green light state, which is passable, and the exit is in a red light state, which is impassable; when Red is 1, the entrance is in a red light state, which is impassable, and the exit is in a green light state, which is passable. S229: Determine whether there is an unprocessed wafer W in the storage location f If yes, execute step S2210, if no, execute step S2211; S2210: Trigger two transitions X consecutively s , two unprocessed wafers of the same type W f Take out; the change indicates that for unfinished wafers, the pick-and-place robot and the empty rotation to the storage position; S2211: Trigger transition X s '; Among them, the transition X s 'Indicates that for the completed wafer, the pick-and-place robot R1 rotates to the storage position without load; S2212: The pick-and-place robot R1 does not operate.

7. The method for scheduling a single wafer processing path according to claim 6, wherein: In step S3, the wafer feeding strategy for the pick-and-place robot includes a process area fixed work-in-progress strategy, and the process area fixed work-in-progress strategy includes the following sub-steps: S311: Initialize the wafer set Q and Set the sequence number b in the wafer set Q to 1 to indicate that the process will start from the first wafer. S312: All available wafers are listed in the wafer set Q one by one according to the order of their arrival time; S313: Determine whether the conditions M(R1)=1 and M(P s )≠0; R1 is the pick-and-place robot R1, P s is the storage bit; S314: If the condition M(R1)=1 and M(P s )≠0, wait until the condition is met, and then judge whether WIP0 is less than S315: If yes, then the wafer Wafers that have been placed in the system Remove from wafer set Q, update wafer set Q and then jump to step S312; if not, jump directly to step S312; Where WIP0 is the WIP level value of the current system, The WIP level value set by the system, is the bth wafer W arriving at the entrance station with wafer flow mode j.

8. The method for scheduling a single wafer processing path according to claim 7, wherein: In step S3, the wafer feeding strategy for the pick-and-place robot includes a fixed time interval strategy, which includes the following sub-steps: S321: Initialize the incoming wafer set Q, set the serial number b in the wafer set Q to 1, to indicate that the next step starts from the first wafer, and set the wafer The time of arrival at the entrance station is the initial time τ0; S322: All available wafers are listed in the wafer set Q one by one according to the order of their arrival time; S323: Determine the current time τ n Is it τ0+τ? Where τ is the fixed time interval from wafer input to the entire system. S324: If yes, determine whether the conditions M(R1)=1 and M(P s )≠0; otherwise wait until τ n =τ0+τ, then judge whether the conditions M(R1)=1 and M(P s )≠0; R1 is the pick-and-place robot R1, P s is the storage bit; S325: If the condition M(R1)=1 and M(P s )≠0, wait until the condition is met and then go to step S326; if the condition is met, M(R1)=1 and M(P s )≠0, go to step S326; S326: Wafer Wafers that have been placed in the system Remove from wafer set Q, update wafer set Q, and go to step S322; in is the bth wafer W arriving at the entrance station with wafer flow mode j.

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