Epitaxial wafer and preparation method thereof

Abstract

The present invention provides an epitaxial wafer and a method for preparing the same. The epitaxial wafer includes a substrate, a composite buffer layer, and an epitaxial layer stacked in sequence. The composite buffer layer includes an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer arranged in a periodic cycle. The aluminum-silicon-nitrogen diffusion layer includes an AlN layer and a SiN diffusion microstructure stacked in sequence. The silicon-aluminum-nitrogen diffusion layer includes an AlN diffusion microstructure stacked in sequence and a SiN layer. The SiN diffusion microstructure and the AlN diffusion microstructure are located at the interface between the aluminum-silicon-nitrogen diffusion layer and the SiN diffusion layer. The proportion of silicon atoms in the composite buffer layer gradually increases along the direction from the substrate toward the epitaxial layer. The present invention can reduce the occurrence of cracks or even splits on the surface of large-sized epitaxial layers, reduce the scrap rate of epitaxial wafers, improve the production yield of epitaxial wafers, and save production costs.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor optoelectronic devices, and in particular to an epitaxial wafer and a preparation method thereof. Background Art

[0002] Semiconductor epitaxial wafers are the fundamental raw material for manufacturing semiconductor products. In recent years, researchers worldwide have been working tirelessly to develop LED epitaxial wafers for high-end applications such as high-brightness lighting displays and communications. In line with industry demands, epitaxial wafer production is gradually moving toward larger-scale epitaxial wafers (wafers larger than 4 inches) to improve production efficiency, LED chip capacity, and reduce production costs. However, due to the lattice and thermal expansion mismatch between the substrate and the epitaxial layer, the epitaxially grown crystal material exhibits high dislocation density and stress, making it prone to warping and cracking, impacting device efficiency and lifespan. This problem becomes more severe as the epitaxial wafer size increases. Summary of the Invention

[0003] In order to solve the above technical problems, the present invention provides an epitaxial wafer and a preparation method thereof. The epitaxial wafer includes an aluminum silicon nitrogen diffusion layer and a silicon aluminum nitrogen diffusion layer arranged in a periodic cycle, and the interface between the aluminum silicon nitrogen diffusion layer and the silicon aluminum nitrogen diffusion layer has a SiN diffusion microstructure and an AlN diffusion microstructure, which can reduce the growth stress of the epitaxial wafer and improve the production yield of the epitaxial wafer.

[0004] To achieve this object, the present invention adopts the following technical solutions:

[0005] In a first aspect, the present invention provides an epitaxial wafer, comprising a substrate, a composite buffer layer, and an epitaxial layer stacked in sequence; the composite buffer layer comprises an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer arranged periodically, the aluminum-silicon-nitrogen diffusion layer comprises an AlN layer and a SiN diffusion microstructure stacked, the silicon-aluminum-nitrogen diffusion layer comprises an AlN diffusion microstructure and a SiN layer stacked, the SiN diffusion microstructure and the AlN diffusion microstructure are located at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer; wherein, along the direction from the substrate to the epitaxial layer, the proportion of silicon atoms in the composite buffer layer gradually increases.

[0006] The composite buffer layer of the present invention has a diffusion microstructure, which can, on the one hand, scatter light and change the path of light emitted from the nitride light-emitting layer to the substrate, thereby improving forward light emission and the brightness of the epitaxial wafer; on the other hand, the diffusion microstructure can be used to relieve the stress of the epitaxial layer thereon during the growth process, thereby ensuring that cracks or even splits on the surface of the epitaxial layer caused by excessive stress during the large-scale epitaxial growth process are avoided, reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0007] Furthermore, the present invention stipulates that the proportion of silicon atoms in the composite buffer layer gradually increases in the direction from the substrate to the epitaxial layer, and the introduction of Si atoms can be used to introduce compressive stress in the epitaxial wafer, and the proportion of Si atoms in the longitudinal direction gradually increases without introducing stress mutations, thereby alleviating the tensile stress of the nitride epitaxial layer thereon during the growth process, ensuring that the surface cracks or even splits of the epitaxial layer caused by excessive tensile stress during large-scale epitaxial growth are avoided, reducing the scrap rate of epitaxial wafers, improving the production yield of epitaxial wafers, and saving production costs.

[0008] Preferably, the silicon atom ratio is the ratio of the number of Si atoms in the composite buffer layer to the number of silicon and aluminum atoms in the composite buffer layer, where the number of silicon and aluminum atoms is equal to the sum of the number of Si atoms and the number of Al atoms in the composite buffer layer. The ratio of Si atoms to (Si atoms + Al atoms) is (0-1):1, for example, 0.1:1, 0.2:1, 0.3:1, 0.4:1, 0.5:1, 0.6:1, 0.7:1, 0.8:1, or 0.9:1.

[0009] Preferably, as the number of cycles increases, the thickness of the silicon aluminum nitrogen diffusion layer increases successively.

[0010] Preferably, the difference in thickness of the silicon aluminum nitrogen diffusion layer between any two adjacent periods is 0.4 to 3 nm, for example, it can be 0.4 nm, 0.5 nm, 0.6 nm, 0.8 nm, 1.0 nm, 1.2 nm, 1.5 nm, 1.8 nm, 2.0 nm, 2.2 nm, 2.3 nm, 2.5 nm, 2.8 nm or 3 nm, etc.

[0011] When the above two differences are too large, it is easy to cause large stress changes between adjacent diffusion layers during the growth process, resulting in stress mutations, and the increase in tensile stress during large-scale epitaxial growth leads to cracks or even splits on the surface of the epitaxial layer; when the above two differences are too small, too many cycles are required to reach the final surface layer. Due to the process cycle requirements, the growth equipment control unit will be required to frequently switch operations in a short period of time, which increases the probability of damage to the control unit, and there is a problem of too long process growth time, which reduces the equipment utilization rate. Therefore, the present invention preferably controls the difference in the thickness of the aluminum-silicon-nitrogen diffusion layer and the difference in the thickness of the silicon-aluminum-nitrogen diffusion layer within the above range, which has a better production yield for large-size epitaxial wafers.

[0012] Preferably, the number of cycles of the aluminum silicon nitrogen diffusion layer and the silicon aluminum nitrogen diffusion layer in the composite buffer layer is 2 to 10, for example, 2, 3, 4, 5, 6, 7, 8, 9 or 10.

[0013] Preferably, along the outward direction from the substrate surface, the sizes of the SiN diffusion microstructure and the AlN diffusion microstructure gradually decrease, and / or the densities of the SiN diffusion microstructure and the AlN diffusion microstructure gradually increase.

[0014] The present invention is designed to gradually reduce the size or increase the density of the diffusion microstructure in the direction outward from the surface of the substrate. On the one hand, the change in the size or density of the microstructure avoids the advantage of stress mutation at the interface of the epitaxial layer during the growth process, reducing the phenomenon of cracks or even splits on the epitaxial surface caused by stress. On the other hand, the nano-scale diffusion microstructure has a stronger scattering effect on light, thereby improving the forward light output and the brightness of the epitaxial wafer.

[0015] The silicon aluminum nitride diffusion layer further includes a gap layer between the AlN diffusion microstructure and the SiN layer.

[0016] In the epitaxial growth process, because the solubility of Si in Al is higher than that of Al in Si, Si will form a deeper diffusion depth. Therefore, the diffusion of Al in the Si layer will form an AlN microstructure and a void layer above it after N thermal surface treatment, releasing the internal stress of the composite buffer layer and providing a low-stress nitride buffer layer growth template.

[0017] The width of the gap layer is 0.5-3 nm, for example, 0.5 nm, 0.6 nm, 0.7 nm, 0.8 nm, 0.9 nm, 1.0 nm, 1.2 nm, 1.5 nm, 1.8 nm, 2.0 nm, 2.2 nm, 2.5 nm, 2.8 nm or 3 nm, etc. The width is the longitudinal distance between the AlN diffusion microstructure and the SiN layer.

[0018] The SiN diffusion microstructure comprises: at least one SiN micro-convex structure arranged along the interface between the Al-Si-N diffusion layer and the Si-Al-N diffusion layer; wherein the cross-sectional dimensions of the SiN micro-convex structure gradually decrease along the interface between the Al-Si-N diffusion layer and the Si-Al-N diffusion layer toward the epitaxial layer;

[0019] The AlN diffusion microstructure includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitride diffusion layer and the silicon-aluminum-nitride diffusion layer; wherein, along the interface between the aluminum-silicon-nitride diffusion layer and the silicon-aluminum-nitride diffusion layer toward the epitaxial layer, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0020] The AlN micro-convex structure of the present invention can be, for example, an inverted V-shaped structure, and the SiN micro-convex structure can be, for example, a V-shaped structure. These AlN micro-convex structures and SiN micro-convex structures can scatter light and change the path of light emitted from the nitride light-emitting layer to the substrate, thereby improving the forward light output and the brightness of the epitaxial wafer; they can also relieve the stress of the epitaxial layer thereon during the growth process and improve the production yield of the epitaxial wafer.

[0021] Preferably, the thickness of the aluminum-silicon-nitrogen diffusion layer is in the range of 1 to 10 nm, for example, 1 nm, 2 nm, 4 nm, 5 nm, 8 nm, 9 nm or 10 nm.

[0022] Preferably, the thickness of the silicon aluminum nitrogen diffusion layer is in the range of 2 to 15 nm, for example, it can be 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm or 15 nm.

[0023] Preferably, the epitaxial layer includes: a nitride buffer layer, a first doped nitride layer, a nitride light emitting layer and a second doped nitride layer sequentially stacked on the composite buffer layer.

[0024] Preferably, the size of the epitaxial wafer is larger than 4 inches.

[0025] It is worth noting that the warping cracks caused by the residual stress in the GaN thick film on the large-sized heterogeneous substrate are also a difficult problem that is difficult to overcome in GaN heteroepitaxial technology. Therefore, the present invention has an excellent effect of alleviating growth stress, especially for epitaxial wafers with a size of 4 inches or more.

[0026] In a second aspect, the present invention provides a method for preparing an epitaxial wafer, the method comprising at least:

[0027] A substrate is provided.

[0028] An aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer are periodically and alternately grown on the substrate to obtain a composite buffer layer; wherein the aluminum-silicon-nitrogen diffusion layer comprises an AlN layer and a SiN diffusion microstructure stacked together, and the silicon-aluminum-nitrogen diffusion layer comprises an AlN diffusion microstructure and a SiN layer stacked together, and the SiN diffusion microstructure and the AlN diffusion microstructure are located at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer;

[0029] growing an epitaxial layer on the composite buffer layer;

[0030] Wherein, the proportion of silicon atoms in the composite buffer layer gradually increases in the direction from the substrate to the epitaxial layer.

[0031] The epitaxial wafer preparation method of the present invention can prepare an epitaxial wafer with a diffuse microstructure. On the one hand, it can scatter light and change the path of light emitted from the nitride light-emitting layer to the substrate, thereby improving forward light emission and increasing the brightness of the epitaxial wafer. On the other hand, the microstructure can be used to relieve the stress of the epitaxial layer thereon during the growth process, thereby ensuring that cracks or even splits on the surface of the epitaxial layer caused by excessive stress during the large-scale epitaxial growth process are avoided, thereby reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0032] Furthermore, the present invention stipulates that the proportion of silicon atoms in the composite buffer layer gradually increases in the direction from the substrate to the epitaxial layer, and the introduction of Si atoms can be used to introduce compressive stress in the epitaxial wafer, and the proportion of Si atoms in the longitudinal direction gradually increases without introducing stress mutations, thereby alleviating the tensile stress of the nitride epitaxial layer thereon during the growth process, ensuring that the surface cracks or even splits of the epitaxial layer caused by excessive tensile stress during large-scale epitaxial growth are avoided, reducing the scrap rate of epitaxial wafers, improving the production yield of epitaxial wafers, and saving production costs.

[0033] Preferably, the growing of the composite buffer layer on the substrate comprises:

[0034] Step S21: performing Al thermal surface treatment on the substrate to form an Al deposition layer on the substrate to obtain a first semiconductor component.

[0035] Step S22: performing Si thermal surface treatment on the first semiconductor component to form a Si deposition layer on the Al deposition layer of the first semiconductor component to obtain a second semiconductor component;

[0036] Step S23: performing N thermal surface treatment on the second semiconductor component to form an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer in the Al deposited layer and the Si deposited layer, respectively, and forming a silicon-aluminum diffusion region at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer, wherein the silicon-aluminum diffusion region includes a SiN diffusion microstructure and an AlN diffusion microstructure;

[0037] Steps S21 to S23 are executed cyclically to obtain the composite buffer layer.

[0038] It is worth noting that the growth of the composite buffer layer in the present invention exhibits the following characteristics: Al thermal surface treatment, Si thermal surface treatment, and N thermal surface treatment are sequentially performed to form an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer, and SiN diffusion microstructures and AlN diffusion microstructures are formed at the interface of the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer. By adopting this specific growth process sequence, a higher yield and better brightness can be obtained.

[0039] Preferably, as the number of cycles increases, the thickness of the Si deposition layer increases successively.

[0040] The present invention controls the thickness of the Si deposited layer to increase successively with the increase of the number of cycles, the Si atoms diffused in step S22 to increase successively, and the Al deposited layer will be occupied by more SiN layers formed by nitridation, that is, the SiN diffusion microstructure of the composite buffer layer in the thickness direction increases with the increase of the cycle. On the one hand, the diffusion microstructure formed in the composite buffer layer can scatter light and change the light path of the nitride light-emitting layer toward the substrate, thereby improving the forward light output and the brightness of the epitaxial wafer; on the other hand, the introduction of Si atoms can be used to introduce compressive stress in the epitaxial wafer, and the Si atoms gradually increase in the longitudinal direction without introducing stress mutations, thereby alleviating the tensile stress of the nitride epitaxial layer thereon during the growth process, thereby ensuring that the surface cracks or even cracks of the epitaxial layer caused by excessive tensile stress during large-scale epitaxial growth are avoided, thereby reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0041] Preferably, steps S21 to S23 are repeated 2 to 10 times, for example, 2 times, 3 times, 4 times, 5 times, 6 times, 7 times, 8 times, 9 times or 10 times.

[0042] Preferably, the Al thermal surface treatment comprises: introducing an aluminum source with a flow rate of 10 to 300 sccm under the conditions of 500 to 900°C and a pressure of 50 to 200 torr, and performing Al thermal surface treatment on the substrate for 5 to 15 seconds. The temperature is 500 to 900°C, for example, 500°C, 545°C, 589°C, 634°C, 678°C, 723°C, 767°C, 812°C, 856°C or 900°C; the pressure is 50 to 200 torr, for example, 50 torr, 67 torr, 84 torr, 100 torr, 117 torr, 134 torr, 150 torr, 167 torr, 184 torr, etc. or 200 torr, etc.; the flow rate is 10-300 sccm, for example, it can be 10 sccm, 43 sccm, 75 sccm, 107 sccm, 139 sccm, 172 sccm, 204 sccm, 236 sccm, 268 sccm or 300 sccm, etc.; the time is 5-15 s, for example, it can be 5 s, 7 s, 8 s, 9 s, 10 s, 11 s, 12 s, 13 s, 14 s or 15 s, etc.

[0043] The Si thermal surface treatment includes: introducing a silicon source with a flow rate of 10 to 300 sccm under the conditions of a temperature of 500 to 900°C and a pressure of 50 to 200 torr, and performing Si thermal surface treatment on the first semiconductor component for 10 to 20 seconds. The temperature is 500 to 900°C, for example, it can be 500°C, 545°C, 589°C, 634°C, 678°C, 723°C, 767°C, 812°C, 856°C or 900°C; the pressure is 50 to 200 torr, for example, it can be 50 torr, 67 torr, 84 torr, 100 torr, 117 torr, 134 torr, 150 torr, 167 torr, 184 torr or 2 00torr, etc.; the flow rate is 10-300sccm, for example, it can be 10sccm, 43sccm, 75sccm, 107sccm, 139sccm, 172sccm, 204sccm, 236sccm, 268sccm or 300sccm, etc.; the time is 10-20s, for example, it can be 10s, 12s, 13s, 14s, 15s, 16s, 17s, 18s, 19s or 20s, etc.

[0044] Preferably, as the number of cycles increases, the flow rate of the silicon source increases successively, and / or the time of the Si thermal surface treatment increases successively.

[0045] Due to the characteristics of the lattice difference between the substrate and the epitaxial layer, the epitaxial material on the substrate will have large stress during the growth process. The best way to release the stress in the epitaxial material is to release it gradually and slowly. In this way, crack defects or even cracks will not appear in the epitaxial material due to stress mutation, and the stress distribution in the epitaxial material can be relatively uniform. Therefore, in the initial stage, the flow rate of the Si source is set to be low. On the one hand, it can better combine with the substrate without introducing sudden stress on the substrate surface. On the other hand, it can form a low-density Si atom nucleation center. Therefore, the density of the silicon-aluminum diffusion zone with the Si atom nucleation center as the diffusion starting point will be lower. Subsequently, as the number of cycles increases, the flow rate of the Si source in step S21 increases successively, so that the SiN diffusion microstructure of the composite buffer layer in the thickness direction increases with the increase of the cycle. In this way, a diffusion structure density gradient change can be introduced in the thickness direction to gradually release stress, thereby achieving the purpose of alleviating the tensile stress of the nitride epitaxial layer thereon during the growth process.

[0046] Preferably, in any two adjacent cycles, the difference in flow rate of the silicon source is 5 to 60 sccm, and / or the difference in time of the Si thermal surface treatment is 2 to 4 s. The flow rate difference is 5 to 60 sccm, for example, 6 sccm, 8 sccm, 9 sccm, 10 sccm, 12 sccm, 15 sccm, 20 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm, 50 sccm, 55 sccm or 59 sccm, etc.; the time difference is 2 to 4 s, for example, 2.1 s, 2.2 s, 2.5 s, 2.8 s, 3.0 s, 3.2 s, 3.3 s, 3.5 s or 3.8 s, etc.

[0047] When the above two differences are too large, it is easy to cause large stress changes between adjacent diffusion layers during the growth process, resulting in stress mutations, and the increase in tensile stress during large-scale epitaxial growth leads to cracks or even splits on the surface of the epitaxial layer; when the above two differences are too small, too many cycles are required to reach the final surface layer. Due to the process cycle requirements, the growth equipment control unit will be required to frequently switch operations in a short period of time, which increases the probability of damage to the control unit, and there is a problem of too long process growth time, which reduces the equipment utilization rate. Therefore, the present invention preferably controls the difference in the thickness of the aluminum-silicon-nitrogen diffusion layer and the difference in the thickness of the silicon-aluminum-nitrogen diffusion layer within the above range, which has a better production yield for large-size epitaxial wafers.

[0048] The N thermal surface treatment includes: introducing a nitrogen source with a flow rate of 20 to 100 slm under the conditions of a temperature of 500 to 1400°C and a pressure of 50 to 200 torr, and performing N thermal surface treatment on the second semiconductor component for 15 to 30 seconds. The temperature is 500 to 1400°C, for example, 500°C, 600°C, 700°C, 800°C, 900°C, 1000°C, 1100°C, 1200°C, 1300°C or 1400°C; the pressure is 50 to 200 torr, for example, 50 torr, 67 torr, 84 torr, 100 torr, 117 torr, 134 torr, 150 torr, 167 torr, 184 torr, or 200torr, etc.; the flow rate is 20-100slm, for example, it can be 20slm, 25slm, 30slm, 35slm, 40slm, 45slm, 50slm, 55slm, 60slm, 70slm, 80slm, 90slm or 100slm, etc.; the time is 15-30s, for example, it can be 15s, 17s, 19s, 20s, 22s, 24s, 25s, 27s, 29s or 30s, etc.

[0049] When the N thermal surface treatment time is too short, the Al atoms from the Al thermal surface treatment and the Si atoms from the Si thermal surface treatment are not fully N-type, and a large number of N vacancy defects will form in the composite buffer layer, resulting in poor quality of the composite buffer layer. When the N thermal surface treatment time is too long, polarity reversal occurs on the surface of the AlN layer in the aluminum nitrogen diffusion layer and the AlN diffusion microstructure in the silicon nitrogen diffusion layer, resulting in excessively large differences in surface roughness of the composite buffer layer and unstable performance. The present invention further preferably controls the N thermal surface treatment time to 15 to 30 seconds. On the one hand, this ensures stable composite buffer performance and improves surface consistency and uniformity. On the other hand, it ensures that the Al atoms from the Al thermal surface treatment and the Si atoms from the Si thermal surface treatment are fully N-type, reducing N vacancy defects, preventing N vacancy defects from absorbing light from the light-emitting layer, and improving the brightness of the epitaxial wafer.

[0050] Preferably, before performing Al thermal surface treatment on the substrate, the method includes:

[0051] The substrate is heat-treated under preset conditions.

[0052] The preset conditions include a temperature of 1000-1200°C and a pressure of 100-500 Torr. The temperature of 1000-1200°C may be, for example, 1000°C, 1020°C, 1050°C, 1080°C, 1100°C, 1120°C, 1150°C, 1180°C, or 1200°C; and the pressure of 100-500 Torr may be, for example, 100 Torr, 120 Torr, 150 Torr, 200 Torr, 250 Torr, 300 Torr, 350 Torr, 400 Torr, 450 Torr, or 500 Torr.

[0053] Preferably, the heat treatment time is 1 to 10 minutes, for example, it can be 1 minute, 2 minutes, 3 minutes, 4 minutes, 5 minutes, 6 minutes, 7 minutes, 8 minutes, 9 minutes or 10 minutes.

[0054] Preferably, the epitaxial layer includes a nitride buffer layer, a first doped nitride layer, a light-emitting layer, and a second doped nitride layer stacked in sequence, and the preparation method further includes:

[0055] A nitride buffer layer having a thickness of 1 to 5 μm is formed at a temperature of 1050 to 1150° C. and a pressure of 100 torr to 500 torr. For example, the temperature may be 1050° C., 1062° C., 1073° C., 1084° C., 1095° C., 1106° C., 1117° C., 1128° C., 1139° C., or 1150° C.; the pressure may be 100 torr, 145 torr, 189 torr, 234 torr, 278 torr, 323 torr, 367 torr, 412 torr, 456 torr, or 500 torr; and the thickness may be 1 μm, 1.5 μm, 1.9 μm, 2.4 μm, 2.8 μm, 3.3 μm, 3.7 μm, 4.2 μm, 4.6 μm, or 5 μm.

[0056] Under the conditions of temperature of 1040-1140℃ and pressure of 100-500torr, a doping concentration of 1×10 18 cm -3 ~8×10 18 cm -3 The first doped nitride layer has a thickness of 2 to 8 μm. For example, the temperature may be 1040° C., 1052° C., 1063° C., 1074° C., 1085° C., 1096° C., 1107° C., 1118° C., 1129° C., or 1140° C.; the pressure may be 100 torr, 145 torr, 189 torr, 234 torr, 278 torr, 323 torr, 367 torr, 412 torr, 456 torr, or 500 torr; and the first doping concentration may be 1×10 18 cm -3 , 1.8×10 18 cm -3 , 2.6×10 18 cm -3 , 3.4×10 18 cm -3 , 4.2×10 18 cm -3 , 4.9×10 18 cm -3 , 5.7×10 18 cm -3 , 6.5×10 18 cm -3 , 7.3×10 18 cm -3 or 8×10 18 cm -3 etc.; the thickness can be 2μm, 2.7μm, 3.4μm, 4μm, 4.7μm, 5.4μm, 6μm, 6.7μm, 7.4μm or 8μm, etc.

[0057] Under conditions of a temperature of 700-1200° C. and a pressure of 100-500 Torr, 2-15 quantum well structures are repeatedly and overlappingly grown to form a growing light-emitting layer. For example, the temperature can be 700° C., 756° C., 812° C., 867° C., 923° C., 978° C., 1034° C., 1089° C., 1145° C., or 1200° C.; the pressure can be 100 Torr, 145 Torr, 189 Torr, 234 Torr, 278 Torr, 323 Torr, 367 Torr, 412 Torr, 456 Torr, or 500 Torr; and the number of periodic overlapping can be 2, 4, 5, 7, 8, 10, 11, 13, 14, or 15.

[0058] Preferably, the quantum well structure includes a stacked nitride quantum well layer and a nitride quantum barrier layer. Growing the quantum well structure includes forming the nitride quantum well layer at a temperature of 700-1150°C and a pressure of 100-500 Torr; for example, the temperature may be 700°C, 750°C, 800°C, 850°C, 900°C, 950°C, 1000°C, 1050°C, 1100°C, or 1150°C; and the pressure may be 100 Torr, 145 Torr, 189 Torr, 234 Torr, 278 Torr, 323 Torr, 367 Torr, 412 Torr, 456 Torr, or 500 Torr. A nitride quantum barrier layer is formed on the nitride quantum well layer under the conditions of 750-1200°C and a pressure of 100-500 torr; for example, the temperature may be 750°C, 800°C, 850°C, 900°C, 950°C, 1000°C, 1050°C, 1100°C, 1150°C or 1200°C, etc.; the pressure may be 100 torr, 145 torr, 189 torr, 234 torr, 278 torr, 323 torr, 367 torr, 412 torr, 456 torr or 500 torr, etc.

[0059] Under the conditions of temperature of 950-1050℃ and pressure of 100-600torr, a doping concentration of 1×10 19 cm -3 ~1×10 21 cm -3The second doped nitride layer has a thickness of 20 to 300 nm. For example, the temperature may be 950° C., 962° C., 973° C., 984° C., 995° C., 1006° C., 1017° C., 1028° C., 1039° C., or 1050° C.; the pressure may be 100 torr, 156 torr, 212 torr, 267 torr, 323 torr, 378 torr, 434 torr, 489 torr, 545 torr, or 600 torr; and the second doping concentration may be 1×10 19 cm -3 , 1.2×10 19 cm -3 , 3×10 19 cm -3 , 5×10 19 cm -3 , 6×10 19 cm -3 , 1×10 20 cm -3 , 2×10 20 cm -3 , 4×10 20 cm -3 , 5×10 20 cm -3 , 7×10 20 cm -3 , 9×10 20 cm -3 or 1×10 21 cm -3 etc.; the thickness can be 20nm, 52nm, 83nm, 114nm, 145nm, 176nm, 207nm, 238nm, 269nm or 300nm, etc.

[0060] Compared with the prior art, the present invention has at least the following beneficial effects:

[0061] (1) The epitaxial wafer provided by the present invention includes, from the substrate surface outward, an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer that are periodically arranged, and the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer have diffusion microstructures, which can alleviate the phenomenon of cracks or even splits on the surface of the epitaxial layer caused by excessive stress during the epitaxial growth process, thereby reducing the internal stress of the epitaxial wafer, improving the crystal quality of the epitaxial layer, reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0062] (2) The epitaxial wafer provided by the present invention has a gradually increasing proportion of silicon atoms in the composite buffer layer along the direction from the substrate to the epitaxial layer, which can gradually change the tensile stress during the epitaxial growth process. It is particularly suitable for the preparation of large-size epitaxial wafers and significantly improves the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] Figure 1 It is a structural schematic diagram of the epitaxial wafer provided by the present invention.

[0064] Figure 2 It is a schematic structural diagram of the composite buffer layer provided by the present invention.

[0065] Figure 3 Schematic diagram of structural changes of adjacent periods in the composite buffer layer in Examples 1 to 3 of the present invention.

[0066] Figure 4 Schematic diagram of the structural changes of adjacent periods in the composite buffer layer in Example 7 of the present invention.

[0067] In the figure: 1-substrate; 2-composite buffer layer; 21-aluminum silicon nitride diffusion layer; 211-AlN layer; 212-SiN diffusion microstructure; 22-silicon aluminum nitride diffusion layer; 221-SiN layer; 222-void layer; 223-AlN diffusion microstructure; 3-epitaxial layer; 31-nitride buffer layer; 32-first doped nitride layer; 33-light-emitting layer; 34-second doped nitride layer. DETAILED DESCRIPTION

[0068] For the convenience of understanding the present invention, the present invention is given below with examples. It should be understood by those skilled in the art that the examples are only for the purpose of helping to understand the present invention and should not be regarded as specific limitations of the present invention.

[0069] It should be understood that the terms "first," "second," etc. are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified with "first," "second," etc. may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0070] See also Figure 1 and Figure 2 , Figure 1 is a schematic structural diagram of the epitaxial wafer provided by the present invention, Figure 2 Schematic diagram of the structure of the composite buffer layer provided by the present invention. The epitaxial wafer comprises a substrate 1, a composite buffer layer 2 and an epitaxial layer 3 which are stacked in sequence.

[0071] The composite buffer layer 2 includes a periodically arranged aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22. The aluminum-silicon-nitrogen diffusion layer 21 includes a stacked AlN layer 211 and a SiN diffusion microstructure 212. The silicon-aluminum-nitrogen diffusion layer 22 includes a stacked AlN diffusion microstructure 223 and a SiN layer 221. The SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 are located at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22. The proportion of silicon atoms in the composite buffer layer 2 gradually increases along the direction from the substrate 1 to the epitaxial layer 3.

[0072] Furthermore, the silicon atom ratio is the ratio of the number of Si atoms in the composite buffer layer 2 to the number of silicon and aluminum atoms in the composite buffer layer 2 , and the number of silicon and aluminum atoms is equal to the sum of the number of Si atoms and the number of Al atoms in the composite buffer layer 2 .

[0073] Furthermore, as the number of cycles increases, the thickness of the silicon aluminum nitrogen diffusion layer 22 increases successively.

[0074] Furthermore, the difference in thickness between any two adjacent periods of the SiAlN diffusion layer 22 is 0.4-3 nm.

[0075] Furthermore, the number of cycles of the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 in the composite buffer layer 2 is 2-10.

[0076] Furthermore, along the outward direction from the surface of the substrate 1, the size of the SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 gradually decreases; or the density of the SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 gradually increases; or, along the outward direction from the surface of the substrate 1, the size of the SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 gradually decreases, and the density of the SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 gradually increases.

[0077] Furthermore, if Figure 2 As shown, the SiAlN diffusion layer 22 further includes a gap layer 222 between the AlN diffusion microstructure 223 and the SiN layer 221 .

[0078] Furthermore, the SiN diffusion microstructure 212 includes at least one SiN micro-convex structure arranged along the interface between the Al-Si-N diffusion layer 21 and the Si-Al-N diffusion layer 22; the cross-sectional dimensions of the SiN micro-convex structure gradually decrease along the interface between the Al-Si-N diffusion layer 21 and the Si-Al-N diffusion layer 22 toward the epitaxial layer 3. The AlN diffusion microstructure 223 includes at least one AlN micro-convex structure arranged along the interface between the Al-Si-N diffusion layer 21 and the Si-Al-N diffusion layer 22; the cross-sectional dimensions of the AlN micro-convex structure gradually decrease along the interface between the Al-Si-N diffusion layer 21 and the Si-Al-N diffusion layer 22 toward the epitaxial layer 3. Furthermore, the thickness of the Al-Si-N diffusion layer 21 ranges from 1 to 20 nm.

[0079] Furthermore, the thickness of the SiAlN diffusion layer 22 is in the range of 2 to 15 nm.

[0080] In one embodiment, if Figure 1 As shown, the epitaxial layer 3 includes: a nitride buffer layer 31 , a first doped nitride layer 32 , a nitride light emitting layer 33 and a second doped nitride layer 34 which are sequentially stacked on the composite buffer layer 2 .

[0081] As a specific example of this embodiment, the thickness of the nitride buffer layer 31 is 1 to 5 μm, for example, it can be 1 μm, 1.5 μm, 2 μm, 3 μm, 4 μm or 5 μm, etc.; the material of the nitride buffer layer 31 can be GaN, AlN, AlGaN, InN, InGaN, AlInGaN or AlInN, etc.

[0082] As a specific example of this embodiment, the thickness of the first doped nitride layer 32 is 2 to 8 μm, for example, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm or 8 μm; the material of the first doped nitride layer 32 is GaN; the doping element in the first doped nitride layer 32 is Si, and the doping concentration is 1 to 8×10 18 cm -3 , for example, it can be 1×10 18 cm -3 , 2×10 18 cm -3 , 3×10 18 cm -3 , 4×10 18 cm -3 , 5×10 18 cm -3 , 6×10 18 cm -3 , 7×10 18 cm -3 or 8×10 18 cm -3 wait.

[0083] As a specific example of this embodiment, the light-emitting layer 33 includes at least a quantum well layer and a quantum barrier layer that are periodically repeated and overlapped. The quantum well layer has a thickness of 1 to 10 nm, such as 1 nm, 1.5 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, or 10 nm, and is made of InGaN. The quantum barrier layer has a thickness of 5 to 20 nm, such as 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 12 nm, 13 nm, 14 nm, 15 nm, 18 nm, or 20 nm, and is made of GaN. The number of periods in the light-emitting layer 33 is 2 to 15, such as 2, 3, 4, 5, 6, 7, 8, 9, 10, 12, or 15.

[0084] As a specific example of this embodiment, the thickness of the second doped nitride layer 34 is 20 to 300 nm, for example, 20 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 250 nm or 300 nm. The material of the second doped nitride layer 34 is GaN, and the doping element in the second doped nitride layer 34 is Mg, with a doping concentration of 1×10 19 cm -3 ~1×10 21 cm -3 , for example, it can be 1×10 19 cm -3 , 1.5×10 19 cm -3 , 2×10 19 cm -3 , 3×10 19 cm -3 , 3.5×10 19 cm -3 , 4.0×10 19 cm -3 , 4.2×10 19 cm -3 , 4.5×10 19 cm -3 , 5.0×10 19 cm -3 , 5.5×10 19 cm -3 , 6×10 19 cm -3 , 7×10 19 cm -3 , 8×10 19 cm -3 , 1×10 20 cm-3 , 2×10 20 cm -3 , 3×10 20 cm -3 , 4×10 20 cm -3 , 5×10 20 cm -3 , 8×10 20 cm -3 or 1×10 21 cm -3 wait.

[0085] Furthermore, both the first doped nitride layer 32 and the second doped nitride layer 34 are doped semiconductor layers, and their conductivity types are different.

[0086] Furthermore, the size of the epitaxial wafer is larger than 4 inches, for example, it can be 4 inches, 5 inches or 6 inches.

[0087] The epitaxial wafer provided in this embodiment includes a substrate 1 and a composite buffer layer 2, and the composite buffer layer 2 includes an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22 that are periodically arranged. The aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 both have diffusion microstructures, which can scatter light and change the path of light emitted from the nitride light-emitting layer 33 toward the substrate 1, thereby improving the forward light output and the brightness of the epitaxial wafer. Furthermore, compressive stress can be introduced into the epitaxial wafer by introducing Si atoms, and the Si atoms gradually increase in the longitudinal direction without introducing stress mutations, thereby alleviating the tensile stress of the nitride epitaxial layer 3 thereon during the growth process, ensuring that the surface of the epitaxial layer 3 is cracked or even split due to excessive tensile stress during large-scale epitaxial growth, thereby reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0088] Based on the above epitaxial structure, the present invention also provides a method for preparing the epitaxial structure, which comprises the following steps:

[0089] Step S1: providing a substrate 1.

[0090] The substrate 1 is used to provide a growth template on which subsequent film layers are grown.

[0091] Step S2: growing a composite buffer layer 2 on the substrate 1 .

[0092] The composite buffer layer 2 includes, from the surface of the substrate 1 outward, a periodically arranged aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, the aluminum-silicon-nitrogen diffusion layer 21 including a stacked AlN layer 211 and a SiN diffusion microstructure 212, the silicon-aluminum-nitrogen diffusion layer 22 including a stacked AlN diffusion microstructure 223 and a SiN layer 221, the SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 being located at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the direction from the substrate 1 to the epitaxial layer 3, the proportion of silicon atoms in the composite buffer layer 2 gradually increases.

[0093] In one embodiment, to grow the composite buffer layer 2 on the substrate 1, the following steps may be employed:

[0094] S21: performing a heat treatment on the substrate 1 at 1000-1200° C. and a pressure of 100-500 torr for 1-10 minutes to obtain a heat-treated substrate 1.

[0095] Impurities such as C and O on the substrate surface can be removed by heat treatment.

[0096] S22: Under the conditions of 500-900°C and a pressure of 50-200 torr, an aluminum source with a flow rate of 10-300 sccm is introduced, and the heat-treated substrate 1 is subjected to Al thermal surface treatment for 5-15s to form an Al deposition layer with a thickness of 1-20nm on the substrate 1 to obtain a first semiconductor component.

[0097] The present invention utilizes the poor migration activity of Al atoms to form a uniform Al deposition layer on the substrate 1, without causing atomic aggregation due to differences in formation energy in different regions of the substrate 1 surface, thereby forming a composite buffer layer 2 with high surface consistency.

[0098] S23: Under the conditions of a temperature of 500-900°C and a pressure of 50-200 torr, a silicon source with a flow rate of 10-300 sccm is introduced to perform Si thermal surface treatment on the first semiconductor component for 10-20s to form a Si deposition layer with a thickness of 2-15nm on the Al deposition layer of the first semiconductor component to obtain a second semiconductor component.

[0099] In the present invention, Al thermal surface treatment is performed first, and then Si thermal surface treatment is performed. The order of the two cannot be interchanged. When the order is interchanged, the SiN layer 221 and the AlN layer 211 overlap, and the diffusion microstructure in the composite buffer layer 2 cannot be obtained. In the present invention, Al thermal surface treatment is performed first, and then Si thermal surface treatment is performed. The diffusion microstructure formed can relieve the stress of the epitaxial layer 3 during the growth process, thereby ensuring the yield in the large-scale epitaxial growth process.

[0100] S24: Under the conditions of a temperature of 500-1400°C and a pressure of 50-200 torr, a nitrogen source with a flow rate of 20-100 slm is introduced, and the second semiconductor component is subjected to N thermal surface treatment for 15-30s, so that the Al deposition layer and the Si deposition layer form an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, respectively, and a silicon-aluminum diffusion region is formed at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22, and the silicon-aluminum diffusion region includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 223.

[0101] In the present invention, because the solubility of Si in Al is higher than the solubility of Al in Si, Si will form a deeper diffusion depth. Therefore, the diffusion of Al in the Si layer will simultaneously form an AlN diffusion microstructure 223 after N thermal surface treatment, and a void layer 222 will be formed between the AlN diffusion microstructure 223 and the SiN layer 221, thereby releasing the internal stress of the composite buffer layer 2 and reducing the growth stress of the epitaxial wafer.

[0102] In the present invention, under the action of N thermal surface treatment, part of the Al deposited layer in step S22 is nitrided to form an AlN layer 211, and part of the Si deposited layer in step S23 is nitrided to form a SiN layer 221. In addition, during the N thermal surface treatment, the Al deposited layer formed in step S22 and the Si deposited layer formed in step S23 diffuse with each other. Since the diffusion rate of atoms close to the interface is faster than that of atoms far from the interface, that is, the Al atoms and Si atoms far from the interface diffuse slowly, non-uniform diffusion of atoms on both sides of the interface occurs, and finally a V-shaped SiN diffusion microstructure 212 is formed in the nitrided AlN layer 211, and an inverted V-shaped AlN diffusion microstructure 223 is formed in the nitrided SiN layer 221.

[0103] S25: cyclically executing steps S22 to S24 to obtain a composite buffer layer 2.

[0104] Furthermore, steps S22 to S24 are repeated 2 to 10 times.

[0105] Furthermore, as the number of cycles increases, the flow rate of the silicon source increases successively, and / or the time of the Si thermal surface treatment increases successively.

[0106] Furthermore, in any two adjacent cycles, the difference in flow rate of the silicon source is 5 to 60 sccm, and / or the difference in time of the Si thermal surface treatment is 2 to 4 s.

[0107] As the cycle period increases, through the change of the above-mentioned process parameters, the thickness of the Al deposition layer in the composite buffer layer 2 gradually decreases, and the thickness of the Si deposition layer in the composite buffer layer 2 gradually increases. In step S23, the diffused Si atoms increase successively, and the Al deposition layer is occupied by more SiN layers 221 formed by nitridation, that is, in the thickness direction of the composite buffer layer 2, SiN increases with the increase of the cycle period. On the one hand, the diffusion microstructure formed in the composite buffer layer 2 can play a role in light scattering and changing the light path emitted from the nitride light-emitting layer 33 to the substrate, thereby improving the forward light output and improving the brightness of the epitaxial wafer; on the other hand, the introduction of Si atoms can be used to introduce compressive stress in the epitaxial wafer, and the Si atoms gradually increase in the longitudinal direction, without introducing stress mutations, thereby alleviating the tensile stress of the epitaxial layer 3 thereon during the growth process, reducing the phenomenon of surface cracks or even cracks in the epitaxial layer 3 caused by excessive tensile stress in large-scale epitaxial growth, reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0108] Step S3: growing an epitaxial layer 3 on the composite buffer layer 2 .

[0109] The epitaxial layer 3 includes a nitride buffer layer 31, a first doped nitride layer 32, a light-emitting layer 33, and a second doped nitride layer 34 stacked in sequence. The preparation of the epitaxial layer 3 includes the following steps:

[0110] S31: forming a nitride buffer layer 31 with a thickness of 1 to 5 μm on the composite buffer layer 2 at a temperature of 1050 to 1150° C. and a pressure of 100 torr to 500 torr.

[0111] S32: Under the conditions of temperature of 1040-1140°C and pressure of 100-500 Torr, a doping concentration of 1×10 18 cm -3 ~8×10 18 cm -3 The first doped nitride layer 32 has a thickness of 2-8 μm.

[0112] S33 : Under the conditions of a temperature of 700-1200° C. and a pressure of 100-500 Torr, 2-15 quantum well structures are repeatedly grown in an overlapping manner on the first doped nitride layer 32 to form a grown light emitting layer 33 .

[0113] The quantum well structure includes a stacked nitride quantum well layer and a nitride quantum barrier layer; growing the quantum well structure includes: forming the nitride quantum well layer at a temperature of 700-1150°C and a pressure of 100-500 torr; and forming the nitride quantum barrier layer on the nitride quantum well layer at a temperature of 750-1200°C and a pressure of 100-500 torr.

[0114] S34: Under the conditions of temperature of 950-1050°C and pressure of 100-600 torr, a doping concentration of 1×10 19 cm -3 ~1×10 21 cm -3 The second doped nitride layer 34 has a thickness of 20-300 nm.

[0115] The following describes the technical solution of the present application in more detail with reference to the accompanying drawings and several examples. However, it should be understood that the following examples are merely for the purpose of explaining and illustrating the technical solution and do not limit the scope of the present application. Furthermore, unless otherwise specified, the various raw materials, reaction equipment, detection equipment, and methods used in the following examples are all known in the art.

[0116] Example 1

[0117] Please refer to Figure 1 and Figure 3 This embodiment provides an epitaxial wafer, which includes a substrate 1, a composite buffer layer 2 and an epitaxial layer 3 stacked in sequence.

[0118] The thickness of the substrate 1 is 1000 μm, the size of the substrate 1 is 6 inches, and the material of the substrate 1 is sapphire.

[0119] The composite buffer layer 2 includes a periodically arranged aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22. The aluminum-silicon-nitrogen diffusion layer 21 includes a stacked AlN layer 211 and a SiN diffusion microstructure 212. The silicon-aluminum-nitrogen diffusion layer 22 includes a stacked AlN diffusion microstructure 223 and a SiN layer 221. The SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 are located at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22. The proportion of silicon atoms in the composite buffer layer 2 gradually increases along the direction from the substrate 1 to the epitaxial layer 3.

[0120] Furthermore, if Figure 3 As shown, as the number of cycles increases, the thickness of the silicon aluminum nitrogen diffusion layer 22 increases successively.

[0121] The difference in thickness between any two adjacent periods of the SiAlN diffusion layer 22 is 0.4 nm.

[0122] The number of cycles of the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 in the composite buffer layer 2 is 5.

[0123] In the outward direction along the surface of the substrate 1 , the sizes of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 223 gradually decrease, and the densities of the SiN diffusion microstructures 212 and the AlN diffusion microstructures 223 gradually increase.

[0124] The SiAlN diffusion layer 22 further includes a gap layer 222 between the AlN diffusion microstructure 223 and the SiN layer 221 . The width of the gap layer 222 is 1.5 nm.

[0125] The SiN diffusion microstructure 212 includes: at least one SiN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the SiN micro-convex structure gradually decreases; the AlN diffusion microstructure 223 includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0126] The thickness of the aluminum-silicon-nitrogen diffusion layer 21 is 15 nm. The thickness of the silicon-aluminum-nitrogen diffusion layer 22 in the first period is 10 nm. The epitaxial layer 3 includes: a nitride buffer layer 31, a first doped nitride layer 32, a nitride light-emitting layer 33, and a second doped nitride layer 34, which are sequentially stacked on the composite buffer layer 2.

[0127] The thickness of the nitride buffer layer 31 is 1 μm, and the material of the nitride buffer layer 31 is GaN.

[0128] The thickness of the first doped nitride layer 32 is 5 μm and the material is GaN. The doping element in the first doped nitride layer 32 is Si with a doping concentration of 2.5×10 18 cm -3 .

[0129] The light-emitting layer 33 comprises at least a periodically overlapping arrangement of quantum well layers and quantum barrier layers. The quantum well layers are 3 nm thick and made of InGaN. The quantum barrier layers are 15 nm thick and made of GaN. The number of periods in the light-emitting layer 33 is 12.

[0130] The thickness of the second doped nitride layer 34 is 100 nm, and the material is GaN. The doping element in the second doped nitride layer 34 is Mg, and the doping concentration is 2.5×10 19 cm -3 .

[0131] This embodiment also provides a method for preparing the epitaxial wafer, which comprises:

[0132] S101: providing a substrate 1.

[0133] S102: heat-treating the substrate 1 at 1000° C. and a pressure of 500 torr for 5 minutes to obtain a heat-treated substrate 1.

[0134] S103: Under the conditions of 500° C. and a pressure of 200 torr, an aluminum source with a flow rate of 180 sccm is introduced to perform Al thermal surface treatment on the heat-treated substrate 1 for 12 seconds to form an Al deposition layer on the substrate 1 to obtain a first semiconductor component.

[0135] S104: Under the conditions of a temperature of 600°C and a pressure of 100 torr, a silicon source with a flow rate of 100 sccm is introduced to perform Si thermal surface treatment on the first semiconductor component for 10 seconds to form a Si deposition layer on the Al deposition layer of the first semiconductor component to obtain a second semiconductor component.

[0136] S105: Under the conditions of a temperature of 800°C and a pressure of 100 torr, a nitrogen source with a flow rate of 25 slm is introduced, and the second semiconductor component is subjected to N thermal surface treatment for 25 seconds, so that the Al deposition layer and the Si deposition layer form an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, respectively, and a silicon-aluminum diffusion region is formed at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22, and the silicon-aluminum diffusion region includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 223.

[0137] S106: cyclically execute steps S103 to S105 for a total of five times to obtain a composite buffer layer 2.

[0138] As the number of cycles increases, the flow rate of the silicon source increases, and the time of the Si thermal surface treatment increases. In any two adjacent cycles, the difference in the flow rate of the silicon source is 15 sccm, and the difference in the time of the Si thermal surface treatment is 3 s.

[0139] S107 : forming a nitride buffer layer 31 with a thickness of 1 μm and made of GaN on the composite buffer layer 2 at a temperature of 1150° C. and a pressure of 100 Torr.

[0140] S108: Under the conditions of a temperature of 1040°C and a pressure of 500 torr, a GaN-doped Si layer with a doping concentration of 2.5×10 18 cm -3 The first doped nitride layer 32 has a thickness of 5 μm.

[0141] S109: forming a nitride quantum well layer with a thickness of 3 nm and made of InGaN at a temperature of 750° C. and a pressure of 300 Torr.

[0142] S110: forming a nitride quantum barrier layer with a thickness of 15 nm and made of GaN on the nitride quantum well layer under the conditions of 950° C. and a pressure of 100 Torr.

[0143] S111: Repeat steps S109 to S110 12 times to obtain the light-emitting layer 33.

[0144] S112: Under the conditions of temperature of 950°C and pressure of 600 torr, a GaN-doped Mg film with a doping concentration of 2.5×10 19 cm -3 The second doped nitride layer 34 has a thickness of 100 nm.

[0145] Example 2

[0146] Please refer to Figure 1 and Figure 3 This embodiment provides an epitaxial wafer, which includes a substrate 1, a composite buffer layer 2 and an epitaxial layer 3 stacked in sequence.

[0147] The thickness of the substrate 1 is 1100 μm, the size of the substrate 1 is 6 inches, and the material of the substrate 1 is sapphire.

[0148] The composite buffer layer 2 includes a periodically arranged aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22. The aluminum-silicon-nitrogen diffusion layer 21 includes a stacked AlN layer 211 and a SiN diffusion microstructure 212. The silicon-aluminum-nitrogen diffusion layer 22 includes a stacked AlN diffusion microstructure 223 and a SiN layer 221. The SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 are located at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22. The proportion of silicon atoms in the composite buffer layer 2 gradually increases along the direction from the substrate 1 to the epitaxial layer 3.

[0149] Furthermore, if Figure 3 As shown, as the number of cycles increases, the thickness of the silicon aluminum nitrogen diffusion layer 22 increases successively.

[0150] The difference in thickness between any two adjacent periods of the SiAlN diffusion layer 22 is 2 nm.

[0151] The number of cycles of the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 in the composite buffer layer 2 is 10.

[0152] Along the outward direction from the surface of the substrate 1 , the sizes of the SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 gradually decrease.

[0153] The SiAlN diffusion layer 22 further includes a gap layer 222 between the AlN diffusion microstructure 223 and the SiN layer 221 . The width of the gap layer 222 is 2.5 nm.

[0154] The SiN diffusion microstructure 212 includes: at least one SiN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the SiN micro-convex structure gradually decreases; the AlN diffusion microstructure 223 includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0155] The thickness of the aluminum-silicon-nitrogen diffusion layer 21 is 20 nm. The thickness of the silicon-aluminum-nitrogen diffusion layer 22 in the first period is 15 nm. The epitaxial layer 3 includes: a nitride buffer layer 31, a first doped nitride layer 32, a nitride light-emitting layer 33, and a second doped nitride layer 34, which are sequentially stacked on the composite buffer layer 2.

[0156] The thickness of the nitride buffer layer 31 is 5 μm, and the material of the nitride buffer layer 31 is GaN.

[0157] The thickness of the first doped nitride layer 32 is 8 μm and the material is GaN. The doping element in the first doped nitride layer 32 is Si with a doping concentration of 8×10 18 cm -3 .

[0158] The light-emitting layer 33 comprises at least a periodically overlapping arrangement of quantum well layers and quantum barrier layers. The quantum well layers are 6 nm thick and made of InGaN. The quantum barrier layers are 10 nm thick and made of GaN. The number of periods in the light-emitting layer 33 is 15.

[0159] The thickness of the second doped nitride layer 34 is 300 nm, and the material is GaN. The doping element in the second doped nitride layer 34 is Mg, and the doping concentration is 1×10 21 cm -3 .

[0160] This embodiment also provides a method for preparing the epitaxial wafer, which comprises:

[0161] S101: providing a substrate 1.

[0162] S102: performing a heat treatment on the substrate 1 at 1200° C. and a pressure of 300 torr for 1 minute to obtain a heat-treated substrate 1.

[0163] S103: Under the conditions of 900° C. and a pressure of 100 torr, an aluminum source with a flow rate of 300 sccm is introduced to perform Al thermal surface treatment on the heat-treated substrate 1 for 15 seconds to form an Al deposition layer on the substrate 1 to obtain a first semiconductor component.

[0164] S104: Under the conditions of a temperature of 900°C and a pressure of 200 torr, a silicon source with a flow rate of 120 sccm is introduced to perform Si thermal surface treatment on the first semiconductor component for 12 seconds to form a Si deposition layer on the Al deposition layer of the first semiconductor component to obtain a second semiconductor component.

[0165] S105: Under the conditions of a temperature of 500°C and a pressure of 200 torr, a nitrogen source with a flow rate of 100 slm is introduced, and the second semiconductor component is subjected to N thermal surface treatment for 15 seconds, so that the Al deposition layer and the Si deposition layer form an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, respectively, and a silicon-aluminum diffusion region is formed at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22, and the silicon-aluminum diffusion region includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 223.

[0166] S106: Steps S103 to S105 are executed 10 times in a loop to produce a composite buffer layer 2. The flow rate of the silicon source increases with the number of cycles. The difference in the flow rate of the silicon source between any two adjacent cycles is 18 sccm.

[0167] S107 : forming a nitride buffer layer 31 with a thickness of 5 μm and made of GaN on the composite buffer layer 2 at a temperature of 1050° C. and a pressure of 500 Torr.

[0168] S108: Under the conditions of a temperature of 1140°C and a pressure of 200 torr, a GaN-doped Si layer with a doping concentration of 8×10 18 cm -3 The first doped nitride layer 32 has a thickness of 8 μm.

[0169] S109: forming a nitride quantum well layer with a thickness of 6 nm and made of InGaN at a temperature of 900° C. and a pressure of 100 Torr.

[0170] S110: forming a nitride quantum barrier layer with a thickness of 10 nm and made of GaN on the nitride quantum well layer under the conditions of 1200° C. and a pressure of 150 Torr.

[0171] S111: Repeat steps S109 to S110 15 times to obtain the light-emitting layer 33.

[0172] S112: Under the conditions of a temperature of 1050°C and a pressure of 100 torr, a GaN-doped Mg ... 21 cm -3 The second doped nitride layer 34 has a thickness of 300 nm.

[0173] Example 3

[0174] Please refer to Figure 1 and Figure 3 This embodiment provides an epitaxial wafer, which includes a substrate 1, a composite buffer layer 2 and an epitaxial layer 3 stacked in sequence.

[0175] The thickness of the substrate 1 is 900 μm, the size of the substrate 1 is 6 inches, and the material of the substrate 1 is sapphire.

[0176] The composite buffer layer 2 includes a periodically arranged aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22. The aluminum-silicon-nitrogen diffusion layer 21 includes a stacked AlN layer 211 and a SiN diffusion microstructure 212. The silicon-aluminum-nitrogen diffusion layer 22 includes a stacked AlN diffusion microstructure 223 and a SiN layer 221. The SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 are located at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22. The proportion of silicon atoms in the composite buffer layer 2 gradually increases along the direction from the substrate 1 to the epitaxial layer 3.

[0177] Furthermore, if Figure 3 As shown, as the number of cycles increases, the thickness of the silicon aluminum nitrogen diffusion layer 22 increases successively.

[0178] The difference in thickness between any two adjacent periods of the SiAlN diffusion layer 22 is 1.0 nm.

[0179] The number of cycles of the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 in the composite buffer layer 2 is 8.

[0180] In the outward direction along the surface of the substrate 1 , the density of the SiN diffusion microstructure 212 and the AlN diffusion microstructure 223 gradually increases.

[0181] The SiAlN diffusion layer 22 further includes a gap layer 222 between the AlN diffusion microstructure 223 and the SiN layer 221 . The width of the gap layer 222 is 2.0 nm.

[0182] The SiN diffusion microstructure 212 includes: at least one SiN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the SiN micro-convex structure gradually decreases; the AlN diffusion microstructure 223 includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22; wherein, along the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22 toward the epitaxial layer 3, the cross-sectional size of the AlN micro-convex structure gradually decreases.

[0183] The thickness of the aluminum-silicon-nitrogen diffusion layer 21 is 3 nm. The thickness of the silicon-aluminum-nitrogen diffusion layer 22 in the first period is 2 nm. The epitaxial layer 3 includes: a nitride buffer layer 31, a first doped nitride layer 32, a nitride light-emitting layer 33, and a second doped nitride layer 34, which are sequentially stacked on the composite buffer layer 2.

[0184] The thickness of the nitride buffer layer 31 is 3 μm, and the material of the nitride buffer layer 31 is GaN.

[0185] The thickness of the first doped nitride layer 32 is 2.5 μm, and the material is GaN. The doping element in the first doped nitride layer 32 is Si, and the doping concentration is 5×10 18 cm -3 .

[0186] The light-emitting layer 33 comprises at least a periodically overlapping arrangement of quantum well layers and quantum barrier layers. The quantum well layers are 2 nm thick and made of InGaN. The quantum barrier layers are 15 nm thick and made of GaN. The number of periods in the light-emitting layer 33 is three.

[0187] The thickness of the second doped nitride layer 34 is 120 nm and the material is GaN. The doping element in the second doped nitride layer 34 is Mg, and the doping concentration is 1×10 20 cm -3 .

[0188] This embodiment also provides a method for preparing the epitaxial wafer, which comprises:

[0189] S101: providing a substrate 1.

[0190] S102: performing a heat treatment on the substrate 1 at 1100° C. and a pressure of 200 torr for 5 minutes to obtain a heat-treated substrate 1.

[0191] S103: Under the conditions of 600° C. and a pressure of 100 torr, an aluminum source with a flow rate of 100 sccm is introduced to perform Al thermal surface treatment on the heat-treated substrate 1 for 10 seconds to form an Al deposition layer on the substrate 1 to obtain a first semiconductor component.

[0192] S104: Under the conditions of a temperature of 600°C and a pressure of 100 torr, a silicon source with a flow rate of 200 sccm is introduced to perform Si thermal surface treatment on the first semiconductor component for 12 seconds to form a Si deposition layer on the Al deposition layer of the first semiconductor component to obtain a second semiconductor component.

[0193] S105: Under the conditions of a temperature of 1100°C and a pressure of 100 torr, a nitrogen source with a flow rate of 40 slm is introduced, and the second semiconductor component is subjected to N thermal surface treatment for 20 seconds, so that the Al deposition layer and the Si deposition layer form an aluminum-silicon-nitrogen diffusion layer 21 and a silicon-aluminum-nitrogen diffusion layer 22, respectively, and a silicon-aluminum diffusion region is formed at the interface between the aluminum-silicon-nitrogen diffusion layer 21 and the silicon-aluminum-nitrogen diffusion layer 22, and the silicon-aluminum diffusion region includes a SiN diffusion microstructure 212 and an AlN diffusion microstructure 223.

[0194] S106: cyclically execute steps S103 to S105 for a total of 8 times to obtain a composite buffer layer 2.

[0195] As the number of cycles increases, the time of Si thermal surface treatment increases successively. The difference in the time of Si thermal surface treatment between any two adjacent cycles is 5s.

[0196] S107 : forming a nitride buffer layer 31 with a thickness of 3 μm and made of GaN on the composite buffer layer 2 under the conditions of a temperature of 1100° C. and a pressure of 200 Torr.

[0197] S108: Under the conditions of temperature of 1080°C and pressure of 200 torr, a GaN-doped Si layer with a doping concentration of 5×10 18 cm -3 The first doped nitride layer 32 has a thickness of 2.5 μm.

[0198] S109: forming a nitride quantum well layer with a thickness of 2 nm and made of InGaN at a temperature of 780° C. and a pressure of 300 Torr.

[0199] S110: forming a nitride quantum barrier layer with a thickness of 15 nm and made of GaN on the nitride quantum well layer under the conditions of 900° C. and a pressure of 300 Torr.

[0200] S111: Repeat steps S109 to S110 three times to obtain the light-emitting layer 33.

[0201] S112: Under the conditions of temperature of 1020°C and pressure of 500 torr, a GaN-doped Mg film with a doping concentration of 1×10 20 cm -3 The second doped nitride layer 34 has a thickness of 120 nm.

[0202] Example 4

[0203] This embodiment provides an epitaxial wafer. The method for preparing the epitaxial wafer of this embodiment is the same as that of Embodiment 1 except that the order of step S21 and step S22 is swapped, and thus will not be described in detail here.

[0204] Example 5

[0205] This embodiment provides an epitaxial wafer. The preparation method of the epitaxial wafer of this embodiment is the same as that of Example 1 except that the time of the N thermal surface treatment in step S23 is 5 seconds, and will not be repeated here.

[0206] Example 6

[0207] This embodiment provides an epitaxial wafer. The preparation method of the epitaxial wafer of this embodiment is the same as that of Example 1 except that the time of the N thermal surface treatment in step S23 is 40 seconds, and will not be repeated here.

[0208] Example 7

[0209] This embodiment provides an epitaxial wafer. In the method for preparing the epitaxial wafer of this embodiment, as the cycle increases, the flow rate and time of the Si source in step S22 remain unchanged. The schematic diagram of the structural change of adjacent cycles in the composite buffer layer is shown in FIG. Figure 4 , the rest are the same as in Example 1 and will not be repeated here.

[0210] Example 8

[0211] This embodiment provides an epitaxial wafer. In the method for preparing the epitaxial wafer of this embodiment, as the cycle increases, the difference in the flow rate of the silicon source in step S22 between any two adjacent cycles is 3 sccm. The rest is the same as in Example 1 and will not be repeated here.

[0212] Example 9

[0213] This embodiment provides an epitaxial wafer. In the preparation method of the epitaxial wafer of this embodiment, as the cycle increases, the difference in the flow rate of the silicon source in step S22 between any two adjacent cycles is 70 sccm. The rest is the same as in Example 1 and will not be repeated here.

[0214] Comparative Example 1

[0215] This comparative example provides an epitaxial wafer. Except for not performing step S21 in the preparation method of the epitaxial wafer of this comparative example, the rest is the same as that of Example 1, which will not be described again.

[0216] Comparative Example 2

[0217] This comparative example provides an epitaxial wafer. Except for not performing step S22 in the preparation method of the epitaxial wafer of this comparative example, the rest is the same as that of Example 1, which will not be described again.

[0218] The surface cracks and splinters of the epitaxial wafers prepared in the above examples and comparative examples were counted, and the wafers without cracks and splinters were recorded as good wafers. The yield of 50 wafers was calculated.

[0219] The nitride LED epitaxial wafers with a luminous wavelength of 460±1 nm obtained by Examples 1-9 and Comparative Examples 1-3 were tested for wavelength uniformity std by photoluminescence spectrum scanning, and the half-width of the (102) crystal plane diffraction peak was tested by X-ray diffractometer (XRD). Then, chips with a size of 3mil*5mil were prepared by the same chip preparation process, and the brightness and leakage yield performance were tested by chip point tester respectively. The test results of the above embodiments and comparative examples are shown in Tables 1 and 2.

[0220] Table 1

[0221] Number of good products Number of lobes Yield / % Example 1 50 0 100 Example 2 50 0 100 Example 3 50 0 100 Example 4 48 2 96 Example 5 47 3 94 Example 6 48 2 96 Example 7 49 1 98 Example 8 49 1 98 Example 9 48 2 96 Comparative Example 1 37 13 74 Comparative Example 2 32 18 64

[0222] Table 2

[0223]

[0224]

[0225] Wherein, WLD is the emission wavelength.

[0226] From Table 1 and Table 2, we can see the following points:

[0227] (1) Examples 1-3 have the best wavelength uniformity, the lowest (102) crystal plane half-width, the highest brightness and leakage yield, indicating that the epitaxial wafer preparation method of the present invention can prepare an epitaxial wafer with a diffuse microstructure. On the one hand, it can scatter light and change the light path from the nitride light-emitting layer to the substrate, thereby improving the forward light output and the brightness of the epitaxial wafer. On the other hand, the diffuse microstructure can be used to relieve the stress of the epitaxial layer thereon during the growth process, thereby ensuring that the surface cracks or even cracks of the epitaxial layer caused by excessive stress during the large-scale epitaxial growth process are avoided, thereby reducing the scrap rate of the epitaxial wafer, improving the production yield of the epitaxial wafer, and saving production costs.

[0228] (2) In Examples 4-9, the wavelength std shows an increasing trend, the (102) crystal plane half-peak width increases, and the brightness and leakage yield also decrease, which are all closely related to the reduction in the crystal quality of the composite buffer layer; in Example 4, the Al thermal surface treatment and Si thermal surface treatment process steps are interchanged. Since Si atoms have higher migration activity than Al atoms, and Si atoms tend to gather near the dislocation center, the uniformity of the diffusion microstructure in the composite buffer layer is affected, resulting in uneven stress distribution in the composite buffer layer, which reduces the crystal quality of the composite buffer layer; in Example 5, the N thermal surface treatment time is insufficient, and a large number of N vacancy defects are formed in the composite buffer layer, resulting in poor quality of the composite buffer layer; in Example 6, the N thermal surface treatment time is too long, and the diffusion Polarity reversal on the microstructure surface will cause excessively large differences in the surface roughness of the composite buffer layer, and both Examples 5 and 6 affect the crystal quality of the composite buffer layer. In Example 7, the silicon source flow rate remains unchanged, and the composite buffer layer cannot form a gradient difference in the thickness direction of the diffusion microstructure size, and cannot make good use of the stress relaxation caused by the difference in the diffusion microstructure size to release stress. In Example 8, the difference in the silicon source flow rate is too small, which reduces the effect of stress relaxation and stress release caused by the microstructure size difference caused by the inability to form a gradient difference in the thickness direction of the diffusion microstructure size in the composite buffer layer. In Example 9, the difference in the silicon source flow rate is too large, which will cause stress mutations in the composite buffer layer, increase stress release in the composite buffer, and reduce the crystal quality of the composite buffer layer.

[0229] (3) Comparative Example 1-2 has the lowest crack yield and the worst wavelength uniformity, (102) crystal plane half-width, and the highest brightness and leakage yield performance. The reason is that they cannot form a uniform diffusion microstructure, resulting in uneven stress distribution, and cannot effectively scatter light through the microstructure, resulting in poor wavelength uniformity, and reduced brightness and leakage yield performance of the epitaxial wafer.

[0230] The present invention uses the above-described embodiments to illustrate the detailed features of the present invention. However, the present invention is not limited to the above-described detailed features, which does not mean that the present invention must rely on the above-described detailed features to be implemented. Those skilled in the art should understand that any improvements to the present invention, equivalent replacements for the selected technical features of the present invention, additions to auxiliary technical features, and selections of specific methods, etc., fall within the scope of protection and disclosure of the present invention.

Claims

1. An epitaxial wafer, characterized in that: The epitaxial wafer includes a substrate, a composite buffer layer, and an epitaxial layer stacked in sequence; the composite buffer layer includes an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer that are periodically arranged; the aluminum-silicon-nitrogen diffusion layer includes an AlN layer and a SiN diffusion microstructure that are stacked; the silicon-aluminum-nitrogen diffusion layer includes an AlN diffusion microstructure and a SiN layer that are stacked; the SiN diffusion microstructure and the AlN diffusion microstructure are located at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer; Wherein, the proportion of silicon atoms in the composite buffer layer gradually increases in the direction from the substrate to the epitaxial layer.

2. The epitaxial wafer according to claim 1, characterized in that The silicon atom ratio is the ratio of the number of Si atoms in the composite buffer layer to the number of silicon and aluminum atoms in the composite buffer layer, and the number of silicon and aluminum atoms is equal to the sum of the number of Si atoms and the number of Al atoms in the composite buffer layer.

3. The epitaxial wafer according to claim 1 or 2, characterized in that: As the number of cycles increases, the thickness of the silicon-aluminum-nitrogen diffusion layer increases successively.

4. The epitaxial wafer according to claim 3, characterized in that The difference in thickness between any two adjacent periods of the silicon-aluminum-nitrogen diffusion layer is 0.4-3 nm.

5. The epitaxial wafer according to claim 3, characterized in that: The number of cycles of the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer in the composite buffer layer is 2 to 10.

6. The epitaxial wafer according to claim 3, characterized in that In an outward direction along the substrate surface, the sizes of the SiN diffusion microstructure and the AlN diffusion microstructure gradually decrease; and / or the densities of the SiN diffusion microstructure and the AlN diffusion microstructure gradually increase; The silicon aluminum nitrogen diffusion layer further includes a gap layer between the AlN diffusion microstructure and the SiN layer; The SiN diffusion microstructure comprises: at least one SiN micro-convex structure arranged along the interface between the Al-Si-N diffusion layer and the Si-Al-N diffusion layer; wherein the cross-sectional dimensions of the SiN micro-convex structure gradually increase along the interface between the Al-Si-N diffusion layer and the Si-Al-N diffusion layer toward the epitaxial layer; The AlN diffusion microstructure includes: at least one AlN micro-convex structure arranged along the interface between the aluminum-silicon-nitride diffusion layer and the silicon-aluminum-nitride diffusion layer; wherein, along the interface between the aluminum-silicon-nitride diffusion layer and the silicon-aluminum-nitride diffusion layer toward the epitaxial layer, the cross-sectional size of the AlN micro-convex structure gradually decreases.

7. The epitaxial wafer according to claim 6, characterized in that: The thickness of the aluminum-silicon-nitrogen diffusion layer ranges from 1 to 10 nm.

8. The epitaxial wafer according to claim 6, characterized in that The thickness of the silicon aluminum nitrogen diffusion layer ranges from 2 to 15 nm.

9. The epitaxial wafer according to claim 6, characterized in that: The epitaxial layer includes: a nitride buffer layer, a first doped nitride layer, a nitride light emitting layer and a second doped nitride layer which are sequentially stacked on the composite buffer layer.

10. The epitaxial wafer according to claim 1 or 2, characterized in that: The size of the epitaxial wafer is larger than 4 inches.

11. A method for preparing an epitaxial wafer, characterized in that: The preparation method at least comprises: providing a substrate; An aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer are periodically and alternately grown on the substrate to obtain a composite buffer layer; wherein the aluminum-silicon-nitrogen diffusion layer comprises an AlN layer and a SiN diffusion microstructure stacked together, and the silicon-aluminum-nitrogen diffusion layer comprises an AlN diffusion microstructure and a SiN layer stacked together, and the SiN diffusion microstructure and the AlN diffusion microstructure are located at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer; growing an epitaxial layer on the composite buffer layer; Wherein, the proportion of silicon atoms in the composite buffer layer gradually increases in the direction from the substrate to the epitaxial layer.

12. The preparation method according to claim 11, characterized in that The step of growing a composite buffer layer on the substrate comprises: Step S21: performing Al thermal surface treatment on the substrate to form an Al deposition layer on the substrate to obtain a first semiconductor component; Step S22: performing Si thermal surface treatment on the first semiconductor component to form a Si deposition layer on the Al deposition layer of the first semiconductor component to obtain a second semiconductor component; Step S23: performing N thermal surface treatment on the second semiconductor component to form an aluminum-silicon-nitrogen diffusion layer and a silicon-aluminum-nitrogen diffusion layer in the Al deposited layer and the Si deposited layer, respectively, and forming a silicon-aluminum diffusion region at the interface between the aluminum-silicon-nitrogen diffusion layer and the silicon-aluminum-nitrogen diffusion layer, wherein the silicon-aluminum diffusion region includes a SiN diffusion microstructure and an AlN diffusion microstructure; Steps S21 to S23 are executed cyclically to obtain the composite buffer layer.

13. The preparation method according to claim 12, characterized in that As the number of cycles increases, the thickness of the Si deposition layer increases successively.

14. The preparation method according to claim 12, characterized in that Steps S21 to S23 are repeated 2 to 10 times.

15. The preparation method according to claim 12, characterized in that The Al thermal surface treatment comprises: introducing an aluminum source with a flow rate of 10 to 300 sccm under the conditions of 500 to 900° C. and a pressure of 50 to 200 torr, and performing Al thermal surface treatment on the substrate for 5 to 15 seconds; The Si thermal surface treatment includes: introducing a silicon source with a flow rate of 10 to 300 sccm under the conditions of a temperature of 500 to 900° C. and a pressure of 50 to 200 torr, and performing Si thermal surface treatment on the first semiconductor component for 10 to 20 seconds.

16. The preparation method according to claim 15, characterized in that As the number of cycles increases, the flow rate of the silicon source increases successively, and / or the time of the Si thermal surface treatment increases successively.

17. The preparation method according to claim 16, characterized in that In any two adjacent cycles, the difference in flow rate of the silicon source is 5 to 60 sccm, and / or the difference in time of the Si thermal surface treatment is 2 to 4 s.

18. The preparation method according to claim 12, characterized in that: The N thermal surface treatment includes: introducing a nitrogen source with a flow rate of 20 to 100 slm under the conditions of a temperature of 500 to 1400° C. and a pressure of 50 to 200 torr, and performing N thermal surface treatment on the second semiconductor component for 15 to 30 seconds.

19. The preparation method according to claim 12, characterized in that: Before the Al thermal surface treatment is performed on the substrate, the method includes: performing heat treatment on the substrate under preset conditions; The preset conditions include a temperature of 1000-1200° C. and a pressure of 100-500 torr.

20. The preparation method according to claim 19, characterized in that The heat treatment time is 1 to 10 minutes.

21. The preparation method according to claim 12, characterized in that The epitaxial layer includes a nitride buffer layer, a first doped nitride layer, a light-emitting layer, and a second doped nitride layer stacked in sequence, and the preparation method further includes: forming a nitride buffer layer with a thickness of 1 to 5 μm at a temperature of 1050 to 1150° C. and a pressure of 100 torr to 500 torr; Under the conditions of temperature of 1040-1140℃ and pressure of 100-500torr, a doping concentration of 1×10 18 cm -3 ~8×10 18 cm -3 and a first doped nitride layer having a thickness of 2 to 8 μm; Under the conditions of temperature of 700-1200° C. and pressure of 100-500 Torr, 2-15 quantum well structures are repeatedly grown in an overlapping manner to form a growing light-emitting layer.

22. The preparation method according to claim 21, characterized in that The quantum well structure includes a stacked nitride quantum well layer and a nitride quantum barrier layer; growing the quantum well structure includes: forming a nitride quantum well layer with a thickness of 1 to 6 nm at a temperature of 700 to 900° C. and a pressure of 100 to 500 torr; and forming a nitride quantum barrier layer with a thickness of 6 to 15 nm on the nitride quantum well layer at a temperature of 750 to 1200° C. and a pressure of 100 to 500 torr; Under the conditions of temperature of 950-1050℃ and pressure of 100-600torr, a doping concentration of 1×10 19 cm -3 ~1×10 21 cm -3 The second doped nitride layer has a thickness of 20 to 300 nm.

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