A method of grinding a silicon wafer
Patent Information
- Application Number
- CN202411346182.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2044-09-25
AI Technical Summary
In existing wafer regeneration and polishing processes, the temperature rises rapidly, and byproducts during the polishing process are difficult to clean, resulting in a decrease in polishing rate, changes in the uniformity of silicon wafer surface morphology, and easy formation of defects, which reduces product yield and reliability.
A multi-stage grinding method is adopted. First, the first grinding disc and grinding pad are used to perform three grinding processes under different pressures. Combined with real-time temperature monitoring and cooling water cooling, the temperature and pressure during the grinding process are controlled. These processes are coarse grinding, fine grinding, and low-pressure fine grinding. By adjusting the grinding time and pressure, the surface of the silicon wafer is ensured to be smooth and flat.
It improves the uniformity and grinding rate of silicon wafer surfaces, reduces surface defects and roughness, and enhances product yield and reliability.
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Figure CN118990316B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and more specifically to a silicon wafer grinding method. Background Technology
[0002] As IC integration density continues to increase, the demand for better flatness and cleanliness of silicon substrate surfaces is growing. In actual production, patternless silicon wafers are often used to simulate real products and monitor equipment and process conditions; these wafers are called control wafers. After one or more uses, the surface of these wafers becomes damaged, rendering them unusable, which represents a significant expense in semiconductor manufacturing. Wafer reclaiming processes can reprocess these wafers, allowing them to meet production requirements again, thereby reducing costs. After wafer reclaiming, control wafers must maintain surface flatness, cleanliness, and the number of particles and defects of a certain size within standard ranges.
[0003] Currently, with the development of manufacturing processes and cost considerations, wafer reclaim polishing technology plays an important role in wafer regeneration processes. The planarization efficiency, defects, and cost issues faced by this type of polishing process need to be addressed urgently. Due to the large amount of silicon wafers to be removed, the long polishing time, and the rapid temperature rise during polishing, the by-products during polishing are not easy to clean, resulting in a decrease in polishing rate, changes in the uniformity of silicon wafer surface morphology, and easy formation of defects, ultimately reducing product yield and reliability.
[0004] Therefore, a silicon wafer polishing method is needed that can slow down the rate of temperature rise during wafer reclaim polishing, promptly clean up by-products generated during the polishing process, improve the polishing rate and uniformity of the silicon wafer surface, reduce silicon wafer surface defects and roughness, and improve product yield and reliability. Summary of the Invention
[0005] Therefore, the present invention provides a silicon wafer grinding method to solve the problems of rapid temperature rise in existing wafer regeneration grinding processes, which makes it difficult to clean by-products during the grinding process, resulting in a decrease in grinding rate, changes in the uniformity of silicon wafer surface morphology, and the easy formation of defects that lead to poor silicon wafer roughness, ultimately reducing product yield and reliability.
[0006] This invention provides a silicon wafer polishing method, comprising:
[0007] A silicon wafer is provided, wherein a surface damage layer exists on the surface of the silicon wafer;
[0008] The silicon wafer is subjected to a first polishing process using a first polishing disc and a first polishing pad under a first pressure to remove the surface damage layer.
[0009] A second polishing process is performed on the silicon wafer under a second pressure using a second polishing disc and a second polishing pad.
[0010] The silicon wafer is subjected to a third polishing process under a third pressure using the second polishing disc and the second polishing pad.
[0011] The third pressure is less than the second pressure.
[0012] Optionally, the second grinding process further includes:
[0013] The temperature of the second polishing pad is monitored in real time. When the temperature of the second polishing pad is higher than the first preset temperature, the second polishing process is stopped and the second polishing pad is cooled down.
[0014] Optionally, the third grinding process includes the following steps:
[0015] When the temperature of the second polishing pad is lower than the second preset temperature, the silicon wafer is subjected to a third polishing process using the second polishing disc and the second polishing pad under a third pressure.
[0016] Optionally, the first pressure is 2 psi to 3 psi;
[0017] The second pressure is 2 psi to 3 psi;
[0018] The third pressure is 1 psi to 1.5 psi.
[0019] Optionally, the duration of the first grinding process is a first duration T1;
[0020] The second grinding process takes a second duration T2;
[0021] The duration of the third grinding process is a third duration T3;
[0022] The first duration T1 is a fixed time;
[0023] The third duration T3 is determined by the second duration T2, and the third duration T3 is less than the second duration T2.
[0024] Optionally, the relationship between the third duration T3 and the second duration T2 is: T3 = 1 / 3 × T2 + 10s.
[0025] Optionally, the first preset temperature is 35℃~45℃;
[0026] The second preset temperature is 25℃~30℃.
[0027] Optionally, the silicon wafer is 12 inches in size.
[0028] Optionally, the process may further include, after the first grinding process and / or after the third grinding process:
[0029] The silicon wafer is cleaned and dried.
[0030] Optionally, the step of cooling the second abrasive pad includes:
[0031] The surface of the second polishing pad is rinsed with cooling water to cool it down.
[0032] The technical solution of the present invention has the following advantages:
[0033] (1) The silicon wafer polishing method provided by this invention first uses a first polishing disc and a first polishing pad to perform a first polishing process on the silicon wafer under a first pressure to remove all surface damage layers. Then, a second polishing disc and a second polishing pad are used under a higher second pressure to perform a second polishing process, reducing the surface roughness of the silicon wafer and making the surface smoother and flatter. Finally, a third polishing process is performed using a second polishing disc and a second polishing pad under a lower third pressure, which can prevent the temperature of the second polishing pad from rising too quickly, improve the morphology of the silicon wafer, increase process tolerance, and avoid scratches on the silicon wafer surface. The silicon wafer polishing method provided by this invention can reduce surface defects and roughness of the silicon wafer, improve the uniformity of the silicon wafer surface morphology and polishing rate, thereby improving the yield and reliability of the polished silicon wafer.
[0034] (2) The silicon wafer grinding method provided by the present invention monitors the temperature of the second grinding pad in real time during the second grinding process. When the temperature of the second grinding pad is greater than the first preset temperature, the second grinding process is stopped and the second grinding pad is cooled down. This can control the time of the second grinding process and the temperature of the second grinding pad within a certain range, ensuring that the time of the second grinding process is not too long and the temperature of the second grinding pad is not too high. This can ensure the efficiency of the second grinding process, improve the uniformity of the silicon wafer surface morphology and the grinding rate, reduce silicon wafer surface defects and roughness, and make the silicon wafer surface smoother and flatter.
[0035] (3) The silicon wafer polishing method provided by the present invention, when the temperature of the second polishing pad drops to less than the second preset temperature, uses the second polishing pad and the second polishing disc to perform a third polishing process on the silicon wafer under a third pressure. This can reduce the temperature of the second polishing pad to a lower temperature and perform the third polishing process under a lower third pressure. This can prevent the temperature of the second polishing pad from rising too quickly, improve the morphology of the silicon wafer, increase the process tolerance, avoid scratches on the surface of the silicon wafer, thereby reducing surface defects and roughness of the silicon wafer and improving the yield and reliability of the polished silicon wafer.
[0036] (4) In the silicon wafer polishing method provided by this invention, silicon wafer cleaning and drying are performed after the first polishing process. This allows for the timely removal of byproducts and the first polishing slurry generated during the first polishing process, enabling the silicon wafer to enter and exit the first polishing pad dry. This reduces the impact on the subsequent second polishing process, lowers surface defects and roughness of the silicon wafer, and improves product yield and reliability. Performing silicon wafer cleaning and drying after the third polishing process allows for the silicon wafer to enter and exit the second polishing pad dry, facilitating observation of the product morphology and aiding in subsequent processes.
[0037] (5) In the silicon wafer polishing method provided by the present invention, the time T3 of the low-pressure third polishing process is dynamically adjusted according to the time T2 of the high-pressure second polishing process, and the third time T3 is controlled to be less than the second time T2. This can prevent the temperature of the second polishing pad from rising too quickly, reduce the surface roughness of the silicon wafer, make the surface of the silicon wafer smoother and flatter, and improve the polishing efficiency.
[0038] (6) In the silicon wafer polishing method provided by the present invention, the surface of the second polishing pad is cooled by rinsing with high-pressure cooling water, which can quickly reduce the temperature of the second polishing pad. At the same time, the by-products and second polishing fluid generated during the second polishing process can be cleaned in time, reducing the impact on the subsequent third polishing process, reducing silicon wafer surface defects and roughness, and improving product yield and reliability. Attached Figure Description
[0039] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0040] Figure 1 This is a schematic diagram of a silicon wafer polishing method in the prior art;
[0041] Figure 2 This is a schematic flowchart of a silicon wafer polishing method according to an embodiment of the present invention;
[0042] Figure 3 This is a schematic diagram of the silicon wafer structure in each step of a silicon wafer polishing method according to an embodiment of the present invention;
[0043] Figure 4 This is a schematic diagram illustrating the specific process of a silicon wafer polishing method according to an embodiment of the present invention.
[0044] Explanation of reference numerals in the attached figures:
[0045] 100 - Silicon wafer; 200 - Surface damage layer; 1 - Stop position of the first polishing process; 2 - Stop position of the second polishing process; 3 - Stop position of the third polishing process. Detailed Implementation
[0046] In existing technologies, such as Figure 1 As shown, a two-step polishing method is commonly used. First, a first-step grinding (rough polishing) removes all damaged layers, and then a second-step grinding (fine polishing) repairs the damage caused by the first-step grinding. Specifically, the first-step grinding involves high-pressure grinding on the first grinding wheel P1 for a fixed time, and the second-step grinding involves high-pressure grinding on the second grinding wheel P2 for a fixed time.
[0047] Existing chemical mechanical polishing (CMP) methods for 12-inch silicon wafers typically employ fixed-time polishing processes without monitoring. This prolonged polishing time leads to rapid temperature increases, accelerating the chemical corrosion of the wafer surface by the polishing slurry, resulting in poor surface roughness. Furthermore, byproducts are difficult to remove, causing a decrease in polishing rate, altering the wafer surface morphology, and increasing the likelihood of scratches, ultimately reducing product yield and reliability. To address these issues, this invention primarily improves upon existing CMP methods by addressing surface roughness and defect problems.
[0048] To address the problems of rapid temperature rise in existing wafer regeneration and polishing processes, which makes it difficult to clean byproducts during polishing, resulting in decreased polishing rate, altered surface morphology uniformity of silicon wafers, and increased susceptibility to defects leading to poor wafer roughness and ultimately reduced product yield and reliability, this invention provides a silicon wafer polishing method, comprising: providing a silicon wafer with a surface damage layer; performing a first polishing process on the silicon wafer under a first pressure using a first polishing disc and a first polishing pad to remove the surface damage layer; performing a second polishing process on the silicon wafer under a second pressure using a second polishing disc and a second polishing pad; and performing a third polishing process on the silicon wafer under a third pressure using the second polishing disc and the second polishing pad; wherein the third pressure is lower than the second pressure.
[0049] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. In the description of the present invention, it should be noted that the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0050] Example 1
[0051] like Figures 2-3 As shown, this embodiment provides a silicon wafer polishing method, including:
[0052] S101, a silicon wafer 100 is provided, wherein a surface damage layer 200 is present on the surface of the silicon wafer.
[0053] In specific implementation, the silicon wafer is a blank silicon wafer to be ground or a regenerated silicon wafer, and the surface of the silicon wafer 100 has a surface damage layer 200 to be removed.
[0054] S102, a first polishing process is performed on the silicon wafer 100 under a first pressure using a first polishing disc and a first polishing pad to remove the surface damage layer 200. In some embodiments, the first polishing process may also remove a portion of the surface of the silicon wafer 100.
[0055] In specific implementation, the silicon wafer 100 is placed on the first polishing disc and the first polishing pad, and a first polishing process is performed on the silicon wafer 100 under a first pressure to remove all surface damage layers 200 and part of the surface of the silicon wafer 100. The silicon wafer 100 is polished to position 1 through the first polishing process. The first polishing process is coarse polishing, using a first polishing slurry with larger particles, and the first polishing pad is a hard polishing pad, which can quickly remove a large amount of surface damage layers 200. The time for the first polishing process is fixed.
[0056] S103, the silicon wafer 100 is subjected to a second polishing process under a second pressure using a second polishing disc and a second polishing pad.
[0057] In practice, the silicon wafer 100 is moved onto the second polishing disc and the second polishing pad, and a second polishing process is performed on the silicon wafer 100 under a second pressure. The silicon wafer 100 is polished to position 2 through the second polishing process. The second polishing process is fine polishing, using a second polishing slurry with smaller particles, and the second polishing pad is a soft polishing pad, which can reduce the surface roughness of the silicon wafer and make the surface of the silicon wafer smooth and flat.
[0058] S104, the silicon wafer 100 is subjected to a third polishing process using the second polishing disc and the second polishing pad under a third pressure; the third pressure is less than the second pressure.
[0059] In practice, the silicon wafer 100 remains on the second polishing disc and the second polishing pad. A third polishing process is performed on the silicon wafer 100 under a third pressure, polishing it to position 3. The second polishing process is a fine polishing process, using a second polishing slurry with smaller particles, and the second polishing pad is a soft polishing pad, which reduces the surface roughness of the silicon wafer, making the surface smoother and flatter. The third pressure is lower than the second pressure, and the third polishing process can improve the surface morphology of the silicon wafer and increase process tolerance.
[0060] Those skilled in the art will understand that the aforementioned first grinding process stop position 1, second grinding process stop position 2, and third grinding process stop position 3 are affected by grinding conditions, especially grinding time, and are not fixed positions on the silicon wafer. The positions shown in the figure are only for illustrating this solution and are not intended to limit this solution.
[0061] The silicon wafer polishing method provided in this embodiment first uses a first polishing pad and a first polishing disc to perform a first polishing process on the silicon wafer 100 under a first pressure to remove all surface damage layers. Then, a second polishing pad and a second polishing disc are used under a higher second pressure to perform a second polishing process, reducing the surface roughness of the silicon wafer and making the surface smoother and flatter. Finally, a third polishing process is performed using a second polishing pad and a second polishing disc under a lower third pressure. This prevents the temperature of the second polishing disc from rising too quickly, improves the silicon wafer morphology, increases process tolerance, and avoids scratches on the silicon wafer surface. The silicon wafer polishing method provided by this invention can reduce silicon wafer surface defects and roughness, improve the uniformity of silicon wafer surface morphology and polishing rate, thereby improving the yield and reliability of the polished silicon wafer.
[0062] Furthermore, in some embodiments, the second grinding process further includes:
[0063] The temperature of the second polishing pad is monitored in real time. When the temperature of the second polishing pad is higher than the first preset temperature, the second polishing process is stopped and the second polishing pad is cooled down.
[0064] In practice, during the second polishing process of the silicon wafer 100 under the second pressure using the second polishing disc and the second polishing pad, the temperature of the second polishing pad can be monitored in real time. The specific monitoring time interval can be set according to actual needs, such as 1s, 2s, etc. This embodiment does not limit this.
[0065] To prevent the second polishing process from taking too long, which would cause the temperature of the second polishing pad to rise too quickly and accelerate the chemical corrosion of the silicon wafer surface by the second polishing slurry, resulting in a worse surface roughness, the second polishing process is stopped when the temperature of the second polishing pad exceeds the first preset temperature, and the second polishing pad is cooled down. At this time, the surface of the silicon wafer 100 is basically smooth and flat.
[0066] In the silicon wafer polishing method provided in this embodiment, the temperature of the second polishing pad is monitored in real time during the second polishing process. When the temperature of the second polishing pad is higher than the first preset temperature, the second polishing process is stopped and the second polishing pad is cooled down. This can control the time of the second polishing process and the temperature of the second polishing pad within a certain range, ensuring that the time of the second polishing process is not too long and the temperature of the second polishing pad is not too high. This can ensure the efficiency of the second polishing process, improve the uniformity of the silicon wafer surface morphology and the polishing rate, reduce silicon wafer surface defects and roughness, and make the silicon wafer surface smoother and flatter.
[0067] Furthermore, in some embodiments, the third grinding process includes the following steps:
[0068] When the temperature of the second polishing pad is lower than the second preset temperature, the silicon wafer 100 is subjected to a third polishing process using the second polishing disc and the second polishing pad under a third pressure.
[0069] In practice, excessively high polishing pressure can cause the temperature of the second polishing pad to rise too quickly, accelerating the chemical corrosion of the silicon wafer surface by the polishing slurry and resulting in a deterioration in the surface roughness of the silicon wafer. Therefore, when the temperature of the second polishing pad drops below the second preset temperature, the silicon wafer 100 is subjected to a third polishing process using the second polishing disc and the second polishing pad under a third pressure, where the third pressure is lower than the second pressure.
[0070] The silicon wafer polishing method provided in this embodiment, when the temperature of the second polishing pad drops below the second preset temperature, uses the second polishing disc and the second polishing pad to perform a third polishing process on the silicon wafer 100 under a third pressure. This can lower the temperature of the second polishing pad and perform the third polishing process under a lower third pressure, which can prevent the temperature of the second polishing pad from rising too quickly, improve the morphology of the silicon wafer, increase the process tolerance, avoid scratches on the silicon wafer surface, thereby reducing silicon wafer surface defects and roughness, and improving the yield and reliability of the polished silicon wafer.
[0071] Furthermore, in some embodiments, the first pressure is 2 psi to 3 psi, for example 2 psi, 2.4 psi, 2.3 psi, 3 psi;
[0072] The second pressure is 2 psi to 3 psi, for example, 2 psi, 2.4 psi, 2.3 psi, 3 psi;
[0073] The third pressure is 1 psi to 1.5 psi, for example, 1 psi, 1.1 psi, 1.3 psi, 1.5 psi.
[0074] Furthermore, in some embodiments, the duration of the first grinding process is a first duration T1;
[0075] The second grinding process takes a second duration T2;
[0076] The duration of the third grinding process is a third duration T3;
[0077] The first duration T1 is a fixed time;
[0078] The third duration T3 is determined by the second duration T2, and the third duration T3 is less than the second duration T2.
[0079] In specific implementation, the first polishing process is coarse polishing, while the second and third polishing processes are fine polishing. During coarse polishing, a first polishing time T1 is selected to quickly remove a large amount of surface damage layer. The first polishing time T1 is a fixed time, set according to the thickness of the silicon wafer to be polished; in some examples, the first polishing time T1 is 2 to 3 minutes. During fine polishing, the time T2 of the high-pressure second polishing process is determined based on the temperature change of the second polishing pad, and the time T3 of the low-pressure third polishing process is dynamically adjusted based on the high-pressure polishing time T2, while simultaneously controlling the third polishing time T3 to be less than the second polishing time T2.
[0080] The silicon wafer polishing method provided in this embodiment dynamically adjusts the time T3 of the low-pressure third polishing process according to the time T2 of the high-pressure second polishing process, while controlling the third time T3 to be less than the second time T2. This can prevent the temperature of the second polishing pad from rising too quickly, reduce the surface roughness of the silicon wafer, make the silicon wafer surface smoother and flatter, and improve polishing efficiency.
[0081] Furthermore, in some embodiments, the relationship between the third duration T3 and the second duration T2 is: T3 = 1 / 3 × T2 + 10s.
[0082] By controlling the relationship between the third duration T3 and the second duration T2 as follows: T3 = 1 / 3 × T2 + 10s, and the third duration T3 is less than the second duration T2, the duration T3 of the low-pressure third grinding process can be dynamically adjusted according to the duration T2 of the high-pressure second grinding process. This prevents the temperature of the second grinding pad from rising too quickly, reduces the surface roughness of the silicon wafer, makes the silicon wafer surface smoother and flatter, and improves grinding efficiency.
[0083] Furthermore, in some embodiments, the relationship between the third duration T3 and the second duration T2 is: T3 = 1 / 3 × T2.
[0084] Furthermore, in some embodiments, the first preset temperature is 35°C to 45°C, for example, 35°C, 38°C, 40°C, or 45°C;
[0085] The second preset temperature is 25℃~30℃, for example, 25℃, 26℃, 28℃, 30℃;
[0086] Furthermore, in some embodiments, the silicon wafer 100 is 12 inches in size.
[0087] Current chemical mechanical polishing (CMP) methods for 12-inch silicon wafers generally use a fixed time during the fine polishing process, and there is no monitoring method for the polishing process. Due to the long polishing time, the polishing temperature is prone to rise rapidly, which accelerates the chemical corrosion of the silicon wafer surface by the polishing slurry, resulting in poor surface roughness. At the same time, the by-products in the polishing process are not easy to clean up, which causes a decrease in polishing rate, changes in the surface morphology of the silicon wafer, and is also prone to scratch defects, ultimately reducing the yield and reliability of the product.
[0088] The 12-inch silicon wafer polishing method provided in this embodiment comprises a high-pressure second polishing process and a low-pressure third polishing process. Compared to the fixed-time polishing process in existing 12-inch silicon wafer chemical mechanical polishing methods, this method can control the temperature of the second polishing pad to avoid excessively high polishing temperatures during high-pressure polishing; and slow down the temperature rise rate during low-pressure polishing, promptly cleaning byproducts generated during the polishing process, thereby improving the polishing rate and the uniformity of the silicon wafer surface, reducing silicon wafer surface defects and roughness, and improving product yield and reliability.
[0089] Furthermore, in some embodiments, the process further includes, after the first grinding process and / or after the third grinding process:
[0090] The silicon wafer 100 is cleaned and dried.
[0091] The silicon wafer polishing method provided in this embodiment includes silicon wafer cleaning and drying after the first polishing process. This timely removal of byproducts and polishing slurry generated during the first polishing process allows the silicon wafer to enter and exit the first polishing pad dry, reducing the impact on the subsequent second polishing process, minimizing surface defects and roughness, and improving product yield and reliability. Performing silicon wafer cleaning and drying after the third polishing process allows for dry entry and exit of the silicon wafer from the second polishing pad, facilitating observation of product morphology and supporting subsequent processes.
[0092] Furthermore, in some embodiments, the step of cooling the second polishing pad includes:
[0093] The surface of the second polishing pad is rinsed with cooling water to cool it down.
[0094] In practice, high-pressure cooling water is used to rinse the surface of the second polishing pad to cool it down. This can quickly reduce the temperature of the second polishing pad and clean up the by-products and second polishing fluid generated during the second polishing process in a timely manner, reducing the impact on the subsequent third polishing process, reducing silicon wafer surface defects and roughness, and improving product yield and reliability.
[0095] refer to Figures 3-4 The following is a specific process for a silicon wafer polishing method, including steps S201-S207:
[0096] S201, a silicon wafer 100 is provided, the surface of which has a surface damage layer 200, and the silicon wafer 100 has a size of 12 inches.
[0097] S202, the silicon wafer 100 is subjected to a first polishing process under a first pressure using a first polishing disc and a first polishing pad to remove the surface damage layer 200.
[0098] Wherein, the first pressure is 2psi to 3psi, and the first grinding process time is a first duration T1. The first duration T1 is a fixed time.
[0099] In specific implementation, the silicon wafer 100 is placed on the first polishing disc and the first polishing pad, and a first polishing process is performed on the silicon wafer 100 under a first pressure to remove all surface damage layers 200 and part of the surface of the silicon wafer 100. The silicon wafer 100 is polished to position 1 through the first polishing process. The first polishing process is coarse polishing, using a first polishing slurry with larger particles, and the first polishing pad is a hard polishing pad, which can quickly remove a large amount of surface damage layers 200.
[0100] S203, the silicon wafer 100 is cleaned and dried.
[0101] After the first grinding process, the silicon wafer 100 is cleaned and dried. This can promptly remove the by-products and first grinding fluid generated during the first grinding process, enabling the silicon wafer to enter and exit the first grinding pad in a dry manner. This reduces the impact on the subsequent second grinding process, reduces surface defects and roughness of the silicon wafer 100, and improves product yield and reliability.
[0102] S204, a second polishing process is performed on the silicon wafer 100 under a second pressure using a second polishing disc and a second polishing pad. The second pressure is 2 psi to 3 psi.
[0103] In practice, the silicon wafer 100 is moved onto the second polishing disc and the second polishing pad, and a second polishing process is performed on the silicon wafer 100 under a second pressure. The second polishing process is fine polishing, using a second polishing slurry with smaller particles, and the second polishing pad is a soft polishing pad, which can reduce the surface roughness of the silicon wafer 100 and make the surface of the silicon wafer 100 smooth and flat.
[0104] S205, monitor the temperature of the second polishing pad in real time. When the temperature of the second polishing pad is greater than the first preset temperature, stop the second polishing process and use cooling water to rinse the surface of the second polishing pad to cool it down.
[0105] The first preset temperature is 35℃~45℃, and the second grinding process time is the second duration T2, which is determined by the temperature change of the second grinding pad.
[0106] In specific implementation, during the second polishing process of the silicon wafer 100 under the second pressure using the second polishing disc and the second polishing pad, the temperature of the second polishing pad is monitored in real time. The specific monitoring time interval can be set according to actual needs, such as 1 second, 2 seconds, etc., and this embodiment does not limit this. In order to prevent the second polishing process from taking too long, causing the temperature of the second polishing pad to rise too quickly, accelerating the chemical corrosion of the silicon wafer 100 surface by the second polishing fluid, and resulting in a worse surface roughness, the second polishing process is stopped when the temperature of the second polishing pad exceeds the first preset temperature. At this time, the surface of the silicon wafer 100 is basically smooth and flat, and the silicon wafer 100 has been polished to position 2.
[0107] The second time duration T2 is determined by the temperature change of the second polishing pad, which can ensure that the second polishing process time is not too long and the temperature of the second polishing pad is not too high, thereby improving the efficiency of the second polishing process, improving the uniformity of the silicon wafer surface morphology and polishing rate, reducing silicon wafer surface defects and roughness, and making the silicon wafer surface smooth and flat.
[0108] Then, the surface of the second polishing pad is cooled by rinsing it with high-pressure cooling water. This can quickly reduce the temperature of the second polishing pad and clean up the by-products and second polishing fluid generated during the second polishing process in a timely manner, reducing the impact on the subsequent third polishing process, reducing silicon wafer surface defects and roughness, and improving product yield and reliability.
[0109] S206, when the temperature of the second polishing pad is lower than the second preset temperature, the silicon wafer is subjected to a third polishing process using the second polishing disc and the second polishing pad under a third pressure, wherein the third pressure is lower than the second pressure.
[0110] Wherein, the second preset temperature is 25℃~30℃, and the time of the third grinding process is the third duration T3; the third duration T3 is determined by the second duration T2, and the third duration T3 is less than the second duration T2. Furthermore, the relationship between the third duration T3 and the second duration T2 is: T3=1 / 3×T2+10s.
[0111] In practice, the silicon wafer 100 remains on the second polishing disc and the second polishing pad. A third polishing process is performed on the silicon wafer 100 under a third pressure, polishing it to position 3. The second polishing process is a fine polishing process, using a second polishing slurry with smaller particles, and the second polishing pad is a soft polishing pad, which reduces the surface roughness of the silicon wafer, making the surface smoother and flatter. The third pressure is lower than the second pressure, and the third polishing process can improve the surface morphology of the silicon wafer and increase process tolerance.
[0112] The time T3 of the low-pressure third polishing process is dynamically adjusted according to the time T2 of the high-pressure second polishing process. At the same time, by controlling the third time T3 to be less than the second time T2, the temperature of the second polishing pad can be prevented from rising too quickly, which can reduce the surface roughness of the silicon wafer 100, make the surface of the silicon wafer 100 smoother and flatter, and improve polishing efficiency.
[0113] S207, the silicon wafer 100 is cleaned and dried.
[0114] After the third grinding process, the silicon wafer 100 is cleaned and dried, which allows the silicon wafer 100 to enter and exit the second grinding disc in a dry manner, making it easier to observe the product morphology and facilitating subsequent processes.
[0115] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.
Claims
1. A method for grinding silicon wafers, characterized in that, include: A silicon wafer is provided, wherein a surface damage layer exists on the surface of the silicon wafer; The silicon wafer is subjected to a first polishing process using a first polishing disc and a first polishing pad under a first pressure to remove the surface damage layer. A second polishing process is performed on the silicon wafer under a second pressure using a second polishing disc and a second polishing pad. The silicon wafer is subjected to a third polishing process under a third pressure using the second polishing disc and the second polishing pad. The third pressure is less than the second pressure; The second grinding process further includes: real-time monitoring of the temperature of the second grinding pad; when the temperature of the second grinding pad is greater than the first preset temperature, stopping the second grinding process and cooling the second grinding pad. The steps of the third polishing process include: when the temperature of the second polishing pad is lower than the second preset temperature, the silicon wafer is polished under a third pressure using the second polishing disc and the second polishing pad. The time for the second grinding process is the second duration T2; the time for the third grinding process is the third duration T3; the third duration T3 is determined by the second duration T2, and the third duration T3 is less than the second duration T2; The relationship between the third duration T3 and the second duration T2 is: T3 = 1 / 3 × T2 + 10s.
2. The silicon wafer grinding method according to claim 1, characterized in that, The first pressure is 2 psi to 3 psi; The second pressure is 2 psi to 3 psi; The third pressure is 1 psi to 1.5 psi.
3. The silicon wafer grinding method according to claim 1, characterized in that, The duration of the first grinding process is a first duration T1; The first duration T1 is a fixed time.
4. The silicon wafer grinding method according to claim 1, characterized in that, The first preset temperature is 35℃~45℃; The second preset temperature is 25℃~30℃.
5. The silicon wafer grinding method according to claim 1, characterized in that, The silicon wafer is 12 inches in size.
6. The silicon wafer grinding method according to claim 1, characterized in that, The process following the first grinding process and / or the third grinding process further includes: The silicon wafer is cleaned and dried.
7. The silicon wafer grinding method according to claim 1, characterized in that, The step of cooling the second polishing pad includes: The surface of the second polishing pad is rinsed with cooling water to cool it down.
Citation Information
Patent Citations
Chemical mechanical polishing method
CN117798811A
Method of polishing a semiconductor wafer
US6361407B1
