A memory control method and a memory

Abstract

The present invention provides a control method and a memory, the method comprising the following steps: when the memory receives a host write command and calls a new memory block, the number of write commands is initialized; if the data written by the pen is continuous data, the number of write commands remains unchanged, and if the data written by the pen is interrupted data, the number of write commands is increased by one; when calling a new memory block, according to the total amount of valid data and the number of write commands of the previous memory block, the average data volume of the continuous data of the previous memory block is obtained as the simulated write data volume; and according to the simulated write data volume, the occupied storage space of the write data in the multi-storage unit mode and the occupied storage space of the write data in the single storage unit mode are simulated and compared, and the storage mode with smaller occupied storage space is used as the storage mode of the current host write command. The present invention provides a control method and a memory, which can improve the service life of the memory while ensuring the storage performance.

Description

Technical Field

[0001] The present invention relates to the field of storage technology, and in particular to a storage control method and a storage. Background Art

[0002] As a non-volatile storage medium, flash memory can still store data in the medium by storing charges when the power is off, thus ensuring that user data is not lost when the power is off. However, flash memory has a storage lifespan. After multiple erasing and writing, the oxide layer between the floating gate and the channel inside the flash memory is worn more and more seriously, and the stability of the flash memory in storing electrons will decrease. Before the flash memory can no longer guarantee the accuracy of the stored content, the flash memory lifespan ends.

[0003] The life of flash memory is not only limited by the qualifications of the hardware itself, but also by how the flash memory is used and the operating logic inside the flash memory. If you want to improve flash memory performance, you will often sacrifice the life of the flash memory. These two flash memory indicators are often difficult to reconcile. Summary of the invention

[0004] The object of the present invention is to provide a memory control method and a memory, which can improve the service life of the memory while ensuring the storage performance.

[0005] In order to solve the above technical problems, the present invention is achieved through the following technical solutions:

[0006] The present invention provides a memory control method, comprising the following steps:

[0007] When the memory receives a host write command and calls a new storage block, the number of write commands is initialized;

[0008] If the data written by the pen is continuous data, the number of write commands remains unchanged; if the data written by the pen is interrupt data, the number of write commands increases by one;

[0009] When calling the new storage block, according to the total amount of valid data of the previous storage block and the number of write commands, obtaining the average amount of the continuous data of the previous storage block as the simulated write data amount; and

[0010] According to the simulated write data volume, the storage space occupied by write data in the multi-storage unit mode and the storage space occupied by write data in the single storage unit mode are simulated and compared, and the storage mode occupying smaller storage space is used as the storage mode of the current host write command.

[0011] In one embodiment of the present invention, when the memory receives the host write command, the memory writes the host data according to the cache on mode or the cache off mode. In the cache on mode, the host data is written to the cache area and then written to the flash memory chip. In the cache off mode, the host data is written to the flash memory chip.

[0012] In an embodiment of the present invention, the continuous data is data written into the memory in the cache-off mode, or data written into the memory in a refresh cycle in the cache-on mode.

[0013] In one embodiment of the present invention, the step of the memory executing the host write command includes:

[0014] In the cache-on mode and the cache-off mode, the host data is written according to the multi-storage unit mode and the single-storage unit mode, and if the host data does not fill any storage page, the unfilled storage page is filled with supplementary data until the storage page is filled; and

[0015] In the cache-off mode, the host data is written in accordance with the multi-storage unit mode, and after the storage page is filled, the backup data continues to be filled into the current storage block until the current storage block is filled, wherein the supplementary data and the backup data are invalid data.

[0016] In one embodiment of the present invention, in the multi-storage unit mode, the storage space occupied by the host data in the memory is a first occupied space, wherein the size of the first occupied space is calculated according to the following formula:

[0017] Dt1= ( ( Dx + Dst-1 ) / Dst ) *Dst + Dpd;

[0018] Among them, Dt1 is the first occupied space, Dx is the data volume of the host data, Dst is the size of a string in a storage block in the multi-storage unit mode, and Dpd is the data volume of the backup data.

[0019] In one embodiment of the present invention, the storage space occupied by the host data in the memory in the single storage unit mode is a second occupied space, and the second occupied space is the sum of the data volume of the host data and the data volume of the supplementary data.

[0020] In one embodiment of the present invention, the step of comparing the storage space occupied by writing data in the multi-storage unit mode with the storage space occupied by writing data in the single-storage unit mode includes:

[0021] Converting the occupied storage space of the write data in the single storage unit mode into the occupied storage space of the write data in the multi-storage unit mode, and setting the converted occupied storage space of the second occupied space as the third occupied space;

[0022] comparing the sizes of the first occupied space and the third occupied space, and when the first occupied space is smaller than the third occupied space, executing the host write command according to the multi-storage unit mode; and

[0023] When the first occupied space is greater than or equal to the third occupied space, the host write command is executed according to the single storage unit mode.

[0024] In one embodiment of the present invention, in the cache-on mode, the third occupied space is calculated according to the following formula:

[0025] Dt3=Dx+ ( ( Dx + Dss-1) / Dss) * 2*Dss+Dpd;

[0026] Among them, Dt3 is the size of the third occupied space, Dx is the data volume of the host data, Dss is the size of a string in the single storage unit mode, and Dpd is the data volume of the backup data.

[0027] In an embodiment of the present invention, when acquiring the first occupied space, the second occupied space, and the third occupied space, the data volume of the host data is the simulated write data volume.

[0028] The present invention provides a memory, comprising:

[0029] A flash memory chip, wherein the flash memory chip includes a plurality of storage modules, and the storage module includes a plurality of storage blocks;

[0030] A cache area, electrically connected to the flash memory chip;

[0031] A flash memory control layer is electrically connected to the flash memory chip or the cache area and is electrically connected to a host computer. The flash memory control layer includes:

[0032] An initialization module, used for initializing the number of write commands when the memory receives a host write command and calls a new storage block;

[0033] A write command counting module, used to distinguish the type of data written by a pen, if the data written by a pen is continuous data, the number of write commands is kept unchanged, if the data written by a pen is interrupt data, the number of write commands is increased by one;

[0034] a data statistics module, configured to obtain, when calling a new storage block, an average data volume of the continuous data of the previous storage block according to the total amount of valid data of the previous storage block and the number of write commands, as a simulated write data volume; and

[0035] The storage mode guidance module is used to simulate and compare the storage space occupied by write data in the multi-storage unit mode and the storage space occupied by write data in the single storage unit mode according to the simulated write data volume, and use the storage mode that occupies less storage space as the storage mode of the current host write command.

[0036] As described above, the present invention provides a memory control method and a memory, which predicts the characteristics of the next host data transmission according to the characteristics of the host writing data, and then intelligently selects a reasonable storage block type to save data according to its characteristics, thereby improving the life of the flash memory. Through the memory control method and the memory provided by the present invention, the invalid operation of the flash memory can be reduced, so that the most suitable storage block is allocated for each written data, which not only improves the life of the flash memory, but also ensures the working performance of the flash memory, especially for the writing of small-capacity random data, the technical solution provided by the present invention can greatly improve the life of the flash memory.

[0037] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0039] Figure 1 FIG. 4 is a schematic diagram of the structure of a memory in an embodiment of the present invention.

[0040] Figure 2 The figure is a schematic diagram of the space occupied by host data according to the SLC write mode and the TLC write mode in one embodiment of the present invention.

[0041] Figure 3 The figure is a schematic diagram of the space occupied by host data according to the SLC write mode and the TLC write mode in one embodiment of the present invention.

[0042] Figure 4 FIG. 4 is a flow chart of a method for controlling a memory in an embodiment of the present invention.

[0043] Figure 5 FIG. 4 is a schematic diagram of the structure of a flash memory control layer in an embodiment of the present invention.

[0044] In the figure: 100, memory; 200, flash memory control layer; 210, initialization module; 220, write command counting module; 230, data statistics module; 240, storage mode guidance module; 300, cache area; 400, flash memory chip; 410, storage module; 420, storage block; 430, storage page. DETAILED DESCRIPTION

[0045] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0046] See also Figure 1 As shown, the memory 100 provided by the present invention is a flash memory or a storage device including a flash memory, such as a SM flash card, a CF card, a Multi Media Card (MMC), a Secure Digital Card (SD card), a memory stick, a micro hard disk, etc. In the present invention, the storage medium of the memory 100 is a NAND flash memory. In this embodiment, the memory 100 can store data according to the storage mode of a single-level cell (SLC), a storage mode of a multi-level cell (MLC), a storage mode of a triple-level cell (Triple Level Cell), and a storage mode of a quad-level cell (QLC). Among them, a single-level cell can store 1 bit of data, a multi-level cell can store 2 bits of data, a triple-level cell can store 3 bits of data, and a quad-level cell can store 4 bits of data. The data stored in a single-level cell is stable data. If a multi-level cell, a triple-level cell, and a quad-level cell are not fully stored, the data storage structure in the corresponding storage cell is relatively unstable. The storage mode of the single-layer storage unit has a faster storage speed and a smaller storage data volume.

[0047] See also Figure 1As shown, in one embodiment of the present invention, the memory 100 includes a flash memory control layer 200, a cache area 300 and a flash memory chip 400. The flash memory control layer 200 is electrically connected to the host 500 to receive read and write instructions from the host 500. In addition, the flash memory control layer 200 is electrically connected to the cache area 300 or the flash memory chip 400. In this embodiment, the memory 100 has a cache on mode and a cache off mode. In the cache on mode, the flash memory control layer 200 controls the host data and the address mapping table of the host data to be written into the cache area 300. In the cache off mode, the flash memory control layer 200 controls the host data and the address mapping table of the host data to be written into the flash memory chip 400. The cache area 300 is electrically connected to the flash memory chip 400. In this embodiment, the data in the cache area 300 is transferred to the flash memory chip 400 according to a preset period. In this embodiment, the cache area 300 is a power-off volatile storage device, such as a random access memory (RAM). The flash memory chip 400 is a storage device based on NAND flash memory. As Figure 1 As shown, the flash memory chip 400 includes a plurality of storage modules 410. The storage module 410 is a physical plane of the NAND flash memory. The storage module 410 includes a plurality of storage blocks 420. The storage block 420 is a physical block of the NAND flash memory. The storage block 420 includes a plurality of storage pages 430. The storage page 430 is a physical page of the NAND flash memory.

[0048] See also Figure 1 As shown, it should be noted that the host data written into the memory 100 has a logical address and a physical address, wherein the physical address is the storage location of the written data in the memory 100. When writing the host data, an address mapping relationship is established between the logical address and the physical address of the host data, so that when the written host data is retrieved, the physical address of the written data can be found according to the address mapping relationship. Among them, the address mapping relationship of the host data can be stored in the memory 100 in the form of a linked list. Specifically, the linked list storing the address mapping relationship of the host data is the address mapping table of the host data. It should also be noted that when a logical address is edited multiple times, the storage data of the physical address corresponding to the address mapping table edited most recently is valid data, and the storage data corresponding to the physical address in the address mapping table edited before is invalid data.

[0049] See also Figures 1 to 3As shown, when data is written to the memory 100 in an SLC manner, if the data does not fill up the storage page 430, the current storage page 430 is filled with supplementary data, so that the current storage page 430 is in a full and stable state. When data is written to the memory 100 in a TLC manner, if the data does not fill up the storage page 430, not only the current storage page 430 is filled with supplementary data, so that the current storage page 430 is in a full and stable state. If it is in the cache-off mode, the backup area of ​​the current storage block 420 is further filled with supplementary data, so that the entire storage block 420 is in a stable state. If it is in the cache-on mode, the backup area is not further filled with supplementary data. It should be noted that the cache-off mode means that the flash memory control layer 200 directly exchanges data with the flash memory chip 400 when executing the instructions of the host 500. The cache-on mode means that when the flash memory control layer 200 executes the instructions of the host 500, it first exchanges data with the cache area 300, and then exchanges data with the flash memory chip 400 through the cache area 300. It should also be noted that, since TLC has a wider application range, this embodiment uses TLC as a control group for SLC. In other embodiments of the present invention, the write mode of TLC can also be replaced with the write mode of QLC or the write mode of MLC. And in the present invention, TLC, MLC and QLC are collectively referred to as the write mode of multiple storage units.

[0050] See also Figures 1 to 4 As shown, in the present invention, the control method of the storage device includes steps S10 to S40. Steps S10 to S40 are as follows.

[0051] Step S10: When the memory receives a write command from the host and calls a new storage block, the number of write commands is initialized.

[0052] Step S20: If the data written by the pen is continuous data, the number of write commands remains unchanged; if the data written by the pen is interrupt data, the number of write commands increases by one.

[0053] Step S30: when calling a new storage block, according to the total amount of valid data and the number of write commands of the previous storage block, the average amount of continuous data of the previous storage block is obtained as the simulated write data amount.

[0054] Step S40, according to the simulated write data volume, simulate and compare the storage space occupied by the write data in the multi-storage unit mode and the storage space occupied by the write data in the single storage unit mode, and use the storage mode that occupies the smaller storage space as the storage mode of the current host write command.

[0055] See also Figures 1 to 4As shown, in one embodiment of the present invention, the host 500 sends a host write command to the memory 100. If a new storage block 420 is to be called at this time, step S10 is executed to initialize the current number of write commands to 1. If a new storage block 420 is not needed at this time, step S20 is directly executed. In step S20, continuous data refers to the amount of data written continuously under the host write command. In this embodiment, in the cache-off mode, continuous data is the amount of data written to the flash memory chip 400 under the same host write command. In the cache-on mode, whether it is the same host write command or two adjacent host write commands, if there is no data flushing operation between the current write data and the previous write data, the current write data and the previous write data are continuous data. Specifically, in the cache-on mode, continuous data is the amount of data written between the flushing cycles in the cache area 300. In step S20, if the current write data is continuous data of the previous write data, the number of write commands remains unchanged. If the current write data is not continuous with the previous write data, the number of write commands is increased by one. The number of write commands can reflect the number of continuous data within the write time.

[0056] See also Figures 1 to 4 As shown, in one embodiment of the present invention, in step S30, when a new storage block 420 is called, the average data amount of the continuous data of the previous storage block 420 is obtained according to the total amount of valid data and the number of write commands of the previous storage block 420, as the simulated write data amount. In step S30, the number of write commands for each storage block 420 is recorded. When a new storage block 420 is called, the total amount of valid data Dh of the previous storage block 420 and the number of write commands Nc are obtained. Then the average value of the amount of data continuously written by the previous storage block 420 is Dh / Nc. Therefore, the simulated write data amount is the quotient of the total amount of valid data of the previous storage block 420 and the number of write commands, that is, Dh / Nc.

[0057] See also Figures 1 to 4 As shown, in another embodiment of the present invention, before step S30, it is determined whether a dynamic allocation write mode is currently required. In this embodiment, a first write threshold is set, and when the amount of host data is less than the first write threshold, the host data is directly written in SLC mode. A second write threshold is set, and when the amount of host data is greater than the second write threshold, the host data is directly written in TLC mode. The first write threshold is less than the second write threshold. When the amount of host data is between the first write threshold and the second write threshold, steps S30 and S40 are executed.

[0058] See also Figures 1 to 3As shown, in one embodiment of the present invention, the number of storage modules 410 is set to K. The size of a storage page 430 is Dp, where the unit of Dp is KB. When writing host data to the memory 100 in TLC mode, the size of a string in the storage block 420 is set to Dst. When writing host data to the memory 100 in SLC mode, the size of a string in the storage block 420 is set to Dss. It should be noted that Dss and Dst are the sizes of a string corresponding to the storage page 430 under the operation mode of multiple storage modules 410. Therefore, when writing host data to the memory 100 in SLC mode, the size of Dss is the product of Dp and K. When writing host data to the memory 100 in TLC mode, the size of Dst is three times the product of Dp and K. When writing host data to the memory 100 in MLC mode, the size of Dst is twice the product of Dp and K. When writing host data to the memory 100 in QLC mode, the size of Dst is four times the product of Dp and K. For example, when writing data in SLC mode in one storage module 410, the size of the string is 16KB. When writing data in SLC mode in two storage modules 410, the size of the string is 32KB. When writing data in TLC mode in one storage module 410, the size of the string is 48KB. When writing data in TLC mode in two storage modules 410, the size of the string is 96KB.

[0059] See also Figures 1 to 3 As shown, in one embodiment of the present invention, when the memory 100 receives a host write command, the amount of the host data to be written is set to Dx. It should be noted that the amount of the host data is known, but depending on the storage strategy, the space occupied by the host data of the known amount in the memory 100 is unknown. When the amount of the host data is known, if the data is written to the memory 100 in TLC mode, if the data does not fill any string, it is necessary to fill the storage page 430 with supplementary data, such as Figure 2 and Figure 3 As shown, to ensure that the data occupies at least one string in the storage block 420. It should be noted that not filling any string means that the host data does not occupy one or more complete strings, resulting in the space occupied by some strings being empty, so the unfilled strings need to be filled with supplementary data. When writing host data in TLC mode, the amount of supplementary data is Dm1, and the amount of supplementary data meets formula (1).

[0060] Dm1=Dst-Dx%Dst(1).

[0061] In formula (1), Dm1 is the amount of supplementary data that needs to be filled into the storage block 420 when the host data is not fully written into any string when writing host data in TLC mode, Dst is the size of a string in the storage block 420 in TLC write mode, and Dx is the amount of host data. In formula (1), Dx%Dst represents the remainder after dividing the current amount of host data by the size of a string.

[0062] See also Figures 1 to 3 As shown in formula (2), in one embodiment of the present invention, when writing host data in TLC mode in cache-off mode, not only supplementary data with a data volume of Dm1 is written, but also backup data is continuously filled until the backup area is filled. The amount of backup data used to fill the backup area is Dpd. The backup data and supplementary data are both invalid data. When filling the supplementary data and backup data, the corresponding address mapping table may not be generated. It should be noted that, Figure 2 and Figure 3 As shown, the backup area is the remaining space of the storage block 420 after the host data and the supplementary data are written. Therefore, for host data of different data amounts, the size of the backup area can be equal or unequal. In this embodiment, when the host data is written to the flash memory chip 400 in the cache-on mode, Dpd can also be set to 0. In this embodiment, the space occupied by the host data in the flash memory chip 400 after being written to the flash memory chip 400 in the TLC mode is Dt1. In this embodiment, Dt1 is calculated according to formula (2).

[0063] Dt1= Dx+Dm1+Dp = ( ( Dx + Dst-1 ) / Dst ) *Dst + Dpd (2).

[0064] In formula (2), Dt1 is the amount of data occupied in the flash memory chip 400 after the host data is written into the flash memory chip 400 in the TLC mode. Dx is the amount of data of the host data. Dm1 is the amount of data of the supplementary data required to write the host data in the TLC mode. Dst is the size of a string in the storage block 420 in the TLC write mode. Dpd is the amount of data of the backup data used to fill the backup area.

[0065] See also Figures 1 to 3 As shown, in one embodiment of the present invention, when the memory 100 receives a host write command, the amount of the host data to be written is set to Dx. When the amount of the host data is known, if the data is written to the memory 100 in SLC mode, if the data does not fill any string, it is necessary to fill the storage page 430 with supplementary data, such as Figure 2 and Figure 3As shown, to ensure that the data occupies at least one string in the storage block 420. It should be noted that not writing any string fully means that the host data does not occupy one or more complete strings, resulting in the space occupied by some strings being empty, so the unfilled strings need to be filled with supplementary data. When writing host data in SLC mode, the amount of supplementary data is Dm2, and the amount of supplementary data meets formula (3).

[0066] Dm2=Dss-Dx%Dss(3).

[0067] In formula (3), Dm2 is the amount of supplementary data that needs to be filled into the storage block 420 when the host data is not fully written in any string when writing host data in SLC mode, Dss is the size of a string in the storage block 420 in SLC write mode, and Dx is the amount of host data. In formula (3), Dx%Dss represents the remainder after dividing the current amount of host data by the size of a string. At this time, the space occupied by data in the storage block 420 in SLC write mode is Dt2, where Dt2 is the sum of the amount of host data Dx and the amount of supplementary data Dm2.

[0068] See also Figures 1 to 3 As shown, in one embodiment of the present invention, for a storage block 420, the number of storage pages 430 in the SLC write mode is one third of the number of storage pages 430 in the TLC write mode. Therefore, if the SLC write mode is to be converted to the TLC write mode, as shown in FIG. Figure 2 and Figure 3 As shown, one storage page 430 of the storage block 420 in the SLC write mode is converted to three storage pages 430 of the storage block 420 in the TLC write mode. Therefore, when the SLC write mode is converted to the TLC write mode, there will be two more storage pages 430 of supplementary data. If the current memory 100 is in the cache-off mode, there will be one more backup area of ​​backup data. In the embodiment, if the data in the SLC write mode is converted to the supplementary data in the TLC write mode, the data amount Dm3, where Dm3 is calculated according to formula (4).

[0069] Dm3 = ( ( Dx + Dss-1) / Dss) * 2*Dss (4).

[0070] In formula (4), Dm3 is the amount of supplementary data in TLC write mode when switching from SLC write mode to TLC write mode. Dx is the amount of host data. Dss is the size of a string in storage block 420 in SLC write mode. Then, in cache-on mode, the storage space Dt3 occupied by switching to TLC storage mode is the sum of Dm3, Dx and Dpd. Where Dpd is the amount of backup data.

[0071] See also Figures 1 to 4 As shown, in one embodiment of the present invention, in step S40, the simulated write data amount is obtained. The simulated write data amount is used as the data amount Dx of the host data. That is, Dx=Dh / Nc. Where Dh is the total amount of valid data of the previous storage block 420, and Nc is the number of write commands of the previous storage block 420. Figure 2 and Figure 3 As shown, in this embodiment, in step S40, the space occupied by the host data in the flash memory chip 400 when the host data is written in the TLC mode is calculated according to formula (2), and is used as the first occupied space. Then, the amount of supplementary data required to write the host data in the SLC mode is calculated according to formula (3). The space occupied by the host data in the flash memory chip 400 when the host data is written in the SLC mode is calculated based on the sum of the amount of supplementary data and the amount of host data, and is used as the second occupied space. In this embodiment, the first occupied space is not directly compared, but the second occupied space is converted into the third occupied space, and the size of the first occupied space and the third occupied space are compared, so as to obtain a storage mode that occupies a smaller storage space as the storage mode of the current host write command. The third occupied space is the space occupied by the data in the flash memory chip 400 after the SLC mode is converted into the TLC mode.

[0072] See also Figures 1 to 4 As shown, in one embodiment of the present invention, in step S40, in the cache-on mode, the third occupied space is the sum of the simulated write data volume and the data volume Dm3 of the supplementary data. The data volume Dm3 of the supplementary data is obtained according to formula (4). In the cache-off mode, the third occupied space is the sum of the simulated write data volume, the data volume Dm3 of the supplementary data and the backup data. When the first occupied space is larger than the third occupied space, the current host write command selects the SLC storage mode. When the first occupied space is smaller than the third occupied space, the current host write command selects the TLC storage mode. When the first occupied space is equal to the third occupied space, the current host write command can randomly select any storage mode. In this embodiment, the SLC storage mode can be preferentially selected to achieve faster read and write speeds.

[0073] See also Figures 1 to 4As shown, in one embodiment of the present invention, in step S40, for example, the memory 100 writes data in the cache-off mode, and the amount of host data written by each host write command is 4KB. If it is in the SLC storage mode, the host writes 4KB of data, and the actual storage space occupied is 4KB+28KB, that is, 32KB, of which 28KB is the amount of data of the supplementary data. That is, the second occupied space is 32KB. If the second occupied space is converted to the third occupied space, the third occupied space is 4KB+28KB+64KB, that is, 96KB, of which 28KB is the amount of data of the supplementary data, and 64KB is the amount of data of the backup data. In the cache-off mode, 4KB of host data is written in the TLC storage mode. Then the first occupied space is 4KB+92KB+96KB, that is, 192KB, of which 92KB is the supplementary data and 96KB is the backup data. Therefore, this 4KB of data is written to the memory 100 in the SLC storage mode, which can have higher storage stability and has the least impact on the life of the storage block 420.

[0074] See also Figures 1 to 4 As shown, in one embodiment of the present invention, in step S40, for example, the memory 100 writes data in the cache-off mode, and the amount of host data written by each host write command is 100KB. If it is in the SLC storage mode, the host writes 100KB of data, and the actual occupied storage space is 100KB+28KB, that is, 128KB, of which 28KB is the amount of supplementary data. At this time, the second occupied space is 128KB. If the second occupied space is converted to the third occupied space, the third occupied space is 100KB+28KB+256KB, that is, 384KB, of which 28KB is the amount of supplementary data, and 256KB is the amount of backup data. And write 100KB of host data in the TLC storage mode. Then the first occupied space is 100KB+92KB+96KB, that is, 288KB, of which 92KB is the amount of supplementary data, and 96KB is the amount of backup data. Therefore, the 100KB data is written into the memory 100 according to the TLC storage mode, which has the least impact on the life of the storage block 420.

[0075] See also Figure 1 , Figure 4 and Figure 5As shown, the flash memory control layer 200 includes an initialization module 210, a write command counting module 220, a data statistics module 230 and a storage mode guidance module 240. The initialization module 210 is used to initialize the number of write commands when the memory 100 receives a host write command and calls a new storage block 420. The write command counting module 220 is used to distinguish the type of the data written by the pen. If the data written by the pen is continuous data, the number of write commands remains unchanged. If the data written by the pen is interrupted data, the number of write commands is increased by one. The data statistics module 230 is used to obtain the average data volume of the continuous data of the previous storage block 420 according to the total amount of valid data and the number of write commands of the previous storage block 420 when calling a new storage block 420, as the simulated write data volume. The storage mode guidance module 240 is used to simulate and compare the occupied storage space of the write data in the multi-storage unit mode and the occupied storage space of the write data in the single storage unit mode according to the simulated write data volume, and use the storage mode with smaller occupied storage space as the storage mode of the current host write command.

[0076] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A memory control method, characterized in that: The following steps are involved: When the memory receives a host write command and calls a new storage block, the number of write commands is initialized; If the data written by the pen is continuous data, the number of write commands remains unchanged; if the data written by the pen is interrupt data, the number of write commands increases by one; When calling the new storage block, according to the total amount of valid data of the previous storage block and the number of write commands, obtaining the average amount of the continuous data of the previous storage block as the simulated write data amount; and According to the simulated write data amount, simulate and compare the storage space occupied by the write data in the multi-storage unit mode and the storage space occupied by the write data in the single storage unit mode, and use the storage mode with smaller storage space as the storage mode of the current host write command; In the step of simulating the storage space occupied by writing data in different modes, the simulated writing data volume is used as the data volume of the host data, and the data volume of the host data is calculated according to the following formula: Dx=Dh / Nc; Wherein, Dx is the data volume of the host data, Dh is the total amount of valid data of the previous storage block, and Nc is the number of write commands of the previous storage block.

2. A memory control method according to claim 1, characterized in that: When the memory receives the host write command, the memory writes the host data according to the cache on mode or the cache off mode. In the cache on mode, the host data is written to the cache area and then written to the flash memory chip. In the cache off mode, the host data is written to the flash memory chip.

3. A memory control method according to claim 2, characterized in that: The continuous data is data written into the memory in the cache-off mode, or data written into the memory in a refresh cycle in the cache-on mode.

4. A memory control method according to claim 2, characterized in that: The step of the memory executing the host write command comprises: In the cache-on mode or the cache-off mode, writing the host data according to the multi-storage unit mode or the single-storage unit mode, if the host data does not fill any storage page, filling the unfilled storage page with supplementary data until the storage page is filled; and In the cache-off mode, the host data is written in accordance with the multi-storage unit mode, and after the storage page is filled, the backup data continues to be filled into the current storage block until the current storage block is filled, wherein the supplementary data and the backup data are invalid data.

5. A memory control method according to claim 4, characterized in that: In the multi-storage unit mode, the storage space occupied by the host data in the memory is a first occupied space, wherein the size of the first occupied space is calculated according to the following formula: Dt1= ( ( Dx + Dst-1 ) / Dst ) *Dst + Dpd; Among them, Dt1 is the first occupied space, Dx is the data volume of the host data, Dst is the size of a string in a storage block in the multi-storage unit mode, and Dpd is the data volume of the backup data.

6. A memory control method according to claim 5, characterized in that: In the single storage unit mode, the storage space occupied by the host data in the memory is a second occupied space, and the second occupied space is the sum of the data volume of the host data and the data volume of the supplementary data.

7. A memory control method according to claim 6, characterized in that: The steps of comparing the storage space occupied by writing data in the multi-storage unit mode with the storage space occupied by writing data in the single-storage unit mode include: Converting the occupied storage space of the write data in the single storage unit mode into the occupied storage space of the write data in the multi-storage unit mode, and setting the converted occupied storage space of the second occupied space as the third occupied space; comparing the sizes of the first occupied space and the third occupied space, and when the first occupied space is smaller than the third occupied space, executing the host write command according to the multi-storage unit mode; and When the first occupied space is greater than or equal to the third occupied space, the host write command is executed according to the single storage unit mode.

8. A memory control method according to claim 7, characterized in that: In the cache-on mode, the third occupied space is calculated according to the following formula: Dt3=Dx+ ( ( Dx + Dss-1) / Dss) * 2*Dss+Dpd; Among them, Dt3 is the size of the third occupied space, Dx is the data volume of the host data, Dss is the size of a string in the single storage unit mode, and Dpd is the data volume of the backup data.

9. The memory control method according to claim 7, characterized in that: When acquiring the first occupied space, the second occupied space, and the third occupied space, the data volume of the host data is the simulated write data volume.

10. A memory, characterized in that: include: A flash memory chip, wherein the flash memory chip includes a plurality of storage modules, and the storage module includes a plurality of storage blocks; A cache area, electrically connected to the flash memory chip; A flash memory control layer is electrically connected to the flash memory chip or the cache area and is electrically connected to a host computer. The flash memory control layer includes: An initialization module, used for initializing the number of write commands when the memory receives a host write command and calls a new storage block; A write command counting module, used to distinguish the type of data written by a pen, if the data written by a pen is continuous data, the number of write commands is kept unchanged, if the data written by a pen is interrupt data, the number of write commands is increased by one; a data statistics module, configured to obtain, when calling a new storage block, an average data volume of the continuous data of the previous storage block according to the total amount of valid data of the previous storage block and the number of write commands, as a simulated write data volume; and A storage mode guidance module, used to simulate and compare the storage space occupied by the write data in the multi-storage unit mode and the storage space occupied by the write data in the single storage unit mode according to the simulated write data amount, and use the storage mode with smaller storage space as the storage mode of the current host write command; In the step of simulating the storage space occupied by writing data in different modes, the simulated writing data volume is used as the data volume of the host data, and the data volume of the host data is calculated according to the following formula: Dx=Dh / Nc; Wherein, Dx is the data volume of the host data, Dh is the total amount of valid data of the previous storage block, and Nc is the number of write commands of the previous storage block.

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