A system-level chip thermal management method, system and vehicle based on hard isolation

Abstract

The present application relates to a system-on-chip thermal management method, system and vehicle based on hard isolation, wherein the system-on-chip includes a first domain and a second domain, each of which includes one or more hardware domains, and the hardware domains are hard isolated. The method includes: a first thermal management module located in the first domain monitors the junction temperature of the system-on-chip, and when the junction temperature is monitored to be greater than a preset first threshold, the first thermal management module performs thermal management on the first domain to reduce the junction temperature; a second thermal management module located in the second domain monitors the junction temperature of the system-on-chip, and when the junction temperature is monitored to be greater than a preset second threshold, the second thermal management module disconnects the power supply of the first domain; after the first domain is powered off, when the second thermal management module monitors that the junction temperature is less than a preset third threshold, the second thermal management module controls the first domain to power on. The present application can improve the stability and security of SoC.

Description

Technical Field

[0001] The present application relates to the field of chip technology, and more specifically, to a system-level chip thermal management method, system and vehicle based on hard isolation. Background Art

[0002] With the rapid development of semiconductor technology, the integration and performance of System on Chip (SoC) have been continuously improved, making it widely used in the automotive field. However, highly integrated and high-performance SoCs generate a lot of heat during operation. If this heat cannot be effectively managed, it will cause the chip performance to decline, shorten its life, or even damage it, thus affecting the normal operation of the car. Therefore, chip thermal management has become one of the key technologies to ensure the stable operation of SoC and extend its service life.

[0003] The existing SoC thermal management mainly monitors the junction temperature of the SoC through a thermal management module in a single domain in the SoC. When the junction temperature exceeds a certain threshold, the SoC is thermally managed.

[0004] However, this domain usually runs a complex operating system, which may cause kernel anomalies and other situations, resulting in the failure of SoC thermal management. The failure of SoC thermal management may cause vehicle system anomalies, produce a black screen, and affect vehicle driving safety. Therefore, if only relying on the thermal management module in a single domain, there is a risk of the junction temperature of the SoC being out of control. At present, a system-level chip thermal management method is urgently needed to improve the stability and safety of the SoC. Summary of the invention

[0005] The present application is provided to solve the above problems existing in the prior art. According to the hard isolation-based system-level chip thermal management method, system and vehicle of the embodiments of the present application, the stability and safety of the SoC can be improved.

[0006] In a first aspect, an embodiment of the present application provides a system-level chip thermal management method based on hard isolation, wherein the system-level chip includes a first domain and a second domain, wherein the first domain and the second domain each include one or more hardware domains, and the hardware domains are hard isolated from each other, and the method includes:

[0007] A first thermal management module located in the first domain monitors the junction temperature of the system-level chip, and when the junction temperature is monitored to be greater than a preset first threshold, the first thermal management module performs thermal management on the first domain to reduce the junction temperature;

[0008] A second thermal management module located in the second domain monitors the junction temperature of the system-level chip, and when it is monitored that the junction temperature is greater than a preset second threshold, the second thermal management module disconnects the power supply of the first domain;

[0009] After the first domain is powered off, when the second thermal management module monitors that the junction temperature is less than a preset third threshold, the second thermal management module controls the first domain to be powered on;

[0010] The second threshold is greater than the first threshold, and the third threshold is not greater than the second threshold.

[0011] In a second aspect, an embodiment of the present application provides a system-on-chip thermal management system based on hard isolation, characterized in that the system-on-chip includes a first domain and a second domain, each of the first domain and the second domain includes one or more hardware domains, and the hardware domains are hard-isolated, and the system includes:

[0012] a first thermal management module located in the first domain, configured to monitor a junction temperature of the system-level chip, and when the junction temperature is monitored to be greater than a preset first threshold, perform thermal management on the first domain to reduce the junction temperature;

[0013] a second thermal management module located in the second domain, configured to monitor the junction temperature of the system-level chip, and disconnect the power supply of the first domain when the junction temperature is monitored to be greater than a preset second threshold value, and control the first domain to be powered on when the junction temperature is monitored to be less than a preset third threshold value after the first domain is powered off;

[0014] The second threshold is greater than the first threshold, and the third threshold is not greater than the second threshold.

[0015] In a third aspect, an embodiment of the present application provides a vehicle, comprising the system described in the above embodiment.

[0016] Any of the embodiments in the above application has the following advantages or beneficial effects: when the junction temperature of the system-level chip is monitored to be greater than the preset second threshold, the second thermal management module located in the second domain disconnects the power supply of the first domain to reduce the junction temperature of the system-level chip, and when the junction temperature drops below the third threshold, the first domain is powered on again. This method combines the second thermal management module in the second domain with the first thermal management module in the first domain to achieve multi-level thermal management, no longer relying solely on the first thermal management module in the first domain, preventing the failure of the first thermal management module from causing the junction temperature of the SoC to be out of control, and improving the stability and safety of the SoC. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In the drawings, which are not necessarily drawn to scale, the same reference numerals may describe similar parts in different views. The same reference numerals with letter suffixes or different letter suffixes may represent different instances of similar parts. The accompanying drawings generally illustrate various embodiments by way of example and not limitation, and together with the specification and claims, are used to illustrate the disclosed embodiments. When appropriate, the same reference numerals are used throughout the drawings to refer to the same or similar parts. Such embodiments are illustrative and are not intended to be exhaustive or exclusive embodiments of the present apparatus or method.

[0018] Figure 1 is a flow chart of a system-level chip thermal management method based on hard isolation provided by an embodiment of the present application;

[0019] Figure 2 is a schematic diagram of a display process provided by an embodiment of the present application;

[0020] Figure 3 is a flow chart of a system-level chip thermal management method based on hard isolation provided by another embodiment of the present application;

[0021] Figure 4 is a schematic diagram of a system-on-chip thermal management system based on hard isolation provided by an embodiment of the present application;

[0022] Figure 5 is a schematic diagram of a system-on-chip thermal management system based on hard isolation provided by another embodiment of the present application;

[0023] Figure 6 This is a schematic diagram of a system-on-chip thermal management system based on hard isolation provided by another embodiment of the present application. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the technical solution of the present application, the present application is described in detail below in conjunction with the accompanying drawings and specific embodiments. The embodiments of the present application are further described in detail below in conjunction with the accompanying drawings and specific embodiments, but are not intended to limit the present application. The terms "first", "second" and "third" used in the present application are only intended to distinguish the corresponding features, do not represent the need for such an order, and do not necessarily represent only the singular form.

[0025] like Figure 1 As shown, an embodiment of the present application provides a system-level chip thermal management method based on hard isolation, the system-level chip includes a first domain and a second domain, the first domain and the second domain each include one or more hardware domains, and the hardware domains are hard isolated, and the method includes the following steps:

[0026] Step 101: A first thermal management module located in a first domain monitors a junction temperature of a system-level chip. When the monitored junction temperature is greater than a preset first threshold, the first thermal management module performs thermal management on the first domain to reduce the junction temperature.

[0027] An operating system, such as an Android system, a Linux system, etc., is run in the first domain. Since the first domain runs a complex operating system and integrates a wealth of applications and device drivers, it generates more heat. In order to better control the junction temperature of the SoC, the embodiment of the present application first performs thermal management based on the first thermal management module. Specifically, the first thermal management module can reduce the junction temperature by dynamically adjusting the voltage and frequency of the central processing unit, the graphics processing unit, and the double-rate synchronous dynamic random access memory.

[0028] The junction temperature is the temperature of the node inside the SoC.

[0029] Hard isolation is to effectively isolate different functional modules or applications through physical means or specific technical methods so that they will not affect each other during operation, such as physical isolation based on silicon separation, metal wire isolation and other technologies, and technical isolation based on heterogeneous isolation technology. By isolating different functional modules, the mutual influence between them can be reduced, thereby reducing the probability of failure and improving the reliability of the chip. Hard isolation can prevent malicious attacks and data leakage, and protect the security of sensitive information and key resources.

[0030] In SoC, there are multiple computing modules, memory, GPU, various controllers and other hardware resource modules stacked up. The permission control mechanism is set on the hardware resource modules. When these hardware resource modules respond to data access requirements, they will check the specific data field of the data access requirements. The field is marked with the domain number. Only when the field matches the set domain number will the hardware resource module respond to the access request. Otherwise, the request will be ignored or even an error will be reported.

[0031] Based on this mechanism, many hardware resource modules in the chip are divided into multiple groups. Each group contains one or more computing units, clocks, interrupts and other required resources. These resources use the same number and respond to each other's data access needs, but do not respond to the hardware access needs of other groups. Each set of hardware resources is a hardware domain.

[0032] Step 102: A second thermal management module located in the second domain monitors the junction temperature of the system-level chip. When the monitored junction temperature is greater than a preset second threshold, the second thermal management module disconnects the power supply of the first domain.

[0033] The security system runs in the second domain. Since the first domain may have kernel anomalies and other situations, the junction temperature of the SoC is at risk of failure if it relies solely on the first thermal management module. Therefore, when the junction temperature is greater than the preset second threshold, thermal management is performed through the second thermal management module to prevent the higher junction temperature from causing the SoC to fail to work properly. If the junction temperature is greater than the preset second threshold, it means that the junction temperature of the SoC cannot be effectively controlled by relying solely on the first thermal management module. At this time, the second thermal management module is needed to implement the second level of thermal management to improve the security of the SoC.

[0034] Step 103: After the first domain is powered off, when the second thermal management module monitors that the junction temperature is less than a preset third threshold, the second thermal management module controls the first domain to be powered on.

[0035] The second threshold is greater than the first threshold, and the third threshold is not greater than the second threshold.

[0036] After the first domain is powered off, in order to resume operation as soon as possible, the second thermal management module monitors the junction temperature of the SoC, and when the junction temperature drops below the third threshold, the power supply of the first domain is restored. The first threshold, the second threshold, and the third threshold can be set according to the actual business scenario. For example, the first threshold is 88°C, the second threshold is 100°C, and the third threshold is 90°C.

[0037] In the embodiment of the present application, when the junction temperature of the system-level chip is monitored to be greater than the preset second threshold, the second thermal management module located in the second domain disconnects the power supply of the first domain to reduce the junction temperature of the system-level chip, and when the junction temperature drops below the third threshold, the first domain is powered on again. This method combines the second thermal management module in the second domain with the first thermal management module in the first domain to achieve multi-level thermal management, no longer relying solely on the first thermal management module in the first domain, preventing the failure of the first thermal management module from causing the junction temperature of the SoC to be out of control, and improving the stability and safety of the SoC.

[0038] When the junction temperature is greater than the second threshold, the first domain is powered off first. If the temperature continues to rise, the entire SoC needs to be powered off to ensure the safety of the SoC. Therefore, in one embodiment of the present application, the method further includes: when the second thermal management module monitors that the junction temperature is greater than a preset fourth threshold, the second thermal management module disconnects the power supply of the system-level chip.

[0039] The fourth threshold is greater than the second threshold, for example, the fourth threshold is 120°C.

[0040] The embodiments of the present application can minimize the impact on the SoC while ensuring the safety of the SoC.

[0041] In one embodiment of the present application, the method further comprises: a third thermal management module located in the real-time clock monitors the temperature of the environment where the system-level chip is located;

[0042] After the system-level chip is powered off, when the third thermal management module monitors that the temperature of the environment where the system-level chip is located is less than a preset fifth threshold, the third thermal management module controls the system-level chip to power on;

[0043] Among them, the fifth threshold is not greater than the fourth threshold.

[0044] In order to make the SoC resume work as soon as possible, after the SoC is powered off, the embodiment of the present application monitors the temperature of the environment in which the SoC is located through the third thermal management module located in the real-time clock, and restores the power supply of the SoC when the temperature is less than the fifth threshold. Since the power off of the SoC does not affect the normal operation of the real-time clock, the embodiment of the present application restores the power supply of the SoC based on the real-time clock, which not only ensures the safe operation of the SoC, but also reduces the impact caused by the power off of the SoC.

[0045] In addition to restoring the power supply of the SoC through the third thermal management module, the power supply of the SoC can also be restored through the fourth thermal management module located in the microcontroller unit. In one embodiment of the present application, the method further includes: the fourth thermal management module located in the microcontroller unit monitors the temperature of the environment where the system-level chip is located; after the system-level chip is powered off, when the fourth thermal management module monitors that the temperature of the environment where the system-level chip is located is less than the preset sixth threshold, the fourth thermal management module controls the system-level chip to power on. Wherein, the sixth threshold is not greater than the fourth threshold.

[0046] Since the fourth thermal management module is located in the microcontroller unit, its operation is not affected by the power failure of the SoC. Similar to the third thermal management module, the fourth thermal management module can accurately monitor the temperature of the environment where the SoC is located and restore the power supply of the SoC in time.

[0047] In one embodiment of the present application, the first thermal management module performs thermal management on the first domain, including:

[0048] The first thermal management module lowers the voltage and frequency of the graphics processor or the display processor in the first domain;

[0049] After lowering the voltage and frequency of the graphics processor or the display processor, the method further includes:

[0050] When the monitored junction temperature is less than the first threshold, the voltage and frequency of the graphics processor or the display processor in the first domain are increased, and the first thermal management module located in the first domain is executed to monitor the junction temperature of the system-level chip.

[0051] A graphics processor and a display processor are running in the first domain, which are used to display 3D multimedia images, such as 3D instruments, 360-degree panoramic images, etc. In order to reduce the junction temperature of the SoC, the embodiment of the present application lowers the voltage and frequency of the graphics processor or the display processor. In actual application scenarios, only the voltage or frequency can be adjusted, or the graphics processor and the display processor can be adjusted together. Since the operation of the graphics processor and the display processor can release more heat, the embodiment of the present application can effectively reduce the junction temperature of the SoC and improve the efficiency of thermal management by adjusting their voltage and frequency.

[0052] In one embodiment of the present application, when the monitored junction temperature is greater than a preset second threshold, before the second thermal management module disconnects the power supply of the first domain, the method also includes: the second thermal management module converts the three-dimensional image displayed by the display processor in the first domain into a two-dimensional image, and controls the display controller located in the second domain to display the two-dimensional image.

[0053] The display controller and Graphics 2D (often referred to as G2D) run in the second domain, and there is a hardware cascade between the display controller and the display processor.

[0054] Since the display processor in the first domain displays three-dimensional images, if the first domain is powered off, the three-dimensional images will not be displayed. In order to reduce the impact of the power outage in the first domain on the instrument display, etc., the second thermal management module controls the display controller in the second domain to display two-dimensional images. Compared with three-dimensional images, displaying two-dimensional images consumes fewer resources and is conducive to temperature control. Since the display controller is located in the second domain, the power outage in the first domain does not affect its normal operation. Therefore, the display controller can ensure the normal display of two-dimensional images such as instruments to prevent accidents.

[0055] In one embodiment of the present application, after the second thermal management module controls the first domain to power on, the method further includes: after the display processor displays a three-dimensional image, the second thermal management module controls the display controller to stop displaying a two-dimensional image, and executes the first thermal management module located in the first domain to monitor the junction temperature of the system-level chip.

[0056] The first domain is powered on again, indicating that the junction temperature has been effectively controlled, and the display processor resumes displaying the three-dimensional image. At this time, in order to avoid wasting resources, the two-dimensional image is stopped. The embodiment of the present application can effectively control the junction temperature of the SoC, ensure the safety of the SoC, and reduce the impact of thermal management on the user's driving experience.

[0057] In actual application scenarios, the first thermal management module and the second thermal management module can also monitor the junction temperature of the SoC after the first domain is powered on. When the junction temperature of the SoC drops to a set threshold, the first thermal management module controls the display processor to display a three-dimensional image, and the second thermal management module controls the display controller to stop displaying a two-dimensional image.

[0058] In one embodiment of the present application, after controlling the display controller located in the second domain to display the two-dimensional image, the method further includes:

[0059] In response to receiving a trigger from the security error management module in the second domain, the second thermal management module controls the display controller to switch to displaying a preset warning message; the warning message is used to remind the user of the security event occurring in the second domain received by the security error management module;

[0060] In response to the end of the security event, the second thermal management module controls the display controller to switch to displaying a two-dimensional image, and executes the second thermal management module located in the second domain to monitor the junction temperature of the system-level chip.

[0061] The security error management module is responsible for monitoring, analyzing, responding to and preventing security events in the system or application. Security events refer to security-related errors such as abnormal crash of the second domain, abnormal operation of the display controller hardware and failure of thermal management of the second domain. After receiving the security event, the security error management module will notify the second thermal management module. The second thermal management module will control the display controller to enter the safe mode according to the security event information sent by the security error management module, that is, display the alarm information to remind the user to pay attention to driving safety. The alarm information can be displayed in the form of pop-up windows, etc. The display of the above alarm information is triggered by the hardware detecting the abnormality, without software intervention, and has high stability. The end of the security event means that the security-related error has been corrected or disappeared, such as the second domain recovers from abnormal crash to normal operation, the display controller hardware returns to normal operation, or the temperature of the second domain drops below the first threshold.

[0062] The end of the safety event indicates that the safety-related errors are effectively controlled, and the second thermal management module can switch back from the safety mode to display the two-dimensional image. The embodiment of the present application can send warning information to the user for abnormal conditions in the thermal management process, thereby improving the user's driving safety and driving experience.

[0063] like Figure 2 As shown, it is a schematic diagram of the above display process, the display processor runs in the first domain, the display controller runs in the second domain, the three-dimensional image and the two-dimensional image converted therefrom are stored in the random access memory RAM, the display processor can load and display the three-dimensional image, the display controller can load and display the two-dimensional image, and the display controller can also load and display the preset warning image in the local buffer, which is the above-mentioned alarm information. The three-dimensional image and the two-dimensional image can be displayed on the screen through the low voltage differential signal LVDS interface and the display serial interface DSI.

[0064] like Figure 3 , an embodiment of the present application provides a system-level chip thermal management method based on hard isolation, the method comprising:

[0065] Step 301: The first thermal management module located in the first domain monitors the junction temperature of the SoC. When the monitored junction temperature is greater than 90° C., step 302 is executed. When the monitored junction temperature is not greater than 90° C., step 301 is executed.

[0066] Step 302: The first thermal management module lowers the voltage and frequency of the graphics processor or the display processor in the first domain. After lowering the voltage and frequency, when the monitored junction temperature is less than 90°C, step 303 is executed. When the monitored junction temperature is not less than 90°C, steps 302 and 304 are executed in parallel.

[0067] It should be noted that after lowering the voltage and frequency, when the junction temperature is monitored to be higher than a preset threshold, step 304 can be triggered for execution. Step 304 can also be executed synchronously with step 301. Step 304 can also be executed when the number of reductions reaches a certain threshold. The specific setting can be based on the needs of the actual business scenario.

[0068] Step 303 : the first thermal management module increases the voltage and frequency of the graphics processor or the display processor in the first domain, and step 301 is executed.

[0069] Step 304: The second thermal management module located in the second domain monitors the junction temperature of the SoC. When the monitored junction temperature is greater than 110° C., step 305 is executed. When the monitored junction temperature is not greater than 110° C., step 304 is continued.

[0070] Step 305: The second thermal management module converts the three-dimensional image displayed by the display processor in the first domain into a two-dimensional image, controls the display controller in the second domain to display the two-dimensional image, and executes steps 306 and 307 in parallel.

[0071] Step 306: In response to receiving a trigger from the security error management module in the second domain, the second thermal management module controls the display controller to switch to displaying a pre-set alarm message. In response to the end of the security event, the second thermal management module controls the display controller to switch to displaying a two-dimensional image and executes step 304.

[0072] Step 307: The second thermal management module disconnects the power supply of the first domain. After the first domain is powered off, when the second thermal management module monitors that the junction temperature is greater than 118°C, step 308 is executed. When the second thermal management module monitors that the junction temperature is not greater than 85°C, step 309 is executed.

[0073] After the first domain is powered off, if the junction temperature is greater than 85°C and less than 118°C, the display controller in the second domain still displays the two-dimensional image. During this period, when the second thermal management module receives a trigger from the security error management module in the second domain, it controls the display controller to switch to displaying the preset alarm information, and in response to the end of the security event, controls the display controller to switch to displaying the two-dimensional image, and then continues to monitor the junction temperature of the SoC.

[0074] Step 308: The second thermal management module disconnects the power supply of the SoC, and the fourth thermal management module located in the microcontroller unit monitors the temperature of the environment where the SoC is located. After the SoC is powered off, when the fourth thermal management module monitors that the temperature of the environment where the SoC is located is less than 85°C, the fourth thermal management module controls the SoC to power on and executes step 301.

[0075] Step 309 : the second thermal management module controls the first domain to be powered on, and after the display processor displays the three-dimensional image, the second thermal management module controls the display controller to stop displaying the two-dimensional image, and executes step 301 .

[0076] The embodiment of the present application implements thermal management at different levels through the first thermal management module, the second thermal management module and the fourth thermal management module, thereby preventing thermal management failure caused by reliance on a single thermal management module and improving the safety and stability of the SoC.

[0077] like Figure 4 As shown, an embodiment of the present invention provides a system-on-chip thermal management system based on hard isolation, the system-on-chip includes a first domain and a second domain, the first domain and the second domain each include one or more hardware domains, and the hardware domains are hard isolated, and the system includes:

[0078] A first thermal management module 401 located in the first domain is used to monitor the junction temperature of the system-level chip, and when the monitored junction temperature is greater than a preset first threshold, thermal management is performed on the first domain to reduce the junction temperature;

[0079] The second thermal management module 402 located in the second domain is used to monitor the junction temperature of the system-level chip, and when the junction temperature is monitored to be greater than a preset second threshold, the power supply of the first domain is disconnected, and after the first domain is powered off, when the junction temperature is monitored to be less than a preset third threshold, the first domain is controlled to be powered on;

[0080] The second threshold is greater than the first threshold, and the third threshold is not greater than the second threshold.

[0081] In one embodiment of the present application, the second thermal management module 402 is used to disconnect the power supply of the system-level chip when the second thermal management module monitors that the junction temperature is greater than a preset fourth threshold; wherein the fourth threshold is greater than the second threshold.

[0082] In one embodiment of the present application, Figure 5As shown, the system also includes a third thermal management module 403 located in the real-time clock, and the third thermal management module 403 is used to monitor the temperature of the environment where the system-level chip is located; after the system-level chip is powered off, when the temperature of the environment where the system-level chip is located is monitored to be less than a preset fifth threshold, the third thermal management module controls the system-level chip to power on; wherein the fifth threshold is not greater than the fourth threshold.

[0083] In one embodiment of the present application, Figure 6 As shown, the system also includes: a fourth thermal management module 404 located in the microcontroller unit, the fourth thermal management module 404 is used to monitor the temperature of the environment where the system-level chip is located; after the system-level chip is powered off, when the fourth thermal management module monitors that the temperature of the environment where the system-level chip is located is less than a preset sixth threshold, the fourth thermal management module controls the system-level chip to power on; wherein the sixth threshold is not greater than the fourth threshold.

[0084] In one embodiment of the present application, the first thermal management module 401 is used to lower the voltage and frequency of the graphics processor or the display processor in the first domain; when the junction temperature is monitored to be less than the first threshold, the voltage and frequency of the graphics processor or the display processor in the first domain are increased, and the first thermal management module located in the first domain is executed to monitor the junction temperature of the system-level chip.

[0085] In one embodiment of the present application, the second thermal management module 402 is used to convert the three-dimensional image displayed by the display processor in the first domain into a two-dimensional image and control the display controller in the second domain to display the two-dimensional image before disconnecting the power supply of the first domain when the junction temperature is monitored to be greater than a preset second threshold.

[0086] In one embodiment of the present application, the second thermal management module 402 is used to control the display controller to stop displaying the two-dimensional image after controlling the first domain to power on and the display processor to display the three-dimensional image, and execute the first thermal management module located in the first domain to monitor the junction temperature of the system-level chip.

[0087] In one embodiment of the present application, the second thermal management module 402 is used to control the display controller located in the second domain to display a two-dimensional image, and then, in response to receiving a trigger from the security error management module in the second domain, control the display controller to switch to display a pre-set alarm message; the alarm message is used to prompt a user of a security event occurring in the second domain received by the security error management module; in response to the end of the security event, control the display controller to switch to displaying a two-dimensional image, and execute the second thermal management module located in the second domain to monitor the junction temperature of the system-level chip.

[0088] An embodiment of the present application provides a vehicle, comprising a system-on-chip thermal management system based on hard isolation according to any of the above embodiments.

[0089] An embodiment of the present application also provides a storage medium, which carries one or more computer programs. When the one or more computer programs are executed by a processor, the steps of the above method are implemented.

[0090] It should be understood that in the embodiments of the present application, the processor may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc.

[0091] It should also be understood that the memory mentioned in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM) and direct RAM bus random access memory (DRRAM).

[0092] It should be noted that when the processor is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, the memory (storage module) is integrated in the processor.

[0093] It should be noted that the memory described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0094] It should also be understood that the first, second, third, fourth and various numerical numbers involved in this document are only distinctions made for the convenience of description and are not intended to limit the scope of the present application.

[0095] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in a processor or an instruction in the form of software. The steps of the method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor for execution, or a combination of hardware and software modules in a processor for execution. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in a memory, and the processor reads the information in the memory and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it is not described in detail here.

[0096] In various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0097] Those skilled in the art will appreciate that the various illustrative logical blocks (ILBs) and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0098] In the several embodiments provided in the present application, it should be understood that the disclosed methods, devices and electronic devices can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0099] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0100] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0101] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integration. The available medium can be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk), etc.

[0102] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A system-level chip thermal management method based on hard isolation, characterized in that: The system-on-chip includes a first domain and a second domain, each of the first domain and the second domain includes one or more hardware domains, and the hardware domains are hard-isolated from each other. The method includes: A first thermal management module located in the first domain monitors the junction temperature of the system-level chip, and when the junction temperature is monitored to be greater than a preset first threshold, the first thermal management module performs thermal management on the first domain to reduce the junction temperature; A second thermal management module located in the second domain monitors the junction temperature of the system-level chip, and when it is monitored that the junction temperature is greater than a preset second threshold, the second thermal management module disconnects the power supply of the first domain; After the first domain is powered off, when the second thermal management module monitors that the junction temperature is less than a preset third threshold, the second thermal management module controls the first domain to be powered on; The second threshold is greater than the first threshold, the third threshold is not greater than the second threshold, and an operating system is running in the first domain.

2. The method according to claim 1, characterized in that Further including: When the second thermal management module monitors that the junction temperature is greater than a preset fourth threshold, the second thermal management module disconnects the power supply of the system-level chip; The fourth threshold is greater than the second threshold.

3. The method according to claim 2, characterized in that Further including: A third thermal management module located in the real-time clock monitors the temperature of the environment where the system-level chip is located; After the system-level chip is powered off, when the third thermal management module monitors that the temperature of the environment where the system-level chip is located is less than a preset fifth threshold, the third thermal management module controls the system-level chip to be powered on; Wherein, the fifth threshold is not greater than the fourth threshold.

4. The method according to claim 2, characterized in that: Further including: A fourth thermal management module located in the microcontroller unit monitors the temperature of the environment in which the system-on-chip is located; After the system-level chip is powered off, when the fourth thermal management module monitors that the temperature of the environment where the system-level chip is located is less than a preset sixth threshold, the fourth thermal management module controls the system-level chip to be powered on; Wherein, the sixth threshold is not greater than the fourth threshold.

5. The method according to claim 1, characterized in that The first thermal management module performs thermal management on the first domain, including: The first thermal management module lowers the voltage and frequency of the graphics processor or the display processor in the first domain; After lowering the voltage and frequency of the graphics processor or display processor, the method further comprises: When it is monitored that the junction temperature is less than the first threshold, the voltage and frequency of the graphics processor or the display processor in the first domain are increased, and a first thermal management module located in the first domain is executed to monitor the junction temperature of the system-level chip.

6. The method according to claim 1, characterized in that When it is monitored that the junction temperature is greater than a preset second threshold, before the second thermal management module disconnects the power supply of the first domain, the method further includes: The second thermal management module converts the three-dimensional image displayed by the display processor in the first domain into a two-dimensional image, and controls the display controller in the second domain to display the two-dimensional image.

7. The method according to claim 6, characterized in that After the second thermal management module controls the first domain to be powered on, the method further includes: After the display processor displays the three-dimensional image, the second thermal management module controls the display controller to stop displaying the two-dimensional image, and executes the first thermal management module located in the first domain to monitor the junction temperature of the system-level chip.

8. The method according to claim 6, characterized in that After controlling the display controller in the second domain to display the two-dimensional image, the method further comprises: In response to receiving a trigger of the security error management module in the second domain, the second thermal management module controls the display controller to switch to displaying a preset warning message; the warning message is used to prompt a user of a security event occurring in the second domain received by the security error management module; In response to the end of the security event, the second thermal management module controls the display controller to switch to displaying the two-dimensional image, and executes the second thermal management module located in the second domain to monitor the junction temperature of the system-level chip.

9. A system-level chip thermal management system based on hard isolation, characterized in that: The system-on-chip includes a first domain and a second domain, each of the first domain and the second domain includes one or more hardware domains, and the hardware domains are hard-isolated from each other. The system includes: a first thermal management module located in the first domain, configured to monitor a junction temperature of the system-level chip, and when the junction temperature is monitored to be greater than a preset first threshold, perform thermal management on the first domain to reduce the junction temperature; a second thermal management module located in the second domain, configured to monitor the junction temperature of the system-level chip, and disconnect the power supply of the first domain when the junction temperature is monitored to be greater than a preset second threshold value, and control the first domain to be powered on when the junction temperature is monitored to be less than a preset third threshold value after the first domain is powered off; The second threshold is greater than the first threshold, the third threshold is not greater than the second threshold, and an operating system is running in the first domain.

10. A vehicle, characterized in that: A system comprising the method of claim 9.

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