Power supply voltage drop detection device and system

Abstract

The invention provides a power supply voltage drop detection device and system, and belongs to the technical field of voltage detection. In the device, a gating unit outputs a power supply voltage to a first detection channel and outputs a threshold voltage to a second detection channel in a first continuous time period of a control period; the threshold voltage is output to the first detection channel in a second duration time period, and the power supply voltage is output to the second detection channel; the first detection channel detects a first voltage characterization value in a first continuous time period and a second voltage characterization value in a second continuous time period; comparing that the first voltage characterization value is smaller than the second voltage characterization value and outputting a first alarm signal; the second detection channel detects a third voltage characterization value in the first duration time period and a fourth voltage characterization value in the second duration time period; and comparing that the fourth voltage characterization value is smaller than the third voltage characterization value, and outputting a second alarm signal. The power supply voltage drop detection circuit is used for realizing power supply voltage drop detection.

Description

Technical Field

[0001] The present invention relates to the technical field of voltage detection, and in particular to a power supply voltage drop detection device and system. Background Art

[0002] As the process size continues to shrink, the scale of integrated circuits is getting larger and larger, the integration is getting higher and higher, and the requirements for power management modules are also getting higher and higher. The power supply voltage of the system on chip (SOC) needs to experience a large current load step change within a period of several nanoseconds or tens of nanoseconds, but the power management module has no way to respond quickly, causing the power supply voltage to drop rapidly during the large current load step change. When the power supply voltage drops low enough, it may cause the system to malfunction. Summary of the invention

[0003] The present invention provides a power supply voltage drop detection device and system.

[0004] In a first aspect, the present disclosure provides a power supply voltage drop detection device, the device comprising a gating unit, a first detection channel and a second detection channel; two input terminals of the gating unit are respectively connected to a power supply voltage and a threshold voltage, and two output terminals are respectively connected to the first detection channel and the second detection channel;

[0005] The gating unit is used to: output the power supply voltage to the first detection channel and output the threshold voltage to the second detection channel in a first duration period of each control cycle; output the threshold voltage to the first detection channel and output the power supply voltage to the second detection channel in a second duration period of each control cycle, wherein each control cycle consists of a first duration period and a second duration period;

[0006] The first detection channel is used to: detect a first voltage characterizing value of the power supply voltage in the first duration period; and detect a second voltage characterizing value of the threshold voltage in the second duration period; compare the first voltage characterizing value of the first duration period of each control cycle with the second voltage characterizing value of the second duration period of the same control cycle, and output a first alarm signal when the first voltage characterizing value is less than the second voltage characterizing value;

[0007] The second detection channel is used to: detect a third voltage characterization value of the threshold voltage in the first duration period; and detect a fourth voltage characterization value of the power supply voltage in the second duration period; compare the third voltage characterization value of the first duration period of each control cycle with the fourth voltage characterization value of the second duration period of the same control cycle, and output a second alarm signal when the fourth voltage characterization value is less than the third voltage characterization value.

[0008] A second aspect of the present disclosure provides a power supply voltage drop detection system, comprising the power supply voltage drop detection device according to the first aspect, a clock frequency reduction unit, a power supply, and a processing core;

[0009] The power supply voltage drop detection device is used to output at least one of the first alarm signal and the second alarm signal to the clock frequency reduction unit;

[0010] The clock frequency reduction unit is used to reduce the system frequency of the processing core under the control of at least one of the first alarm signal and the second alarm signal.

[0011] The present disclosure has the following advantages:

[0012] The gating unit outputs the power supply voltage to the first detection channel and outputs the threshold voltage to the second detection channel in the first duration of each control cycle; outputs the threshold voltage to the first detection channel and outputs the power supply voltage to the second detection channel in the second duration of each control cycle, so that the two output ends alternately output the power supply voltage and the threshold voltage, the first detection channel detects and obtains the first voltage characterization value of the power supply voltage in the first duration, and detects and obtains the second voltage characterization value of the threshold voltage in the second duration, and outputs the first alarm signal when the first voltage characterization value in the first duration of each control cycle is less than the second voltage characterization value in the second duration of the same control cycle, and similarly, the second detection channel detects and obtains the third voltage characterization value of the threshold voltage in the first duration, and detects and obtains the fourth voltage characterization value of the power supply voltage in the second duration, and outputs the second alarm signal when the fourth voltage characterization value in the second duration of each control cycle is less than the third power characterization value in the first duration of the same control cycle. Thus, the first detection channel and the second detection channel are used to detect the rapid drop of the power supply voltage in dual-channel time-sharing, and the first detection channel and the second detection channel will re-detect the threshold voltage for calibration in each control cycle, so as to realize the PVT online calibration of the threshold voltage, improve the accuracy of the rapid drop detection of the power supply voltage, and simplify the implementation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A schematic diagram of the structure of a power supply voltage drop detection device provided in an embodiment of the present disclosure;

[0014] Figure 2 A schematic diagram of the structure of a first detection channel provided in an embodiment of the present disclosure;

[0015] Figure 3 A schematic diagram of the structure of a second detection channel provided in an embodiment of the present disclosure;

[0016] Figure 4 A schematic diagram of the structure of a first detection subunit provided in an embodiment of the present disclosure;

[0017] Figure 5 A schematic diagram of a power supply voltage drop detection principle provided in an embodiment of the present disclosure;

[0018] Figure 6 A schematic diagram of the structure of a second detection subunit provided in an embodiment of the present disclosure;

[0019] Figure 7 A schematic diagram of the structure of a voltage divider circuit provided in an embodiment of the present disclosure;

[0020] Figure 8 It is a structural schematic diagram of another power supply voltage drop detection device provided in an embodiment of the present disclosure;

[0021] Fig. 9 A schematic diagram of the working timing of a first detection channel and a second detection channel provided in an embodiment of the present disclosure;

[0022] Fig.10 A schematic diagram of a workflow of a first detection channel and a second detection channel provided in an embodiment of the present disclosure;

[0023] Fig.11 A schematic diagram of a calibration process provided in an embodiment of the present disclosure;

[0024] Fig.12 A schematic diagram of the structure of a power supply voltage drop detection system provided in an embodiment of the present disclosure;

[0025] Fig.13 A schematic diagram of the structure of a delay chain provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0026] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0027] As used in this disclosure, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0028] The terms used in the present disclosure are only used to describe specific embodiments and are not intended to limit the present disclosure.As used in the present disclosure, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0029] When the terms “comprising” and / or “made of…” are used in the present disclosure, it specifies the existence of the stated features, integers, steps, operations, elements and / or components, but does not exclude the existence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0030] Unless otherwise defined, all terms (including technical and scientific terms) used in this disclosure have the same meaning as those commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined in this disclosure.

[0031] The inventor discovered during the study of the prior art that:

[0032] In the traditional power management module, the voltage drop range is covered by increasing the power supply working voltage to avoid abnormal system operation, but this increases the power supply voltage during normal operation, resulting in power consumption waste. The existing power supply voltage drop detection mechanism is divided into two categories, one is analog method detection, and the other is digital method detection. The analog method detection is mainly achieved by comparing the reference threshold and the power supply voltage through a comparator. When the power supply voltage is smaller than the threshold voltage, an alarm signal is issued. However, this method requires a reference power supply, which makes its area large and requires two power supplies. The digital method detection mainly uses the relationship between the power supply voltage and the delay chain (delay chains) to achieve detection. When the power supply voltage decreases, the delay time of the delay chain becomes longer, realizing the conversion from voltage to time, and then using TDC (Time-to-Digital Converters) to convert time into digital to achieve voltage to digital conversion. However, the delay of the delay chain varies greatly with PVT (Process, Voltage, Temperature). The current mainstream solution is to use a table lookup solution for calibration to eliminate the impact of PVT. However, this calibration method is complex and requires the use of other sensors, and has limited accuracy.

[0033] To this end, the embodiment of the present disclosure provides a power supply voltage drop detection device, which is mainly used for the power supply voltage drop in the SOC as the load changes, to detect the power supply voltage drop and send an alarm signal when the drop is detected.

[0034] like Figure 1The figure shows a schematic diagram of the structure of the power supply voltage drop detection device provided by the embodiment of the present disclosure, which mainly includes a gating unit 10, a first detection channel 11 and a second detection channel 12. An input terminal 1 of the gating unit 10 is connected to the power supply voltage, another input terminal 2 is connected to the threshold voltage, an output terminal 3 is connected to the first detection channel 11, and another output terminal 4 is connected to the second detection channel 12.

[0035] The gating unit 10 outputs the power supply voltage to the first detection channel 11 and the threshold voltage to the second detection channel 12 in the first duration of each control cycle; outputs the threshold voltage to the first detection channel 11 and the power supply voltage to the second detection channel 12 in the second duration of each control cycle, wherein each control cycle consists of a first duration and a second duration. That is, in the same duration, one output terminal outputs the threshold voltage and the other output terminal outputs the power supply voltage, and the same output terminal outputs the threshold voltage in one duration and the power supply voltage in the next duration, so that the two output terminals alternately output the power supply voltage and the threshold voltage.

[0036] The first detection channel 11 detects the first voltage characterization value of the power supply voltage in the first duration period; and detects the second voltage characterization value of the threshold voltage in the second duration period; compares the first voltage characterization value of the first duration period of each control cycle with the second voltage characterization value of the second duration period of the same control cycle, and outputs a first alarm signal when the first voltage characterization value is less than the second voltage characterization value. The second detection channel 12 detects the third voltage characterization value of the threshold voltage in the first duration period; and detects the fourth voltage characterization value of the power supply voltage in the second duration period; compares the third voltage characterization value of the first duration period of each control cycle with the fourth voltage characterization value of the second duration period of the same control cycle, and outputs a second alarm signal when the fourth voltage characterization value is less than the third voltage characterization value.

[0037] In this embodiment, two detection channels are used to periodically detect the drop of the power supply voltage according to the control cycle. In the first duration of each control cycle, one detection channel detects the threshold voltage and the other detection channel detects the power supply voltage. In the second duration of each control cycle, the detection objects are interchanged, that is, the detection channel that originally detects the threshold voltage detects the power supply voltage, and the detection channel that originally detects the power supply voltage detects the threshold voltage. Each detection channel compares the threshold voltage detected by itself in the same control cycle with the power supply voltage, and outputs an alarm signal when the real-time detection value of the power supply voltage is less than the threshold voltage value. In this embodiment, the value of the threshold voltage is set to be less than the value of the power supply voltage. When the power supply voltage drops but is still higher than the threshold voltage, it can be tolerated. When the power supply voltage drops to less than the threshold voltage, an alarm is output.

[0038] In some embodiments, such as Figure 2 The structure diagram of the first detection channel 11 is shown, and the first detection channel 11 includes a first detection subunit 110, a first calibration subunit 111 and a first comparison subunit 112 connected in sequence. The first detection subunit 110 detects the first number of delay cells contained in each of the n detection windows in the first duration period of each control cycle, and uses the first number as the first voltage characterization value, that is, the number of delay cells corresponding to the power supply voltage, and detects a number of delay cells representing the magnitude of the power supply voltage in each detection window; and the first detection subunit 110 detects the second number of delay cells contained in each of the m detection windows in the second duration period of each control cycle, that is, the number of delay cells corresponding to the threshold voltage, and detects a number of delay cells representing the magnitude of the threshold voltage in each detection window; wherein n is an integer greater than or equal to 1, and m is an integer greater than or equal to 1. The first calibration subunit 111 averages the q second numbers of the same control cycle to obtain the second voltage characterization value of the control cycle, wherein q is less than or equal to m. The first comparison subunit 112 compares a first voltage characterizing value of a first duration period of each control cycle with a second voltage characterizing value of a second duration period of the same control cycle, and outputs a first alarm signal when the first voltage characterizing value is less than the second voltage characterizing value.

[0039] Among them, the value of n is related to the duration of the first duration period and the duration of a single detection window, for example, n is the number of detection windows included in the first duration period. Similarly, the value of m is related to the duration of the second duration period and the duration of a single detection window, for example, m is the number of detection windows included in the second duration period. The number of q depends on the number of times the first calibration subunit continuously obtains the second number at the averaging moment. If m second numbers can be obtained at the averaging moment, q is equal to m. If m second numbers cannot be obtained, q is less than m.

[0040] The delay time of a single delay unit increases as the value of the power supply voltage decreases.

[0041] In some embodiments, such as Figure 3The structure diagram of the second detection channel 12 is shown, and the second detection channel includes a second detection subunit 120, a second calibration subunit 121, and a second comparison subunit 122 connected in sequence. The second detection subunit 120 detects the third number of delay units contained in each of the n detection windows in the first duration period of each control cycle of the input threshold voltage, that is, the number of delay units corresponding to the threshold voltage, and detects the number of delay units representing the magnitude of the threshold voltage in each detection window; and the second detection subunit detects the fourth number of delay units contained in each of the m detection windows in the second duration period of each control cycle of the input power supply voltage, and uses the fourth number as the fourth voltage characterization value, that is, the number of delay units corresponding to the power supply voltage, and detects the number of delay units representing the magnitude of the power supply voltage in each detection window; wherein n is an integer greater than or equal to 1, and m is an integer greater than or equal to 1. The second calibration subunit 121 averages the p third numbers of the same control cycle to obtain the third voltage characterization value of the control cycle, wherein p is less than or equal to n. The second comparison subunit 122 compares the third voltage characterizing value of the first duration period of each control cycle with the fourth voltage characterizing value of the second duration period of the same control cycle, and outputs a second alarm signal if the fourth voltage characterizing value is less than the third voltage characterizing value.

[0042] Among them, the value of n is related to the duration of the first duration period and the duration of a single detection window, for example, n is the number of detection windows included in the first duration period. Similarly, the value of m is related to the duration of the second duration period and the duration of a single detection window, for example, m is the number of detection windows included in the second duration period. The number of p depends on the number of times the second calibration subunit continuously obtains the third number at the averaging moment. If n third numbers can be obtained at the averaging moment, p is equal to n. If n third numbers cannot be obtained, p is less than n.

[0043] The delay time of a single delay unit increases as the value of the power supply voltage decreases.

[0044] In one example, the first comparison subunit and the second comparison subunit are respectively implemented using digital comparators.

[0045] In some embodiments, such as Figure 4The structure diagram of the first detection subunit 110 is shown. The first detection subunit 110 includes a first frequency divider (div2) 41 and a first delay chain 42; the signal output end of the first frequency divider 41 is connected to the signal input end of the first delay chain 42, the power input end of the first delay chain 42 is connected to the power supply voltage, and the output end of the first delay chain 42 is used as the output end of the first detection subunit 110; the first frequency divider 41 outputs a two-frequency signal through the signal output end, and the high-level time period of the two-frequency signal is the detection window. The delay length of the first delay chain 42 becomes longer as the power supply voltage decreases. The first frequency divider generates a clock with a 50% duty cycle, that is, a two-frequency signal. Assuming that the input clock of the first frequency divider is 2GHz, the high-level time period is about 500ps. The change of the power supply voltage is monitored by detecting the number of delay units in the first delay chain within 500ps, and the delay unit is used as a clock to convert 500ps into data, thereby realizing time-to-data conversion, that is, TDC. The first delay chain 42 includes a plurality of delay units. The number of the delay units is not limited as long as the number can meet the TDC conversion requirement of the binary frequency-divided signal output by the first frequency divider.

[0046] like Figure 5 The figure shows the principle diagram of power supply voltage drop detection. The T1 time period is the detection window. After the first delay chain, the number of delay units contained in the detection window can be obtained. As the power supply voltage decreases, the number of delay units contained in the detection window gradually decreases. Based on this, it is possible to determine whether the power supply voltage drops according to the change in the number of delay units in the detection window. Taking the detection window of 500ps as an example, when the power supply voltage increases, the number of delay units within 500ps will increase, and when the power supply voltage decreases, the number of delay units within 500ps will decrease. The current power supply voltage can be determined by the number of delay units within 500ps.

[0047] In some embodiments, such as Figure 6 The structure diagram of the second detection subunit 120 is shown, and the second detection subunit 120 includes a second frequency divider 61 and a second delay chain 62; the signal output end of the second frequency divider 61 is connected to the signal input end of the second delay chain 62, the power input end of the second delay chain 62 is connected to the power supply voltage, and the output end of the second delay chain 62 serves as the output end of the second detection subunit 120; the second frequency divider 61 outputs a two-frequency signal through the signal output end, and the high-level time period of the two-frequency signal is the detection window. The principle is the same as the first detection subunit, and the second detection subunit converts the high-level time period of the two-frequency signal into data to realize the conversion from time to data.

[0048] In some embodiments, the first duration period and the second duration period are of the same length. In an exemplary embodiment, the value range of each of the first duration period and the second duration period is: greater than or equal to 1ms and less than or equal to 2ms. It should be understood that the first duration period and the second duration period are two duration periods in one cycle of the timing signal, and the two duration periods constitute a control cycle. Under the control of the timing signal, the gating unit alternately outputs the threshold voltage and the power supply voltage at two output terminals. The value range of the first duration period and the second duration period given here is an exemplary embodiment, and it is not necessary to configure the first duration period and the second duration period according to the value range, and the value range is not limited to this.

[0049] In some embodiments, the threshold voltage can be obtained by dividing the power supply voltage by a sampling resistor. In other embodiments, the threshold voltage can be obtained by inputting an external fixed voltage, wherein the fixed voltage is set at a desired alarm voltage value.

[0050] In some embodiments, the power supply voltage drop detection device provided by the embodiment of the present disclosure further includes a voltage divider circuit 70; Figure 7 The structure diagram of the voltage divider circuit is shown in FIG. The input end of the voltage divider circuit 70 is connected to the power supply voltage, and the output end of the voltage divider circuit 70 is connected to the second input end of the gating unit; the voltage divider circuit 70 divides the power supply voltage to output a threshold voltage. In some embodiments, the threshold voltage can be set to account for 90% to 95% of the power supply voltage. Figure 7 In the example, the threshold voltage accounts for 93% of the power supply voltage. The actual threshold voltage can be set as required, and the specific value of the threshold voltage is not limited here.

[0051] In some embodiments, Figure 8 In the schematic diagram of the power supply voltage drop detection device shown, the gating unit 10 includes two groups of switch elements, each group of switch elements includes two switches, namely sw1 and sw2. In the first group of switch elements, the two ends of sw1 are respectively connected to the first detection channel and the threshold voltage vth, and the two ends of sw2 are respectively connected to the second detection channel and the threshold voltage. In the second group of switch elements, the two ends of sw1 are respectively connected to the power supply voltage vdd and the second detection channel, and the two ends of sw2 are respectively connected to the power supply voltage and the first detection channel.

[0052] Exemplarily, in other embodiments, the selection unit includes a first single-pole double-throw switch and a second single-pole double-throw switch; the moving end of the first single-pole double-throw switch is connected to the threshold voltage, one fixed end is connected to the input end of the first detection channel, and the other fixed end is connected to the input end of the second detection channel; the moving end of the second single-pole double-throw switch is connected to the power supply voltage, one fixed end is connected to the input end of the second detection channel, and the other fixed end is connected to the input end of the first detection channel.

[0053] Fig. 9 Shown is a schematic diagram of the working timing of the first detection channel and the second detection channel, Fig.10 Shown is a schematic diagram of the working process of the first detection channel and the second detection channel, Fig.11 Shown is a schematic diagram of the calibration process. In this embodiment, the first duration and the second duration are equal, both being T. Each control period is 2T and is composed of an adjacent first duration and second duration. The channel voltage is selected by sw1 and sw2. During the first duration of each control period, sw1 = 1, sw2 = 0, vth serves as the input voltage of the first detection subunit cha in the first detection channel, and vdd serves as the input voltage of the second detection subunit chb in the second detection channel, that is, the first detection channel is the threshold seeking channel and the second detection channel is the working channel; the output data of cha is dout_a, dout_a is continuously output, and the number of dout_a is determined by the length of one duration T of vth in cha. After being calibrated by the first calibration subunit, dout_a outputs dout_tha. For example, if the output rate of dout_a is 1 ns and T is 1 ms, then there are 1,000,000 dout_a in the T time period, and 1,000,000 dout_a are obtained as dout_tha after passing through the calibration algorithm.

[0054] In the next time period T, that is, the second duration, sw1 = 0, sw2 = 1, vth serves as the input voltage of the second detection subunit chb, and vdd serves as the input voltage of the first detection subunit cha, that is, the first detection channel is the working channel and the second detection channel is the threshold seeking channel; the output data of the second detection subunit chb is dout_b, dout_b is continuously output, and the number of dout_b is determined by the length of one duration T of vth in the second detection subunit chb. For example, if the output rate of dout_b is 1 ns and T is 1 ms, then there are 1,000,000 dout_b in the T time period, and 1,000,000 dout_b are obtained as dout_thb after passing through the calibration algorithm. In the same time period, the output data of the first detection subunit cha is dout_a obtained by detecting vdd, dout_a is continuously output, and the first comparison subunit compares dout_a obtained by detecting vdd and dout_tha obtained in the previous duration T. When dout_a < dout_tha, an alarm signal warning_a is issued.

[0055] Similarly, in the next timing period T, the second comparison subunit detects vdd to obtain dout_b, compares dout_b with dout_thb, and when dout_b < dout_thb, issues an alarm signal warning_b.

[0056] It can be seen that the threshold voltage is calibrated once every interval T, that is, dout_tha and dout_thb are reselected, realizing the online calibration of the threshold voltage.

[0057] The first calibration subunit and the second calibration subunit perform calibration using a digital domain averaging algorithm, which can achieve the effect of a low-pass filter in the digital domain, thereby obtaining stable threshold voltage characterization values dout_tha and dout_thb. The bandwidth of the filter is determined by the length of T. The longer the length of T, the narrower the filter bandwidth and the better the filtering effect. However, considering that there is a continuous time period T between dout_tha and dout_a, and there is a continuous time period T between dout_thb and dout_b, temperature deviation will be introduced. The length of T is limited within a certain range, and the value of T does not exceed the set upper limit value. Also, considering that the temperature changes by 1 degree Celsius every 1 ms, the range of T is set to be less than or equal to 1 ms and greater than or equal to 2 ms.

[0058] In some embodiments, as Fig.12 shown is a schematic structural diagram of a power supply voltage drop detection system provided by an embodiment of the present disclosure, including the power supply voltage drop detection device 1201, a clock stretching unit (clockstrech) 1202, a power supply 1203, and a processing core (core) 1204 described above; the clock controller of the clock stretching unit 1202 is respectively connected to the output ends of the first detection channel 11 and the second detection channel 12. The power supply voltage drop detection device 1201 outputs at least one of a first alarm signal and a second alarm signal to the clock stretching unit 1202; the clock stretching unit 1202 reduces the system frequency of the processing core 1204 under the control of at least one of the first alarm signal and the second alarm signal.

[0059] When there is a sudden change in the load of the power supply, such as Fig.12 when the load current I_load suddenly increases in, the power supply voltage vdd will drop. The power supply voltage drop is detected through the gating unit, the first detection channel, and the second detection channel, and when the power supply voltage drops to less than the threshold voltage, that is, vdd < vth, a first alarm signal and / or a second alarm signal is issued ( Fig.12The alarm signal is transmitted to the clock frequency reduction unit, which controls the frequency reduction (freq_down) of the processing core of the SOC system. After the system frequency reduction, the working current will decrease and the power supply voltage will increase, so that the power supply voltage will not drop too much due to a sudden load change, causing the system to work abnormally, thus ensuring the normal operation of the system.

[0060] The power supply voltage drop detection device provided by the embodiment of the present disclosure can quickly detect and cooperate with the system to reduce the operating frequency of the system when the power supply voltage drops, so that the power supply voltage drop speed slows down and returns to the normal value. The gating unit outputs the power supply voltage to the first detection channel and outputs the threshold voltage to the second detection channel in the first duration period of each control cycle; outputs the threshold voltage to the first detection channel and outputs the power supply voltage to the second detection channel in the second duration period of each control cycle, so that the two output ends alternately output the power supply voltage and the threshold voltage. The first detection channel detects and obtains the first voltage characterization value of the power supply voltage in the first duration period, and detects and obtains the second voltage characterization value of the threshold voltage in the second duration period. The first voltage characterization value is smaller than the second voltage characterization value, and the first alarm signal is output. Similarly, the second detection channel outputs the second alarm signal. Thus, the first detection channel and the second detection channel are used to detect the rapid drop of the power supply voltage in dual-channel time-sharing. In each control cycle, the first detection channel and the second detection channel will re-detect the threshold voltage for calibration, realizing the PVT online calibration of the threshold voltage, improving the accuracy of the rapid drop detection of the power supply voltage, and the implementation process is simple.

[0061] For example, in each of the above embodiments, the structure of any delay chain in the first delay chain and the second delay chain is as follows: Fig.13 As shown, the power supply end (not shown in the figure) of each element in the delay chain is connected to the power supply end, clkin is the clock signal, the inverter is the delay unit, and the inverter and the D flip-flop are combined to form a delay chain. The delay_ctrl signal is the delay control signal, and the delay chain works under the control of the delay control signal and clkin. Fig.13 The circuit circled in the middle is an amplifier circuit of a single inverter. This is just an example, and the embodiment of the present disclosure does not limit the specific circuit structure of the delay chain. Any delay chain structure that can be used for time-to-data conversion can be used in the embodiment of the present disclosure.

[0062] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0063] Those skilled in the art will understand that although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features from different embodiments is meant to be within the scope of the present embodiment and to form different embodiments.

[0064] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A power supply voltage drop detection device, the device comprising a gating unit, a first detection channel and a second detection channel; two input terminals of the gating unit are respectively connected to a power supply voltage and a threshold voltage, and two output terminals are respectively connected to the first detection channel and the second detection channel; The gating unit is used to: output the power supply voltage to the first detection channel and output the threshold voltage to the second detection channel in a first duration period of each control cycle; output the threshold voltage to the first detection channel and output the power supply voltage to the second detection channel in a second duration period of each control cycle, wherein each control cycle consists of a first duration period and a second duration period; The first detection channel is used to: detect a first voltage characterizing value of the power supply voltage in the first duration period; and detect a second voltage characterizing value of the threshold voltage in the second duration period; compare the first voltage characterizing value of the first duration period of each control cycle with the second voltage characterizing value of the second duration period of the same control cycle, and output a first alarm signal when the first voltage characterizing value is less than the second voltage characterizing value; The second detection channel is used to: detect a third voltage characterization value of the threshold voltage in the first duration period; and detect a fourth voltage characterization value of the power supply voltage in the second duration period; compare the third voltage characterization value of the first duration period of each control cycle with the fourth voltage characterization value of the second duration period of the same control cycle, and output a second alarm signal when the fourth voltage characterization value is less than the third voltage characterization value.

2. The power supply voltage drop detection device according to claim 1, characterized in that: The first detection channel comprises a first detection subunit, a first calibration subunit and a first comparison subunit connected in sequence; The first detection subunit is used to: detect a first number of delay units respectively included in n detection windows within the first duration period of each control cycle, and use the first number as the first voltage characterization value; and detect a second number of delay units respectively included in m detection windows within the second duration period of each control cycle; wherein n is an integer greater than or equal to 1, and m is an integer greater than or equal to 1; The first calibration subunit is used to: average q second numbers of the same control period to obtain the second voltage characterization value of the control period; wherein q is less than or equal to m; The first comparison subunit is used to compare the first voltage characterization value of a first duration period of each control cycle with the second voltage characterization value of a second duration period of the same control cycle, and output a first alarm signal when the first voltage characterization value is less than the second voltage characterization value.

3. The power supply voltage drop detection device according to claim 1, characterized in that: The second detection channel comprises a second detection subunit, a second calibration subunit and a second comparison subunit connected in sequence; The second detection subunit is used to detect the third number of the delay units respectively included in the n detection windows within the first duration period of each control cycle; and the second detection subunit detects the fourth number of the delay units respectively included in the m detection windows within the second duration period of each control cycle, and uses the fourth number as the fourth voltage characterization value; wherein n is an integer greater than or equal to 1, and m is an integer greater than or equal to 1; The second calibration subunit is used to average p third numbers of the same control period to obtain the third voltage characterization value of the control period; wherein p is less than or equal to n; The second comparison subunit is used to compare the third voltage characterization value of the first duration period of each control cycle with the fourth voltage characterization value of the second duration period of the same control cycle, and output a second alarm signal when the fourth voltage characterization value is less than the third voltage characterization value.

4. The power supply voltage drop detection device according to claim 2, characterized in that: The first detection subunit includes a first frequency divider and a first delay chain; The signal output end of the first frequency divider is connected to the signal input end of the first delay chain, the power input end of the first delay chain is connected to the power supply voltage, and the output end of the first delay chain serves as the output end of the first detection subunit; The first frequency divider is used to output a two-frequency-divided signal through a signal output terminal, and a high-level time period of the two-frequency-divided signal is the detection window.

5. The power supply voltage drop detection device according to claim 3, characterized in that: The second detection subunit includes a second frequency divider and a second delay chain; The signal output end of the second frequency divider is connected to the signal input end of the second delay chain, the power input end of the second delay chain is connected to the power supply voltage, and the output end of the second delay chain serves as the output end of the second detection subunit; The second frequency divider is used to output a divided-by-two frequency signal through a signal output terminal, and a high level time period of the divided-by-two frequency signal is the detection window.

6. The power supply voltage drop detection device according to claim 1, characterized in that: The gating unit includes a first group of switch elements and a second group of switch elements; The first group of switch elements includes a first switch and a second switch; one end of the first switch is connected to the threshold voltage, and the other end is connected to the input end of the first detection channel; one end of the second switch is connected to the threshold voltage, and the other end is connected to the input end of the second detection channel; The second group of switch elements includes a third switch and a fourth switch; one end of the third switch is connected to the power supply voltage, and the other end is connected to the input end of the second detection channel; one end of the fourth switch is connected to the power supply voltage, and the other end is connected to the input end of the first detection channel.

7. The power supply voltage drop detection device according to claim 1, characterized in that: The first duration period and the second duration period have the same duration.

8. The power supply voltage drop detection device according to claim 1, characterized in that: The device also includes a voltage divider circuit; The input end of the voltage divider circuit is connected to the power supply voltage, and the output end of the voltage divider circuit is connected to the second input end of the gating unit; The voltage divider circuit is used to divide the power supply voltage and output the threshold voltage.

9. A power supply voltage drop detection system, characterized in that: It comprises the power supply voltage drop detection device according to any one of claims 1 to 8, a clock frequency reduction unit, a power supply and a processing core; The power supply voltage drop detection device is used to output at least one of the first alarm signal and the second alarm signal to the clock frequency reduction unit; The clock frequency reduction unit is used to reduce the system frequency of the processing core under the control of at least one of the first alarm signal and the second alarm signal.

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