Analog voltage device and chip test system

Abstract

The invention relates to the technical field of testing, and discloses an analog voltage device and a chip testing system. The analog voltage device comprises a power supply control module and a signal control module; the power supply control module comprises a voltage stabilizing source unit and a reference source unit; the voltage stabilizing source unit processes an external power supply provided by the testing machine and outputs a working voltage; the reference source unit performs voltage conversion processing on the working voltage output by the voltage stabilizing source unit to obtain reference voltage; the signal control module is respectively connected with the output end of the power supply control module, the signal output end of the testing machine and an analog input channel of the tested chip, and is used for processing a time sequence signal output by the testing machine under the action of the working voltage and the reference voltage so as to generate an analog voltage; and the analog input channel outputs the analog voltage to the tested chip. According to the analog voltage device, the precision of the analog voltage input into the tested chip can be improved.

Description

Technical Field

[0001] The present application relates to the field of detection technology, and in particular to an analog voltage device and a chip testing system. Background Art

[0002] At present, most MCU chips have ADC functions. The main difficulty in ADC function test production is that the accuracy and stability of the analog voltage provided to the chip under test are difficult to meet the test requirements of the chip under test. Usually, the test channel of a low-end test machine (such as 3360 / 3380 / S50 / S100, etc.) is used to provide theoretical analog voltage to the chip under test.

[0003] There are currently the following issues:

[0004] (1) Due to the long-term use of the test equipment in the test factory without regular maintenance and calibration, the analog voltage error provided by the energy measurement device of the low-end test machine, namely the PMU source, is large, that is, the output accuracy is insufficient;

[0005] (2) Due to the frequent test model changes in the factory, the test environment built by engineers is often rough. That is, the cable connecting the test machine and the probe station or sorting machine of the chip under test is longer than 40cm, which will lead to the inability to overcome the line resistance and contact resistance, causing the analog voltage provided by the PMU source to attenuate again to the ADC input channel of the chip under test. In other words, the conductivity and interference shielding are poor, or the voltage error provided by the IO channel of the test machine is large and cannot meet the test ADC function. Finally, the analog voltage provided by the test machine to the ADC channel input channel of the chip under test deviates by several millivolts or even more than ten millivolts. The analog voltage increased by the PMU source is attenuated, causing the analog input channel actually transmitted to the chip under test to deviate;

[0006] (3) The PMU source of the test machine used in factory testing of ordinary consumer chips is mainly used to provide the chip with working voltage or high voltage or test power consumption. When multiple chips are tested at the same time, there is not enough PMU source to provide the analog voltage for ADC testing.

[0007] Therefore, when using the PMU source of a mid- to low-end test machine to provide analog voltage to test the ADC function of a chip, it is urgent to ensure the accuracy of the analog voltage received by the tested chip. Summary of the invention

[0008] In view of this, the embodiments of the present application provide an analog voltage device and a chip testing system, which can effectively solve the problem of inaccurate analog voltage received by the tested chip.

[0009] In a first aspect, an embodiment of the present application provides a voltage simulation device, including: a power control module and a signal control module;

[0010] The power control module includes a voltage stabilizing source unit and a reference source unit; the voltage stabilizing source unit is used to connect to the power supply end of the test machine, and the voltage stabilizing source unit processes the external power provided by the test machine to output a working voltage; the input end of the reference source unit is connected to the output end of the voltage stabilizing source unit, and the reference source unit performs voltage conversion processing on the working voltage output by the voltage stabilizing source unit to obtain a reference voltage;

[0011] The signal control module is respectively connected to the output end of the power control module, the signal output end of the test machine and the analog input channel of the chip under test. The signal control module is used to process the timing signal output by the test machine under the action of the working voltage and the reference voltage to generate an analog voltage, and output the analog voltage to the analog input channel of the chip under test.

[0012] In some embodiments, the signal control module includes a receiving unit, a processing unit, and a signal generator connected in sequence;

[0013] The input end of the receiving unit is used to connect to the signal output end of the test machine, the output end of the receiving unit is connected to the input end of the signal generator via the processing unit, and the output end of the signal generator is used to connect to the analog input channel of the chip under test;

[0014] The receiving unit is used to receive the timing signal output by the test machine, and the timing signal includes a timing control signal and a timing parameter signal;

[0015] The processing unit is used to control the signal generator to start according to the timing control signal, so that after the signal generator is turned on, the analog voltage is generated according to the timing parameter signal.

[0016] In some embodiments, the signal control module receives the timing signal output by the test machine at a speed of 200KHZ-10MHZ.

[0017] In some embodiments, the timing parameter signal includes a timing clock and a voltage coding timing; the signal control module is used to convert the voltage coding timing into a corresponding analog voltage under the timing clock and then output it.

[0018] In some embodiments, the voltage encoding timing is obtained by calculating and processing according to the analog voltage and the reference voltage expected by the chip under test.

[0019] In a second aspect, an embodiment of the present application provides a chip testing system, comprising a tester, at least one analog voltage device as described above, and at least one chip under test; wherein the number of the chips under test is equal to the number of the analog voltage devices;

[0020] The test machine is used to provide external power supply input to each of the analog voltage devices, and also outputs a timing signal to each of the analog voltage devices through a signal output terminal;

[0021] The analog voltage device is used to process the external power supply to obtain a working voltage, and also to perform voltage conversion on the working voltage to obtain a reference voltage, so that the analog voltage device, under the action of the working voltage and the reference voltage, processes the timing signal output by the test machine to generate the analog voltage, and outputs the analog voltage to the analog input channel of the chip under test.

[0022] In some embodiments, the test machine outputs a timing signal, including:

[0023] First, a timing control signal in the timing signal is sent to the analog voltage device, wherein the timing control signal is used to control the start of a signal generator in the analog voltage device;

[0024] After the signal generator is turned on, a target timing is calculated according to the analog voltage and the reference voltage expected by the chip under test, and the target timing is used as a voltage encoding timing;

[0025] The voltage encoding timing is sequentially sent to the analog voltage device according to a timing clock, so that the analog voltage device outputs the analog voltage according to the voltage encoding timing.

[0026] In some embodiments, each of the analog voltage devices is movably connected to one of the chips under test;

[0027] The analog voltage device is close to the chip under test or the analog voltage device is movably connected to a test accessory of the chip under test.

[0028] In some embodiments, when the analog voltage device is close to the chip under test, the electrical connection distance between the analog voltage device and the chip under test is less than 5 cm.

[0029] In some embodiments, the test machine is also connected to the chip under test;

[0030] The chip under test is used to output a conversion result after performing an analog-to-digital conversion function, and store the conversion result in a register of the chip under test;

[0031] The test machine is also used to read the conversion result from the register and determine whether the test requirement is met according to the conversion result.

[0032] The embodiments of the present application have the following beneficial effects:

[0033] The present application provides an analog voltage device and a chip testing system. The power control module in the analog voltage device processes the external power provided by the tester to output a working voltage and a reference voltage, so that the signal control module can work stably under the action of the working voltage and complete the processing of the timing signal under the action of the reference voltage, thereby outputting a precise analog voltage; due to the independent flexibility of the analog voltage device, the analog voltage device can be fixed at a distance or directly on a related fixed component of the chip under test, thereby ensuring that the analog voltage is subject to less interference signals when output to the analog input channel of the chip under test, thereby enabling the chip under test to accurately complete ADC function testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0035] Figure 1 A schematic diagram of the first principle structure of the analog voltage device in an embodiment of the present application is shown;

[0036] Figure 2 A schematic diagram of the start-up control timing of the analog voltage device in an embodiment of the present application is shown;

[0037] Figure 3 A schematic diagram of the output timing of the analog voltage device in an embodiment of the present application is shown;

[0038] Figure 4 An application schematic diagram of a chip testing system in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0039] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0040] The components of the embodiments of the present application generally described and shown in the drawings herein may be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0041] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present application are intended only to indicate specific features, numbers, steps, operations, elements, components or a combination of the foregoing items, and should not be understood as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or a combination of the foregoing items or increasing the possibility of one or more features, numbers, steps, operations, elements, components or a combination of the foregoing items. In addition, the terms "first", "second", "third" and the like are only used to distinguish descriptions and cannot be understood as indicating or implying relative importance.

[0042] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meanings as those generally understood by those skilled in the art to which the various embodiments of the present application belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meanings as the contextual meanings in the relevant technical field and will not be interpreted as having idealized meanings or overly formal meanings unless clearly defined in the various embodiments of the present application.

[0043] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0044] In view of the problems encountered in the current process of using the PMU source of the test machine to provide analog voltage to the chip under test, such as inaccurate analog voltage provided by the PMU source, interference from the test environment, and limited number of simultaneous measurements, the chip under test cannot complete the ADC function effectively and accurately. This application proposes a programmable voltage source, which is interconnected with the test machine, outputs the control signal sent by the test machine to the programmable voltage source, and is edited and controlled by the programmable voltage source, so as to output a suitable analog voltage to the ADC input channel of the chip under test, thereby realizing the analog voltage required for ADC testing.

[0045] The analog voltage device and the chip testing system are described below in conjunction with some specific embodiments.

[0046] Figure 1 A schematic diagram of the structure of an analog voltage device according to an embodiment of the present application is shown. Exemplarily, the analog voltage device includes a power control module and a signal control module;

[0047] In this embodiment, the power control module includes a voltage-stabilizing source unit and a reference source unit; the voltage-stabilizing source unit is used to connect to the power supply terminal of the test machine, and the voltage-stabilizing source unit processes the external power DC provided by the test machine to output a working voltage Vc; the input end of the reference source unit is connected to the output end of the voltage-stabilizing source unit, and the reference source unit performs voltage conversion processing on the working voltage Vc output by the voltage-stabilizing source unit to obtain a reference voltage Vr. The power control module in this application processes the external power provided by the test machine to output a working voltage Vc through the voltage conversion processing of the voltage-stabilizing source unit, and obtains a reference voltage Vr through further voltage conversion processing of the working voltage Vc by the reference source unit.

[0048] In some embodiments, the external power supply DC input to the voltage-stabilizing source unit is a 15V DC voltage, and the voltage-stabilizing source unit performs voltage conversion processing on the 15V external power supply to output a 12V working voltage, and the reference source unit then performs level conversion processing on the output 12V working voltage to obtain a 5V reference voltage; specifically, the reference source unit outputs a timing level after the voltage conversion processing, and when the high level range is 2V-5V, the low level range is 0-1V. It should be noted here that the voltage-stabilizing source unit and the reference source unit can adopt any structure in the prior art that can complete the level conversion and meet the level conversion requirements. Therefore, the present application does not specifically limit the principle structure of the voltage-stabilizing source unit and the reference source unit; in addition, the external power supply DC of 15V and the reference voltage of 5V are only an example and can be set according to actual conditions.

[0049] In this embodiment, the signal control module is used to connect the output end of the power control module, the signal output end of the test machine and the analog input channel of the chip under test. Under the action of the working voltage Vc and the reference voltage Vr, the signal control module processes the timing signal output by the test machine to generate an analog voltage V, and outputs the analog voltage V to the analog input channel of the chip under test. In this application, under the action of the working voltage and the reference voltage output by the power control module, the signal control module generates an analog voltage V based on the timing signal output by the test machine. The generated analog voltage V has high precision, and based on the independence and flexibility of the analog voltage device, it can ensure that the analog voltage V has a short distance with the analog input channel of the chip under test; when output to the analog input channel of the chip under test, it is subject to less interference signals, so that the chip under test can achieve accurate ADC function testing.

[0050] In some embodiments, the signal control module receives the timing signal output by the test machine at a speed of 200KHZ-10MHZ, and outputs an analog voltage of 0-5V according to the timing parameter signal in the timing signal, with an accuracy of 90mVm, which can meet the analog input requirements of the chip 12bitADC functional test.

[0051] In the present application, the power control module processes and outputs the working voltage Vc and the reference voltage Vr according to the external power supply DC provided by the test machine, so that the signal control module works under the action of the working voltage Vc, and the signal control module completes the processing of the timing signal under the action of the reference voltage Vr, thereby outputting a precise analog voltage V.

[0052] In one embodiment, if Figure 1 As shown, the signal control module includes a receiving unit, a processing unit and a signal generator; the input end of the receiving unit is used to connect to the signal output end of the test machine, the input end of the processing unit is connected to the input end of the receiving unit, the output end of the processing unit is connected to the input end of the signal generator, and the output end of the signal generator is used to connect to the analog input channel of the chip under test.

[0053] The receiving unit is used to receive the timing signal output by the tester, and the control signal includes a timing control signal CLK and a timing parameter signal DIN; the processing unit controls the start of the signal generator according to the timing control signal CLK; after the signal generator is turned on, an analog voltage V is generated according to the timing parameter signal DIN. The signal control module of the present application first turns on the signal generator according to the timing control signal, and after the signal generator enters the start state, it generates and outputs the corresponding analog voltage V according to the received timing parameter signal.

[0054] In some embodiments, the analog voltage device collects and processes the received timing control signal SYNC. When the timing control signal SYNC is at a low level, the timing parameter signal can be effectively controlled; wherein the timing parameter signal includes the timing clock CLK and the voltage encoding timing DIN; specifically, the signal control module first controls the received timing control signal SYNC at a low level, such as Figure 2 As shown, the control signal generator enters the start state, and after the start is completed, according to the received Figure 3 The timing clock CLK and voltage coding timing DIN shown are used to obtain the analog voltage output voltage coding timing, and then the voltage coding timing is converted into the corresponding analog voltage output under the timing clock. In other words, the tester sends a timing control signal to enable the analog voltage device to enter the startup working state, and then sends a timing parameter signal to enable the signal generator to generate different analog voltages according to different timing parameter signals. The analog voltage device of the present application can output different analog voltages according to different timing parameter signals to meet the analog voltages expected by different chips under test, thereby enabling accurate ADC analog function testing.

[0055] Figure 4A structural schematic diagram of a chip test system of an embodiment of the present application is shown. Exemplarily, the chip test system includes a tester, multiple analog voltage devices and multiple chips under test; the tester provides an external power supply and outputs a timing signal through the IO interface of the tester; the clock end of each analog voltage device is connected to the external power supply provided by the tester, and the signal end of each analog voltage device is connected to the timing signal; the output end of each analog voltage device is correspondingly connected to an analog input channel of a chip under test; the analog voltage device is the above-mentioned analog voltage device; the analog voltage device processes the external power supply to obtain a working voltage, so that the analog voltage device can work stably under the working voltage; the analog voltage device also performs voltage conversion processing on the working voltage to obtain a reference voltage, so that the analog voltage device, under the action of the reference voltage, processes the timing signal output by the tester to generate an analog voltage, and outputs the analog voltage to the analog input channel of the chip under test.

[0056] The process of the test machine of the present application outputting the timing signal includes: first sending the timing control signal in the timing signal to the analog voltage device, the timing control signal is used to control the signal generator in the analog voltage device to start; after the signal generator is turned on, the target timing is calculated according to the analog voltage expected by the chip under test and the reference voltage, and the target timing is used as the voltage coding timing; the voltage coding timing is sent to the analog voltage device in sequence according to the timing clock, so that the analog voltage device outputs the analog voltage according to the voltage coding timing.

[0057] It can be understood that the options of the analog voltage device in the above embodiment are also applicable to this embodiment, so they will not be described again here.

[0058] The chip testing system of the present application controls the analog voltage device to output different analog voltages through the timing signal sent by the tested I0 channel, and uses the test machine IO channel to generate the timing signal, which will not occupy the PMU source of the test machine, and does not require the test machine to directly provide the analog voltage; each chip is independently configured with an analog voltage device, which can prevent interference with each other when multiple chips are tested at the same time, greatly improving the chip testing effect and production capacity; and the use of analog voltage devices is low-cost and easy to maintain. When multiple chips are tested, one analog voltage device can be inspected and maintained separately.

[0059] In some embodiments, the external power supply provided by the test machine is a 15V DC voltage, which is processed by the analog voltage device to obtain a 12V working voltage and a 0-5V reference voltage.

[0060] In some embodiments, each analog voltage device is movably connected to a corresponding chip under test; when movably connected, the analog voltage device is close to the chip under test or the analog voltage device is movably connected to the test accessory of the chip under test. More specifically, when the analog voltage device is close to the chip under test, the electrical connection distance between the analog voltage device and the chip under test is less than 5 cm; if the analog voltage device is movably connected to the test accessory of the chip under test, it can be directly installed on the test pin card accessory, which can minimize the cable impedance and cable interference, and is not easily affected by the test environment, thereby ensuring the accuracy, reliability and stability of the analog voltage required for the ADC function test of the chip under test.

[0061] In the embodiment of the present application, the test machine calculates and processes the voltage coding timing according to the expected analog voltage and reference voltage of the chip under test; that is, the voltage coding timing = (65535 * expected analog voltage) / reference voltage; illustratively, the expected analog voltage output is 2.501V, and 2.501V is substituted into the above formula (65535 * 2.501) / 5 to obtain the voltage coding timing of the expected analog voltage, which is 0x800C. The test machine sends the voltage coding timing of the analog voltage DB [23: 0] = 0001 000 10000000 0000 1100, and the analog voltage device can output the analog voltage of 2.051V to the ADC analog input channel of the chip under test according to the voltage coding timing, thereby testing the analog-to-digital conversion function of the chip under test.

[0062] The present application interconnects the analog voltage device with a test machine, and the test machine sends a timing signal, so that an accurate analog voltage can be output and provided to the ADC analog input channel of the chip under test, thereby realizing the analog voltage required for ADC testing.

[0063] In some embodiments, the test machine is also connected to the register of the chip under test; the chip under test outputs the conversion result after performing the analog-to-digital conversion function, and stores the conversion result in the register of the chip under test; the test machine reads the conversion result and determines whether the test requirements are met based on the conversion result.

[0064] Specifically, when the ADC function test is started by the chip program under test, the test machine first sends Figure 2The timing signal shown, when the timing start signal in the timing signal is valid at a low level, the analog voltage device is controlled to start according to the timing parameter signal in the timing signal; after the analog voltage device is started, the tester calculates the voltage coding timing according to the reference voltage and the analog voltage expected by the chip under test; the analog voltage device receives the calculated voltage coding timing, and immediately processes the voltage coding timing through the processing unit so that the signal generator outputs the corresponding analog voltage, and the signal generator outputs the output analog voltage to the ADC input channel of the chip under test, and the chip under test then converts the analog voltage into the corresponding digital quantity and stores it in the register of the chip under test, and the tester reads the ADC conversion result value of the chip under test from the register of the chip under test and determines whether this value is within the test specification.

[0065] In the chip testing system of the present application, the test machine only outputs the timing signal, and the analog voltage device outputs the corresponding analog voltage according to the timing signal, which can effectively solve the accuracy error of different test machines, as well as the influence of the line resistance and parasitic capacitance of the cable between the test machine and the chip under test. The chip testing system connects the analog voltage device to the chip under test nearby, so that the analog voltage output by the analog voltage device can be transmitted to the analog input terminal of the chip under test at a close distance, reducing the impedance of the cable and the interference during the transmission process, thereby improving the accuracy and precision of the analog voltage input to the chip under test. Moreover, by independently configuring an analog voltage device for each chip, multiple chips can be tested at the same time, that is, it has test flexibility and scalability.

[0066] In several embodiments provided in the present application, it should be understood that the disclosed modules and systems can also be implemented in other ways. The module embodiments described above are merely schematic, for example, the flowcharts and structure diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and a part of the module, program segment or code contains one or more executable instructions for implementing a specified logical function. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or the flow diagram, and the combination of boxes in the structure diagram and / or the flow diagram, can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0067] In addition, the functional modules or units in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0068] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a smart phone, a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application.

[0069] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.

Claims

1. A voltage simulation device, characterized in that: include: Power control module and signal control module; The power control module includes a voltage stabilizing source unit and a reference source unit; the voltage stabilizing source unit is used to connect to the power supply end of the test machine, and the voltage stabilizing source unit processes the external power provided by the test machine to output a working voltage; the input end of the reference source unit is connected to the output end of the voltage stabilizing source unit, and the reference source unit performs voltage conversion processing on the working voltage output by the voltage stabilizing source unit to obtain a reference voltage; The signal control module is respectively connected to the output end of the power control module, the signal output end of the test machine and the analog input channel of the chip under test. The signal control module is used to process the timing signal output by the test machine under the action of the working voltage and the reference voltage to generate an analog voltage, and output the analog voltage to the analog input channel of the chip under test.

2. The analog voltage device according to claim 1, characterized in that: The signal control module includes a receiving unit, a processing unit and a signal generator connected in sequence; The input end of the receiving unit is used to connect to the signal output end of the test machine, the output end of the receiving unit is connected to the input end of the signal generator via the processing unit, and the output end of the signal generator is used to connect to the analog input channel of the chip under test; The receiving unit is used to receive the timing signal output by the test machine, and the timing signal includes a timing control signal and a timing parameter signal; The processing unit is used to control the signal generator to start according to the timing control signal, so that after the signal generator is turned on, the analog voltage is generated according to the timing parameter signal.

3. The analog voltage device according to claim 2, characterized in that: The signal control module receives the timing signal output by the test machine at a speed of 200KHZ-10MHZ.

4. The analog voltage device according to claim 2, characterized in that: The timing parameter signal includes a timing clock and a voltage coding timing; the signal control module is used to convert the voltage coding timing into a corresponding analog voltage under the timing clock and then output it.

5. The analog voltage device according to claim 4, characterized in that: The voltage encoding timing is obtained by calculating and processing according to the analog voltage expected by the chip under test and the reference voltage.

6. A chip testing system, characterized in that: A tester comprising: at least one analog voltage device according to any one of claims 1 to 5; and at least one chip under test; wherein the number of the chips under test is equal to the number of the analog voltage devices; The test machine is used to provide external power supply input to each of the analog voltage devices, and also outputs a timing signal to each of the analog voltage devices through a signal output terminal; The analog voltage device is used to process the external power supply to obtain a working voltage, and also to perform voltage conversion on the working voltage to obtain a reference voltage, so that the analog voltage device, under the action of the working voltage and the reference voltage, processes the timing signal output by the test machine to generate the analog voltage, and outputs the analog voltage to the analog input channel of the chip under test.

7. The chip testing system according to claim 6, characterized in that: The test machine outputs a timing signal, including: First, a timing control signal in the timing signal is sent to the analog voltage device, wherein the timing control signal is used to control the start of a signal generator in the analog voltage device; After the signal generator is turned on, a target timing is calculated according to the analog voltage and the reference voltage expected by the chip under test, and the target timing is used as a voltage encoding timing; The voltage encoding timing is sequentially sent to the analog voltage device according to a timing clock, so that the analog voltage device outputs the analog voltage according to the voltage encoding timing.

8. The chip testing system according to claim 6, characterized in that: Each of the analog voltage devices is movably connected to one of the chips under test; The analog voltage device is close to the chip under test or the analog voltage device is movably connected to a test accessory of the chip under test.

9. The chip testing system according to claim 8, characterized in that: When the analog voltage device is close to the chip under test, the electrical connection distance between the analog voltage device and the chip under test is less than 5 cm.

10. The chip testing system according to claim 6, characterized in that: The test machine is also connected to the chip under test; The chip under test is used to output a conversion result after performing an analog-to-digital conversion function, and store the conversion result in a register of the chip under test; The test machine is also used to read the conversion result from the register and determine whether the test requirement is met according to the conversion result.

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