RAID bridge chip

Abstract

The invention discloses an RAID (redundant array of independent disks) bridging chip. In order to avoid the problem of disk space waste, the working mode of the RAID bridging chip comprises a first working mode and a second working mode, and the RAID bridging chip comprises a first RAID processor, a second RAID processor, a first multiplexer and a third SATA core; in the first working mode, the second RAID processor establishes data connection with the third SATA core through the first multiplexer, and the data connection established between the first RAID processor and the third SATA core through the first multiplexer is disconnected; in the second working mode, the first RAID processor establishes data connection with the third SATA core through the first multiplexer, and data connection established between the second RAID processor and the third SATA core through the first multiplexer is disconnected. The technical problem that disk space of the RAID bridging chip supporting multiple RAID modes is wasted is solved, and the technical effects of reducing storage resource waste and reducing power consumption are achieved.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular to a RAID bridge chip. Background Art

[0002] Redundant Array of Independent Disks (RAID) is a technology that combines small-capacity disks to obtain larger storage capacity. There are many RAID modes, the most common ones are RAID-0, RAID-1, RAID-01, RAID10, RAID-5, etc. Usually, users can decide in which mode the device processes and stores data by setting the RAID mode.

[0003] RAID-0 and RAID-5 are non-mirroring RAID modes. RAID-0 implements block access of data by striping the data on the disk, which reduces the mechanical seek time of the disk and improves the data access speed. RAID-5 implements redundant protection of data by storing parity information.

[0004] RAID-01 and RAID-10 are mirrored RAID modes. Mirroring means copying data to multiple disks. Mirrored RAID arrays usually ensure that data is not lost when a disk in the array fails.

[0005] Different RAID modes require different minimum numbers of disks. For example, RAID-0 and RAID-1 modes require more than two disks; RAID-5 mode requires at least three disks; and RAID-01 and RAID-10 modes require at least four disks.

[0006] RAID bridge chips that support multiple different RAID modes provide users with flexibility. The number of disks supported by the RAID bridge chip needs to be determined before the register transfer level (RTL) code is generated. During integration instantiation, the RAID mode is determined by register configuration, but it cannot be modified during use, otherwise the data will be damaged.

[0007] When determining the number of disks supported by RAID bridge chips that support multiple RAID modes, the maximum number of disks required in all supported RAID modes must be used as the standard. However, if the user selects other RAID modes, there will be a waste of disks, resulting in the idleness of valuable storage resources.

[0008] In view of this, the present invention proposes a RAID bridge chip that can reduce or eliminate the disadvantage of disk waste. Summary of the invention

[0009] In order to alleviate or partially alleviate the above technical problems, the solution of the present invention is as follows:

[0010] A RAID bridge chip, the working mode of the RAID bridge chip includes a first working mode and a second working mode, and the RAID bridge chip includes: a first RAID processor, a second RAID processor, a first multiplexer and a third SATA core; in the first working mode, the second RAID processor establishes a data connection with the third SATA core through the first multiplexer, and disconnects the data connection established between the first RAID processor and the third SATA core through the first multiplexer; in the second working mode, the first RAID processor establishes a data connection with the third SATA core through the first multiplexer, and disconnects the data connection established between the second RAID processor and the third SATA core through the first multiplexer.

[0011] Furthermore, in the first working mode and the second working mode, the first RAID processor establishes a data connection with the first SATA core and / or the second SATA core.

[0012] Furthermore, the first working mode is a mirror RAID mode including RAID-1.

[0013] Furthermore, the first working mode is one of RAID-10, RAID-01, and RAID-1 modes.

[0014] Furthermore, the second operating mode is a non-mirroring RAID mode that does not include RAID-1.

[0015] Furthermore, the second working mode is one of RAID-0 and RAID-5 modes.

[0016] Furthermore, the RAID bridge chip also includes: a second multiplexer; in the first working mode, the second RAID processor establishes a data connection with the fourth SATA core through the second multiplexer, and disconnects the data connection established between the first RAID processor and the fourth SATA core through the second multiplexer; in the second working mode, the first RAID processor establishes a data connection with the fourth SATA core through the second multiplexer, and disconnects the data connection established between the second RAID processor and the fourth SATA core through the second multiplexer.

[0017] Furthermore, in the second working mode, the second RAID processor is turned off.

[0018] Furthermore, the first multiplexer establishes a data connection with the third SATA core via the FIFO interface; the first RAID processor establishes a data connection with the first SATA core and / or the second SATA core via the FIFO interface.

[0019] Furthermore, the first RAID processor and the second RAID processor both establish data connections with the bus interface unit via the FIFO interface; and the bus interface unit receives data from the upstream via the AMBA interface.

[0020] The technical solution of the present invention has one or more of the following beneficial technical effects:

[0021] (1) It can reduce or eliminate the disk waste problem existing in different RAID modes;

[0022] (2) Reduce chip cost and / or power consumption;

[0023] (3) Reduce integration complexity, and users can flexibly choose RAID mode and number of disks.

[0024] In addition, other beneficial effects of the present invention will be mentioned in the specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 This is a schematic diagram of the data flow of the RAID bridge chip in the first working mode;

[0026] Figure 2 This is a data flow diagram of the RAID bridge chip in the second working mode. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, words such as "first" and "second" are used to distinguish the same or similar items with substantially the same functions and effects. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit the difference.

[0029] Figure 11 is a schematic diagram of the data flow of the RAID bridge chip in the first working mode. By way of example, the RAID bridge chip of the present invention includes: a bus interface unit, a first RAID processor, a second RAID processor, a first Serial Advanced Technology Attachment (SATA) core and a first physical layer (PHY), a second SATA core and a second PHY layer, a third SATA core and a third PHY layer, a fourth SATA core and a fourth PHY layer, a first disk, a second disk, a third disk, a fourth disk, and a first multiplexer and a second multiplexer.

[0030] The main function of the SATA core is to implement the SATA interface function of the physical storage device. The main function of the PHY layer is to convert parallel data into serial data, or / and convert serial data into parallel data.

[0031] Although Figure 1 In the example, there are 2 RAID processors, 2 multiplexers, and 4 corresponding SATA cores, PHY layers, and disks, but Figure 1 The number of the above components in the example is only an example. For example, in a certain embodiment, only the first multiplexer and the related SATA core and disk are included. The number of the above components that the technical solution of the present invention can target is not limited to this and is not limited to this.

[0032] From the side far away from the disk, the data received by the bus interface unit belongs to the upstream data. The bus interface unit is responsible for transmitting the upstream data to the RAID processor. The bus interface unit receives the upstream data through the Advanced Microcontroller Bus Architecture (AMBA) interface and outputs the data to the RAID processor through the First In First Out (FIFO) interface. Among them, the bus interface unit is responsible for converting the AMBA interface data into the FIFO interface data.

[0033] In addition, the SATA core and PHY layer are connected through a standard PCIe physical layer interface (Physical Interface for PCI Express, PIPE), which is mainly used to implement the SATA interface of the physical storage device. Finally, the PHY layer and the disk transmit data through the SATA interface.

[0034] In other words, the RAID processor, SATA core and PHY layer jointly implement the SATA interface of the physical storage device. The SATA core connects to the upstream RAID processor through the FIFO interface and to the downstream PHY layer through the PIPE interface, and finally sends the data to the SATA storage device, which is usually a disk.

[0035] The RAID processor can be configured to implement multiple RAID modes, and the multiple RAID modes in this example of the present invention include at least a first working mode and a second working mode. In this configuration, the user can switch the RAID mode as needed.

[0036] In the first working mode, the first RAID processor and the second RAID processor are used to implement a mirror RAID mode. That is, the first RAID processor and the second RAID processor process or / and store input data in the same manner. For example, the RAID-1 mode requires that data be stored in two different disks in a mirrored manner, and the data in the two different storage locations are backed up for each other.

[0037] RAID-1, RAID-01, and RAID-10 can all be considered mirrored RAID modes because their implementation processes all include RAID-1. To implement the mirrored RAID mode, two RAID processors are generally required.

[0038] The present invention includes two multiplexers. In a first working mode, the second RAID processor establishes a data connection with the third SATA core through the first multiplexer, and the second RAID processor establishes a data connection with the fourth SATA core through the second multiplexer. In this mode, the first RAID processor disconnects the data connection with the first multiplexer and the second multiplexer, and further, there is no data transmission or / and storage path between the first RAID processor and the third SATA core and the fourth SATA core.

[0039] Figure 2 This is a data flow diagram of the RAID bridge chip in the second working mode. In the second working mode, the first RAID processor and the second RAID processor are used to implement a non-mirror RAID mode, such as RAID-0 and RAID-5. In this mode, the second RAID processor is no longer required to participate in data storage, so the second RAID processor can be turned off.

[0040] In a conventional RAID bridge chip solution, if the second RAID processor is turned off, it means that the third disk and the fourth disk are in an idle or wasted state, which means serious waste of resources or greater product cost in commercial applications.

[0041] The present invention utilizes the first multiplexer and the second multiplexer to establish a data transmission or / and storage path between the first RAID processor and the third SATA core or / and the fourth SATA core in the second working mode.

[0042] At the same time, in the second working mode, just like actively disconnecting the data connection between the second RAID processor and the first multiplexer and / or the second multiplexer, in the embodiment of the second RAID processor being turned off, it also means that the data transmission and / or storage path between the second RAID processor and the third SATA core and the fourth SATA core is disconnected.

[0043] Specifically, the first RAID processor is connected to the first multiplexer, or / and the first RAID processor is connected to the second multiplexer, to establish a data transmission or / and storage path between the first RAID processor and the first multiplexer or / and the second multiplexer.

[0044] The present invention Figure 2 The example only shows the case where the first RAID processor simultaneously establishes a data connection relationship with the first multiplexer and the second multiplexer. In this case, a total of four disks can be supported in the second working mode: the first disk, the second disk, the third disk and the fourth disk.

[0045] In an alternative embodiment, the first RAID processor can also establish a data connection with only one of them, such as the first multiplexer. In this case, the number of disks that the bridge chip can support in the second working mode is 3 in total: the first disk, the second disk, and the third disk.

[0046] Figure 2 In the scheme shown in , the third disk and the fourth disk that originally established data connection with the second RAID processor establish data connection with the first RAID processor, thereby achieving the purpose of establishing data connection between the first RAID processor and the third disk and the fourth disk. Therefore, from the perspective of the first RAID processor, the number of disks is expanded, the disk space is fully utilized, and the waste of storage resources is reduced or avoided.

[0047] In the present invention, in the first working mode and the second working mode, the first RAID processor establishes a data connection with the first SATA core and / or the second SATA core through the FIFO interface.

[0048] In order to better illustrate the present invention, numerous specific details are provided in the above specific embodiments. It should be understood by those skilled in the art that the present invention can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present invention.

[0049] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A RAID bridge chip, the working mode of the RAID bridge chip includes a first working mode and a second working mode, characterized in that: The RAID bridge chip includes a first RAID processor, a second RAID processor, a first multiplexer and a third SATA core; In the first working mode, the second RAID processor establishes a data connection with the third SATA core through the first multiplexer, and disconnects the data connection established between the first RAID processor and the third SATA core through the first multiplexer; In the second working mode, the first RAID processor establishes a data connection with the third SATA core through the first multiplexer, and disconnects the data connection between the second RAID processor and the third SATA core through the first multiplexer.

2. The RAID bridge chip according to claim 1, characterized in that: In both the first working mode and the second working mode, the first RAID processor establishes a data connection with the first SATA core and / or the second SATA core.

3. The RAID bridge chip according to claim 2, wherein: The first operating mode is a mirrored RAID mode including RAID-1.

4. The RAID bridge chip according to claim 3, characterized in that: The first working mode is one of RAID-10, RAID-01, and RAID-1 modes.

5. The RAID bridge chip according to claim 2, characterized in that: The second operating mode is a non-mirrored RAID mode that does not include RAID-1.

6. The RAID bridge chip according to claim 5, characterized in that: The second working mode is one of RAID-0 and RAID-5 modes.

7. The RAID bridge chip according to any one of claims 1 to 6, characterized in that: The RAID bridge chip also includes: a second multiplexer; In the first working mode, the second RAID processor establishes a data connection with the fourth SATA core through the second multiplexer, and disconnects the data connection established between the first RAID processor and the fourth SATA core through the second multiplexer; In the second working mode, the first RAID processor establishes a data connection with the fourth SATA core through the second multiplexer, and disconnects the data connection between the second RAID processor and the fourth SATA core through the second multiplexer.

8. The RAID bridge chip according to claim 7, characterized in that: In the second working mode, the second RAID processor is turned off.

9. The RAID bridge chip according to claim 2, characterized in that: The first multiplexer establishes a data connection with the third SATA core via the FIFO interface; The first RAID processor establishes a data connection with the first SATA core and / or the second SATA core through the FIFO interface.

10. The RAID bridge chip according to claim 9, characterized in that: The first RAID processor and the second RAID processor both establish data connection with the bus interface unit through the FIFO interface; The bus interface unit receives data from upstream through the AMBA interface.

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