Design method and device for bandwidth boosting circuit of three-level boost converter and photovoltaic system

Abstract

The invention discloses a design method and device of a three-level boost converter bandwidth boosting circuit and a photovoltaic system. The method comprises the following steps: firstly, taking an input capacitor of a three-level boost circuit and a PV assembly as a first integral circuit, and solving output impedance Zpv under a small signal model; secondly, a virtual impedance circuit is designed, the Zpv is connected with a virtual impedance Zs in series, the virtual impedance Zs is a pure resistor Rs, a virtual impedance Zp is connected behind the Zs in parallel, and the virtual impedance Zp is composed of an inductor Lp and a resistor Rp; and finally, the equivalent output impedance Zeq added with the virtual impedance is obtained, and due to the action of Zs and Zp, the change of Rpv cannot cause the change of Zeq in a large range, so that the bandwidth of the control system is improved. The virtual impedance design method can improve the bandwidth of the three-level boost converter and dynamically control the input photovoltaic voltage, thereby improving the overall efficiency and stability of a photovoltaic system.

Description

Technical Field

[0001] The present invention relates to the technical field of three-level boost circuits, and in particular to a design method and device for a three-level boost converter bandwidth improvement circuit and a photovoltaic system. Background Art

[0002] In photovoltaic systems, especially in DC 1500V string photovoltaic inverter systems, three-level boost is a feasible front-stage boost solution. However, due to the dynamic internal resistance R pv The controlled object of the three-level boost varies with the PV voltage. pv The full name of PV is "Photovoltaic".

[0003] When the circuit operates in the approximate constant voltage region, Rpv is small, and the bandwidth of the system is small. The lower loop bandwidth brings two problems: first, the low bandwidth restricts the MPPT (Maximum Power Point Tracking) disturbance period, thereby limiting the speed of MPPT; second, the low bandwidth constrains the speed of active scheduling, especially in scenarios where the active scheduling time is demanding. Summary of the invention

[0004] The technical problem to be solved by the present invention is to address the above-mentioned deficiencies in the prior art and propose a design method, device and photovoltaic system for a three-level boost converter bandwidth improvement circuit. The method can improve the bandwidth of the three-level boost converter, thereby improving the overall efficiency and stability of the photovoltaic system.

[0005] In the prior art, the design of virtual impedance is mainly used in the active damping method of LCL (full name is "Inductor-Capacitor-Inductor") inverter to suppress the LCL resonant voltage and current. In recent years, some researchers have also applied virtual impedance to the control loop of boost to improve the bandwidth of boost. However, these research works have certain limitations: first, they are limited to the control of traditional boost and do not consider the control of three-level boost converters; second, the virtual impedance used in these research works only considers the simplest form of resistance, and some research works only consider the form of parallel virtual resistance. The virtual impedance method that only considers resistance is relatively simple to implement, but lacks restrictions on the speed of change of the virtual current flowing through the virtual resistance.

[0006] The inventors of the present application have discovered that the bandwidth of a three-level boost converter can be improved by using a virtual impedance circuit in a bandwidth improvement circuit of a three-level boost converter.

[0007] In a first aspect, the present invention provides a design method for a bandwidth enhancement circuit of a three-level boost converter, the method being used in a photovoltaic system, the method comprising the following steps:

[0008] Determine a first overall circuit; the first overall circuit is an input capacitor C of a three-level boost circuit in A circuit formed in parallel with the PV module;

[0009] The virtual impedance circuit is arranged at the output end of the first overall circuit to obtain a three-level boost converter bandwidth improvement circuit, so as to achieve bandwidth improvement of the three-level boost converter;

[0010] in,

[0011] The virtual impedance circuit comprises:

[0012] The first impedance Z s , the first impedance Z s connected in series to the output end of the first overall circuit;

[0013] The second impedance Z p , the second impedance Z p In parallel with the first impedance Z s The output terminal.

[0014] Furthermore, in the virtual impedance circuit, the first impedance Z s The first resistor R s , the second impedance Z p Including the series inductor L p and the second resistor R p ; Wherein, the first resistor R s It is a pure resistor.

[0015] Further, before arranging the virtual impedance circuit at the output end of the first overall circuit, the method further comprises: designing the virtual impedance circuit;

[0016] The designing of the virtual impedance circuit comprises: determining a second impedance Rp;

[0017] The determining of the second impedance Rp specifically comprises the following steps:

[0018] Step S1: Determine the PI proportional parameter V of the first overall circuit voltage loop pv_kp and PI integral parameter V pv_ki ; and, determining the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki ;

[0019] Step S2: According to the PI proportional parameter V of the voltage loop of the first overall circuit pv_kp and PI integral parameter V pv_ki , and, according to the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki , calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl ;

[0020] The closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit is vpv_cl The calculation formula is as follows:

[0021]

[0022] In formula (1), A=-R pv V dc i L_kp v pv_kp ,

[0023] B=-R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ,

[0024] C=-R pv V dc i L_ki v pv_ki ,

[0025]

[0026] G=-R pv V dc i L_ki v pv_ki ,

[0027] F=-V dc i L_ki -R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ;

[0028] Among them, R pv It represents the internal resistance of the equivalent Thevenin circuit of the PV module;

[0029] V dv Represents the external voltage value of the equivalent Thevenin circuit of the PV module;

[0030] T d Indicates extended time;

[0031] s represents the complex domain;

[0032] C i represents the compensation coefficient;

[0033] Step S3: Based on the closed-loop transfer function G of the voltage loop of the bandwidth increasing circuit of the three-level boost converter vpv_cl Bode plot, set the second resistor R p ;

[0034] Step S4: According to the second resistor R p , calculate the inductance L p ;

[0035] Step S5: determining whether the three-level boost converter bandwidth improvement system has achieved stable performance and the voltage loop bandwidth is maximum; the three-level boost converter bandwidth improvement system includes the three-level boost converter bandwidth improvement circuit;

[0036] If the three-level boost converter bandwidth improvement system achieves stable performance and the voltage loop bandwidth is maximized, the second resistor R p The second resistor R p target value; if not, repeating steps S3 to S5 until the three-level boost converter bandwidth improvement system reaches stable performance and the voltage loop bandwidth is maximized;

[0037] Step S6: Setting the second resistor R p The target value is the second impedance R in the virtual impedance p , thus completing the second impedance R p design.

[0038] Furthermore, the step S4 specifically includes the following steps:

[0039] Step S41: Determine the bandwidth f of the current loop of the bandwidth enhancement circuit of the three-level boost converter cw ;

[0040] Step S42: Boost the bandwidth f of the current loop of the three-level boost converter bandwidth cw , determine the cut-off frequency f cp ;

[0041] Among them, f cp >f cw ;

[0042] Cut-off frequency f cp is 20log10(1 / R p )=-3dB, the second impedance Z p =R p +sL p The frequency at which the amplitude response reaches -3dB;

[0043] Cut-off frequency f cp The calculation formula is as follows:

[0044] f cp =R p / (2*π*L p ) (2);

[0045] Step S43: According to the cut-off frequency f cp and the second resistor R p , calculate the inductance L p ;

[0046] Inductance L p The calculation formula is as follows:

[0047] L p =R p / (2*π*f cp ) (3).

[0048] Further, in step S5, whether the bandwidth improvement system of the three-level boost converter has achieved stable performance and the voltage loop bandwidth is maximized is determined based on an equivalent circuit model;

[0049] The calculation formula of the equivalent circuit model is as follows:

[0050]

[0051] in,

[0052] Z eq It represents the equivalent impedance of the bandwidth improvement circuit of the three-level boost converter;

[0053] Z p represents the second impedance;

[0054] Z pv represents an equivalent impedance of the first overall circuit;

[0055] Z s represents the first impedance;

[0056] R p represents a second resistor;

[0057] L p represents inductance;

[0058] s represents the complex domain;

[0059] Z pv The calculation formula is as follows:

[0060]

[0061] in,

[0062] C in Indicates the capacitance value of the input capacitor;

[0063] R pv Indicates the dynamic resistance value of the PV module.

[0064] Furthermore, the first resistor R s With the second resistor R p The relationship is as follows:

[0065] R s +R p =0;

[0066] In this formula, R s Represents the first resistor R s , R p Represents the second resistor R p .

[0067] In a second aspect, the present invention provides a method for dynamically controlling a photovoltaic input voltage of a three-level boost, the method comprising the following steps:

[0068] Step K1: adopting the design method of the three-level boost converter bandwidth improvement circuit described in the first aspect to obtain a three-level boost converter bandwidth improvement circuit;

[0069] Step K2: obtaining an output duty cycle d1 of a current loop of a bandwidth enhancement circuit of a three-level boost converter for a photovoltaic system;

[0070] Step K3: obtaining an output value d2 of a controller in a three-level boost converter;

[0071] The calculation formula of the output value d2 of the controller is as follows:

[0072]

[0073] Among them, Kp is the proportionality coefficient, V actual is the actual measured voltage;

[0074] Step K4: using d1-d2 as the final duty cycle to drive the upper tube S1 of the three-level boost converter, and using d1+d2 as the final duty cycle to drive the lower tube S2 of the three-level boost;

[0075] Step K5: repeating steps K2 to K4, thereby dynamically controlling the input photovoltaic voltage of the three-level boost.

[0076] In a third aspect, the present invention provides a design device for a bandwidth enhancement circuit of a three-level boost converter, wherein the device is used in a photovoltaic system;

[0077] The design device comprises:

[0078] A determining unit, configured to determine a first overall circuit; the first overall circuit is an input capacitor C of a three-level boost circuit in A circuit formed in parallel with the PV module;

[0079] a design unit connected to the determination unit, and configured to set a virtual impedance circuit at an output end of the first overall circuit to obtain a three-level boost converter bandwidth improvement circuit, so as to achieve bandwidth improvement of the three-level boost converter;

[0080] in,

[0081] The virtual impedance circuit comprises:

[0082] The first impedance Z s , the first impedance Z s connected in series to the output end of the first overall circuit;

[0083] The second impedance Z p , the second impedance Z p In parallel with the first impedance Z s The output terminal.

[0084] Further, the device also includes a virtual impedance design unit;

[0085] The virtual impedance design unit comprises:

[0086] The first design unit is used to set the first impedance Z s Set as the first resistor R s ;

[0087] A second design unit is connected to the first design unit and is used to set the second impedance Z p Set to include the series inductor L p and the second resistor R p ;

[0088] Among them, the first resistor Rs It is a pure resistor.

[0089] Furthermore, the second design unit includes:

[0090] The first processing module is used to determine the PI proportional parameter V of the first overall circuit voltage loop pv_kp and PI integral parameter V pv_ki ; and, determining the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki ;

[0091] A first calculation module is connected to the first processing module and is used to calculate the voltage loop voltage according to the PI ratio parameter V pv_kp and PI integral parameter V pv_ki , and, according to the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki , calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl ;

[0092] The closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit is vpv_cl The calculation formula is as follows:

[0093]

[0094] In the formula, A=-R pv V dc i L_kp v pv_kp ,

[0095] B=-R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ,

[0096] C=-R pv V dc i L_ki v pv_ki ,

[0097]

[0098] G=-R pv V dc i L_ki v pv_ki ,

[0099] F=-V dc i L_ki -R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ;

[0100] Among them, R pv It represents the internal resistance of the equivalent Thevenin circuit of the PV module;

[0101] V dv Represents the external voltage value of the equivalent Thevenin circuit of the PV module;

[0102] T d Indicates extended time;

[0103] s represents the complex domain;

[0104] C i represents the compensation coefficient;

[0105] A second processing module is connected to the first calculation module and is used to calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter according to the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl Bode plot, set the second resistor R p ;

[0106] A second calculation module is connected to the second processing module and is used for calculating the value of the second resistor R p , calculate the inductance L p ;

[0107] A determination module, connected to the second calculation module, for determining whether the bandwidth improvement system of the three-level boost converter has achieved stable performance and a maximum voltage loop bandwidth;

[0108] A third processing module, connected to the determination module;

[0109] The third processing module is used to set the current second resistor R when the determination module determines that the three-level boost converter bandwidth improvement system has achieved stable performance and the voltage loop bandwidth is the largest. p The second resistor R p The second processing module is connected to the determination module, and is used to determine that the three-level boost converter bandwidth improvement system reaches unstable performance or the voltage loop bandwidth is not maximum, and then re-according to the closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit. vpv_cl Bode plot, set the second resistor Rp ;

[0110] A setting module connected to the third processing module is used to set the second resistor R p The target value is the second impedance R in the virtual impedance p , thus completing the second impedance R p settings.

[0111] Furthermore, the second calculation module includes:

[0112] The first processing submodule is used to determine the bandwidth f of the current loop of the bandwidth improvement circuit of the three-level boost converter cw ;

[0113] The second processing submodule is connected to the first processing submodule and is used to increase the bandwidth f of the circuit current loop according to the bandwidth of the three-level boost converter. cw , determine the cut-off frequency f cp ;

[0114] Among them, f cp >f cw ;

[0115] Cut-off frequency f cp It means that at 20log10(1 / R p )=-3dB, the second impedance Z p =R p +sL p The frequency at which the amplitude response reaches -3dB;

[0116] Cut-off frequency f cp The calculation formula is as follows:

[0117] f cp =R p / (2*π*L p );

[0118] The first calculation submodule is connected to the second processing submodule and is used to calculate the frequency of the second processing submodule according to the cutoff frequency f cp and the second resistor R p , calculate the inductance L p ;

[0119] Inductance L p The calculation formula is as follows:

[0120] L p =R p / (2*π*f cp ).

[0121] Furthermore, the second design unit also includes:

[0122] a fourth processing module, connected to the determination module, and used for calculating an equivalent circuit module;

[0123] The determination module determines whether the three-level boost converter bandwidth improvement system has achieved stable performance and the voltage loop bandwidth is the largest, based on the equivalent circuit model calculated by the fourth processing module;

[0124] The calculation formula of the equivalent circuit model is as follows:

[0125]

[0126] in,

[0127] Z eq It represents the equivalent impedance of the bandwidth improvement circuit of the three-level boost converter;

[0128] Z p represents the second impedance;

[0129] Z pv represents an equivalent impedance of the first overall circuit;

[0130] Z s represents the first impedance;

[0131] R p represents a second resistor;

[0132] L p represents inductance;

[0133] s represents the complex domain;

[0134] Z pv The calculation formula is as follows:

[0135]

[0136] in,

[0137] C in Indicates the capacitance value of the input capacitor;

[0138] R pv Indicates the dynamic resistance value of the PV module.

[0139] Furthermore, the design unit also includes:

[0140] A third design unit is connected to the first design unit and the second design unit respectively, and is used to design the first resistor R s The second resistor R p The relationship is as follows:

[0141] R s +R p=0;

[0142] In this formula, R s Represents the first resistor R s , R p Represents the second resistor R p .

[0143] In a fourth aspect, the present invention provides a photovoltaic system, the system comprising:

[0144] Photovoltaic panels, which convert solar energy into electricity;

[0145] A three-level boost converter bandwidth boost circuit designed by the design device for a three-level boost converter bandwidth boost circuit according to the third aspect, wherein an input end of the boost circuit is connected to a photovoltaic module;

[0146] Wherein, the three-level boost converter bandwidth improvement circuit is used to improve the bandwidth of the three-level boost converter and dynamically control the input photovoltaic voltage;

[0147] The energy storage device is connected to the output end of the bandwidth improvement circuit of the three-level boost converter and is used to store the electric energy converted by the photovoltaic module.

[0148] Beneficial effects of the present invention:

[0149] The present invention can improve the bandwidth of the three-level boost converter and dynamically control the input photovoltaic voltage, thereby improving the overall efficiency and stability of the photovoltaic system, which is of great significance to the photovoltaic system, as shown in the following specific performances:

[0150] 1. After the bandwidth of the three-level boost converter is improved by the present invention, the photovoltaic system can respond to input voltage or load changes more quickly, thereby maintaining a stable output, and can provide better transient response and reduce overshoot and oscillation.

[0151] 2. After the present invention improves the bandwidth of the three-level boost converter, the Boost converter can operate efficiently under rapidly changing working conditions, which helps to improve the overall energy conversion efficiency.

[0152] 3. The present invention can improve the phase margin of the photovoltaic system and reduce oscillation through the design of virtual impedance, thereby improving the overall stability.

[0153] 4. After the bandwidth of the three-level boost converter is improved, the photovoltaic system can still maintain good output performance under different load and environmental changes, thereby enhancing the adaptability and robustness of the system.

[0154] 5. The present invention can dynamically control the input photovoltaic voltage, improve the rapid response capability, and help reduce the thermal shock and electrical stress of the switching element, thereby extending the service life of the element.

[0155] 6. The present invention can significantly improve the voltage control bandwidth of the three-level boost for photovoltaics, allowing the system to respond to changes in input voltage more quickly and efficiently. This high bandwidth feature is beneficial to the active scheduling of photovoltaic string inverters and photovoltaic maximum power tracking (MPPT), ensuring that the photovoltaic system operates at the optimal operating point.

[0156] 7. The present invention enables the photovoltaic system to adjust the output power in real time under rapidly changing lighting conditions, thereby approaching the maximum power point more quickly, thereby increasing the energy output rate.

[0157] 8. The present invention has been repeatedly verified by experimental data and can be applied to string photovoltaic inverters and photovoltaic systems, thereby ensuring that it can meet actual operating needs and has good market prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0158] Figure 1 Schematic diagram of a design method for a bandwidth enhancement circuit of a three-level boost converter based on virtual impedance in an embodiment of the present invention;

[0159] Figure 2 is a schematic diagram of virtual impedance design in an embodiment of the present invention;

[0160] Figure 3 is a schematic diagram of a control loop of a virtual impedance in an embodiment of the present invention;

[0161] Figure 4 is a three-level boost voltage closed-loop Bode diagram in an embodiment of the present invention;

[0162] Figure 5 In the embodiment of the present invention Figure 4 A local enlarged view of the medium amplitude-frequency curve near [1,10] Hz;

[0163] Figure 6 is a three-level boost control loop in an embodiment of the present invention;

[0164] Figure 7 is the photovoltaic voltage V with virtual impedance in the embodiment of the present invention pv Voltage diagram for a step from 940V to 960V;

[0165] Figure 8 is the photovoltaic voltage V without virtual impedance in the embodiment of the present invention pv Voltage diagram for a step from 940V to 960V;

[0166] Fig. 9 is a schematic diagram of a design method for a virtual impedance circuit in an embodiment of the present invention;

[0167] Fig.10 Schematic diagram of a design device for a bandwidth enhancement circuit of a three-level boost converter in an embodiment of the present invention;

[0168] Among them, the figure numerals are: 10, determination unit, 20, design unit. DETAILED DESCRIPTION

[0169] In order to enable those skilled in the art to better understand the technical solution of the present invention, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0170] It should be understood that the specific embodiments and drawings described herein are only used to explain the present invention rather than to limit the present invention.

[0171] It can be understood that, in the absence of conflict, the various embodiments of the present invention and the various features in the embodiments can be combined with each other.

[0172] It can be understood that, for the convenience of description, the drawings of the present invention only show the parts related to the present invention, while the parts irrelevant to the present invention are not shown in the drawings.

[0173] It can be understood that each unit and module involved in the embodiments of the present invention may correspond to only one physical structure, or may be composed of multiple physical structures, or multiple units and modules may be integrated into one physical structure.

[0174] It can be understood that, without conflict, the functions and steps marked in the flowcharts and block diagrams of the present invention may occur in an order different from that marked in the drawings.

[0175] It is understood that the flowcharts and block diagrams of the present invention illustrate the possible architectures, functions, and operations of the systems, devices, equipment, and methods according to the various embodiments of the present invention. Each box in the flowchart or block diagram may represent a unit, module, program segment, or code, which contains executable instructions for implementing the specified functions. Moreover, each box or combination of boxes in the block diagram and flowchart may be implemented by a hardware-based system that implements the specified functions, or may be implemented by a combination of hardware and computer instructions.

[0176] It can be understood that the units and modules involved in the embodiments of the present invention can be implemented by software or hardware. For example, the units and modules can be located in a processor.

[0177] Embodiment 1:

[0178] like Fig. 9As shown, this embodiment provides a design method for a bandwidth improvement circuit of a three-level boost converter, the method is used in a photovoltaic system, and the design method includes the following steps:

[0179] Determine a first overall circuit; the first overall circuit is an input capacitor C of a three-level boost circuit in A circuit formed in parallel with the PV module;

[0180] The virtual impedance circuit is arranged at the output end of the first overall circuit to obtain a three-level boost converter bandwidth improvement circuit, so as to achieve bandwidth improvement of the three-level boost converter;

[0181] in,

[0182] like Figure 2 As shown, the virtual impedance circuit includes:

[0183] The first impedance Z s , the first impedance Z s connected in series to the output end of the first overall circuit;

[0184] The second impedance Z p , the second impedance Z p In parallel with the first impedance Z s The output terminal.

[0185] As a specific implementation, in the virtual impedance circuit, the first impedance Z s The first resistor R s , the second impedance Z p Including the series inductor L p and the second resistor R p ;

[0186] Among them, the first resistor R s It is a pure resistor.

[0187] In addition to this implementation, there are other implementations, such as setting the first impedance to be a composite resistor, or setting the first impedance to be a capacitor or an inductor, such as setting the inductor L p and the second resistor R p However, after repeated verification, this specific implementation is the best. The first resistor R s It is a pure resistor because it conforms to Ohm's law and its behavior is linear, which facilitates circuit analysis and design and reduces complexity.

[0188] As a specific implementation, before the virtual impedance circuit is arranged at the output end of the first overall circuit, the method further comprises: designing the virtual impedance circuit;

[0189] The designing of the virtual impedance circuit comprises: determining a second impedance Rp;

[0190] The determining of the second impedance Rp specifically comprises the following steps:

[0191] Step S1: Determine the PI proportional parameter V of the first overall circuit voltage loop pv_kp and PI integral parameter V pv_ki ; and, determining the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki .

[0192] Step S2: According to the PI proportional parameter V of the voltage loop of the first overall circuit pv_kp and PI integral parameter V pv_ki , and, according to the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki , calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl ;

[0193] The closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit is vpv_cl The calculation formula is as follows:

[0194]

[0195] In this formula, A=-R pv V dc i L_kp v pv_kp ,

[0196] B=-R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ,

[0197] C=-R pv V dc i L_ki v pv_ki ,

[0198]

[0199] G=-R pv V dc i L_ki v pv_ki ,

[0200] F=-V dc i L_ki -R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ;

[0201] Among them, R pv It represents the internal resistance of the equivalent Thevenin circuit of the PV module;

[0202] V dv Represents the external voltage value of the equivalent Thevenin circuit of the PV module;

[0203] T d Indicates extended time;

[0204] s represents the complex domain;

[0205] C i Indicates the compensation coefficient.

[0206] Step S3: Based on the closed-loop transfer function G of the voltage loop of the bandwidth increasing circuit of the three-level boost converter vpv_cl Bode plot, set the second resistor R p .

[0207] Step S4: According to the second resistor R p , calculate the inductance L p .

[0208] Specifically, in step S4, there are many ways to calculate the inductance Lp, such as based on the resonant frequency, based on the impedance calculation, using the phase angle, using the current and voltage characteristics, and simulation. However, as a specific implementation, step S4 specifically includes the following steps:

[0209] Step S41: Determine the bandwidth f of the current loop of the bandwidth enhancement circuit of the three-level boost converter cw ;

[0210] Step S42: Boost the bandwidth f of the current loop of the three-level boost converter bandwidth cw , determine the cut-off frequency f cp ;

[0211] Among them, f cp >f cw ;

[0212] Cut-off frequency f cp is 20log10(1 / R p )=-3dB, the second impedance Z p =Rp +sL p The frequency at which the amplitude response reaches -3dB; that is, 20log10(1 / R p )=-3dB corresponds to the frequency 1 / (R p +sL p ) cut-off frequency f cp ;

[0213] Cut-off frequency f cp The calculation formula is as follows:

[0214] f cp =R p / (2*π*L p );

[0215] Step S43: According to the cut-off frequency f cp and the second resistor R p , calculate the inductance L p ;

[0216] Inductance L p The calculation formula is as follows:

[0217] L p =R p / (2*π*fc cp ).

[0218] Step S5: determining whether the bandwidth improvement system of the three-level boost converter has achieved stable performance and a maximum voltage loop bandwidth;

[0219] If the three-level boost converter bandwidth improvement system achieves stable performance and the voltage loop bandwidth is maximized, the second resistor Rp is set to the second resistor Rp target value; if not, steps S3 to S5 are repeated until the three-level boost converter bandwidth improvement system achieves stable performance and the voltage loop bandwidth is maximized. The three-level boost converter bandwidth improvement system includes a three-level boost converter bandwidth improvement circuit.

[0220] Performance stability is determined by Bode plots; increasing the voltage loop bandwidth can improve the system response speed, but at the same time it will reduce system stability. It is necessary to find the optimal balance between bandwidth and stability. By gradually increasing the bandwidth, the maximum bandwidth point that can be achieved is found while ensuring system stability.

[0221] Specifically, in step S5, whether the bandwidth improvement system of the three-level boost converter has achieved stable performance and the voltage loop bandwidth is maximized is determined based on the equivalent circuit model;

[0222] The calculation formula of the equivalent circuit model is as follows:

[0223]

[0224] in,

[0225] Z eq It represents the equivalent impedance of the bandwidth improvement circuit of the three-level boost converter;

[0226] Z p represents the second impedance;

[0227] Z pv represents an equivalent impedance of the first overall circuit;

[0228] Z s represents the first impedance;

[0229] R p represents a second resistor;

[0230] L p represents inductance;

[0231] s represents the complex domain;

[0232] Z pv The calculation formula is as follows

[0233]

[0234] in,

[0235] C in Indicates the capacitance value of the input capacitor;

[0236] R pv Indicates the dynamic resistance value of the PV module.

[0237] As a specific implementation method, the first resistor R is designed s With the second resistor R p The relationship is as follows:

[0238] R s +R p =0;

[0239] In this formula, R s Represents the first resistor R s , R p Represents the second resistor R p .

[0240] The calculation formula of the equivalent circuit model is simplified to:

[0241]

[0242] Step S6: Setting the second resistor R p The target value is the second impedance R in the virtual impedancep , thus completing the second impedance R p design.

[0243] The method of this embodiment is used to improve the bandwidth of the three-level boost converter in Embodiment 1.

[0244] Embodiment 2:

[0245] like Figure 1 and Figure 3 As shown, this embodiment provides a design method for a three-level boost converter bandwidth improvement circuit based on virtual impedance, the method comprising the following steps:

[0246] Step 10: According to the output iv equation of the photovoltaic module, calculate the dynamic resistance R of the photovoltaic cell pv .

[0247] Step 10 specifically includes the following steps:

[0248] Step 101: Define the dynamic resistance R of the photovoltaic module pv , whose value is approximately the voltage small signal With current small signal The ratio of is expressed as formula (1):

[0249]

[0250] In the formula, is the voltage disturbance, is the current disturbance.

[0251] Step 102: Use the equation of the PV module IV curve to calculate the expression on both sides of the equation. pv Taking the derivative, we get dv pv / di pv The algebraic equation for dv pv / di pv expression.

[0252] i pv The expression of is shown in formula (2):

[0253]

[0254] In the formula, I s and I0 is the photovoltaic current and diode saturation current, V t is the thermal voltage, R s is the equivalent series resistance (i.e. the virtual resistance in series), R p is the equivalent parallel resistance (i.e., parallel virtual impedance Z p R p ).

[0255] dv pv / di pv The expression of is shown in formula (3):

[0256]

[0257] Where a is the thermal voltage coefficient.

[0258] Step 20: According to the required R pv , the iv nonlinear curve of the photovoltaic module is linearized at a certain steady-state operating point, and the small signal circuit of the photovoltaic module is equivalent to the Thevenin circuit, whose internal resistance is R pv , the external voltage is V pv .

[0259] Specifically, in step 20, at a given point (V pv , I pv ), its dynamic resistance is R pv , the photovoltaic module is modeled by small signal linearization, and the voltage expression of the photovoltaic module is obtained, that is, formula (4). It should be noted that according to the characteristics of the iv curve, R pv is a negative number, so -R pv The equivalent circuit model of the PV module after linearization is the Thevenin circuit.

[0260] v pv =V pv -R pv I pv -(-R pv i pv )=V eq -(-R pv i pv ) (4)

[0261] Where V eq is the equivalent voltage source, V eq =V pv -R pv *I pv .

[0262] Step 30: Connect the input capacitor C of the three-level boost circuit in Considering the PV module as a whole, the output impedance Zpv under the small signal model is obtained.

[0263] In step 30, the calculation of Zpv takes into account the three-level boost input capacitor Cin, and its expression is as follows (5):

[0264]

[0265] Step 40: Design a Suitable Virtual Series Resistor Zs and a suitable virtual parallel resistor R p With virtual parallel inductance L p , in Z pv The virtual resistor R is connected in series s , in R s The virtual impedance Z is connected in parallel p , where Z p By R p With L p The specific implementation method is to subtract the inductor current reference value flowing through Z from the inductor current reference value output by the voltage loop controller in the voltage and current dual loop control. p The current value i p , while i p By Z p Voltage value V p Multiply by 1 / (R p +sL p ) to obtain V p The photovoltaic voltage V pv Subtract the photovoltaic current i pv Multiply by the virtual resistance R s , which is V pv =V pv -i pv *R s .

[0266] Specifically, the steps in step 40 include:

[0267] Step 401: Parallel virtual impedance Z p =R p +sL p , its L p The effect is to make 1 / (R p +sL p ) is a first-order link, which has the function of passing low frequencies and blocking high frequencies, thereby limiting the response speed of the current reference value of the current loop when the photovoltaic voltage and current suddenly change. The parameter s is a complex domain. 20log10(1 / R p )=-3dB corresponds to the frequency 1 / (R p +sL p ) cut-off frequency f cp , f cp =R p / (2Pi*L p ), L p The design value of depends on the bandwidth f of the current loop. wc , f cp must be greater than the bandwidth of the current loop. Therefore, according to f wc Determine f cp The value of f cp , R p Calculate Lp The value of .

[0268] Step 402: From the formula, we know that Z pv With R pv When virtual impedance is added, Z pv Equivalent to Z eq , which is expressed as formula (6). According to the formula, when R s +R p = 0, Z eq The expression becomes formula (7). From formula (7), it can be seen that by controlling L p Can control sL p At what frequency can it be ignored? p After that, Z eq Approximately equal to R p , thus eliminating R pv The impact on the controlled object. Therefore, R s The design value is -R p , thereby weakening the voltage loop bandwidth range R pv For example, when L p < <R p When p can be ignored, then Z eq ≈R p .

[0269] Z eq The expressions are as follows:

[0270]

[0271] Step 403: R p The design principle is to maximize the bandwidth of the voltage loop while maintaining the stability of the control loop. First, according to the voltage loop and current loop control block diagram without adding virtual impedance, the transfer function of the voltage loop and the current loop is calculated. According to the Bode diagram of these transfer functions, the PI parameter V of the voltage loop is first determined. pv_kp 、V pv_ki , and the PI parameter i of the current loop L_kp 、i L_ki Then, according to the control loop after adding the virtual impedance, the closed-loop transfer function GV of the voltage loop is obtained. pv_cl ;

[0272] GV pv_cl The expression of is shown in formula (8).

[0273]

[0274] In the formula, A=-R pv Vdc i L_kp v pv_kp , B=-R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki , C=-R pv V dc i L_ ki v pv_ki , , G=-R pv V dc i L_ki v pv_ki , F=-V dc i L_ki -R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki .

[0275] like Figure 4 and Figure 5 As shown, Figure 5 for Figure 4 The local enlarged view of the medium amplitude-frequency curve near [1,10] Hz, according to G Vpv_cl From the Bode plot, we can see that R p The larger the value, the larger the bandwidth of the voltage loop, but the greater the gain of the resonance peak. p The value of G Vpv_cl The Bode diagram of R is used to select an initial value for experimental debugging. p There is a lower limit, too small R p This will result in the bandwidth of the voltage loop not being able to be increased and will cause i p If it is too large, the virtual impedance loop will be unstable.

[0276] Step 50: Sample the inductor current i of the three-level boost converter L and photovoltaic voltage V pv .

[0277] Step 60: Based on the traditional outer loop voltage loop and inner loop current loop control framework, the inner loop current loop is kept unchanged. By connecting a virtual resistor R s , the inductor current i L Converted into voltage V Rs , use V pv Subtract VRs Get the virtual parallel impedance Z p The voltage across the two ends is then divided by the virtual impedance Z p Thus, the current i flowing through the virtual parallel impedance is obtained p , and add this current to the output of the voltage loop controller to obtain the final current reference value taking into account the virtual impedance.

[0278] like Figure 7 and Figure 8 As shown, Figure 7 : is a voltage diagram of a photovoltaic voltage Vpv with virtual impedance in an embodiment of the present invention stepping from 940V to 960V, Figure 8 : is a voltage diagram of a photovoltaic voltage Vpv without virtual impedance in an embodiment of the present invention stepping from 940V to 960V, Figure 8 The photovoltaic voltage without virtual impedance in is equivalent to the photovoltaic voltage of the first overall circuit in Example 1. Figure 7 and Figure 8 , with virtual impedance, the time it takes to rise to 1V difference from the steady-state value is 1.4S; without virtual impedance, the time it takes to rise to 1V difference from the steady-state value is 2.2S. Figure 7 and Figure 8 It is obvious that with virtual impedance Figure 7 The voltage in the circuit is away from the steady-state value in a shorter time.

[0279] Step 70: Give the current reference value to the current loop, and the output value of the controller of the current loop is the output duty cycle d1 of the voltage loop and the current loop based on the virtual impedance.

[0280] Step 80: Use a conventional balancing loop, and the controller is a proportional controller k p , the voltage reference value is DC bus V dc The controller output value is half of d2.

[0281] Step 90: Using d1-d2 as the final duty cycle to drive the upper tube S1 of the three-level boost, and using d1+d2 as the final duty cycle to drive the lower tube S2 of the three-level boost.

[0282] Step 100: repeating steps 50 to 90 to dynamically control the input photovoltaic voltage of the three-level boost.

[0283] The method for improving the bandwidth of a three-level boost circuit based on virtual impedance in this embodiment (also referred to as a three-level boost bandwidth improvement method based on virtual impedance or a three-level boost bandwidth improvement method based on virtual impedance) comprises the following steps: first, the input capacitor and the PV module of the three-level boost circuit are regarded as a whole, and the output impedance Z under the small signal model is obtained.pv ; Secondly, give Z pv A virtual impedance Z is connected in series s , the virtual impedance is a pure resistance R s , in Z s A virtual impedance Z is connected in parallel behind p , the virtual impedance is composed of the inductor L p and resistor R p Finally, the equivalent output impedance Z with virtual impedance added can be obtained eq , due to Z s With Z p The effect of R pv The change of Z will not cause eq The virtual impedance design method can improve the bandwidth of the three-level boost converter and dynamically control the input photovoltaic voltage, thereby improving the overall efficiency and stability of the photovoltaic system.

[0284] This embodiment can implement the method in Embodiment 1.

[0285] Embodiment 3:

[0286] This embodiment provides a method for dynamically controlling the input photovoltaic voltage of a three-level boost, the method comprising the following steps:

[0287] Step K1: adopting the design method of the three-level boost converter bandwidth improvement circuit described in Example 1 to obtain a three-level boost converter bandwidth improvement circuit;

[0288] Step K2: obtaining an output duty cycle d1 of a current loop of a bandwidth enhancement circuit of a three-level boost converter for a photovoltaic system;

[0289] Step K3: obtaining an output value d2 of a controller in a three-level boost converter; the controller is a device for implementing PWM modulation and current loop control in a three-level boost converter for a photovoltaic system;

[0290] The calculation formula of the output value d2 of the controller is as follows:

[0291]

[0292] Among them, Kp is the proportionality coefficient, V actual is the actual measured voltage;

[0293] There is no fixed limit to the value range of Kp, which depends on the specific system design and control strategy. In specific implementation, the value of Kp is usually determined by experiment or simulation to meet the dynamic performance and steady-state accuracy required by the system.

[0294] Step K4: using d1-d2 as the final duty cycle to drive the upper tube S1 of the three-level boost converter, and using d1+d2 as the final duty cycle to drive the lower tube S2 of the three-level boost;

[0295] Step K5: repeating steps K2 to K4, thereby dynamically controlling the input photovoltaic voltage of the three-level boost.

[0296] Embodiment 4:

[0297] like Fig.10 As shown, this embodiment provides a design device for a bandwidth improvement circuit of a three-level boost converter, and the device is used in a photovoltaic system;

[0298] The device comprises:

[0299] The determining unit 10 is used to determine a first overall circuit; the first overall circuit is an input capacitor C of a three-level boost circuit. in A circuit formed in parallel with the PV module;

[0300] A design unit 20, connected to the determination unit, configured to set a virtual impedance circuit at an output end of the first overall circuit to obtain a three-level boost converter bandwidth improvement circuit, so as to achieve bandwidth improvement of the three-level boost converter;

[0301] in,

[0302] The virtual impedance circuit comprises:

[0303] The first impedance Z s , the first impedance Z s connected in series to the output end of the first overall circuit;

[0304] The second impedance Z p , the second impedance Z p In parallel with the first impedance Z s The output terminal.

[0305] As a specific implementation, the device further includes a virtual impedance design unit;

[0306] The virtual impedance design unit comprises:

[0307] The first design unit is used to set the first impedance Z s Set as the first resistor R s ;

[0308] A second design unit is connected to the first design unit and is used to set the second impedance Z p Set to include the series inductor L pand the second resistor R p ;

[0309] Among them, the first resistor R s It is a pure resistor.

[0310] As a specific implementation manner, the second design unit includes:

[0311] The first processing module is used to determine the PI proportional parameter V of the first overall circuit voltage loop pv_kp and PI integral parameter V pv_ki ; and, determining the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki ;

[0312] A first calculation module is connected to the first processing module and is used to calculate the voltage loop voltage according to the PI ratio parameter V pv_kp and PI integral parameter V pv_ki , and, according to the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki , calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl ;

[0313] The closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit is vpv_cl The calculation formula is as follows:

[0314]

[0315] In the formula, A=-R pv V dc i L_kp v pv_kp ,

[0316] B=-R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ,

[0317] C=-R pv V dc i L_ki v pv_ki ,

[0318]

[0319] G=-Rpv V dc i L_ki v pv_ki ,

[0320] F=-V dc i L_ki -R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ;

[0321] Among them, R pv It represents the internal resistance of the equivalent Thevenin circuit of the PV module;

[0322] V dv Represents the external voltage value of the equivalent Thevenin circuit of the PV module;

[0323] T d Indicates extended time;

[0324] s represents the complex domain;

[0325] C i represents the compensation coefficient;

[0326] A second processing module is connected to the first calculation module and is used to calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter according to the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl Bode plot, set the second resistor R p ;

[0327] A second calculation module is connected to the second processing module and is used for calculating the value of the second resistor R p , calculate the inductance L p ;

[0328] A determination module, connected to the second calculation module, for determining whether the bandwidth improvement system of the three-level boost converter has achieved stable performance and a maximum voltage loop bandwidth;

[0329] A third processing module, connected to the determination module;

[0330] The third processing module is used to set the current second resistor R when the determination module determines that the three-level boost converter bandwidth improvement system has achieved stable performance and the voltage loop bandwidth is the largest. p The second resistor R pThe second processing module is connected to the determination module, and is used to determine that the three-level boost converter bandwidth improvement system reaches unstable performance or the voltage loop bandwidth is not maximum, and then re-according to the closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit. vpv_cl Bode plot, set the second resistor R p ;

[0331] A setting module, connected to the third processing module, for setting the second resistor R p The target value is the second impedance R in the virtual impedance p , thus completing the second impedance R p settings.

[0332] As a specific implementation, the second calculation module includes:

[0333] The first processing submodule is used to determine the bandwidth f of the current loop of the bandwidth improvement circuit of the three-level boost converter cw ;

[0334] The second processing submodule is connected to the first processing submodule and is used to increase the bandwidth f of the circuit current loop according to the bandwidth of the three-level boost converter. cw , determine the cut-off frequency f cp ;

[0335] Among them, f cp >f cw ;

[0336] Cut-off frequency f cp It means that at 20log10(1 / R p )=-3dB, the second impedance Z p =R p +sL p The frequency at which the amplitude response reaches -3dB;

[0337] Cut-off frequency f cp The calculation formula is as follows:

[0338] f cp =R p / (2*π*L p );

[0339] The first calculation submodule is connected to the second processing submodule and is used to calculate the frequency of the second processing submodule according to the cutoff frequency f cp and the second resistor R p , calculate the inductance L p ;

[0340] Inductance L p The calculation formula is as follows:

[0341] L p =R p / (2*π*f co ).

[0342] As a specific implementation manner, the second design unit further includes:

[0343] a fourth processing module, connected to the determination module, and used for calculating an equivalent circuit module;

[0344] The determination module determines whether the three-level boost converter bandwidth improvement system has achieved stable performance and the voltage loop bandwidth is the largest, based on the equivalent circuit model calculated by the fourth processing module;

[0345] The calculation formula of the equivalent circuit model is as follows:

[0346]

[0347] in,

[0348] Z eq It represents the equivalent impedance of the bandwidth improvement circuit of the three-level boost converter;

[0349] Z p represents the second impedance;

[0350] Z pv represents an equivalent impedance of the first overall circuit;

[0351] Z s represents the first impedance;

[0352] R p represents a second resistor;

[0353] L p represents inductance;

[0354] s represents the complex domain;

[0355] Z pv The calculation formula is as follows:

[0356]

[0357] in,

[0358] C in Indicates the capacitance value of the input capacitor;

[0359] R pv Indicates the dynamic resistance value of the PV module.

[0360] Furthermore, the design unit also includes:

[0361] A third design unit is connected to the first design unit and the second design unit respectively, and is used to design the first resistor R s With the second resistor R p The relationship is as follows:

[0362] R s +R p =0;

[0363] In this formula, R s Represents the first resistor R s , R p Represents the second resistor R p .

[0364] The device of this embodiment can execute the method in embodiment 1.

[0365] Embodiment 5:

[0366] This embodiment provides a photovoltaic system, the system comprising:

[0367] Photovoltaic panels, which convert solar energy into electricity;

[0368] A three-level boost converter bandwidth boost circuit designed by the design device for a three-level boost converter bandwidth boost circuit described in Example 4, wherein an input end of the boost circuit is connected to a photovoltaic module;

[0369] Wherein, the three-level boost converter bandwidth improvement circuit is used to improve the bandwidth of the three-level boost converter and dynamically control the input photovoltaic voltage;

[0370] The energy storage device is connected to the output end of the bandwidth improvement circuit of the three-level boost converter and is used to store the electric energy converted by the photovoltaic module.

[0371] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A design method for a bandwidth enhancement circuit for a three-level boost converter. It is characterized in that The method is used for a photovoltaic system, and comprises the following steps: Determine a first overall circuit; the first overall circuit is an input capacitor C of a three-level boost circuit in A circuit formed in parallel with the PV module; The virtual impedance circuit is arranged at the output end of the first overall circuit to obtain a three-level boost converter bandwidth improvement circuit, so as to achieve bandwidth improvement of the three-level boost converter; in, The virtual impedance circuit comprises: The first impedance Z s , the first impedance Z s connected in series to the output end of the first overall circuit; The second impedance Z p , the second impedance Z p In parallel with the first impedance Z s The output terminal.

2. The design method of the three-level boost converter bandwidth improvement circuit according to claim 1, It is characterized in that In the virtual impedance circuit, the first impedance Z s The first resistor R s , the second impedance Z p Including the series inductor L p and the second resistor R p ; Among them, the first resistor R s It is a pure resistor.

3. The design method of the three-level boost converter bandwidth improvement circuit according to claim 2, It is characterized in that Before arranging the virtual impedance circuit at the output end of the first overall circuit, the method further comprises: designing the virtual impedance circuit; The designing of the virtual impedance circuit comprises: determining a second impedance Rp; The determining of the second impedance Rp specifically comprises the following steps: Step S1: Determine the PI proportional parameter V of the first overall circuit voltage loop pv_kp and PI integral parameter V pv_ki ; and, determining the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki ; Step S2: According to the PI proportional parameter V of the voltage loop of the first overall circuit pv_kp and PI integral parameter V pv_ki , and, according to the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki , calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl ; The closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit is vpv_cl The calculation formula is as follows: In formula (1), A=-R pv V dc i L_kp v pv_kp , B=-R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki , G=-R pv V dc i L_ki v pv_ki , F=-V dc i L_ki -R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ; Among them, R pv It represents the internal resistance of the equivalent Thevenin circuit of the PV module; V dv Represents the external voltage value of the equivalent Thevenin circuit of the PV module; T d Indicates extended time; s represents the complex domain; C i represents the compensation coefficient; Step S3: Based on the closed-loop transfer function G of the voltage loop of the bandwidth increasing circuit of the three-level boost converter vpv_cl Bode plot, set the second resistor R p ; Step S4: According to the second resistor R p , calculate the inductance L p ; Step S5: determining whether the three-level boost converter bandwidth improvement system has achieved stable performance and the voltage loop bandwidth is maximum; the three-level boost converter bandwidth improvement system includes the three-level boost converter bandwidth improvement circuit; If the three-level boost converter bandwidth improvement system reaches stable performance and the voltage loop bandwidth is maximized, then the current second resistor R p The second resistor R p target value; if not, repeating steps S3 to S5 until the three-level boost converter bandwidth improvement system reaches stable performance and the voltage loop bandwidth is maximized; Step S6: Setting the second resistor R p The target value is the second impedance R in the virtual impedance p , thus completing the second impedance R p design.

4. The design method of the three-level boost converter bandwidth improvement circuit according to claim 3, It is characterized in that The step S4 specifically comprises the following steps: Step S41: Determine the bandwidth f of the current loop of the bandwidth enhancement circuit of the three-level boost converter cw ; Step S42: Boost the bandwidth f of the current loop of the three-level boost converter bandwidth cw , determine the cut-off frequency f cp ; Among them, f cp >f cw ; Cut-off frequency f cp is 20log10(1 / R p )=-3dB, the second impedance Z p =R p +sL p The frequency at which the amplitude response reaches -3dB; Cut-off frequency f cp The calculation formula is as follows: f cp =R p / (2*π*L p ) (2); Step S43: According to the cut-off frequency f cp and the second resistor R p , calculate the inductance L p ; Inductance L p The calculation formula is as follows: L p =R p / (2*π*f cp ) (3).

5. The design method of the three-level boost converter bandwidth improvement circuit according to claim 3, It is characterized in that In the step S5, whether the bandwidth improvement system of the three-level boost converter has achieved stable performance and the voltage loop bandwidth is maximized is determined based on the equivalent circuit model; The calculation formula of the equivalent circuit model is as follows: in, Z eq It represents the equivalent impedance of the bandwidth improvement circuit of the three-level boost converter; Z p represents the second impedance; Z pv represents an equivalent impedance of the first overall circuit; Z s represents the first impedance; R p represents a second resistor; L p represents inductance; s represents the complex domain; Z pv The calculation formula is as follows: in, C in Indicates the capacitance value of the input capacitor; R pv Indicates the dynamic resistance value of the PV module.

6. The design method of a three-level boost converter bandwidth enhancement circuit according to any one of claims 2 to 5, It is characterized in that The first resistor R s With the second resistor R p The relationship is as follows: R s +R p =0; Among them, R s Represents the first resistor R s , R p Represents the second resistor R p .

7. A method for dynamically controlling the input photovoltaic voltage of a three-level boost, It is characterized in that The method comprises the following steps: Step K1: adopting the design method of the three-level boost converter bandwidth improvement circuit according to any one of claims 1 to 6 to obtain a three-level boost converter bandwidth improvement circuit; Step K2: Obtain the output duty cycle d of the current loop of the bandwidth improvement circuit of the three-level boost converter for the photovoltaic system 1 ; Step K3: Obtain the output value d of the controller in the three-level boost converter 2 ; The output value d of the controller 2 The calculation formula is as follows: Among them, Kp is the proportionality coefficient, V actual is the actual measured voltage; Step K4: 1 -d 2 As the final duty cycle, it is used to drive the upper tube S of the three-level boost converter. 1 , d 1 +d 2 As the final duty cycle, it is used to drive the lower tube S of the three-level boost 2 ; Step K5: repeating steps K2 to K4, thereby dynamically controlling the input photovoltaic voltage of the three-level boost.

8. A design device for a three-level boost converter bandwidth enhancement circuit. It is characterized in that The device is used in a photovoltaic system; the device comprises: A determining unit, configured to determine a first overall circuit; the first overall circuit is an input capacitor C of a three-level boost circuit in A circuit formed in parallel with the PV module; a design unit connected to the determination unit, and configured to set a virtual impedance circuit at an output end of the first overall circuit to obtain a three-level boost converter bandwidth improvement circuit, so as to achieve bandwidth improvement of the three-level boost converter; in, The virtual impedance circuit comprises: The first impedance Z s , the first impedance Z s connected in series to the output end of the first overall circuit; The second impedance Z p , the second impedance Z p In parallel with the first impedance Z s The output terminal.

9. The design device for a three-level boost converter bandwidth enhancement circuit according to claim 8, It is characterized in that The device also includes a virtual impedance design unit; The virtual impedance design unit comprises: The first design unit is used to set the first impedance Z s Set as the first resistor R s ; A second design unit is connected to the first design unit and is used to set the second impedance Z p Set to include the series inductor L p and the second resistor R p ; Among them, the first resistor R s It is a pure resistor.

10. The design device for a three-level boost converter bandwidth enhancement circuit according to claim 9, It is characterized in that The second design unit comprises: The first processing module is used to determine the PI proportional parameter V of the first overall circuit voltage loop pv_kp and PI integral parameter V pv_ki ; and, determining the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki ; A first calculation module is connected to the first processing module and is used to calculate the voltage loop voltage according to the PI ratio parameter V pv_kp and PI integral parameter V pv_ki , and, according to the PI proportional parameter i of the first overall circuit current loop L_kp and PI integral parameter i L_ki , calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl ; The closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit is vpv_cl The calculation formula is as follows: In the formula, A=-R pv V dc i L_kp v pv_kp , B=-R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki , G=-R pv V dc i L_ki v pv_ki , F=-V dc i L_ki -R pv V dc i L_ki v pv_kp -R pv V dc i L_kp v pv_ki ; Among them, R pv It represents the internal resistance of the equivalent Thevenin circuit of the PV module; V dv Represents the external voltage value of the equivalent Thevenin circuit of the PV module; T d Indicates extended time; s represents the complex domain; C i represents the compensation coefficient; A second processing module is connected to the first calculation module and is used to calculate the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter according to the closed-loop transfer function G of the voltage loop of the bandwidth improvement circuit of the three-level boost converter vpv_cl Bode plot, set the second resistor R p ; A second calculation module is connected to the second processing module and is used to calculate the value of the second resistor R p , calculate the inductance L p ; A determination module, connected to the second calculation module, for determining whether the bandwidth improvement system of the three-level boost converter has achieved stable performance and a maximum voltage loop bandwidth; A third processing module, connected to the determination module; The third processing module is used to set the current second resistor R when the determination module determines that the three-level boost converter bandwidth improvement system has achieved stable performance and the voltage loop bandwidth is the largest. p The second resistor R p The second processing module is connected to the determination module, and is used to determine that the three-level boost converter bandwidth improvement system reaches unstable performance or the voltage loop bandwidth is not maximum, and then re-according to the closed-loop transfer function G of the voltage loop of the three-level boost converter bandwidth improvement circuit. vpv_cl Bode plot, set the second resistor R p ; A setting module connected to the third processing module is used to set the second resistor R p The target value is the second impedance R in the virtual impedance p , thus completing the second impedance R p settings.

11. The design device for a three-level boost converter bandwidth enhancement circuit according to claim 10, It is characterized in that The second calculation module includes: The first processing submodule is used to determine the bandwidth f of the current loop of the bandwidth improvement circuit of the three-level boost converter cw ; The second processing submodule is connected to the first processing submodule and is used to increase the bandwidth f of the circuit current loop according to the bandwidth of the three-level boost converter. cw , determine the cut-off frequency f cp ; Among them, f cp >f cw ; Cut-off frequency f cp It means that at 20log10(1 / R p )=-3dB, the second impedance Z p =R p +sL p The frequency at which the amplitude response reaches -3dB; Cut-off frequency f cp The calculation formula is as follows: f co =R p / (2*π*L p ); The first calculation submodule is connected to the second processing submodule and is used to calculate the frequency of the second processing submodule according to the cutoff frequency f cp and the second resistor R p , calculate the inductance L p ; Inductance L p The calculation formula is as follows: L p =R p / (2*π*f co )。 12. The design device for a three-level boost converter bandwidth enhancement circuit according to claim 10, It is characterized in that The second design unit also includes: a fourth processing module, connected to the determination module, and used for calculating an equivalent circuit module; The determination module determines whether the three-level boost converter bandwidth improvement system has achieved stable performance and the voltage loop bandwidth is the largest, based on the equivalent circuit model calculated by the fourth processing module; The calculation formula of the equivalent circuit model is as follows: in, Z eq It represents the equivalent impedance of the bandwidth improvement circuit of the three-level boost converter; Z p represents the second impedance; Z pv represents an equivalent impedance of the first overall circuit; Z s represents the first impedance; R p represents a second resistor; L p represents inductance; s represents the complex domain; Z pv The calculation formula is as follows: in, C in Indicates the capacitance value of the input capacitor; R pv Indicates the dynamic resistance value of the PV module.

13. The design device for a three-level boost converter bandwidth enhancement circuit according to any one of claims 9 to 12, It is characterized in that The design unit also includes: A third design unit is connected to the first design unit and the second design unit respectively, and is used to design the first resistor R s With the second resistor R p The relationship is as follows: R s +R p =0; Among them, R s Represents the first resistor R s , R p Represents the second resistor R p .

14. A photovoltaic system, It is characterized in that Photovoltaic panels, which convert solar energy into electricity; A three-level boost converter bandwidth boost circuit designed by the design device for a three-level boost converter bandwidth boost circuit according to any one of claims 8 to 13, wherein an input end of the boost circuit is connected to a photovoltaic module; Wherein, the three-level boost converter bandwidth improvement circuit is used to improve the bandwidth of the three-level boost converter and dynamically control the input photovoltaic voltage; The energy storage device is connected to the output end of the bandwidth improvement circuit of the three-level boost converter and is used to store the electric energy converted by the photovoltaic module.

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