Control method and control circuit of switching power supply and switching power supply

Abstract

The invention discloses a control method and a control circuit of a switching power supply and the switching power supply, the switching frequency of the switching power supply is controlled to jitter periodically, one jitter period comprises more than or equal to two time intervals, and each time interval comprises a first time period and a second time period. The switching frequency of the switching power supply in the first time period is smaller than the switching frequency of the switching power supply in the second time period, and the switching frequencies in the first time periods including at least two time intervals are not equal, and / or the switching frequencies in the second time periods including at least two time intervals are not equal; wherein the absolute value of the difference value between the average output power of the switching power supply in each time interval and the average output power of the switching power supply is smaller than or equal to a first preset value. And output power balance is achieved in each time interval, EMI is optimized, and the problem of large output ripples can be effectively avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a control method, a control circuit and a switching power supply. Background Art

[0002] by Figure 1 A switching power supply including a flyback converter is shown as an example. The flyback converter includes an isolation device (transformer T1), and the transformer T1 includes a primary winding Np and a secondary winding Ns. The flyback converter also includes a first power tube Q1 located on the primary side and connected to the primary winding Np, and a second power tube Q2 located on the secondary side and connected to the secondary winding Ns. The control circuit includes a primary control circuit 100 and a secondary control circuit 200, and no additional isolation module is required between the two. The secondary control circuit 200 controls the switching frequency of the system according to the compensation signal; the primary control circuit performs primary peak current control by detecting the switching frequency of the system.

[0003] The control method of triangular wave jitter of the switching frequency by using the prior art is used for Figure 1 When the switching power supply shown in the figure is controlled, the waveform is as follows Figure 2a As shown, Fsw represents the switching frequency, Vcs_peak represents the peak sampling voltage, Pout represents the output power, and Vout(ac) represents the output voltage ripple. In one embodiment, the sampling resistor Rcs connected in series with the first power tube Q1 can be used to sample the current flowing through the first power tube Q1 to obtain the sampling voltage Vcs. The sampling voltage Vcs is compared with the peak sampling voltage Vcs_peak to obtain a shutdown control signal for controlling the shutdown of the first power tube Q1, thereby realizing the primary side peak current control. Therefore, the waveform of the peak sampling voltage Vcs_peak in the figure can represent the waveform of the primary side peak current. Since the current primary side control circuit 100 controls the primary side peak current by detecting the switching frequency of the system, the jitter direction of the primary side peak current will follow the jitter direction of the switching frequency Fsw, which will cause the output power Pout to fluctuate more and the output voltage ripple Vout(ac) to be larger. Therefore, the existing solution of performing triangular wave jitter on the switching frequency Fsw is not suitable for application in such as Figure 1 As for the flyback converter with an additional isolation module between the primary control circuit 100 and the secondary control circuit 200, the primary control circuit 100 and the secondary control circuit 200 can communicate with each other through the additional isolation module. The waveform diagram under another control method is shown as follows Figure 2bAs shown, the switching frequency Fsw is jittered in a triangular wave manner, and at the same time, the primary peak current is jittered in the opposite direction of the switching frequency jitter, thereby offsetting the fluctuation of the output power Pout and reducing the output voltage ripple Vout (ac). However, this control method cannot be used in a flyback converter without an additional isolation module, and adding an additional isolation module will result in high costs.

[0004] In addition, for any type of switching power supply, when the switching frequency Fsw is triangular-wave jittered using the existing technology, low-frequency jitter ripple will be introduced. When the low-frequency jitter is within the system bandwidth, the internal compensation will suppress the jitter effect, and the purpose of optimizing EMI cannot be achieved. Summary of the invention

[0005] In view of this, the purpose of the present invention is to provide a control method, a control circuit and a switching power supply of a switching power supply to solve the following technical problems: in a flyback switching power supply without an additional isolation module, when the switching frequency of the flyback converter is triangularly jittered using the prior art, it will cause a large output voltage ripple or a high system cost. Technical problems; in any type of switching power supply, when the switching frequency of the switching power supply is triangularly jittered using the prior art, a low-frequency jitter ripple will be introduced. When the triangular wave low-frequency jitter is within the system bandwidth, the technical problem of EMI cannot be well optimized.

[0006] The technical solution of the present invention is to provide a control method for a switching power supply, the control method comprising: controlling the switching frequency of the switching power supply to periodically jitter, wherein one jitter period includes greater than or equal to two time intervals, each of the time intervals includes a first time period and a second time period, the switching frequency of the switching power supply in the first time period is less than the switching frequency in the second time period, and the switching frequencies in each of the first time periods including at least two time intervals are not equal, and / or the switching frequencies in each of the second time periods including at least two time intervals are not equal;

[0007] Wherein, the absolute value of the difference between the average output power of the switching power supply in each of the time intervals and the average output power of the switching power supply is less than or equal to a first preset value.

[0008] Optionally, the average output power of the switching power supply in each of the time intervals is equal to the average output power of the switching power supply.

[0009] Optionally, the time of each time interval is equal.

[0010] Optionally, the number of switching cycles of the switching power supply in each time interval is equal.

[0011] Optionally, the first time period and the second time period in one time interval are equal.

[0012] Optionally, the number of switching cycles of the switching power supply in the first time period and the second time period within one time interval is equal.

[0013] Optionally, within one of the jitter cycles, a difference between a switching frequency of the switching power supply in the second time period and a switching frequency of the switching power supply in the first time period gradually increases, or gradually decreases, or first increases and then decreases, or first decreases and then increases over time.

[0014] Optionally, the switching frequency of the switching power supply in the first time period is lower than a reference switching frequency, and the switching frequency in the second time period is higher than the reference switching frequency;

[0015] The reference switching frequency is an average switching frequency of the switching power supply.

[0016] Optionally, within one of the time intervals, an absolute value of a difference between a switching frequency of the switching power supply in the first time period and the reference switching frequency is close to or equal to a difference between a switching frequency of the switching power supply in the second time period and the reference switching frequency.

[0017] Optionally, the switching power supply includes a quasi-resonant flyback converter, and the control method includes controlling the periodic jitter of the peak current flowing through the primary side of the quasi-resonant flyback converter to control the periodic jitter of the switching frequency of the quasi-resonant flyback converter.

[0018] In a second aspect, the present invention further provides a control circuit of a switching power supply, wherein the control circuit controls the switching frequency of the switching power supply to periodically jitter, wherein a jitter cycle includes greater than or equal to two time intervals, each of the time intervals includes a first time period and a second time period, the switching frequency of the switching power supply in the first time period is less than the switching frequency in the second time period, and the switching frequencies in each of the first time periods of at least two time intervals are not equal, and / or the switching frequencies in each of the second time periods of at least two time intervals are not equal; wherein the absolute value of the difference between the average output power of the switching power supply in each of the time intervals and the average output power of the switching power supply is less than or equal to a first preset value, and the control circuit includes:

[0019] A first jitter signal generating circuit to output a first jitter signal with periodic jitter;

[0020] The control circuit generates a control signal according to the first jitter signal, and controls the on and off of the power tube in the switching power supply according to the control signal, so as to control the periodic jitter of the switching frequency of the switching power supply.

[0021] Optionally, the control circuit generates a first jitter current signal according to the first jitter signal, and the control circuit includes:

[0022] A first capacitor, receiving the first jitter current signal to obtain a first charging voltage;

[0023] a first comparison circuit, for comparing the first charging voltage with a first reference voltage to output a conduction control signal;

[0024] a first switch connected in parallel with the first capacitor, wherein the first switch resets the first charging voltage according to the conduction control signal;

[0025] The control circuit controls the conduction of the power tube according to the conduction control signal.

[0026] Optionally, the switching power supply includes a flyback converter, the control circuit includes a secondary side control circuit, and the secondary side control circuit includes the first jitter signal generating circuit.

[0027] The secondary side control circuit generates a conduction control signal according to the first jitter signal output by the first jitter signal generating circuit, and controls the conduction of the second power tube according to the conduction control signal, so as to control the periodic jitter of the switching frequency of the flyback converter;

[0028] Wherein, the second power tube is a power tube located at the secondary side of the flyback converter.

[0029] Optionally, the switching power supply includes a quasi-resonant flyback converter, the control circuit includes a primary side control circuit, and the primary side control circuit includes the first jitter signal generating circuit.

[0030] The primary side control circuit controls the periodic jitter of the peak current flowing through the primary side of the quasi-resonant flyback converter according to the first jitter signal output by the first jitter signal generating circuit, so as to control the periodic jitter of the switching frequency of the quasi-resonant flyback converter.

[0031] Optionally, the primary side control circuit includes:

[0032] a second comparison circuit, for comparing the first jitter signal with the current sampling signal to output a shutdown control signal;

[0033] The primary side control circuit controls the shutdown of the first power tube according to the shutdown control signal;

[0034] The current sampling signal represents the current flowing through the primary side of the quasi-resonant flyback converter, and the first power tube is a power tube located on the primary side of the quasi-resonant flyback converter.

[0035] Optionally, the first jitter signal generating circuit controls the periodic jitter of the first jitter signal according to a switching frequency of the switching power supply.

[0036] Optionally, the first jitter signal generating circuit outputs the first jitter signal according to the compensation signal;

[0037] The compensation signal represents the error between the output feedback signal of the switching power supply and the reference signal.

[0038] Optionally, the first jitter signal generating circuit includes:

[0039] A first current source generates a first current;

[0040] A first resistor network, a first end of which receives the first current, a second end of which is connected to a reference ground, and an equivalent resistance value of the first resistor network periodically jitters;

[0041] The first jitter signal generating circuit outputs the first jitter signal according to the voltage of the first end of the first resistor network.

[0042] Optionally, the first current source generates the first current according to a compensation signal;

[0043] The compensation signal represents the error between the output feedback signal of the switching power supply and the reference signal.

[0044] Optionally, the equivalent resistance value of the first resistor network is controlled to periodically jitter according to a switching frequency of the switching power supply.

[0045] Optionally, the first jitter signal generating circuit includes:

[0046] A first current source generates a first current;

[0047] A second current unit, used for outputting a second current, wherein the second current periodically jitters;

[0048] The first jitter signal is output according to the sum of the first current and the second current, or the difference between the first current and the second current.

[0049] In a third aspect, the present invention further provides a switching power supply, comprising the control circuit.

[0050] Compared with the prior art, the control method and control circuit of the present invention have the following advantages: the switching frequency of the switching power supply is controlled to be periodically jittered, and one jitter cycle includes greater than or equal to two time intervals, each of the time intervals includes a first time period and a second time period, the switching frequency of the switching power supply in the first time period is less than the switching frequency in the second time period, and the switching frequencies in each of the first time periods of at least two time intervals are unequal, and / or the switching frequencies in each of the second time periods of at least two time intervals are unequal; the average output power of the switching power supply in each of the time intervals is equal to or close to the average output power of the switching power supply. The shape of the periodic jitter of the switching frequency of the switching power supply of the present invention is different from the triangular wave jitter waveform in the prior art. When the control method and control circuit of the present invention are applied to a flyback switching power supply without an additional isolation module, the output power balance is achieved or nearly achieved in each time interval, which can effectively avoid the problem of large output voltage ripple without affecting the frequency jitter effect. In addition, since no additional isolation module is required, the system cost is low. When the control method and control circuit of the present invention are applied to any type of switching power supply, the output power balance is achieved in each time interval, the output voltage ripple is small, and the output power fluctuation frequency of the switching power supply is higher, and the EMI optimization effect is more obvious. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 A schematic diagram of a circuit structure of a switching power supply;

[0052] Figure 2a Based on Figure 1 A waveform diagram of a switching power supply under a control method in the prior art;

[0053] Figure 2b A waveform diagram of another switching power supply under another control method in the prior art;

[0054] Figure 3a Based on Figure 1 A schematic diagram of the waveform of the switching power supply under the first control method of the present invention;

[0055] Figure 3b For Figure 3a A partial enlarged view of

[0056] Figure 4a Schematic diagram of the circuit structure of the secondary side control circuit of the first embodiment of the present invention;

[0057] Figure 4b Schematic diagram of the circuit structure of the secondary side control circuit of the second embodiment of the present invention;

[0058] Figure 5 Based on Figure 1A schematic diagram of waveforms of a switching power supply under the second control method of the present invention;

[0059] Figure 6 Schematic diagram of the circuit structure of the primary side control circuit of the third embodiment of the present invention;

[0060] Figure 7a is a circuit structure diagram of a first embodiment of a first jitter signal generating circuit of the present invention;

[0061] Figure 7b Based on Figure 7a Waveform diagram of ;

[0062] Figure 8 FIG. 4 is a schematic diagram of the circuit structure of the second embodiment of the first jitter signal generating circuit of the present invention. DETAILED DESCRIPTION

[0063] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitution, modification, equivalent method and scheme made within the spirit and scope of the present invention.

[0064] In order to make the public have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, but those skilled in the art can fully understand the present invention without these detailed descriptions.

[0065] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the accompanying drawings are all simplified and not in exact proportion, and are only used for the purpose of conveniently and clearly assisting in explaining the embodiments of the present invention.

[0066] Figure 3a Shown according to Figure 1 The waveform diagram of the switching power supply under the first control method. Figure 3b Yes Figure 3a The local amplification of Fsw, Vcs_peak, Pout, and Vout(ac) is the same as that in Figure 2a The same as in the Figure 3a and Figure 3bThe control method of this embodiment includes controlling the switching frequency Fsw of the switching power supply to periodically jitter, wherein a jitter period Tf includes greater than or equal to two time intervals (T1, T2, ...T5, ...T9), each of the time intervals includes a first time period (T11, T21, ...T51, ...T91) and a second time period (T12, T22, ...T52, ...T92), the switching frequency of the switching power supply in the first time period is less than the switching frequency in the second time period, and the switching frequencies in each of the first time periods of at least two time intervals are not equal, and / or the switching frequencies in each of the second time periods of at least two time intervals are not equal; wherein the absolute value of the difference between the average output power of the switching power supply in each of the time intervals and the average output power Pa of the switching power supply is less than or equal to a first preset value, that is, the average output power of the switching power supply in each of the time intervals is equal to or nearly equal to the average output power Pa of the switching power supply. In a preferred embodiment, the switching frequency can be controlled so that the average output power of the switching power supply in each time interval is equal to the average output power Pa of the switching power supply. Figure 1 The secondary control circuit 200 in the system controls the switching frequency Fsw of the system according to the compensation signal; the primary control circuit 100 performs primary peak current control by detecting the switching frequency Fsw of the system, so Figure 3a and Figure 3bIn the embodiment, the jitter direction of the primary peak current will follow the jitter direction of the switching frequency Fsw, wherein the waveform of the peak sampling voltage Vcs_peak is the waveform that characterizes the primary peak current. Since the jitter direction of the primary peak current is the same as the jitter direction of the switching frequency Fsw, the jitter direction of the output power Pout is the same as the jitter direction of the switching frequency Fsw. Specifically, in one embodiment, the time of each time interval can be set to be equal; in another embodiment, the number of switching cycles of the switching power supply in each time interval can also be set to be equal. For example, when each time interval in a jitter cycle Tf is set to include only the first time period and the second time period, and the first time period and the second time period each include only one switching cycle of the switching power supply, the output power Pout will jitter up and down once or up and down once in each time interval, that is, the jitter frequency of the output power Pout can reach half of the switching frequency of the switching power supply. Further, in one embodiment, the time of the first time period and the second time period in a time interval can be set to be equal; in one embodiment, the number of switching cycles of the switching power supply in the first time period and the second time period in a time interval can also be set to be equal. In a jitter cycle, the difference between the switching frequency of the switching power supply in the second time period and the switching frequency in the first time period may change randomly or regularly over time. For example, in one embodiment, in a jitter cycle, the difference between the switching frequency of the switching power supply in the second time period and the switching frequency in the first time period first increases and then decreases over time (e.g. Figure 3a The jitter period Tf shown in FIG. 1 ) may decrease first and then increase over time (e.g. Figure 3a The jitter period represented by the time period t1 to t2 shown in the figure can, of course, also be set to gradually increase with the time interval, or gradually decrease with the time interval. Further, the switching frequency of the switching power supply is controlled to be less than the reference switching frequency Fa in the first time period, and the switching frequency in the second time period is greater than the reference switching frequency Fa; wherein the reference switching frequency Fa is the average switching frequency of the switching power supply. Furthermore, in one embodiment, within a time interval, the absolute value of the difference between the switching frequency of the switching power supply in the first time period and the reference switching frequency Fa is close to or equal to the difference between the switching frequency in the second time period and the reference switching frequency Fa.

[0067] It is easy to understand that the control method of this embodiment is also applicable to a flyback switching power supply with an additional isolation module. When applied to a flyback switching power supply with an additional isolation module, the jitter waveform of the switching frequency Fsw is similar to Figure 3a The jitter waveform of the switching frequency Fsw in the embodiment is the same, and whether the primary peak current jitters and the jitter waveform when jittering can be different in different embodiments. Figure 3aThe same may also be different. For example, in one embodiment, an additional isolation module may be used to transmit a compensation signal to the primary control circuit, and the primary control circuit controls the primary peak current according to the compensation signal, that is, in this embodiment, the primary peak current does not follow the periodic jitter of the switching frequency Fsw; in another embodiment, an additional isolation module may be used to transmit signals between the primary control circuit and the secondary control circuit, and the primary control circuit controls the primary peak current in the opposite direction of the jitter of the switching frequency. It is also easy to understand that the control method of this embodiment is also applicable to switching power supplies of any topology, including but not limited to BUCK, BOOST, BUCK-BOOST and other topologies.

[0068] The present invention also provides a control circuit of a switching power supply, wherein the control circuit controls the switching frequency of the switching power supply to periodically jitter, wherein a jitter cycle includes greater than or equal to two time intervals, each of the time intervals includes a first time period and a second time period, the switching frequency of the switching power supply in the first time period is less than the switching frequency in the second time period, and the switching frequencies in each of the first time periods of at least two time intervals are not equal, and / or the switching frequencies in each of the second time periods of at least two time intervals are not equal; wherein the absolute value of the difference between the average output power of the switching power supply in each of the time intervals and the average output power of the switching power supply is less than or equal to a first preset value, with reference to Figure 4a , Figure 4b and Figure 6 The control circuit includes: a first jitter signal generating circuit U1 to output a first jitter signal with periodic jitter; the control circuit generates a control signal according to the first jitter signal, and controls the on and off of the power tube in the switching power supply according to the control signal to control the periodic jitter of the switching frequency of the switching power supply.

[0069] Figure 4a FIG. 2 is a schematic diagram of a circuit structure of a secondary side control circuit 200 in a first embodiment of a control circuit of the present invention, which is applied to Figure 1Taking the shutdown power supply including a flyback converter without an additional isolation module as an example, the secondary side control circuit 200 includes a first jitter signal generating circuit U1, the first jitter signal generating circuit U1 generates a first jitter signal, and the secondary side control circuit 200 generates a conduction control signal ON according to the first jitter signal, and controls the conduction of the second power tube Q2 according to the conduction control signal ON, so as to control the periodic jitter of the switching frequency of the flyback converter; wherein the second power tube Q2 is a power tube located on the secondary side of the flyback converter. In this embodiment, the first jitter signal generated by the first jitter signal generating circuit U1 is a periodically jittered voltage signal V1. For example, the secondary control circuit 200 further includes a second current source U2, a first capacitor C1, a first comparison circuit U3 and a first switch S1. The second current source U2 is a voltage-controlled current source. The first jitter current signal i1 is generated according to the first jitter signal. The first capacitor C1 receives the first jitter current signal i1 to obtain a first charging voltage. The first comparison circuit U3 compares the first charging voltage with the first reference voltage Vref to output a conduction control signal ON. The first switch S1 is connected in parallel with the first capacitor C1, and the first switch S1 resets the first charging voltage according to the conduction control signal ON. Further, the secondary control circuit 200 further includes a first trigger U4. One input terminal of the first trigger U4 receives the conduction control signal ON, the other input terminal receives the shutdown control signal OFF, and the output terminal outputs a second control signal G2 for controlling the conduction and shutdown of the second power tube Q2. The shutdown control signal OFF can be obtained by any method in the prior art, and the present invention is not limited to this. It can be understood that the first switch S1 can also be set to reset the first charging voltage according to the second control signal G2. In one embodiment, the first jitter signal generating circuit U1 can output the first jitter signal according to the compensation signal Vcomp; wherein the compensation signal Vcomp represents the error between the output feedback signal of the switching power supply and the reference signal. In one embodiment, the first jitter signal generating circuit U1 can control the periodic jitter of the first jitter signal according to the switching frequency Fsw of the switching power supply. Specifically, the first jitter signal generating circuit U1 can control the periodic jitter of the first jitter signal according to the switching signal fs in the switching power supply, wherein the frequency of the switching signal fs can represent the switching frequency Fsw of the switching power supply. For example, the switching signal fs can be the above-mentioned conduction control signal ON, or the shutdown control signal OFF, or the second control signal G2, etc. The present invention does not limit the selection of the switching signal fs.

[0070] Figure 4bFIG. 2 is a circuit structure diagram of a secondary control circuit 200 in a second embodiment of the control circuit of the present invention, which is basically the same as the first embodiment and will not be described in detail here. The difference is that the first jitter signal generated by the first jitter signal generating circuit U1 in this embodiment is a periodically jittered current signal, and the secondary control circuit 200 directly uses the first jitter signal as the first jitter current signal i1, and the secondary control circuit 200 does not need the second current source U2. Figure 4a or Figure 4b The secondary side control circuit 200 shown is applied to Figure 1 When the switching power supply is shown in FIG. 1 , by setting the waveform of the first jitter signal generated by the first jitter signal generating circuit U1, the switching power supply can have the following characteristics: Figure 3a The waveform shown.

[0071] Easily understandable, Figure 4a or Figure 4b The secondary side control circuit 200 shown is also applicable to a flyback topology switching power supply with an additional isolation module. It is also easy to understand that Figure 4a or Figure 4b The circuit structure shown can also be used as a control circuit for switching power supplies of other topologies, including but not limited to switching power supplies of topologies such as BUCK, BOOST, and BUCK-BOOST. In one embodiment, the control circuit includes a first jittering signal generating circuit U1, a first capacitor C1, a first comparison circuit U3, and a first switch S1. A first jittering current signal i1 is generated according to a first jittering signal generated by the first jittering signal generating circuit U1, and the first capacitor C1 receives the first jittering current signal i1 to obtain a first charging voltage; the first comparison circuit U3 compares the first charging voltage with a first reference voltage Vref to output a conduction control signal ON; the first switch S1 is connected in parallel with the first capacitor C1, and the first charging voltage is reset according to the conduction control signal ON; the control circuit controls the conduction of the power tube in the switching power supply according to the conduction control signal ON to control the periodic jitter of the switching frequency of the switching power supply.

[0072] In summary, when the first control method, or Figure 4a or Figure 4bThe secondary side control circuit 200 shown is applied to a flyback topology switching power supply without an additional isolation module. Although the output power jitters greatly within a switching frequency jitter cycle, the average output power in each time interval is equal to or close to the average output power of the switching power supply, that is, each time interval reaches or approaches power balance, which can effectively reduce the output voltage ripple without affecting the frequency jitter effect. That is, it can effectively avoid the problem of large output voltage ripple in the prior art while optimizing EMI, and at the same time avoid the cost increase caused by the need for an additional isolation module in the prior art to reduce the output voltage ripple. When the first control method, or including the following Figure 4a or Figure 4b When the control circuit of the circuit structure shown is applied to any type of switching power supply, the average output power of the switching power supply in each of the time intervals is equal to or nearly equal to the average output power of the switching power supply, which can effectively reduce the output voltage ripple without affecting the frequency jittering effect; and the output power fluctuation frequency of the switching power supply is higher, which can reach up to half of the switching frequency, which is much higher than the system bandwidth, and the internal compensation cannot suppress the frequency jittering effect, and the EMI optimization effect is more obvious.

[0073] Figure 5 Shown according to Figure 1 The waveform diagram of the flyback switching power supply under the second control method, where Fsw, Vcs_peak, Pout, and Vout(ac) represent the same content as in Figure 2a The control method of this embodiment is applicable to a switching power supply including a quasi-resonant flyback converter. The control method includes controlling the peak current flowing through the primary side of the quasi-resonant flyback converter to periodically jitter, so as to control the switching frequency Fsw of the quasi-resonant flyback converter to periodically jitter, wherein the jitter direction of the switching frequency Fsw is opposite to the jitter direction of the primary peak current, and the waveform of the peak sampling voltage Vcs_peak is the waveform representing the primary peak current. Specifically, the peak sampling voltage Vcs_peak can be controlled to periodically jitter, so that the primary peak current is periodically jittered, thereby causing the switching frequency Fsw to periodically jitter. In this embodiment, the jitter direction of the output power Pout is opposite to the jitter direction of the switching frequency Fsw. Since the jitter direction of the switching frequency Fsw is opposite to the jitter direction of the primary peak current, the jitter amplitude of the output power Pout is greater than that of the primary peak current. Figure 3a The jitter amplitude of the output power Pout is small. It is easy to understand that the control method is also applicable to a switching power supply including a quasi-resonant flyback converter with an additional isolation module.

[0074] Figure 6 FIG. 1 is a schematic diagram of the circuit structure of the primary side control circuit 100 in the third embodiment of the control circuit of the present invention, which is applied to Figure 1Taking the flyback switching power supply without an additional isolation module as an example, this embodiment is applicable to a switching power supply including a quasi-resonant flyback converter, and the primary control circuit 100 includes a first jitter signal generating circuit U1, and controls the periodic jitter of the peak current flowing through the primary side of the quasi-resonant flyback converter according to the first jitter signal output by the first jitter signal generating circuit U1, so as to control the periodic jitter of the switching frequency of the quasi-resonant flyback converter. For example, the primary control circuit 100 also includes a second comparison circuit U5, and the first jitter signal output by the first jitter signal generating circuit U1 is a periodically jittered voltage signal V1, and the second comparison circuit U5 compares the periodically jittered voltage signal V1 with the current sampling signal Vcs to output a shutdown control signal OFF; the primary control circuit 100 controls the shutdown of the first power tube Q1 according to the shutdown control signal OFF; wherein the current sampling signal Vcs represents the current flowing through the primary side of the quasi-resonant flyback converter, and in one embodiment, the current sampling signal Vcs can represent the current flowing through the first power tube Q1. Furthermore, the primary control circuit 100 also includes a second trigger U6, a valley detection circuit 101 and a conduction signal generating circuit 102, one input end of the second trigger U6 receives the shutdown control signal OFF, and the output end outputs the first control signal G1 for controlling the first power tube Q1 to be turned on and off, the other input end of the second trigger U6 receives the conduction control signal ON, the conduction signal generating circuit 102 outputs the conduction control signal ON according to the output signal of the valley detection circuit 101 and the compensation signal, and the primary control circuit 100 controls the first power tube Q1 to be turned on when its drain-source voltage is at the valley bottom or near the valley bottom according to the conduction control signal ON, wherein the specific circuits of the valley detection circuit 101 and the conduction signal generating circuit 102 can adopt any circuit structure in the prior art. It is easy to understand that Figure 6 The primary control circuit 100 shown is also applicable to a quasi-resonant flyback switching power supply with an additional isolation module. In one embodiment, the first jitter signal generating circuit outputs the first jitter signal according to the compensation signal Vcomp, wherein the compensation signal Vcomp represents the error between the output feedback signal and the reference signal of the switching power supply. Specifically, in an embodiment of a quasi-resonant flyback converter with an additional isolation module, the compensation signal Vcomp can be transmitted to the primary control circuit 100, for example, through the additional isolation module; in an embodiment of a quasi-resonant flyback converter without an additional isolation module, the primary control circuit 100 can indirectly obtain the compensation signal Vcomp, for example, by detecting the switching frequency. When Figure 6 When the primary side control circuit 100 shown is applied to a switching power supply including a quasi-resonant flyback converter, by setting the waveform of the periodically jittering voltage signal V1, the waveform of the switching power supply can be made as follows: Figure 5 As shown, Figure 6The periodic jitter voltage signal V1 corresponds to Figure 5 The peak sampling voltage Vcs_peak in.

[0075] In summary, when the second control method, or Figure 6 When the primary side control circuit 100 shown is applied to a quasi-resonant flyback topology switching power supply without an additional isolation module, the average output power of the switching power supply in each time interval is equal to or close to the average output power of the switching power supply, which can effectively reduce the output voltage ripple without affecting the frequency jitter effect, that is, it can effectively avoid the large output voltage ripple problem in the prior art while optimizing EMI, and at the same time avoid the cost increase caused by the need for an additional isolation module in the prior art to reduce the output voltage ripple. When the second control method, or as Figure 6 When the primary side control circuit 100 shown is applied to any switching power supply including a quasi-resonant flyback converter, the average output power of the switching power supply in each of the time intervals is equal to or close to the average output power of the switching power supply, which can effectively reduce the output voltage ripple without affecting the frequency jittering effect; and the output power fluctuation frequency of the switching power supply is higher, which can be much higher than the system bandwidth, and the internal compensation cannot suppress the frequency jittering effect, and the EMI optimization effect is more obvious.

[0076] The circuit structure of the first jitter signal generating circuit U1 according to the embodiment of the present invention is exemplified below. Figure 7a and Figure 7bIn the first embodiment of the first jitter signal generating circuit U1 of the present invention, the first jitter signal generating circuit U1 includes a first current source U11 and a first resistor network 30, and the first current source U11 generates a first current i0; the first end of the first resistor network 30 receives the first current i0, and the second end is connected to the reference ground, and the equivalent resistance value between the first end and the second end of the first resistor network 30 periodically jitters; the first jitter signal generating circuit U1 outputs a first jitter signal according to the voltage of the first end of the first resistor network 30. For example, the voltage of the first end of the first resistor network 30 can be used as the first jitter signal, and the first jitter signal is a periodically jittered voltage signal V1. In one embodiment, the first current source U11 can be set as a voltage-controlled current source to generate the first current i0 according to the compensation signal Vcomp; in another embodiment, the first current source U11 can also be a current source that generates a fixed current. In one embodiment, it can be set to control the periodic jitter of the equivalent resistance value of the first resistor network 30 according to the switching frequency Fsw of the switching power supply; in another embodiment, the equivalent resistance value of the first resistor network 30 can also be set to periodically jitter at a fixed frequency. Specifically, in one embodiment, the first resistor network 30 includes a logic control circuit 31 and a switch resistor network. For example, the switch resistor network includes three switches S11-S13 and four resistors connected in series, whose resistance values ​​are R1, R2, 2*R2 and 4*R2 respectively. The switches S11-S13 are connected in parallel with resistors with resistance values ​​of R2, 2*R2 and 4*R2 respectively. The end of the resistor R1 that is not connected to the resistor R2 serves as the first end of the first resistor network 30. The logic control circuit 31 includes a first counter U12, a second counter U13 and three XOR gates U14-U16. The first counter U12 receives a switch signal fs, wherein the frequency of the switch signal fs is The switching frequency Fsw of the switching power supply can be represented. The first counter U12 divides the switching signal fs to output a fundamental wave signal. For example, the frequency of the fundamental wave signal can be 1 / 2, 1 / 4, 1 / 8, etc. of the frequency of the switching signal fs. The second counter U13 receives the fundamental wave frequency to output three signals D0, D1 and D2. The XOR gates U14, U15 and U16 receive the signal D0 and the fundamental wave signal, the signal D1 and the fundamental wave signal, and the signal D2 and the fundamental wave signal, respectively. The output signals are used to control switches S11, S12 and S13, respectively. The waveforms of the fundamental wave signal, the signal D0, the signal D1, the signal D2 and the periodically jittering voltage signal V1 are shown in FIG. Figure 7b In another embodiment, the first resistor network 30 may not include the first counter U12, and the fundamental wave signal adopts a fixed frequency signal. It should be noted that there are many ways to implement the first resistor network 30, and it is not limited to Figure 7aThe circuit structure shown in the figure may, for example, also include more switches and more resistors, or adopt a connection mode of resistors in parallel or a mixed connection of resistors in series and parallel, wherein the logic control circuit 31 may also adopt other logic control modes, etc. It can be understood that in one embodiment, the voltage at the first end of the first resistor network 30 (the periodically jittered voltage signal V1) may be output as the first jitter signal, and the first jitter signal generating circuit U1 may be applied to Figure 4a The secondary side control circuit 200 shown can also be applied to Figure 6 The primary control circuit 100 shown in the figure; in another embodiment, the first jitter signal generating circuit U1 may also include a voltage-controlled current source (not shown in the figure), which generates a periodically jittered current signal as the first jitter signal output according to the voltage at the first end of the first resistor network 30. The first jitter signal generating circuit U1 can be applied to Figure 4b The secondary side control circuit 200 is shown.

[0077] Figure 8 The circuit structure diagram of the second embodiment of the first jitter signal generating circuit U1 is shown; in this embodiment, the first jitter signal generating circuit U1 includes a first current source U11 and a second current unit 40, the first current source U11 generates a first current i0; the second current unit 40 is used to output a periodically jittered second current, and output the first jitter signal according to the sum of the first current i0 and the second current, or the difference between the first current and the second current. Wherein, Figure 8 The first jitter signal output by the first jitter signal generating circuit U1 shown is a periodically jittered current signal i3 composed of the sum of the first current i0 and the second current. The first current source U11 can be a voltage-controlled current source that generates the first current i0 according to the compensation signal Vcomp, or it can be a current source that generates a fixed current. The second current can be controlled to be periodically jittered according to the switching frequency Fsw of the switching power supply, or the second current can be set to be periodically jittered at a fixed frequency. Specifically, in one embodiment, the second current unit 40 includes a logic control circuit 41 and a switching current source network, the switching current source network includes three switches S11~S13 and three parallel current sources, whose current values ​​are i2, 2*i2 and 4*i2 respectively, and the magnitude of the current i2 can be controlled by the compensation signal Vcomp or the first current i0, Figure 8 The three parallel current sources shown in the figure include transistors M1, M2, and M3 respectively. The transistors M1 to M3 and the transistor M0 form a current mirror, that is, Figure 8The magnitude of the current i2 is directly controlled by the first current i0. Of course, in other embodiments, the current i2 may also be a current of a fixed magnitude. The switches S11 to S13 are respectively connected in series with current sources having current values ​​of i2, 2*i2, and 4*i2. The logic control circuit 41 is used to control the switches S11 to S13. The circuit structure of the logic control circuit 41 is similar to Figure 7a The logic control circuit 31 is the same as that in FIG. 1 , and will not be described in detail here. Those skilled in the art will refer to the above description and Figure 7b The waveforms of the fundamental signal, signal D0, signal D1, signal D2 and the periodically jittered current signal i3 in this embodiment can be easily obtained, so the waveforms of this embodiment are not shown in this application. It can be understood that in one embodiment, the sum or difference between the first current i0 and the second current i0 can be output as the first jitter signal, and the first jitter signal generating circuit U1 can be applied to Figure 4b The secondary side control circuit 200 shown (for example, Figure 8 The periodic jitter current signal i3 in Figure 4b In another embodiment, the first jittering signal generating circuit U1 may further include a resistive element (not shown in the figure), the resistive element receives the sum or difference of the first current i0 and the second current, and outputs the voltage on the resistive element as the first jittering signal. The first jittering signal generating circuit U1 may be applied to Figure 4a The secondary side control circuit 200 shown can also be applied to Figure 6 The primary side control circuit 100 is shown.

[0078] It should be noted that the first time period and the second time period within a time interval described in the present application are only for illustrating that there are two time periods with unequal working frequencies within a time interval, and the time sequence of the first time period and the second time period is not limited.

[0079] The above-described implementation methods do not constitute a limitation on the protection scope of the technical solution. Any modification, equivalent replacement and improvement made within the spirit and principle of the above-described implementation methods shall be included in the protection scope of the technical solution.

Claims

1. A method for controlling a switching power supply, It is characterized in that Controlling the switching frequency of the switching power supply to jitter periodically, wherein one jitter period includes greater than or equal to two time intervals, each of the time intervals includes a first time period and a second time period, the switching frequency of the switching power supply in the first time period is less than the switching frequency in the second time period, and the switching frequencies in each of the first time periods including at least two time intervals are unequal, and / or the switching frequencies in each of the second time periods including at least two time intervals are unequal; Wherein, the absolute value of the difference between the average output power of the switching power supply in each of the time intervals and the average output power of the switching power supply is less than or equal to a first preset value.

2. The control method of the switching power supply according to claim 1, It is characterized in that The average output power of the switching power supply in each of the time intervals is equal to the average output power of the switching power supply.

3. The control method of the switching power supply according to claim 1, It is characterized in that The time of each of the time intervals is equal.

4. The control method of the switching power supply according to claim 1, It is characterized in that The number of switching cycles of the switching power supply in each time interval is equal.

5. The control method of the switching power supply according to any one of claims 1 to 4, It is characterized in that The first time period and the second time period in one time interval are equal in time.

6. The control method of the switching power supply according to claim 4, It is characterized in that The number of switching cycles of the switching power supply in the first time period and the second time period within the time interval is equal.

7. The control method of the switching power supply according to claim 1, It is characterized in that In one of the jitter cycles, the difference between the switching frequency of the switching power supply in the second time period and the switching frequency in the first time period gradually increases, or gradually decreases, or first increases and then decreases, or first decreases and then increases over time.

8. The control circuit of the switching power supply according to claim 1, It is characterized in that The switching frequency of the switching power supply in the first time period is less than a reference switching frequency, and the switching frequency in the second time period is greater than the reference switching frequency; The reference switching frequency is an average switching frequency of the switching power supply.

9. The control method of the switching power supply according to claim 8, It is characterized in that In one of the time intervals, the absolute value of the difference between the switching frequency of the switching power supply in the first time period and the reference switching frequency is close to or equal to the absolute value of the difference between the switching frequency of the switching power supply in the second time period and the reference switching frequency.

10. The control method of the switching power supply according to claim 1, It is characterized in that The switching power supply includes a quasi-resonant flyback converter, and the control method includes controlling the periodic jitter of the peak current flowing through the primary side of the quasi-resonant flyback converter to control the periodic jitter of the switching frequency of the quasi-resonant flyback converter.

11. A control circuit for a switching power supply, It is characterized in that The control circuit controls the switching frequency of the switching power supply to jitter periodically, wherein one jitter cycle includes greater than or equal to two time intervals, each of the time intervals includes a first time period and a second time period, the switching frequency of the switching power supply in the first time period is less than the switching frequency in the second time period, and the switching frequencies in each of the first time periods of at least two time intervals are not equal, and / or the switching frequencies in each of the second time periods of at least two time intervals are not equal; wherein the absolute value of the difference between the average output power of the switching power supply in each of the time intervals and the average output power of the switching power supply is less than or equal to a first preset value, and the control circuit includes: A first jitter signal generating circuit to output a first jitter signal with periodic jitter; The control circuit generates a control signal according to the first jitter signal, and controls the on and off of the power tube in the switching power supply according to the control signal, so as to control the periodic jitter of the switching frequency of the switching power supply.

12. The control circuit according to claim 11, It is characterized in that The control circuit generates a first jitter current signal according to the first jitter signal, and the control circuit includes: A first capacitor, receiving the first jitter current signal to obtain a first charging voltage; a first comparison circuit, for comparing the first charging voltage with a first reference voltage to output a conduction control signal; a first switch connected in parallel with the first capacitor, wherein the first switch resets the first charging voltage according to the conduction control signal; The control circuit controls the conduction of the power tube according to the conduction control signal.

13. The control circuit of the switching power supply according to claim 11, It is characterized in that The switching power supply includes a flyback converter, the control circuit includes a secondary side control circuit, and the secondary side control circuit includes the first jitter signal generating circuit. The secondary side control circuit generates a conduction control signal according to the first jitter signal output by the first jitter signal generating circuit, and controls the conduction of the second power tube according to the conduction control signal, so as to control the periodic jitter of the switching frequency of the flyback converter; Wherein, the second power tube is a power tube located at the secondary side of the flyback converter.

14. The control circuit of the switching power supply according to claim 11, It is characterized in that The switching power supply includes a quasi-resonant flyback converter, the control circuit includes a primary side control circuit, and the primary side control circuit includes the first jitter signal generating circuit. The primary side control circuit controls the periodic jitter of the peak current flowing through the primary side of the quasi-resonant flyback converter according to the first jitter signal output by the first jitter signal generating circuit, so as to control the periodic jitter of the switching frequency of the quasi-resonant flyback converter.

15. The control circuit of the switching power supply according to claim 14, It is characterized in that The primary side control circuit comprises: a second comparison circuit, for comparing the first jitter signal with the current sampling signal to output a shutdown control signal; The primary side control circuit controls the shutdown of the first power tube according to the shutdown control signal; The current sampling signal represents the current flowing through the primary side of the quasi-resonant flyback converter, and the first power tube is a power tube located on the primary side of the quasi-resonant flyback converter.

16. The control circuit of the switching power supply according to any one of claims 11 to 15, It is characterized in that The first jitter signal generating circuit controls the periodic jitter of the first jitter signal according to the switching frequency of the switching power supply.

17. The control circuit of the switching power supply according to any one of claims 11 to 15, It is characterized in that The first jitter signal generating circuit outputs the first jitter signal according to the compensation signal; The compensation signal represents the error between the output feedback signal of the switching power supply and the reference signal.

18. The control circuit according to any one of claims 11 to 15, It is characterized in that The first jitter signal generating circuit comprises: A first current source generates a first current; A first resistor network, a first end of which receives the first current, a second end of which is connected to a reference ground, and an equivalent resistance value of the first resistor network periodically jitters; The first jitter signal generating circuit outputs the first jitter signal according to the voltage of the first end of the first resistor network.

19. The control circuit according to claim 18, It is characterized in that The first current source generates the first current according to the compensation signal; The compensation signal represents the error between the output feedback signal of the switching power supply and the reference signal.

20. The control circuit according to claim 18, It is characterized in that The equivalent resistance value of the first resistor network is controlled to periodically jitter according to the switching frequency of the switching power supply.

21. The control circuit according to any one of claims 11 to 15, It is characterized in that The first jitter signal generating circuit comprises: A first current source generates a first current; A second current unit, used for outputting a second current, wherein the second current periodically jitters; The first jitter signal is output according to the sum of the first current and the second current, or the difference between the first current and the second current.

22. A switching power supply, comprising the control circuit according to any one of claims 11 to 21.

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