Magnetoresistive random access memory element and manufacturing method thereof

By adopting SOT technology and tantalum nitride multi-layer structure design in MRAM components, the problems of write errors and high threshold current are solved, and the write speed and current reduction are improved, and the component performance is improved.

CN119110668APending Publication Date: 2024-12-10UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
CN202310758994.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-06-09
Filing Date
2023-06-26
Publication Date
2024-12-10

AI Technical Summary

Technical Problem

The existing MRAM components have write errors in the write step, resulting in the write speed being unable to be increased and the threshold current is high.

Method used

The magnetic moment is flipped by spin-orbit torque (SOT) technology, and the resistivity of tantalum nitride material is used in the bottom electrode to adjust its resistivity to reduce current, combined with a multi-layer structure design to improve resistivity, increase write speed and Reduce the threshold current.

Benefits of technology

The writing speed of MRAM components is improved through SOT technology, and the overall current is reduced through the nitride material of tantalum, effectively reducing the threshold current and improving component performance.

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Abstract

The invention discloses a magnetoresistive random access memory element which comprises a bottom electrode, a spin-orbit torque layer, a magnetic tunnel junction and a top electrode. The bottom electrode includes a first layer and a second layer connected to each other. The material of the first layer comprises Tax1Ny1, the material of the second layer comprises Tax2Ny2, and the following conditional expression is satisfied: y2 / x2gt, 1, y1 / x1 > = 1, and y2 / x2gt; y1 / x1. The spin-orbit torque layer is arranged on the bottom electrode, the magnetic tunnel junction is arranged on the spin-orbit torque layer, and the top electrode is arranged on the magnetic tunnel junction.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor devices, and in particular to a magnetoresistive random access memory (MRAM) element and a manufacturing method thereof. Background Art

[0002] With the trend of thinner and lighter mobile devices and the need for the popularization of the Internet of Things (IOT) in the future, the industry's requirements for the recording density and performance of memory components have been greatly increased. MRAM components have attracted great attention due to their advantages such as fast read and write speed, non-volatility, and easy integration with semiconductor manufacturing processes.

[0003] However, the MRAM devices on the market have not yet met expectations in all aspects. For example, spin torque transfer (STT) is one of the technologies used by current MRAM devices to flip the magnetic moment. When using STT to flip the magnetic moment, the two ferromagnetic layers in the magnetic tunneling junction (MTJ) are simultaneously subjected to the transfer torque given by the current, making the difference in the coercivity of the upper and lower ferromagnetic layers very small. There is a certain probability that the magnetic moment of the free layer and the reference layer (or pinned layer) will be flipped at the same time during the writing step, resulting in a write error. If you want to reduce write errors, you need to keep the waiting time for writing to a certain minimum value, so that the write speed of STT-type MRAM devices cannot be improved. Therefore, how to improve the performance of MRAM devices is still one of the topics that the industry is currently committed to researching. Summary of the invention

[0004] An object of the present invention is to provide an MRAM element and a method for manufacturing the same to solve the above-mentioned problem.

[0005] According to one embodiment of the present invention, an MRAM element is provided, comprising a bottom electrode, a spin orbit torque (SOT) layer, an MTJ and a top electrode. The bottom electrode comprises a first layer and a second layer connected to each other. The material of the first layer comprises Ta x1 N y1 , the second layer material contains Ta x2 N y2 , and the following conditions are satisfied: y2 / x2>1, y1 / x1≥1, and y2 / x2>y1 / x1. The SOT layer is disposed on the bottom electrode, the MTJ is disposed on the SOT layer, and the top electrode is disposed on the MTJ.

[0006] According to another embodiment of the present invention, an MRAM device is provided, comprising a bottom electrode, a SOT layer, an MTJ and a top electrode. The bottom electrode defines a normal direction, wherein the material of the bottom electrode comprises Ta x N y , and the following condition is satisfied: y / x≥1, and y / x increases gradually from a first surface of the bottom electrode to a second surface of the bottom electrode along the normal direction. The SOT layer is disposed on the first surface on the bottom electrode, the MTJ is disposed on the SOT layer, and the top electrode is disposed on the MTJ.

[0007] According to another embodiment of the present invention, a method for manufacturing an MRAM device is provided, comprising the following steps: forming a bottom electrode, wherein the material of the bottom electrode comprises Ta x1 N y1 And Ta x2 N y2 , and the following conditions are satisfied: y2 / x2>1, y1 / x1≥1, and y2 / x2>y1 / x1. A SOT layer is formed on the bottom electrode. A MTJ is formed on the SOT layer. A top electrode is formed on the MTJ.

[0008] Compared with the prior art, the MRAM element of the present invention uses the SOT technology to flip the magnetic moment, which affects the magnetic moment of the free layer through the spin current, which is beneficial to improve the writing speed of the MRAM element. In addition, the MRAM element of the present invention is beneficial to reduce the current flowing through the bottom electrode, and further reduce the threshold current of the MRAM element as a whole, by virtue of the top electrode material comprising tantalum nitride, and the ratio of the number of nitrogen ions to the number of tantalum ions in at least part of the tantalum nitride is greater than 1. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 , Figure 2 , Figure 3 , Figure 4 and Figure 5 Schematic diagram of steps for manufacturing an MRAM element according to one embodiment of the present invention;

[0010] Figure 6 is a schematic cross-sectional view of a bottom electrode according to some embodiments of the present invention;

[0011] Figure 7 are cross-sectional schematic diagrams of bottom electrodes according to other embodiments of the present invention;

[0012] Figure 8 is a schematic diagram of steps for making a bottom electrode according to one embodiment of the present invention;

[0013] Fig. 9 is a flowchart of a method for forming a bottom electrode according to an embodiment of the present invention.

[0014] Explanation of symbols

[0015] 1: MRAM components

[0016] 10: Base

[0017] 12: Interlayer dielectric layer

[0018] 14,20: Metal interconnects

[0019] 15,18: Intermetallic Dielectric Layer

[0020] 16: Stop layer

[0021] 21: First metal interconnect

[0022] 22: Second metal interconnect

[0023] 30,30a,30b,30c,30d,30e,30f: bottom electrode

[0024] 40: SOT layer

[0025] 40': SOT material layer

[0026] 50:MTJ

[0027] 50':MTJ stacking

[0028] 52: Free Layer

[0029] 52': Free material layer

[0030] 54: Barrier layer

[0031] 54': barrier material layer

[0032] 56: Reference layer

[0033] 56': Reference material layer

[0034] 58: Covering layer

[0035] 58': Cover material layer

[0036] 60: Top electrode

[0037] 60': top electrode material layer

[0038] 70,70': mask layer

[0039] 72: Patterned mask layer

[0040] 74: Opening area

[0041] 76: Ion implantation process

[0042] 80: Dielectric cover layer

[0043] 301: first surface

[0044] 302: Second surface

[0045] 310,360,380: First floor

[0046] 320,370,390: Second floor

[0047] 330: The third floor

[0048] 340: Fourth floor

[0049] 900: Method

[0050] 910,920: Steps

[0051] D1: First direction

[0052] E1: The first etching process

[0053] E2: Second Etching Process

[0054] I,I1,I2,i1,i2,i3,i4,i11,i12: current

[0055] N: Normal direction

[0056] P1: Part

[0057] T, T1, T2: thickness DETAILED DESCRIPTION

[0058] The above and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of the preferred embodiments with reference to the accompanying drawings. The directional terms mentioned in the following embodiments, such as: up, down, left, right, front, back, bottom, top, etc., are only the directions with reference to the attached drawings. Therefore, the directional terms used are for illustration, not for limitation of the present invention. In addition, in the following embodiments, the same or similar elements will be marked with the same or similar numbers.

[0059] The description below regarding “a first feature is formed on or above a second feature” may refer to “the first feature is in direct contact with the second feature” or “there are other features between the first feature and the second feature” such that the first feature and the second feature are not in direct contact with each other.

[0060] The present invention uses the terms "first", "second", etc. to describe elements, regions, layers, and / or sections, but it should be understood that these terms are only used to distinguish a certain element, region, layer, and / or section from another element, region, layer, and / or section, and they do not imply or represent any previous ordinal number of the element, nor do they represent the arrangement order of a certain element and another element, or the order in the manufacturing method. Therefore, without departing from the scope of the specific embodiments of the present invention, the first element, region, layer, and / or section discussed below may also be referred to as the second element, region, layer, and / or section. These terms in the claims may not be the same as those in the specification, but may be replaced by "first", "second", "third", etc. according to the order of the elements declared in the claims.

[0061] According to one embodiment of the present invention, a method for manufacturing an MRAM device is provided, comprising the following steps: forming a bottom electrode, wherein the material of the bottom electrode comprises Ta x1 N y1 And Ta x2 N y2 , and the following conditions are satisfied: y2 / x2>1, y1 / x1≥1, and y2 / x2>y1 / x1; forming a SOT layer on the bottom electrode; forming an MTJ on the SOT layer; and forming a top electrode on the MTJ.

[0062] Please refer to Figures 1 to 5 , which is a schematic diagram of the steps of manufacturing an MRAM element 1 according to an embodiment of the present invention, and is used to illustrate the method of manufacturing an MRAM element. Figure 1 In the present invention, a substrate 10 is first provided. The substrate 10 may be a silicon substrate, an epitaxial silicon substrate, a silicon carbide substrate or a silicon on insulator (SOI) substrate. The substrate 10 may have an MRAM region (not separately labeled) and a logic region (not shown). Figure 1 FIG. 8 is an illustrative diagram showing an MRAM region of the substrate 10 .

[0063] The substrate 10 may include active (active) elements (not shown) such as metal-oxide semiconductor (MOS) transistors, passive (passive) elements (not shown), and conductive layers (not shown), and an interlayer dielectric (ILD) layer 12 is disposed on the substrate 10 and covers the active elements, passive elements, and conductive layers. Specifically, the substrate 10 may include a planar or non-planar (such as a fin structure) MOS transistor, wherein the MOS transistor may include transistor elements such as a gate structure (such as a metal gate), source / drain regions, spacers, epitaxial layers, and contact hole etching stop layers. The interlayer dielectric layer 12 may be disposed on the substrate 10 and cover the MOS transistor, and a plurality of contact plugs (not shown) may be disposed in the interlayer dielectric layer 12 to electrically connect the gate and / or source / drain regions of the MOS transistor. Since the related manufacturing processes of the planar or non-planar transistor and the interlayer dielectric layer 12 are well known in the art, they are not further described here.

[0064] Then, an intermetallic dielectric layer 15 is formed on the interlayer dielectric layer 12, and a metal interconnect 14 is formed in the intermetallic dielectric layer 15. Then, a stop layer 16 and an intermetallic dielectric layer 18 are sequentially formed on the intermetallic dielectric layer 15, and metal interconnects 20, such as a first metal interconnect 21 and a second metal interconnect 22, are formed in the stop layer 16 and the intermetallic dielectric layer 18, wherein the metal interconnects 14 and 20 are electrically connected to the contact plugs in the interlayer dielectric layer 12. In the present embodiment, the metal interconnect 14 is a trench conductor, and the metal interconnect 20 is a via conductor, but this is only an example, and the present invention is not limited thereto. The metal interconnects 14 and 20 can be embedded in the intermetallic dielectric layers 15, 18 and / or the stop layer 16 according to a single damascene process or a dual damascene process and are electrically connected to each other. The metal interconnects 14 and 20 may be single-layer or multi-layer structures (not shown). For example, the metal interconnects 14 and 20 may include a low-impedance metal layer. The material of the low-impedance metal layer may include tungsten (W), copper (Cu), aluminum (Al), titanium aluminum alloy (TiAl), cobalt tungsten phosphide (CoWP) or a combination thereof. In the present embodiment, the material of the low-impedance metal layer of the metal interconnect 14 includes copper, and the material of the low-impedance metal layer of the metal interconnect 20 includes tungsten. The metal interconnect 14 may further include a barrier layer disposed between the low-impedance metal layer and the intermetallic dielectric layer 15, and the metal interconnect 20 may further include a barrier layer disposed between the low-impedance metal layer and the intermetallic dielectric layer 18. The material of the barrier layer may include titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN) or a combination thereof. Since the single-damascene or dual-damascene manufacturing process is a well-known technique in the art, it will not be further described here. The material of the IMD layers 15 and 18 may include tetraethoxysilane (TEOS) or silicon dioxide, and the material of the stop layer 16 may include nitrogen doped carbide (NDC), silicon nitride or silicon carbon nitride (SiCN), but is not limited thereto.

[0065] Next, a bottom electrode 30 is formed on the intermetallic dielectric layer 18. The bottom electrode 30 may be a double-layer structure, such as Figure 6 As shown in part A, for the sake of simplicity, Figures 1 to 5 The bottom electrode 30 in FIG. 1 is only a single layer. For details about the bottom electrode 30, please refer to the following Figures 6 to 8 Related instructions.

[0066] Figure 2In the embodiment, a SOT material layer 40' is formed on the bottom electrode 30. The material of the SOT material layer 40' may include tungsten (W), tantalum (Ta), platinum (Pt), hafnium (Hf) or a combination thereof. In the present embodiment, the material of the SOT material layer 40' includes tungsten. Next, an MTJ stack 50' is formed on the SOT material layer 40'. The MTJ stack 50' may be formed by sequentially forming a free material layer 52', a barrier material layer 54' and a reference material layer 56' (also referred to as a pinned material layer). The material of the free material layer 52' ​​may include a ferromagnetic material, such as iron, cobalt, nickel or an alloy thereof such as cobalt-iron-boron (CoFeB), but is not limited thereto. The magnetization direction of the free material layer 52' ​​may be "freely" changed by an external magnetic field. The material of the barrier material layer 54' may include an insulating material such as an oxide, such as aluminum oxide (AlO x ) or magnesium oxide (MgO), but not limited thereto. The material of the reference material layer 56' may include an antiferromagnetic (AFM) material, such as iron manganese (FeMn), platinum manganese (PtMn), iridium manganese (IrMn) or nickel oxide (NiO), but not limited thereto. In some embodiments, the material of the reference material layer 56' may be the same as the material of the free material layer 52'. Next, a capping material layer 58' may be selectively formed on the MTJ stack 50'. The capping material layer 58' may include a barrier capping material and / or a metal capping material. The barrier capping material may include magnesium oxide, and the metal capping material may include tantalum (Ta), tungsten (W) or ruthenium (Ru), but not limited thereto. Next, a top electrode material layer 60' is formed on the cap material layer 58' (indirectly formed on the MTJ stack 50'). The material of the top electrode material layer 60' may include a conductive material, such as titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN) or a combination thereof. In the present embodiment, the material of the top electrode material layer 60' includes titanium nitride. Next, a mask layer 70' is formed on the top electrode material layer 60'. The material of the mask layer 70' may include, for example, a photoresist.

[0067] Figure 3 In the process, a first etching process E1 is performed to pattern the mask layer 70 ′ and the top electrode material layer 60 ′ to obtain a patterned mask layer 70 and a top electrode 60 . Figure 4 In the process, the second etching process E2 is performed with the patterned mask layer 70 and the top electrode 60 as masks to pattern the cap material layer 58 ′, the MTJ stack 50 ′ and the SOT material layer 40 ′ to obtain the cap layer 58 , the MTJ 50 and the SOT layer 40 , and the patterned mask layer 70 is removed. Figure 4In the figure, the SOT layer 40 has different thicknesses (not separately labeled) because a portion of it is shielded by the top electrode 60 and the other portion is not shielded by the top electrode 60. Specifically, the portion of the SOT layer 40 not shielded by the top electrode 60 is etched to have a thinner thickness, and the portion of the SOT layer 40 shielded by the top electrode 60 has a thicker thickness, but the present invention is not limited to this. In other embodiments, the second etching process E2 may not remove the portion of the SOT layer 40 not shielded by the top electrode 60. Figure 5 In the embodiment, a dielectric capping layer 80 is formed to cover the top electrode 60, the capping layer 58, the MTJ 50 and the SOT layer 40 to complete the fabrication of the MRAM element 1. The material of the dielectric capping layer 80 may include but is not limited to nitrogen-doped carbide layer (NDC), silicon nitride (SiN) or silicon carbide nitride (SiCN). In the present embodiment, the material of the dielectric capping layer 80 includes silicon nitride.

[0068] The above-mentioned film layers, such as the bottom electrode 30, the SOT material layer 40', the free material layer 52', the barrier material layer 54', the reference material layer 56', the cap material layer 58', the top electrode material layer 60', and the mask layer 70', can be formed by any suitable method, such as but not limited to molecular beam epitaxy (MBE), chemical vapor deposition (CVD), metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), atomic layer deposition (ALD), etc.

[0069] Figure 5 An MRAM device 1 according to an embodiment of the present invention is shown, which includes a bottom electrode 30, a SOT layer 40, a MTJ 50 and a top electrode 60. The SOT layer 40 is disposed on the bottom electrode 30, the MTJ 50 is disposed on the SOT layer 40, and the top electrode 60 is disposed on the MTJ 50. The MTJ 50 includes a free layer 52, a barrier layer 54 and a reference layer 56 stacked in sequence from the SOT layer 40 to the top electrode 60. The MRAM device 1 may optionally include a cap layer 58 disposed between the MTJ 50 and the top electrode 60, and may optionally include a dielectric cap layer 80 covering the top electrode 60, the cap layer 58, the MTJ 50 and the SOT layer 40. The materials of the SOT layer 40, the MTJ 50, the cap layer 58 and the top electrode 60 may be the same as the SOT material layer 40', the MTJ stack 50', the cap layer material layer 58' and the top electrode material layer 60', respectively, and will not be further described herein.

[0070] Please also refer to Figure 6 , which is a cross-sectional schematic diagram of bottom electrodes 30, 30a, 30b according to some embodiments of the present invention. Figure 6 As shown in part A of FIG. 1 , the bottom electrode 30 includes a first layer 310 and a second layer 320 connected to each other, and the material of the first layer 310 includes Ta x1 N y1 , the material of the second layer 320 includes Ta x2 N y2 , and the following conditions can be satisfied: y2 / x2>1, y1 / x1≥1, and y2 / x2>y1 / x1. It is known that in tantalum nitride, when the ratio of the number of nitrogen ions to the number of tantalum ions is larger, the resistivity of tantalum nitride is larger. The ratio of the number of nitrogen ions to the number of tantalum ions in TaN is equal to 1. Compared with the bottom electrode using TaN as the material, in the bottom electrode 30 of the present invention, the material of the first layer 310 is Ta x1 N y1 , x1 N y1 The ratio of the number of nitrogen ions to the number of tantalum ions is greater than or equal to 1 (i.e., the condition is satisfied: y1 / x1≥1), and the material of the second layer 320 is Ta. x2 N y2 , x2 N y2 The ratio of the number of nitrogen ions to the number of tantalum ions is greater than 1 (i.e., the conditional expression y2 / x2>1 is satisfied). In other words, when other conditions are the same, the resistivity of the second layer 320 is greater than the resistivity of the first layer 310, and the resistivity of the first layer 310 is greater than or equal to the resistivity of TaN. Further, when the thickness T of the bottom electrode 30 is the same as the thickness of the bottom electrode (not shown) made of TaN as the material, the bottom electrode 30 of the present invention can provide a larger resistivity. According to one embodiment of the present invention, the resistivity of the bottom electrode 30 can be greater than 300 micro-ohm-cm.

[0071] Mate Reference Figure 5 , when the current is turned on, when the current I flows upward from the second metal interconnect 22 to the bottom electrode 30 and the SOT layer 40, the current I is divided into a current I1 flowing into the bottom electrode 30 and a current I2 flowing into the SOT layer 40, and then the current I1 and the current I2 are combined and flow downward into the first metal interconnect 21, wherein the magnetic moment in the free layer 52 is mainly flipped by the current I2, that is, the current I2 can be regarded as the effective write current of the MRAM element 1. The present invention can reduce the current I1 flowing through the bottom electrode 30 and further reduce the current I by increasing the resistance of the bottom electrode 30 while the current I2 remains unchanged, which is beneficial to reduce the threshold current of the MRAM element 1 as a whole.

[0072] Please also refer to Figure 5 and Figure 6 In the A portion of the bottom electrode 30, the second layer 320 is disposed on the intermetallic dielectric layer 18, the first layer 310 is disposed on the second layer 320, and the SOT layer 40 is disposed on the first layer 310. Specifically, the bottom electrode 30 defines a normal direction N, and in the normal direction N, the first layer 310 is closer to the SOT layer 40 than the second layer 320. However, the present invention is not limited thereto, and when the positions of the first layer 310 and the second layer 320 are swapped, the resistivity of the bottom electrode 30 remains unchanged, that is, when the arrangement order of the first layer 310 and the second layer 320 is swapped, a resistivity greater than TaN can still be provided. In the normal direction N, the additional benefit of the first layer 310 being closer to the SOT layer 40 than the second layer 320 is that the resistivity of the second layer 320 is greater than that of the first layer 310. When the current is turned on, the current i1 flowing through the first layer 310 will be greater than the current i2 flowing through the second layer 320. Since the tantalum nitride also has some SOT material properties, the current i1 closer to the SOT layer 40 can assist in flipping the magnetic moment of the free layer 52. That is, when the first layer 310 has a larger current i1, the efficiency of flipping the magnetic moment of the free layer 52 can be improved. Further, each layer in the bottom electrode 30 can be regarded as a current path. When the current path with lower resistivity is adjacent to or directly in contact with the SOT layer 40, the efficiency of flipping the magnetic moment of the free layer 52 can be improved.

[0073] Figure 6 In the A part of FIG. 1 , the thickness of the first layer 310 (not separately labeled) and the thickness of the second layer 320 (not separately labeled) are illustrated as being the same, that is, the thickness of the first layer 310 and the thickness of the second layer 320 are both T / 2, but the present invention is not limited thereto, and the thickness of the first layer 310 and the second layer 320 can be adjusted according to actual needs. Preferably, when the thickness of the layer with a higher resistivity (here, the second layer 320) is greater than the thickness of the layer with a lower resistivity (here, the first layer 320), it is beneficial to make the resistivity of the bottom electrode 30 significantly greater than the resistivity of TaN.

[0074] Please refer to Fig. 9 , which is a flow chart of the steps of a method 900 for forming a bottom electrode 30 according to an embodiment of the present invention. The method 900 for forming the bottom electrode 30 may be fabricated using a physical vapor deposition process, and may include steps 910 and 920, wherein step 910 is to provide a tantalum-containing target and a nitrogen-containing gas, and step 920 is to adjust the partial pressure and / or flow rate of the nitrogen-containing gas, wherein the nitrogen-containing gas may include nitrogen (N2) or ammonia (NH3), and may optionally include argon (Ar), for example, when fabricating the first layer 310, the partial pressure of nitrogen or ammonia in the nitrogen-containing gas is less than the partial pressure of nitrogen or ammonia in the nitrogen-containing gas when fabricating the second layer 320, or, when fabricating the first layer 310, the flow rate of the nitrogen-containing gas is less than the flow rate of the nitrogen-containing gas when fabricating the second layer 320.

[0075] In other embodiments, the bottom electrode 30 may be replaced by Figure 6 The bottom electrode 30a in the B portion of the bottom electrode 30a is different from the bottom electrode 30 in that the bottom electrode 30a and the bottom electrode 30 have different numbers of layers. Specifically, the bottom electrode 30 is a double-layer structure, while the bottom electrode 30a is a three-layer structure. The bottom electrode 30a further includes a third layer 330, and the material of the third layer 330 may include Ta x3 N y3 , and the following conditions are satisfied: y3 / x3>1, and y3 / x3>y2 / x2>y1 / x1. Compared with the bottom electrode made entirely of TaN (not shown), the bottom electrode 30a can provide a larger resistivity. Please also refer to Figure 5 and Figure 6 In the B part of the bottom electrode 30a, the third layer 330 is disposed on the intermetallic dielectric layer 18, the second layer 320 is disposed on the third layer 330, the first layer 310 is disposed on the second layer 320, and the SOT layer 40 is disposed on the first layer 310. Specifically, the bottom electrode 30a defines a normal direction N, and in the normal direction N, the first layer 310 is closer to the SOT layer 40 than the second layer 320 and the third layer 330. However, the present invention is not limited thereto, and when the arrangement order of the first layer 310, the second layer 320 and the third layer 330 is changed, the bottom electrode 30a can still provide a resistivity greater than TaN. The bottom electrode 30a is configured such that the resistivity of each layer decreases from the intermetallic dielectric layer 18 to the SOT layer 40 (i.e., along the normal direction N). When the current path with a lower resistivity is adjacent to or directly contacts the SOT layer 40, the efficiency of flipping the magnetic moment of the free layer 52 can be improved.

[0076] In other embodiments, the bottom electrode 30 may be replaced by Figure 6 The bottom electrode 30b in the C portion of the bottom electrode 30a is different from the bottom electrode 30b in that the bottom electrode 30b has a different number of layers than the bottom electrode 30a. Specifically, the bottom electrode 30b is a four-layer structure. The bottom electrode 30b further includes a fourth layer 340, and the material of the fourth layer 340 may include Ta x4 N y4 , and the following conditions can be satisfied: y4 / x4>1, and y4 / x4>y3 / x3>y2 / x2>y1 / x1. Compared with the bottom electrode (not shown) made entirely of TaN, the bottom electrode 30b can provide a larger resistivity. As mentioned above, the arrangement order of the first layer 310, the second layer 320, the third layer 330 and the fourth layer 340 can be changed. By Figure 6In the configuration of the C portion, the bottom electrode 30b is configured such that the resistivity of each layer decreases from the intermetallic dielectric layer 18 toward the SOT layer 40. When the current path with a lower resistivity is adjacent to or directly contacts the SOT layer 40, the efficiency of flipping the magnetic moment of the free layer 52 can be improved.

[0077] like Figure 6 As shown, the bottom electrode of the present invention can be a multilayer structure, wherein at least one layer is made of tantalum nitride, and the ratio of the number of nitrogen ions to the number of tantalum ions is greater than 1, which can help reduce the current flowing through the bottom electrode, thereby helping to reduce the threshold current of the MRAM element as a whole. In the above multilayer structure, each layer can be configured to have a uniform composition and satisfy the conditional formula of the ratio of Ta to N. Figure 6 The number of layers, thickness and arrangement of the bottom electrodes are only examples, and the number of layers, thickness and arrangement of the bottom electrodes can be adjusted according to actual needs.

[0078] In other embodiments, the bottom electrode 30 may be replaced by Figure 7 The bottom electrode 30c in the A portion of the bottom electrode 30 is different from the bottom electrode 30 in that the bottom electrode 30c is a single-layer structure. Specifically, the bottom electrode 30c defines a normal direction N, wherein the material of the bottom electrode 30c includes Ta x N y , and the following condition is satisfied: y / x ≥ 1, and y / x increases gradually from the first surface 301 of the bottom electrode 30c to the second surface 302 of the bottom electrode 30c along the normal direction N. For example, the material closer to the first surface 301 may be Ta x1 N y1 The material closer to the second surface 302 may be Ta x2 N y2 , and the following conditional expressions can be satisfied: y2 / x2>1, y1 / x1≥1, and y2 / x2>y1 / x1. In other words, the concentration of nitrogen ions in the bottom electrode 30c increases gradually along the normal direction N from the first surface 301 of the bottom electrode 30c to the second surface 302 of the bottom electrode 30c. Compared with the bottom electrode (not shown) that uses TaN as the material as a whole, the bottom electrode 30c can provide a larger resistivity. In addition, the bottom electrode 30c is configured to have a decreasing resistivity from the intermetallic dielectric layer 18 to the SOT layer 40. The portion with the same nitrogen ion concentration in the bottom electrode 30c can be regarded as a current path. When the current path with a lower resistivity is adjacent to or directly in contact with the SOT layer 40, the efficiency of flipping the magnetic moment of the free layer 52 can be improved.

[0079] In other embodiments, the bottom electrode 30 may be replaced by Figure 7The bottom electrode 30d in the B portion of the embodiment of the present invention is different from the bottom electrode 30c in that the bottom electrode 30d has a double-layer structure. Specifically, the bottom electrode 30d includes a first layer 360 and a second layer 370 connected to each other. The material of the first layer 360 may include TaN, and the material of the second layer 370 may include TaN. x N y , and the following conditional formula is satisfied: y1 / x1≥1, and y / x increases gradually along the normal direction N from the first surface 301 of the bottom electrode 30d to the second surface 302 of the bottom electrode 30d, which can be regarded as replacing a part of the bottom electrode 30c with TaN. Compared with the second layer 370, the material of the first layer 360 can have a uniform composition, that is, the ratio of the number of nitrogen ions to the number of tantalum ions in each part of the first layer 360 is equal to 1. Compared with the bottom electrode (not shown) using TaN as the material as a whole, the bottom electrode 30d can provide a larger resistivity. The thickness T1 of the first layer 360 can be less than the thickness T2 of the second layer 370, which is conducive to making the resistivity of the bottom electrode 30d significantly greater than the resistivity of TaN. In addition, the resistivity of the first layer 360 is lower than that of the second layer 370 . In the normal direction N, the first layer 360 is closer to the SOT layer 40 than the second layer 370 . When the current path with lower resistivity is adjacent to or directly in contact with the SOT layer 40 , the efficiency of flipping the magnetic moment of the free layer 52 can be improved.

[0080] In other embodiments, the bottom electrode 30 may be replaced by Figure 7 The bottom electrode 30e in the C portion of the bottom electrode 30e is different from the bottom electrode 30d in that the arrangement order of the first layer 360 and the second layer 370 is reversed. Compared with the bottom electrode (not shown) made entirely of TaN as a material, the bottom electrode 30e can also provide a larger resistivity. For other details about the bottom electrode 30e, refer to the relevant description of the bottom electrode 30d, which will not be repeated here.

[0081] like Figure 7 As shown, the bottom electrode of the present invention can be a single-layer or multi-layer structure, wherein the material of at least one layer is tantalum nitride, and the ratio of the number of nitrogen ions to the number of tantalum ions is greater than or equal to 1, and the concentration of nitrogen ions increases gradually along the normal direction from the first surface of the bottom electrode (the surface closer to the SOT layer) to the second surface of the bottom electrode (the surface farther from the SOT layer), which can help reduce the current flowing through the bottom electrode, and further help reduce the threshold current of the MRAM element as a whole. Figure 7 The number of layers, thickness and arrangement of the bottom electrodes are only examples, and the number of layers, thickness and arrangement of the bottom electrodes can be adjusted according to actual needs.

[0082] The bottom electrode 30 may be replaced by Figure 8The bottom electrode 30f in the C portion. The bottom electrode 30f includes a first layer 380 and a second layer 390 connected to each other, and the material of the first layer 380 includes Ta x1 N y1 , the material of the second layer 390 includes Ta x2 N y2 , and the following conditions are satisfied: y2 / x2>1, y1 / x1≥1, and y2 / x2>y1 / x1, that is, the resistivity of the second layer 390 is greater than the resistivity of the first layer 380, and the resistivity of the first layer 380 is greater than or equal to the resistivity of TaN. Compared with the bottom electrode (not shown) entirely made of TaN, the bottom electrode 30f can provide a larger resistivity. Specifically, the bottom electrode 30f defines a normal direction N, and the first layer 380, the second layer 390 and the first layer 380 are arranged in sequence along a first direction D1 perpendicular to the normal direction N, wherein the second layer 390 and the MTJ 50 (see Figure 5 ) overlap in the normal direction N, and the first layer 380 and the MTJ 50 do not overlap in the normal direction N. Therefore, when the current is turned on, the current i1 flows from the first layer 380 located on the left to the first layer 380 located on the right, and the current i1 is divided into a current i11 and a current i12, wherein the current i12 flows along the first direction D1 to the second layer 390, and the current i11 flows upward into the SOT layer 40. By configuring the second layer 390 with a larger resistivity, it is beneficial to reduce the current i12 and increase the current i11, and it is beneficial to enhance the efficiency of the SOT layer 40 in flipping the magnetic moment of the free layer 52.

[0083] The method for making the bottom electrode 30f is described as follows: Figure 8 As shown in part A of FIG. 1 , a first layer 380 may be formed first. For example, the first layer 380 may be formed on the intermetallic dielectric layer 18 (see FIG. 1 ). Figure 1 ) on the first layer 380, the material includes Ta x1 N y1 , and the following condition is satisfied: y1 / x1≥1. Next, a patterned mask layer 72 is formed on the first layer 380, wherein the patterned mask 72 has an opening region 74 corresponding to the MTJ 50, that is, the position of the opening region 74 corresponds to the position of the MTJ 50 to be formed subsequently, or the opening region 74 overlaps with the position of the MTJ 50 to be formed subsequently in the normal direction N. Next, an ion implantation process 76 is performed to implant a nitrogen-containing gas (not shown) into a portion P1 of the first layer 380 corresponding to the opening region 74, so that the portion P1 is transformed into a second layer 390, wherein the material of the second layer 390 includes Ta. x2 N y2 , and the following conditions are satisfied: y2 / x2>1, and y2 / x2>y1 / x1.

[0084] Compared with the prior art, the MRAM element of the present invention uses the SOT technology to flip the magnetic moment, which affects the magnetic moment of the free layer through the spin current, which is beneficial to improve the writing speed of the MRAM element. In addition, the MRAM element of the present invention is beneficial to reduce the current flowing through the bottom electrode, and further reduce the threshold current of the MRAM element as a whole, by virtue of the top electrode material comprising tantalum nitride, and the ratio of the number of nitrogen ions to the number of tantalum ions in at least part of the tantalum nitride is greater than 1.

[0085] The above descriptions are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.

Claims

1. A magnetoresistive random access memory device, comprising: The bottom electrode comprises a first layer and a second layer connected to each other, wherein the material of the first layer comprises Ta x1 N y1 , the material of the second layer comprises Ta x2 N y2 , and the following conditions are satisfied: y2 / x2>1, y1 / x1≥1, and y2 / x2>y1 / x1; A spin-orbit torque layer is disposed on the bottom electrode; A magnetic tunneling junction is disposed on the spin-orbit torque layer; and The top electrode is disposed on the magnetic tunnel junction. 2 . The magnetoresistive random access memory device as claimed in claim 1 , wherein the magnetic tunnel junction comprises a free layer, a barrier layer and a reference layer stacked in sequence from the spin-orbit torque layer toward the top electrode. 3 . The magnetoresistive random access memory device as claimed in claim 1 , wherein the bottom electrode defines a normal direction, and in the normal direction, the first layer is closer to the spin-orbit torque layer than the second layer.

4. The magnetoresistive random access memory device as claimed in claim 1, wherein the bottom electrode defines a normal direction, the second layer and the magnetic tunnel junction overlap in the normal direction, and the first layer and the second layer are adjacently arranged along a first direction perpendicular to the normal direction. 5 . The magnetoresistive random access memory device as claimed in claim 4 , wherein the first layer and the magnetic tunnel junction do not overlap in the normal direction.

6. The magnetoresistive random access memory device as claimed in claim 1, wherein the bottom electrode further comprises: The third layer, the material of the third layer comprises Ta x3 N y3 , and the following conditions are satisfied: y3 / x3>1, and y3 / x3>y2 / x2>y1 / x1. 7 . The magnetoresistive random access memory device as claimed in claim 6 , wherein the bottom electrode defines a normal direction, and in the normal direction, the first layer is closer to the spin-orbit torque layer than the second layer and the third layer. 8 . The magnetoresistive random access memory device as claimed in claim 1 , wherein the resistivity of the bottom electrode is greater than 300 μohm-cm.

9. A magnetoresistive random access memory device, comprising: A bottom electrode, defining a normal direction, wherein the material of the bottom electrode comprises Ta x N y , and the following conditional formula is satisfied: y / x≥1, and y / x increases gradually from the first surface of the bottom electrode to the second surface of the bottom electrode along the normal direction; A spin-orbit torque layer is disposed on the first surface on the bottom electrode; A magnetic tunnel junction is disposed on the spin-orbit torque layer; as well as The top electrode is disposed on the magnetic tunnel junction. 10 . The magnetoresistive random access memory device as claimed in claim 9 , wherein the magnetic tunnel junction comprises a free layer, a barrier layer and a reference layer stacked in sequence from the spin-orbit torque layer toward the top electrode.

11. The magnetoresistive random access memory device as claimed in claim 9, wherein the bottom electrode comprises a first layer and a second layer connected to each other, wherein the material of the first layer comprises TaN, and the material of the second layer comprises Ta. x N y . 12 . The magnetoresistive random access memory device as claimed in claim 11 , wherein in the normal direction, the first layer is closer to the spin-orbit torque layer than the second layer.

13. A method for manufacturing a magnetoresistive random access memory device, comprising: A bottom electrode is formed, wherein the material of the bottom electrode comprises Ta x1 N y1 And Ta x2 N y2 , and the following conditions are satisfied: y2 / x2>1, y1 / x1≥1, and y2 / x2>y1 / x1; forming a spin-orbit torque layer on the bottom electrode; forming a magnetic tunneling junction on the spin-orbit torque layer; and A top electrode is formed on the magnetic tunnel junction.

14. The method of claim 13, further comprising: forming a spin-orbit torque material layer on the bottom electrode; forming a magnetic tunneling junction stack on the spin-orbit torque material layer; forming a top electrode material layer on the magnetic tunneling junction stack; and The top electrode material layer, the magnetic tunneling junction stack and the spin-orbit torque material layer are patterned to obtain the top electrode, the magnetic tunneling junction and the spin-orbit torque layer.

15. The method of claim 13, further comprising: A dielectric cap layer is formed to cover the top electrode, the magnetic tunnel junction and the spin-orbit torque layer.

16. The method of claim 13, wherein the bottom electrode is formed by a physical vapor deposition process.

17. The method of claim 16, wherein the physical vapor deposition process comprises: providing a tantalum-containing target and a nitrogen-containing gas; and The partial pressure and / or flow rate of the nitrogen-containing gas is adjusted.

18. The method according to claim 13, wherein the bottom electrode comprises a first layer and a second layer connected to each other, and the material of the first layer comprises the Ta x1 N y1 , the material of the second layer includes the Ta x2 N y2 .

19. The method of claim 13, wherein the bottom electrode defines a normal direction, and the concentration of the nitrogen ions in the bottom electrode increases gradually along the normal direction from the first surface of the bottom electrode to the second surface of the bottom electrode.

20. The method of claim 13, wherein forming the bottom electrode comprises: A first layer is formed, wherein the material of the first layer comprises Ta x1 N y1 ; forming a patterned mask on the first layer, wherein the patterned mask has an opening region corresponding to the magnetic tunnel junction; and An ion implantation process is performed to implant the nitrogen-containing gas into a portion of the first layer corresponding to the opening area, so that the portion of the first layer is transformed into a second layer, wherein the material of the second layer includes the Ta x2 N y2 .