Method for automatically monitoring ground fault circuit interrupter device, electrical wiring device and recordable medium

Abstract

The embodiment of the invention relates to a method for automatically monitoring a ground fault circuit interrupter device, an electrical wiring device and a recordable medium. Software code is stored in the recordable medium that operates in conjunction with a circuit interrupting device having an automatic monitoring circuit that includes a controller for automatically testing various functions and structures of the device. The automatic monitoring circuit initiates the software code, which includes an automatic monitoring routine that establishes a self-test fault, particularly during positive or negative half-waves of an AC electrical cycle, and determines whether a detection mechanism within the device properly detects the self-test fault. Further, the software code executed by the controller compares a voltage sensed from a test signal to the determined or set maximum voltage value, and compares the sensed voltage to the set or determined minimum voltage value.

Description

[0001] Information about divisional applications

[0002] This application is a divisional application of an invention patent application with an application date of December 18, 2015, application number 201580085745.5, and invention name “GFCI Self-Test Software for Autonomous Monitoring and Fault Protection Power Rejection”.

[0003] CROSS REFERENCE TO RELATED APPLICATIONS

[0004] This application contains related patents contained in co-pending U.S. patent application Ser. No. 14 / 204,946 to Stephen P. Simonin, entitled "GFCI SELF TEST SOFTWARE FUNCTIONAL PROGRAM FOR AUTONOMOUS MONITORING AND FAIL SAFE POWER DENIAL OPERATIONS", U.S. patent application Ser. No. 14 / 577,164 (Attorney Docket No. 208273-9005-US00) to Stephen P. Simonin, entitled "GFCI TEST MONITOR CIRCUIT", and U.S. patent application Ser. No. 14 / 577,164 (Attorney Docket No. 208273-9005-US00) to Stephen P. Simonin, entitled "GFCI SELF TEST LINE AND LOAD CONTACT IMPROVED ALIGNMENT" to Stephen P. Simonin. The present invention relates to subject matter related to subject matter in U.S. patent application Ser. No. 14 / 577,048 (Attorney Docket No. 208273-9006-US00) "ALIGNMENT" the entire contents of each of which are expressly incorporated herein by reference. Technical Field

[0005] The present invention relates generally to electrical devices with switches. More specifically, the present invention is directed to software code for operating a circuit interrupting device having an automatic monitoring circuit for automatically testing various functions and structures of the device. The automatic monitoring circuit initiates software code containing an automatic monitoring routine that establishes a self-test fault, inter alia, during the positive or negative half-wave of an AC power cycle, and determines whether a detection mechanism within the device has properly detected the self-test fault. An early detection signal indicates that the self-test fault has been properly detected without interfering with the normal operation of the detection circuit and without causing a false trip within the device. The additional functionality of the software code permits automatic verification of when the device has reached the end of its useful life. Background Art

[0006] GFCI devices having contacts biased toward an open position require a latching mechanism for placing and maintaining the contacts in a closed position. Likewise, electrical devices with switches having contacts biased toward the closed position require a latching mechanism for placing and maintaining the contacts in an open position. Examples of conventional types of devices include circuit interrupting type devices such as circuit breakers, arc fault interrupters, and GFCIs, to name a few.

[0007] In order to be sold commercially in the United States, GFCI devices must comply with standards established by Underwriters Laboratories ("UL") in conjunction with industry-leading manufacturers and other industry members (such as various safety organizations). One UL standard covering GFCI devices is UL-943, entitled "Standard for Safety-Ground Fault Circuit Interrupters." UL-943 applies to Class A single-phase and three-phase GFCIs, which are intended for the protection of personnel and have minimum requirements for the function, construction, performance, and marking of such GFCI devices. Among other things, UL-943 requires specific fault current levels and response timing requirements at which GFCI devices should trip. Typically, a GFCI is required to trip when a ground fault having a level greater than 5 milliamperes ("mA") is detected. In addition, when a high-resistance ground fault is applied to the device, according to the equation T = (20 / I) 1.43 , this version of UL-943 specifies that the device should trip and prevent current from being delivered to the load, where T refers to time and is expressed in seconds, and I refers to current and is expressed in milliamps. Thus, in the case of a 5mA fault, the device must detect the fault and trip in 7.26 seconds or less.

[0008] With such safety-related standards in place, and because GFCI devices are directly credited with saving many lives due to their introduction in the early 1870s, they have become ubiquitous in residential and commercial power grids. However, like most electromechanical devices, GFCI devices are susceptible to faults. For example, one or more of the electronic components driving the mechanical current interrupter device may short or otherwise become defective, as may components in a fault detector circuit or elsewhere within the device, thereby rendering the device unable to properly detect a ground fault and / or properly interrupt the flow of current. For this reason, there has long been a need for a GFCI device with a monitoring circuit that implements the ability to manually test the device to trip when a fault is encountered. Such monitoring circuits typically have a test button that, when pressed, actuates a simulated ground fault on the hot and neutral conductors. If the device is functioning properly, a simulated fault is detected and the device will trip, i.e., actuate a mechanical interrupter to disconnect the current path connecting the line side of the device (e.g., in the case of supplied AC power) and the load side (where the user connects their appliances, etc. and where downstream receptacles or additional GFCI devices are connected).

[0009] Research conducted by industry safety organizations indicates that, generally speaking, the public does not regularly test their GFCI devices to determine proper operation, i.e., by pressing a test button. This research further revealed that some GFCI devices that have been in service for an extended period of time have become inoperative and unable to properly detect a fault condition, thereby rendering the device unsafe. Specifically, it was found that after extended use, when a fault occurred, the GFCI device failed to trip, thereby rendering the device operable as an electrical outlet, but unsafe when a fault condition existed. Because the device is not regularly tested, this unsafe condition is exacerbated. That is, people mistakenly believe that the device is operating in view of the fact that it is adequately delivering power, when in fact the device is a potentially life-threatening source of hazard.

[0010] Combined with the realization that people do not regularly test their GFCI devices (despite explicit instructions from the manufacturer to do so), the discovery that GFCI devices deployed in the field are becoming increasingly inoperable and unsafe has led to research into possible changes to the UL-943 standard to require GFCI devices to self-test themselves (e.g., automatic monitors) without human intervention. The changes contemplated for UL-943 further include requirements for alerting consumers of a loss of protection and / or for the device to automatically remove itself from service (e.g., permanently trip). Furthermore, these additional self-test operations would have to be performed without interfering with the primary function of the device, which is to trip when an actual fault is encountered.

[0011] The modified self-test functionality mentioned above is not yet a requirement for UL-943 certification, but it is expected that it will be such a requirement soon. In preparation for this significant UL change, and in view of the seemingly unlimited reduction in the cost of integrated circuits, many GFCI manufacturers have moved to digital technology (such as microprocessors and microcontrollers) that is conducive to previous analog designs to provide both ground fault protection and self-monitoring functionality. However, the digital solutions provided are not ideal so far. For example, several prior art GFCI designs, including those designed to provide self-test functionality, suffer from harassment tripping, which is a situation in which the interrupter is actuated when a real ground fault, a manually generated simulated ground fault, and an automatic self-test fault do not exist. This disadvantage is considered by many to be exacerbated by the additional requirement of automatic self-test, which results in additional induced currents in the device.

[0012] It would therefore be desirable to provide a GFCI device that provides some self-test capabilities, including those proposed in the next revision of UL-943, but minimizes the risks associated with nuisance tripping. Summary of the invention

[0013] In view of the difficult problems associated with prior art GFCI devices, including but not limited to the difficult problems discussed above, circuits according to one or more exemplary embodiments of the present invention generally relate to automatic monitoring circuits that constantly monitor the performance of a GFCI device. More specifically, a processing device (e.g., a microcontroller or microprocessor) is configured to periodically execute an automatic monitoring routine based on a stored software program for testing and verifying the durability and functionality of various sub-circuits within the GFCI device. In order to test the proper galvanic isolation of the GFCI device, a driver coupled to the microcontroller is operated to initiate a test signal indicative of a ground fault whenever the automatic monitoring routine is executed or run, and monitor different circuit nodes to confirm proper operation of the device.

[0014] An end-of-life indicator is also coupled to the microcontroller to indicate if the GFCI device fails to properly detect the test signal or some other fault has occurred within the device. In order to avoid tripping of the mechanical current interrupting device when the test signal is generated, and to allow as much of the GFCI device circuitry as possible to perform its intended functions, a unique monitor circuit is provided that utilizes the various functionalities of digital components (e.g., GFCI integrated circuit devices and microcontrollers). Specifically, in order to provide an automatic test function that monitors the fault detection capabilities of the GFCI device under normal conditions without interfering with and causing false tripping, embodiments consistent with the present invention include a specially selected filter capacitor associated with the interrupter drive output of the GFCI integrated circuit ("IC") device. Proper selection of the capacitor and other related circuit components prevents the interrupter drive circuit (e.g., silicon controlled rectifier ("SCR")) from starting or turning on until a true fault condition is encountered.

[0015] According to one aspect of the present invention, there is provided a recordable medium having software codes stored thereon, the software codes comprising: a code for automatically monitoring an electrical wiring device; a code for monitoring a test signal output from a fault detection circuit to determine the operating state of the electrical wiring device; a code for determining an end-of-life state when the test signal from the fault detection circuit is less than a threshold value; and a code for generating an alarm signal when the end-of-life state is determined.

[0016] According to another aspect of the present invention, a method for automatically monitoring a ground fault circuit interrupter device includes the steps of: monitoring a test signal output from a fault detection circuit to determine an operating state of the electrical wiring device; determining an end-of-life state if the test signal from the fault detection circuit is less than a minimum threshold value for a first predetermined number of test times within a first predetermined time period; determining the end-of-life state if the test signal from the fault detection circuit is greater than a maximum threshold value for a second predetermined number of test times within a second predetermined time period; and generating an alarm signal when the end-of-life state is determined.

[0017] Other aspects of the invention will become apparent by consideration of the detailed description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Exemplary embodiments of the present invention are described in detail below by way of example with reference to the accompanying drawings.

[0019] Figure 1 is a side elevation view of a self-testing GFCI outlet device according to an exemplary embodiment of the present invention.

[0020] Figure 2 yes Figure 1A side elevation view of a self-testing GFCI receptacle is shown with the front cover of the housing removed.

[0021] Figure 3 yes Figure 1 00140] A side elevation view of the core assembly of the self-test GFCI receptacle device shown in FIG.

[0022] Figures 4A to 4D is a schematic diagram of an exemplary circuit consistent with an exemplary embodiment of the present invention.

[0023] Figure 5 is an oscilloscope trace that demonstrates how delaying the opening of the contacts of an interrupt device reduces the power applied through the contacts of the interrupt device when the contacts are opened.

[0024] Fig. 6A is a portion of a system level flow diagram illustrating the operation of software code according to an exemplary embodiment of the present invention.

[0025] Figure 6B is a flowchart illustrating the operation of software code according to an exemplary embodiment of the present invention. Fig. 6A Another part of the system-level flow chart referenced in .

[0026] Figure 6C is a flowchart illustrating the operation of software code according to an exemplary embodiment of the present invention. Fig. 6A Another part of the system-level flow chart referenced in .

[0027] Fig.6D1 and 6D2 is a flowchart illustrating the operation of software code according to an exemplary embodiment of the present invention. Fig. 6A Another part of the system-level flow chart referenced in .

[0028] Fig. 6E is a flowchart illustrating the operation of software code according to an exemplary embodiment of the present invention. Fig. 6A Another part of the system-level flow chart referenced in .

[0029] Fig. 6F is a flowchart illustrating the operation of software code according to an exemplary embodiment of the present invention. Fig. 6A Another part of the system-level flow chart referenced in .

[0030] Figure 6G1 and 6G2 is a flowchart illustrating the operation of software code according to an exemplary embodiment of the present invention. Fig. 6A Another part of the system-level flow chart referenced in .

[0031] Figures 6H1 to 6H3 is a flowchart illustrating the operation of software code according to an exemplary embodiment of the present invention. Fig. 6AAnother part of the system-level flow chart referenced in .

[0032] Figure 7 is a system level diagram illustrating basic startup operations of software code according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION

[0033] Before explaining the embodiments of the invention in detail, it should be understood that the invention is not limited in its application to the details of construction and arrangement of components set forth in the following description or illustrated in the following drawings. The invention is capable of other embodiments and of being practiced or carried out in various ways.

[0034] Exemplary embodiments of devices consistent with the present invention include one or more of the novel mechanical and / or electrical features described in detail below. For example, one or more. The method and apparatus are particularly useful for performing image recognition or "fingerprinting" of a movable object (e.g., a person or a movable vehicle), and performing reacquisition of the movable object after a temporary loss of tracking, and the disclosed exemplary embodiments of the present invention include automatic monitoring or self-test features. Some self-test features and capabilities relative to GFCI devices have been previously disclosed in, for example, U.S. Patents Nos. 6,807,035, 6,807,036, 7,315,437, 7,443,309, and 7,791,848, and U.S. Patent Application No. 13 / 422,790, all of which are commonly assigned to the same assignee of the present application, and their entire corresponding contents are incorporated herein by reference in their entirety. Automatic monitoring features consistent with the invention disclosed herein are more robust than previously disclosed automatic monitoring features and reduce the probability of nuisance tripping or disturbance of the device. For example, additional features related to the determination of end-of-life ("EOL") conditions and actions taken after such determination are provided. Further exemplary novel electrical and mechanical features consistent with the invention are described below with reference to the drawings.

[0035] See also Figure 1, a GFCI outlet 10 according to an exemplary embodiment of the present invention includes a front cover 12 having a two-wire seat face 14 having phase 16, neutral 18, and ground 20 openings. Face 14 also has an opening 22 that accommodates a reset button 24, which is adjacent to an opening 26 that accommodates a test button 28, and six corresponding circular openings 30 to 35. According to this exemplary embodiment, openings 30, 33 accommodate two corresponding indicators, such as LEDs of different colors, openings 32, 34 accommodate corresponding bright LEDs, which are used, for example, as night lights, opening 31 accommodates a light-conducting photocell, which is used, for example, to control the night light LED, and opening 35 provides access to a set screw for adjusting the photocell device according to this and other exemplary embodiments. A rear cover 36 is secured to the front cover 12 by eight fasteners 38, Figure 1 Four fixing members 38 are shown, and the socket 10 is Figure 1 1. Four additional fasteners are provided on the side obscured from view in FIG. 1. For example, each fastener 38 may include a barbed post 50 on the front cover 12 and a corresponding elastic band 52 on the rear cover 36, similar to that described in detail in U.S. Pat. No. 6,398,594, the entire contents of which are incorporated herein by reference in their entirety. A ground yoke / bridge assembly 40 having standard mounting ears 42 extends from the end of the receptacle 10.

[0036] See also Figure 2 , the front cover 12 has been removed to expose the manifold 126, which provides support for the printed circuit board 390 and the yoke / bridge assembly 40. According to the illustrated embodiment, the manifold 126 includes four dovetail interconnects 130 that mate with corresponding recesses 132 along the upper edge of the rear cover 36. One dovetail-recess pair is provided on each of the four sides of the manifold 126 and the rear cover 36, respectively.

[0037] Figure 3 8 is a side elevation view of a core assembly 80. The core assembly 80 includes a circuit board 82 that supports most of the working components of the socket, including Figures 4A to 4D 4 ), sense transformer 84 and grounded neutral transformer 85 (not shown). Line contact arms 94, 96 pass through transformers 84, 85 with an insulating separator 98 therebetween. Line contact arms 94, 96 are cantilevered, with their respective distal ends carrying phase and neutral contacts 102, 104. Load contact arms 98, 100 are also cantilevered, with their respective distal ends carrying phase and neutral load contacts 101, 103. The resiliency of the cantilevered contact arms biases the line contacts 102, 104 and load contacts 101, 103 away from each other. Load contact arms 98, 103 rest on a movable contact carrier 106 made of an insulating (preferably thermoplastic) material.

[0038] FIG. 4 is a schematic diagram of the electrical and mechanical components of a GFCI receptacle device consistent with one or more of the exemplary embodiments of the present invention. The circuit shown in FIG. 4 may be used in a GFCI device as described above with respect to various embodiments of the present invention. The circuit of FIG. 4 is consistent with the mechanical operation of the exemplary embodiments described above; however, a GFCI device consistent with embodiments of the present invention need not use the exact circuit depicted in FIG. 4, and a person skilled in the art, after viewing FIG. 4 and / or reviewing the description set forth below, will be able to modify certain aspects of the circuit to achieve a similar overall result. Such modifications are contemplated and considered to be within the scope of the present invention set forth herein.

[0039] FIG4 is a schematic diagram of a circuit according to an exemplary embodiment of the present invention. The circuit shown in FIG4, or its various subcircuits, may be implemented in a variety of electrical wiring devices, however, for the purpose of description, this document will be combined with its Figures 1 to 3 The circuit of FIG. 4 is discussed with reference to the use of the GFCI receptacle device shown in FIG.

[0040] The circuit of FIG. 4 includes a phase terminal 326 and a neutral terminal 328 for electrical connection to an AC power source (not shown), such as a 60 Hz, 120 volt rims power source used for household power in the United States. The circuit of FIG. 4 and the software resident thereon and implemented therewith may be modified to also accommodate other power delivery systems. Such modifications and the resulting circuits and wiring devices in which the circuits and software will ultimately be used are contemplated by the inventors and are considered to be within the spirit and scope of the invention described herein. For example, power delivery systems using different voltages and frequencies are within the scope of the invention.

[0041] 4, the phase conductor 330 and the neutral conductor 332 are connected to the phase and neutral terminals, respectively, and each passes through a sensing transformer 334 and a grounded neutral transformer 336, which are part of the detection circuit described below. Figure 1 The input terminal screws 326, 328 in the figure, and the phase and neutral conductors 330, 332 represent the line contact arms 94, 96, respectively, as described above with respect to Figure 3 Each of the line conductors 330, 332 has a respective fixed end connected to the phase and neutral terminals and each includes a respective movable contact, such as the contacts 102, 104 from the embodiments described above. The face phase and face neutral conductors 338, 340 each include an electrical contact (not shown) fixed thereto. The face conductors are electrically connected to respective face terminals 342, 344 and, in the embodiment shown, are integral therewith to which a plug from a load device (not shown), such as an appliance, is to be connected when the electrical outlet device is in use.

[0042] The circuit shown in FIG. 4 according to this embodiment also includes optional load phase and load neutral terminals 346, 348, respectively, which are electrically connected to downstream loads (not shown), such as one or more additional receptacle devices. The load terminals 346, 348 are connected to cantilevered load conductors 277, 278, each of which includes a movable contact (not shown in FIG. 4) at its distal end. The load contacts are disposed below and coaxial with the corresponding phase and neutral contacts and phase and neutral face contacts, so that when the line conductors move toward the load and face conductors, the three sets of contacts mate and are electrically connected together. When the device is in this condition, it is said to be "reset" or in a reset state.

[0043] Detector circuit

[0044] 4, the detector circuit 352 includes transformers 334, 336, and a GFCI integrated circuit device ("GFCIIC") 350. According to an embodiment of the present invention, the GFCIIC 350 is a well-known 4141 device, such as the RV4141 device manufactured by Fairchild Semiconductor Corporation. Other GFCIIC devices may also be used in place of the 4141 in the circuit of FIG. 4, and such modifications are within the spirit and scope of the present invention.

[0045] The GFCIIC device 350 receives electrical signals from various other circuit components, including transformers 334, 336, and detects one or more types of faults, such as real faults, simulated faults, or self-test ground faults, and real or simulated grounded neutral faults. For example, when sufficient current imbalance occurs in the line conductors 330, 332, the net current through the transformers 334, 336 causes a magnetic flux to be generated at least around the transformer 334. This magnetic flux causes an induced current on the conductor 333, which is wrapped around the sensing transformer 334. The respective ends of the conductor 333 are connected to the positive and negative inputs of the sense amplifier of the GFCIIC device 350 at input ports V-REF and VFB, respectively. The induced current on the conductor 333 causes a voltage difference at the input of the sense amplifier of the GFCIIC 350. When the voltage difference exceeds a predetermined threshold, a detection signal is generated at one or more of the outputs of the GFCIIC 350, such as the SCR trigger signal output port (SCR_OUT). The threshold used by GFCIIC 350 is determined by the effective resistance connected between the operational amplifier output (OP_OUT) and the positive input to the sense amplifier ("VFB").

[0046] The current imbalance on the line conductors 330, 332 is caused by a real ground fault, a simulated ground fault, or a self-test ground fault. Figure 1 ) occurs), a simulated ground fault is generated. As described in further detail below, a self-test fault occurs when the automatic monitoring circuit 370 initiates an automatic monitoring test sequence, which includes generating a current on the independent conductor 356.

[0047] According to an embodiment of the present invention, when the test switch 354 is closed, some of the current flowing in the line conductors 330, 332 and the load conductors 338, 340 is shunted from the phase plane conductor 338 (and when the device is in the reset state, the phase load conductor 277) around the sense transformer 334 and through the resistor 358 to the neutral conductor 332. By shunting some of the current through the resistor 358 in this manner, an imbalance is created in the current flowing through the conductor 330 and the current flowing in the opposite direction through the conductor 332. When the current is unbalanced, i.e., the net current flowing through the conductors through the sense transformer exceeds a threshold value (e.g., 4 to 5 mA), the detector circuit 352 detects this simulated ground fault and activates the SCR output (SCR_OUT) of the GFCI IC 350.

[0048] When the SCR output of GFCIIC 350 is activated, switch 360 (e.g., SCR) is triggered to an ON state or condition, which allows current to flow from phase conductor 330 through resistor 500-photocoupler 505. Photocoupler 505 isolates the triggering of switches 361 and 369 (e.g., SCR) from the household power supply and solenoid (e.g., dual solenoid coil 362 [described below]). Although photocoupler 505 is illustrated in FIG. 4, in other configurations of the present invention, different solid-state relays may be used to replace the photocoupler. For descriptive purposes, switches 360, 361, and 369 will be described herein with respect to an embodiment of the present invention in which each switch is an SCR. After SCR 360 is triggered to an ON condition or state, photocoupler 505 is triggered or activated to an ON condition or state, and photocoupler 505 allows current to flow from pin 4 of photocoupler 505 to pin 3. A reverse biased Zener diode 510 is connected across pins 1 and 2 of the optocoupler 505 to protect the optocoupler 505 from surges and / or transient voltage spikes. For example, if a voltage greater than the reverse biased breakdown voltage of the Zener diode 510 (e.g., 5V) is applied across the Zener diode 510, the Zener diode 510 will conduct current in the reverse direction. This action diverts the current away from the optocoupler 505.

[0049] The voltage supply output VS of GFCIIC 350 provides a voltage to resistor 515, which is connected to pin 4 of optocoupler 505. The current flowing through resistor 515 and pins 4 and 3 of optocoupler 505 can be operated to trigger or activate the gates of SCR 361 and SCR 369 to an on condition or state. However, resistor 515 is electrically connected to capacitors 520 and 525 through optocoupler 505 to create a resistor-capacitor ("RC") circuit 530. The RC time delay introduced by RC circuit 530 delays the gates of SCR 361 and 369 from being triggered or activated to an on state and delays the tripping of the device by a certain amount of time. In some embodiments, capacitors 520 and 525 can be replaced with one capacitor. In other embodiments, more than two capacitors can be used to provide capacitors to RC circuit 530.

[0050] Once the amount of time from the delay of the RC circuit 530 has elapsed, the SCR 361 and SCR 369 are activated or triggered to the on state. When the SCR 361 is on, current flows from the phase conductor 330 through the secondary coil 363 of the dual coil solenoid 362, the fuse 365, the diode 367, and the SCR 361. Additionally, when the SCR 369 is on, current flows from the phase conductor 330 through the primary coil 364 of the dual coil solenoid 362, the fuse 372, the diode 374, and the SCR 369. In some embodiments, only one of the SCR 361 and SCR 369 is implemented in the delay circuit, and the solenoid 362 includes one coil. The current flowing through the two coils 363, 364 creates a magnetic field that causes the armature to move within the solenoid 362. As the solenoid armature moves, it causes the contact carrier (e.g., Figure 3 106) unlatched, the contact bracket is part of the interrupting device 315, and the bracket drops under the natural bias of the line conductors 330, 332, that is, away from the surface conductors 338, 340 and the load conductors 277, 278. The device is now said to be "tripped" due to a successful manual simulated fault test sequence, and the device will not deliver power to the load until it is reset. The time taken for the switch 354 of the present invention to close until the device is tripped and current no longer flows from the phase conductor 330 to either of the surface and load conductors and through the solenoid coils 363, 364 is so short that the fuses 365, 372 remain unbroken.

[0051] The delay introduced by the RC circuit 530 delays the opening of the conductors 330, 332 so that the conductors open when there is less power (e.g., less than 100% VCC) provided through the contacts of the interrupt device 315. For example, the delay in the activation of the SCR output of the GFCIIC 350 introduced by the capacitor 307 (described below) causes the SCR 360 to trigger at approximately the peak power point of the input power on the conductors 330, 332 (i.e., approximately 90° within the AC waveform). When this occurs, when the contacts open, a large amount of plasma may be generated by the load at the interrupt device 315, which may burn the contacts of the interrupt device 315. The RC circuit 530 is operable to delay the opening of the contacts of the interrupt device 315 until less power is provided through the interrupt device 315. In some embodiments, the RC circuit introduces a delay that reduces the power being provided through the interrupt device 315 to between approximately 25% and approximately 100% VCC when the contacts open. In some embodiments, the interrupt device 315 is triggered when between approximately 50% and 65% VCC is being provided by the interrupt device 315. This reduced power through the interrupt device 315 reduces the amount of plasma generated when the contacts are open. Thus, contacts containing reduced silver can be used (i.e., to reduce cost), and the life span of the contacts can be increased (e.g., by reducing burning of the contacts by plasma).

[0052] Figure 5 An oscilloscope trace 600 is illustrated that demonstrates how delaying the opening of the contacts of the interrupt device 315 reduces the power through the interrupt device 315 when the contacts are open. Figure 5 The start of the positive half cycle of the AC waveform used to trip the device is illustrated at 605. In this illustrative example, resistor 515 has a value of 53 kilo-ohms and capacitors 520, 525 have a value of 0.23 μF. Microcontroller 301 uses the voltage at port GP3 ​​of microcontroller 301 to determine whether GFCI IC device 350 is being supplied with power and whether the device is tripped or in a reset condition. Figure 5 At 610, the leading edge of the voltage at port GP3 ​​is illustrated. At 615, the delay in the start-up of the SCR output of GFCIIC 350 introduced by capacitor 307 causes SCR 360 to be triggered. Figure 5As illustrated in , SCR 360 is triggered at approximately peak power (approximately 100% VCC). However, RC circuit 530 prevents SCR 361 and SCR 369 from being triggered for approximately 1 mS until 620. After SCR 361 and SCR 369 are triggered, the mechanical delay in the opening of the contacts of interrupt device 315 (described above) delays the opening of the contacts until 625. A total delay of 4.86 mS from the leading edge of the voltage at GP3 ​​(610) is achieved until the contacts of the interrupt device actually open (625). The voltage of the positive half cycle of the AC waveform is 120 V (85 volts rms) or approximately 68% VCC.

[0053] For illustrative purposes, Figure 5 , and other values ​​of resistor 515 and capacitors 520 and 525 may be used that will increase or decrease the RC time delay introduced by RC circuit 530. The RC delay from RC circuit 530 may be increased (e.g., greater than about 1 mS), but sufficient power must be present at solenoid 362 to open the contacts of interrupt device 315. The minimum power required to open the contacts of interrupt device 315 occurs at approximately 25% VCC of the illustrated AC waveform.

[0054] Manual test via reset operation

[0055] Referring again to FIG. 4 , for example, by pressing the reset button 24 ( Figure 1 ) to close reset switch 300 also initiates the test operation. Specifically, when reset switch 300 is closed, the voltage supply output VS of GFCIIC 350 is electrically connected to the gate of SCR 360 through conductor 308, thereby turning on SCR 360. When SCR 360 is turned on, current is drawn from line conductor 330 through diode 359 and SCR 360, and finally to ground. Similar to as previously discussed, when SCR 360 is turned on by pressing the test button, after the RC time delay and current flows through solenoid coils 363, 364, turning on SCR 360 by pressing the reset button also causes SCR 361 and SCR 369 to turn on. The current flowing through coils 363, 364 of solenoid 362 generates a magnetic field at the solenoid, and the armature within the solenoid is actuated and moves. Under typical (eg, non-test) conditions, actuating the armature in this manner trips the device, such as when an actual fault occurs.

[0056] However, when the reset switch 300 is closed, the device may already be in a tripped condition, i.e., the contacts of the line, face, and load conductors are electrically isolated. That is, after the device has tripped, the reset button is usually pressed to re-latch the contact bracket and re-electrically contact the line, face, and load contacts. If the armature of the solenoid 362 fails to start when the reset button is pressed, and after the reset button is released, the reset mechanism including the contact bracket fails to engage the reset plunger when it returns, then the device will not reset. Therefore, if, for example, the device has not been wired to the AC wire, or it has been miswired, that is, the device has been wired to the AC power that is not connected to the line terminals 326, 328, then no power is applied to the GFCIIC 350. If no power is applied to the GFCIIC 350, then the gate of the SCR 360 cannot be driven by the SCR output of the GFCIIC 350 or when the static button is pressed. Under this condition, the device will not be able to reset. By ensuring that the device is shipped to the user in a tripped condition, the miswiring condition is prevented according to the wiring device in accordance with the embodiment of the present invention. Because the device cannot be reset until AC power is properly applied to the line terminals, a miswiring condition is prevented.

[0057] Automatic monitoring circuit

[0058] Continuing with the exemplary circuit schematic diagram shown in FIG. 4 , the automatic monitoring circuit 370 includes a programmable device 301. The programmable device 301 may be any suitable programmable device, such as a microprocessor or microcontroller, which may be programmed to implement the automatic monitoring routine, as explained in detail below. For example, according to the embodiment shown in FIG. 4 , the programmable device 301 is an ATMEL MCU from the ATtiny 10 family. TM Microcontroller Implementation. The programmable device may also be implemented by a microchip microcontroller (eg PIC10F204 / 206).

[0059] According to one exemplary automatic monitoring or automatic self-test routine according to the embodiment shown in FIG4, the microcontroller 301 initiates the automatic monitoring routine approximately every three (3) seconds by setting a software automatic monitoring test flag. The automatic monitoring test flag initiates an automatic monitoring routine within the circuit interrupting device and confirms that the device is operating properly, or in some cases, determines that the circuit interrupting device has reached its end of life ("EOL"). When the automatic monitoring routine runs with a positive (i.e., successful) result, the automatic monitoring circuit enters a sleep state until the microcontroller 301 again sets the test flag and initiates another automatic monitoring routine.

[0060] If the automatic monitoring routine runs with a negative result, e.g., it cannot be determined that the circuit interrupting device is functioning properly, or it is determined that it is not actually operating properly, then a fault counter is incremented, and when instructed by a software program stored in memory within the device, the microcontroller 301 initiates another automatic monitoring routine. In addition to the fault count incrementing, a temporary indication of the fault is provided. For example, according to an embodiment of the present invention, when such a fault occurs, the I / O port GP0 of the microcontroller 301 is controlled to be an output, and the light emitting diode ("LED") 376 is controlled to flash, e.g., one or more times, to indicate the fault to the user. If the fault counter reaches a predetermined value, i.e., the automatic monitoring routine has run with a negative result a certain number of times, which number is stored and implemented in software, then the automatic monitoring routine invokes an end of life ("EOL") sequence. The EOL sequence includes one or more of the following functions: (a) indicating that the EOL has been reached, such as by continuously flashing or illuminating an indicator light and / or generating an audible sound, (b) attempting to trip the device, (c) preventing attempts to reset the device, (d) storing the EOL event in non-volatile memory, such as in the event of a power failure, and (e) clearing the EOL condition when the device loses power.

[0061] According to this embodiment, when the auto-monitoring software determines that it is time to run the auto-monitoring routine, i.e., based on the car watchdog timer, a stimulus signal 302 is turned on at the I / O port GP1 of the microcontroller 301. When the stimulus signal is turned on, current flows through the resistor 303 and a voltage is established at the base of the transistor 304, thereby turning on the transistor. When the transistor 304 is turned on, current flows from the DC voltage supply 378 through the resistor 305, which is, for example, a 3 kilo-ohm resistor, and continues through the electrical conductor 356 and the transistor 304 to ground. With respect to the dc voltage source 378, according to an embodiment of the present invention, the value of this voltage source is designed to be between 4.1 volts dc and 4.5 volts dc, but the value of this voltage supply can be any other suitable value, as long as the value used fully considers the other circuit functionalities described below.

[0062] According to this exemplary embodiment, electrical conductor 356 is a wire, but may also be a conductive trace on a printed circuit board. Conductor 356 is connected to resistor 305 at one end, passes through sensing transformer 334, and wraps around the core of the transformer approximately ten (10) times, and is connected at its other end to the collector of transistor 304. Thus, when the software auto-monitoring test flag is set in microcontroller 301 and transistor 304 is turned on, current flows through conductor 356, which comprises a separate conductor from phase conductor 330 and neutral conductor 332, and current also passes through the center of sensing transformer 334.

[0063] If the circuit interruption device according to an embodiment of the present invention functions properly, as current flows through conductor 356 and through the sense transformer, magnetic flux is generated at sense transformer 334. The flux generates a signal on conductor 333 that is detected by detection circuit 352 (including GFCIIC device 350). According to this embodiment, when device 350 detects the flux generated at sense transformer 334, a voltage level increases at one of the I / O ports of device 350, such as the output port labeled CAP in FIG. 4, thereby increasing the voltage on conductor 306.

[0064] According to this embodiment, capacitor 307 is connected between the CAP I / O port of microcontroller 301 and ground. As is known in the art, attaching a capacitor exactly halfway between the CAP output and ground of the GFCIIC device 350 causes the SCR trigger signal (SCR_OUT) output from the GFCIIC device 350 to be delayed by a predetermined time period. The amount of time the trigger signal is delayed is typically determined by the value of the capacitor. However, according to an embodiment of the present invention, capacitor 307 is not connected exactly halfway between the CAP output and ground. Instead, capacitor 307 is also connected to ADC I / O port GP0 of microcontroller 301 via a circuit path that includes a diode 310 in series with a resistor 311 (e.g., 3 megohms), which completes a voltage divider circuit with a resistor 312 (e.g., 1.5 megohms). This additional circuit connected to the capacitor at the CAP output of the GFCIIC device 350 draws current from the delay capacitor.

[0065] By measuring the value of the signal at the ADC I / O port (GP0) and confirming that it is above a certain level, it can be determined whether the detection circuit 352 properly detects the self-test fault signal generated on the conductor 356, and can further confirm whether the GFCI IC device 350 is able to generate the appropriate SCR trigger signal. And, in order to avoid tripping the device during a self-test automatic monitoring fault, before outputting the drive signal at SCR_OUT of the GFCI IC device 350, the voltage at the capacitor 307 is measured and proper self-test fault detection is confirmed.

[0066] If the current drawn on capacitor 307 is too high, then GFCI IC device 350 may not operate properly. For example, if as little as 3 to 4 milliamps of current is drawn from capacitor 307, then a grounded neutral condition, which is also intended to be detected by GFCI IC device 350, cannot be accurately detected, e.g., in accordance with UL requirements, because the SCR trigger signal (SCR_OUT) will not be activated for the necessary amount of time. According to an embodiment of the present invention, less than about 1.3 milliamps, or about 5% of the delay current specified for GFCI IC device 350, is drawn for ADC I / O port GP0 of microcontroller 301. This small current drawn from capacitor 307 has no impact on the ability of the device to properly detect a true ground fault and / or a true grounded neutral fault.

[0067] According to this embodiment, approximately 50 nanoamps of current are drawn from capacitor 307. Parallel resistors 311 and 312 connected to ADCI / O port GP0 of microcontroller 301 produce a 4.5 megohm drain, which limits the current drawn from capacitor 307 to a maximum of 1.0 microamps. GFCIIC device 350 utilizes approximately 40 milliamps of current to produce an SCR trigger, but microcontroller 301 only requires approximately 50 nanoamps to read the SCR trigger signal from capacitor 307 before outputting the SCR trigger signal from SCR_OUT. Therefore, by selecting an appropriate value for capacitor 307, combined with appropriate value selection of resistors 311 and 312 and diode 310, it is possible to maintain the correct delay for the SCR trigger signal (SCR_OUT) from GFCIIC device 350 and use the ADC in microcontroller 301 to measure the signal at the ADC input (GP0) to determine whether the detection circuit 352 has properly detected the test signal on conductor 356.

[0068] It should also be noted that in the embodiment shown in FIG. 4 , LED 376 is also connected to the ADC I / O port (GP0) of microcontroller 301. Therefore, whether LED 376 is conducting or not does not affect the drain on capacitor 307, as well as the delay of the SCR trigger signal and the ability of microcontroller 301 to properly measure the signal output from the CAP I / O port of GFCIIC device 350. Therefore, with respect to the circuit shown in FIG. 4 , LED 376 is selected so that it does not turn on and begin conducting during the time when microcontroller 301 is measuring the signal output from the CAP of GFCIIC device 350. For example, LED 376 is selected so that its turn-on voltage is approximately 1.64 volts or higher, which can be measured at I / O port GP0 according to the circuit shown in FIG. 4 . In addition, when LED 376 is being driven, in order to prevent any signal from being added to capacitor 307, diode 310 is provided.

[0069] According to this embodiment, the circuit path including diode 310 and voltage divider 311, 312 is connected to I / O port GP0 of microcontroller 301, which serves as the input of an analog-to-digital converter ("ADC") within microcontroller 301. The ADC of microcontroller 301 measures the increased voltage established by the charging action of capacitor 307. When a predetermined voltage level is reached, microcontroller 301 turns off auto-monitoring stimulus signal 302, which in turn turns off transistor 304, thereby stopping the current on conductor 356 and, therefore, the flux generated at sensing transformer 334. When this occurs, microcontroller 301 determines that a qualified auto-monitoring event has successfully passed, and, if the current count is greater than zero, decrements the auto-monitoring failure counter.

[0070] In other words, according to this embodiment, the microcontroller 301 repeats the automatic monitoring routine according to a predetermined schedule. The automatic monitoring routine is run as desired at any interval from every few seconds to every month, etc., based on a software program stored in a memory within the microcontroller 301. When the routine is initiated, the flux generated at the sensing transformer 334 occurs in a manner similar to the manner in which the flux would be generated if an actual ground fault had occurred or if a simulated ground fault had been manually generated, such as by pressing a test button as described above.

[0071] However, there is a difference between the automatic monitoring (self-test) faults generated by the automatic monitoring routine and the simulated faults generated by an actual ground fault or by pressing the test button. When an actual or simulated ground fault occurs, a difference in the currents flowing in the phase and neutral conductors 330 and 332, respectively, should be generated. That is, the current on conductor 330 should be different from the current on conductor 332. This differential current flowing through the sense transformer 334 is detected by the GFCIIC device 350, which drives a signal on its SCR_OUT I / O port to activate the gate of the SCR 360 and turn it on. When the SCR 360 is turned on, current is drawn through the coils 363, 364, which causes the interrupt device 315 to trip, thereby causing the contact bracket to drop, which in turn causes the line, face and load contacts to separate from each other. Therefore, current is prevented from flowing through the phase and neutral conductors 330, 332 to the phase and neutral face terminals 342, 344, respectively, and the phase and neutral load terminals 346, 348.

[0072] In contrast, when the automatic monitoring routine is performed in accordance with the present invention, no differential current is generated on the phase and neutral conductors 330, 332, and the interrupting device 315 is not tripped. Rather, during the automatic monitoring routine, the flux generated at the sensing transformer 334 is the result of current flowing through the conductor 356, which is electrically separated from the phase and neutral conductors 330, 332. The current generated on the conductor 356 is present only for a short period of time, such as less than the delay time established by the capacitor 307 discussed previously.

[0073] If the voltage established at the input to the ADC input (GP0) of the microcontroller 301 reaches the programmed threshold within this predetermined time period during the automatic monitoring routine, then it is determined that the detection circuit 352 successfully detected the current flowing through the core of the sense transformer 334, and the automatic monitoring event is considered to have passed. Therefore, the microcontroller 301 determines that the detection circuit 352 including the GFCIIC device 350 is operating properly. Because the current flowing through the sense transformer 334 during the automatic monitoring routine is designed to be substantially similar in magnitude to the differential current flowing through the transformer in a simulated ground fault (e.g., 4 to 6 milliamps), it is determined that the detection circuit 352 will be able to detect an actual ground fault and provide an appropriate drive signal to the SCR 360 to trip the interrupter 315.

[0074] Alternatively, the automatic monitoring circuit 370 may determine that the automatic monitoring routine has failed. For example, if the voltage at the ADC input at the GP0 of the microcontroller 301 takes longer than a predetermined time period to reach a given voltage during the automatic monitoring routine, then the automatic monitoring event is determined to have failed. If this occurs, the automatic monitoring failure score is incremented, and the failure is indicated visually or audibly. According to one embodiment, when an automatic monitoring event fails, the ADC port (GP0) of the microcontroller 301 is converted to an output port, and a voltage is placed on the conductor 309 via the I / O port GP0, and the microcontroller converts the I / O port GP0 first into an output port. This voltage at the GP0 generates a current on the conductor 309, which flows through the indicator LED 376 and the resistor 380 to ground. Subsequently, the ADC I / O port (GP0) of the microcontroller 301 is converted back to an input port and remains ready for the occurrence of the next scheduled automatic monitoring event.

[0075] According to this embodiment, when an automatic monitoring event failure occurs, the indicator LED 376 is illuminated only for the time period when the I / O port is converted to output and an output voltage is generated at the port, otherwise the LED 376 remains dark or unlit. Thus, if the automatic monitoring routine is run, for example, every three (3) seconds, and an event failure occurs only once or sporadically, the event may not be noticed by the user. On the other hand, if the failure occurs regularly, as would occur if one or more of the components used in the automatic monitoring routine were permanently disabled, the microcontroller 301 repeatedly turns the indicator LED 376 on for 10 milliseconds and off for 100 milliseconds, thereby drawing attention to the device and informing the user that the critical functionality of the device has been damaged. Conditions that cause the automatic monitoring routine to fail include one or more of the following: an open differential transformer, a closed differential transformer, no power to the GFCIIC, an open solenoid, the SCR trigger output of the GFCIIC is constantly high, and the SCR output of the GFCIIC is constantly low.

[0076] According to a further embodiment, if the auto-monitoring failure score reaches a predetermined limit, such as seven (7) faults in one (1) minute, then the microcontroller 301 determines that the device is no longer safe and has reached its end of life (EOL). If this occurs, a visual indicator is activated to warn the user that the circuit interrupting device has reached the end of its useful life. For example, when this EOL state is determined, the ADC I / O port (GP0) of the microcontroller 301 is converted to an output port, similar to when a single fault is recorded as described above, and a signal is periodically placed on the conductor 309 via GPO, even if the LED 376 is flashing at a rate of, for example, 10 milliseconds on and 100 milliseconds off, or a signal is continuously placed on the conductor 309 to permanently illuminate the LED 376. At this point, the auto-monitoring routine is also stopped.

[0077] In addition to flashing or continuously lighting the LED 376, according to another embodiment, when EOL is determined, an optional audible alarm circuit 382 on the printed circuit board ("PCB") 390 is also activated. In this case, the current through the LED 376 establishes a voltage on the gate of the SCR 384, causing the SCR 384 to turn on continuously or intermittently according to the output signal of the GPO from the microcontroller 301. When the SCR 384 is turned on, current is drawn from the phase conductor 330 to activate the audible alarm 386 (e.g., a buzzer), which provides additional notification to the user of the device that the device has reached the end of its useful life (i.e., EOL). For example, with respect to an embodiment of the present invention, the audible alarm circuit 382 includes a parallel RC circuit including a resistor 387 and a capacitor 388. When current is drawn from the phase conductor 330, the capacitor 388 charges and discharges at a rate controlled by the value of the resistor 387, causing the buzzer 386 to issue the desired flash warning.

[0078] Another aspect of this embodiment includes a dimmable LED circuit 396. Circuit 396 includes transistor 398; LEDs 400, 402; light sensor 404 (e.g., a photocell), and resistors 406-408. When ambient light, such as the amount of light near a circuit interrupting device according to an embodiment of the present invention, is increasing, light sensor 404 reacts to the ambient light level to apply an increased impedance to the base of transistor 398 to cause the LEDs to dim as the ambient light increases. Alternatively, when ambient light decreases, such as as night begins to fall, the current flowing through sensor 404 increases accordingly. As the ambient light level decreases, LEDs 400 and 402 illuminate increasingly brighter, thereby providing a controlled light level near the device.

[0079] Another embodiment of the present invention shown in FIG. 4 includes a mechanism for providing data related to whether the device is tripped or in a reset condition to the microcontroller 301. As shown in FIG. 4, a photocoupler 392 is connected between the phase and neutral load conductors 277, 278 and the I / O port (GP3) of the microcontroller 301. The microcontroller 301 uses the value of the signal (voltage) at the port GP3 ​​to determine whether the GFCIIC device 350 is supplied with power, and whether the device is tripped or in a reset condition. When the GFCIIC device 350 is powered, for example, via its voltage input port (LINE), which occurs when the AC is electrically connected to the line terminals 326, 328, a voltage is generated at the output port (VS). This voltage is reduced on the Zener diode 394, which is provided to maintain the voltage supplied to the microcontroller within an acceptable level. The diodes 366, 368 connected between the phase conductor and the power supply input port (LINE) of the GFCIIC 350 ensure that the voltage level supplied to the GFCIIC and VS outputs remains below approximately 30 volts. The voltage signal dropped across Zener diode 394 is connected to input port GP3 ​​of microcontroller 301. If microcontroller 301 does not measure a voltage at GP3, it determines that GFCI IC device 350 is not supplying power, and declares EOL.

[0080] Alternatively, if the microcontroller 301 measures a voltage at GP3, then based on the value of the voltage, it is determined whether the device is tripped or in a reset state. For example, according to the circuit in FIG. 4 , if the voltage at GP3 ​​is measured between 3.2 volts and 4.0 volts, such as between 76% of VCC and 100% of VCC, then it is determined that there is no power at the face (342, 344) and load (346, 348) contacts, and therefore the device is in a tripped state. If the voltage at GP3 ​​is between 2.4 volts and 2.9 volts, such as between 51% of VCC and 74% of VCC, then it is determined that there is power at the face and load contacts, and the device is in a reset state.

[0081] According to another embodiment, when EOL is determined, the microcontroller 301 trips the interrupt device 315 in one or both of the following ways: (a) by maintaining the stimulus signal on the third conductor 356 into the start-up half-cycle of the AC wave, and / or (b) by generating a voltage at the EOL port (GP2) of the microcontroller 301. When EOL has been declared, for example because the automatic monitoring routine has failed a required number of times and / or no power is being supplied from the supply voltage output (VS) of the GFCIIC device 350, the microcontroller 301 generates a voltage at the EOL port (GP2). Optionally, the microcontroller 301 can also use the value of the input signal at GP3, as described above, to further determine whether the device is already in a tripped state. For example, if microcontroller 301 determines that the device is tripped, such as the load and face contacts are not electrically connected to the line contacts, then microcontroller 301 may determine that driving SCR 369 and / or SCR 361 to attempt to open the contacts and trip the device is unnecessary, and therefore does not drive SCR 369 and SCR 361 via GP2.

[0082] The voltage at GP2 directly drives the gate of SCR 369 and / or SCR 361 to turn on SCR 369 and / or SCR 361, thereby enabling it to conduct current and activate solenoid 362. More specifically, when SCR 369 and / or SCR 361 is turned on, current is drawn through coil 364 of dual coil solenoid 362. For example, dual coil solenoid 362 includes: inner primary coil 364, which includes 800 turns, 18 ohm, 35 AWG coil; and outer secondary coil 363, which includes 950 turns, 16.9 ohm, 33 AWG coil. Further details of the construction and functionality of dual coil 362 can be found in U.S. Patent Application No. 13 / 422,797, which is disclosed as U.S. Patent Publication No. 2013-0241675 and assigned to the same assignee of the present application, the entire contents of which are incorporated herein by reference in their entirety.

[0083] As described above, when it is determined via the automatic monitoring routine that the detection circuit 352 has not successfully detected a ground fault, e.g., it has not detected flux generated by current flowing in the conductor 356, or has not otherwise generated a drive signal at the SCR_OUT output port of the GFCIIC device 350 to drive the gate of the SCR 360 immediately after such detection, the microcontroller 301 determines EOL and attempts to trip the interrupt device 315 by the above-described method. Specifically, the microcontroller 301 attempts to directly trip the primary coil 364 directly through the backup path GP2 to the SCR 369 and SCR 361. However, there is at least one difference between the signal on the conductor 356 when the automatic monitoring routine is not operating normally and the signal on the conductor 356 generated when the EOL is determined. That is, under the EOL condition, GP2 energizes both the SCR 361 and SCR 369 to be triggered and the coil 362 and coil 363 to be functional, thereby activating the solenoids 362 and 369 to trip the interrupt device 315.

[0084] If the interrupt device 315 is disconnected, or if the interrupt device 315 is already disconnected, then the power indicator circuit 321 will be disconnected. For example, in the embodiment shown in FIG. 4, the power indicator circuit 321 includes an LED 322 in series with a resistor 323 and a diode 324. The cathode of the LED 322 is connected to the neutral load conductor 278, and the anode of the diode 324 is connected to the phase load conductor 277. Therefore, when power is available at the load conductors, that is, the device is powered and in a reset state, at each alternating half cycle of the AC power, current is drawn through the power circuit, thereby illuminating the LED 322. On the other hand, if power is not available at the load conductors 277, 278, for example because the interrupt device 315 is disconnected or tripped, or the device is reset but power is not being applied, then the LED 322 will be dim or not illuminated.

[0085] Additional embodiments and aspects thereof related to automatic monitoring functionality consistent with the present invention are provided below, as well as further discussion of some of the aspects already described.

[0086] When the self-test GFCI device is properly installed, the sinusoidal AC waveform discussed herein is connected to the phase and neutral terminals 326, 328. According to one embodiment, the AC waveform is a 60 Hz signal containing two half cycles, a positive 8.333 millisecond half cycle and a negative 8.333 millisecond half cycle. A so-called "start" half cycle refers to a particular half cycle, positive or negative, during which a gate trigger signal to SCR 360 causes the respective gates of SCR 361 and SCR 369 to be driven, and the corresponding respective solenoid coils 363, 364 to conduct current, thereby "starting" solenoid 362 and causing the armature of the solenoid to shift. A "non-start" half cycle refers to an alternate half cycle of the AC waveform, i.e., negative or positive, during which current does not flow through the SCR or its respective solenoid coil, regardless of whether the SCR gate is triggered. According to an embodiment of the present invention, whether a positive or negative half cycle is a start half cycle is determined by a diode or some other switching device placed in series with the respective solenoid coil. For example, in FIG. 4, diodes 359, 374, and 367 are configured so that the positive half cycle is the "start-up" half cycle with respect to SCRs 360, 369, and 361, respectively.

[0087] According to another embodiment of a circuit interruption device consistent with the present invention, microcontroller 301 optionally monitors AC power input to the device. For example, a 60 Hz AC input electrically connected to phase and neutral terminals 326, 328 is monitored.

[0088] More specifically, a complete 60 Hz AC cycle takes approximately 16.333 milliseconds to complete. Therefore, in order to monitor and confirm the receipt and stability of the AC waveform, a timer / counter within the microcontroller 301 is implemented. For example, within the three (3) second automatic monitoring window, the 60 Hz input signal is sampled once every millisecond to identify a leading edge, i.e., where the signal changes from a negative value to a positive value. When a leading edge is detected, a flag is set in software and the count is incremented. At the end of the three (3) second test cycle, the count result is divided by 180 to determine whether the frequency is within a specified range. For example, if the frequency is stable at 60 Hz, then the result of dividing by 180 will be 1.0 because there are 180 positive edges and 180 cycles within three (3) seconds of a 60 Hz signal. If it is determined that the frequency is not within a given range, such as 50 Hz to 70 Hz, then the automatic monitoring self-test fault test stops, but monitoring of GP3 continues. Thus, when the circuit interrupting device of the present invention is connected to a variable power source (such as a portable generator) and the power source exhibits a lower frequency at startup and requires a stabilization period before achieving an optimal frequency (e.g., 60 Hz), premature or erroneous power fault determinations are avoided.

[0089] If the frequency is not stable at the optimal frequency, or at least not within an acceptable range, then the start of the automatic monitoring routine is delayed until the frequency stabilizes. If the frequency does not achieve the optimal frequency, or a frequency within an acceptable range within a predetermined time, then the failure score is incremented. Similar to the failure score discussed previously with respect to the automatic monitoring routine, if the score reaches a given threshold, then the microcontroller 301 declares EOL.

[0090] As described above, according to at least one exemplary embodiment, the programmable device 301 is implemented in a microcontroller. Because some microcontrollers include non-volatile memory, such as for storing various data in the event of a power outage, etc., according to another embodiment, all events, timers, scores, and / or states within the non-volatile memory are cleared upon device power-up. Thus, if a failure score or other condition is generated due to improper device installation, insufficient or improper power, or some other non-critical condition relative to the circuit interrupting device itself, the failure score is reset at power-up when the score incrementing event may no longer exist. Another way to avoid this potential problem according to the present invention is to utilize a programmable device that does not include non-volatile memory.

[0091] Figures 6A to 6H3 as well as Figure 7 is a corresponding system-level flow chart representing the functionality of a software program consistent with an embodiment of the present invention. For example, according to an embodiment of the present invention, based on Figures 6A to 6H3 The software code of the flowchart is turned into the microcontroller 301 described above according to the hardware implementation of the wiring device with self-test and automatic monitoring capabilities, for example, stored in a memory. The program includes the automatic monitoring routine described above, and all the accessory processing and reporting functions related thereto and also described above.

[0092] More specifically, if Figure 7 As shown, according to at least one embodiment, the program begins by performing some basic startup functions, including resetting and initializing various registers and variables used by the program code during processing. The program further calls various subroutines as needed to implement the self-test and automatic monitoring functions of the wiring device described above. Figure 7 The box on the left is a map of resets that occur periodically according to a predetermined schedule (e.g., every 1 millisecond). Additionally, according to this embodiment, the processor (e.g., in the above embodiment, within microcontroller 301) is clocked at an operating frequency of 4 MHz, and each instruction runs in 1 microsecond. Therefore, one thousand (1000) instructions occur between each interrupt.

[0093] Figures 6A to 6H3Provides certain details of the functionality of the software program according to this embodiment, and those skilled in the art will understand and be able to interpret the various assembly language nomenclature used. The nomenclature provided identifies specific instructions performed in software within the microcontroller. Figures 6A to 6H3 as well as Figure 7 The instructions used in the embodiments of the present invention are associated with the instruction set of the ATtiny 10 microcontroller of ATMEL.RTM. Those skilled in the art will understand that other microcontrollers and therefore other instruction sets can be used to perform the functionality described herein without departing from the intended scope of the present disclosure.

[0094] The following is about Figures 6A to 6H3 The description provided in each is intended to provide a broad overview of the functionality of the software program according to this embodiment.

[0095] like Fig. 6A As shown, the code begins with START, which immediately resets, initializes and implements various variables, and activates the input / output (I / O) ports of the microcontroller before calling the MAIN routine. Further details of the START and MAIN routines are described below. Figures 6H1 to 6H3 (and also collectively referred to as FIG. 6H ).

[0096] Referring to FIG. 6H, it shows Figure 7 The reset function depicted in , sets the stack pointer to point to the beginning of the program stored in the memory. The various variables representing various voltage levels, count values, flags, etc. are then cleared or initialized to values ​​previously determined by testing to be ideal for the operation of the wiring device according to the design rules and requirements set by an external organization, such as the United Laboratories (UL) mentioned above. For example, the software code according to an embodiment of the present invention ensures that the operation of the wiring device complies with the standard UL-943, including the latest self-test and automatic monitoring requirements. Those skilled in the art will know that Figures 6A to 6H3 Certain constants, limits, and other values ​​depicted in may be changed or otherwise adjusted to accommodate different requirements, such as changes in UL-943, and / or to adapt different line voltage accessories to power grids in jurisdictions outside the United States.

[0097] 6H also illustrates that the code initializes various timing variables that enable the code to operate different processing functions under different timing requirements. The code first checks the voltage (Vcc) level, initializes the watchdog timer, activates various I / O ports of the microcontroller, and initializes the variable PCINT3, which is used to detect the edge of the line input voltage signal to, for example, determine the frequency of the line input power signal.

[0098] The analog-to-digital (A2D) converter in the microcontroller is then initialized, followed by setting and enabling certain other variables. The code then initializes three variables, CNT10 ms, CNT100 ms, and CNT3 sec, to the corresponding starting values ​​of a 10 millisecond timer, a 100 millisecond timer, and a 3 second timer. The various routines and functions performed by the code are executed according to these three timing windows. After the software is reset and the necessary values ​​are initialized, the code returns to the Fig. 6A The LOOP in the program continues to loop until the next 1 millisecond interrupt occurs.

[0099] See also Fig. 6A , reset the watchdog timer (WDT), and then check whether the end of life (EOL) flag has been set. If so, then set the software variables (PB0 and PB2) to configure the appropriate I / O port (GP0) of the microcontroller to output signals to light the LED (376) and trigger the SCR (369), respectively. Disable further automatic monitoring routines. The LOOP routine then checks whether the automatic monitoring fault (AMF AIL) flag has been set, and if so, set the variable (PB0) to configure the I / O port (GP0) as an output port. The LOOP routine then checks whether the automatic monitoring request (AUTOMON) includes the A2DAM flag clear and whether the leading edge is not detected. If the flag is clear and / or the edge is not detected, the AUTOMON routine returns to the LOOP routine. If any condition is not met, then read the test value and clear the A2DAM flag. The AUTOMON routine then returns to the LOOP routine. The LOOP routine also checks the LOADPWR routine, which determines whether the A2DLPWR flag is cleared. If so, the LOADPWR routine returns to the LOOP routine. If not, the analog / digital (A2D) converter reads the new value of the input signal, clears the A2DLPWR flag, and a return to the LOOP routine occurs.

[0100] See also Figure 6B Once every 1000 instructions or 1 millisecond, the code calls routine PC_INTRPT, which reads the VS signal at GP3 ​​of the microcontroller to determine the leading edge of the signal. For example, by detecting the leading edge of the power signal, the code determines the frequency of the input voltage signal (e.g., 60 Hz), and also determines whether the current signal is in the positive or negative half cycle of the AC power signal.

[0101] See also Figures 6D1 to 6D2, also collectively referred to as FIG. 6D , the code runs various functional attachments with different timers, namely, TIM0_COMPA, TEM0.sub.--100ms, and TIM0_LED100 ms. In TIM0_COMPA, which corresponds to a 1 millisecond timer, the timing of the automatic monitor routine is controlled. That is, the automatic monitor routine is controlled to run every 3 seconds, and this timer tracks this timing. TIM0_CONT is a 10 millisecond timer, and as shown in FIG. 6D , during this routine, the LED (376) associated with the EOL condition is turned on and off (flashed) for the appropriate amount of time, such as 10ms on and 100ms off. The LED is also controlled to be completely turned off as needed. Also, the control port GP0 is input or output, such as if there is no EOL condition, then it is an input, and vice versa.

[0102] The routine TIM0.sub.--100ms is further controlled, that is, for a 100 millisecond counter, the timing of the LED, such as the above-mentioned off time of 100 milliseconds. The I / O port (GP1) of the LED drive signal is also controlled.

[0103] Still referring to FIG. 6D , routine TIM0_LED100 ms corresponds to a 3 second timer and the functions according thereto. During this routine, a test pulse (self-test fault) and EOL setup and clearing process are performed. For example, one of the functions performed during this routine is to control the A2D multiplexer (MUX) within the microcontroller so that the signal on the input port GP0 is processed by the A2D. Thus, when GP0 is the input port and A2D measures a signal, it measures the value of the pre-trigger signal discussed above. Additionally, if power (VS from the GFCIIC device) is not detected or measured, the code calls a separate routine to activate the gate of the SCR and start the SCR 30 times. Figure 6C Details of the SCR startup routine are provided in FIG. 6D also includes routines TIM0_EOL, which resets the frequency counter; and TIM0_DONE, which synchronizes the hardware and software clock rates. The TIM0_DONE routine is called at the beginning of both the TIM0.sub.--100ms and TIM0_LED100 ms routines.

[0104] See also Fig. 6E , WDT_INTRPT, the watchdog timer (WDT) continuously counts down for 8 seconds. If the timer is not reset, then this routine controls GP0 as an output and asserts the signal at this port to turn on the LED (376) to indicate EOL.

[0105] Fig. 6FThe routine VLM_INTRPT is described. This routine runs every 1000 instruction steps, i.e. every 1 millisecond, and represents the voltage level monitoring function. During this routine, certain flags are checked and, for example, if it is no longer desired to measure the power signals, i.e. the VS signal from the GFCIIC device and the contact opening or closing signal from the optocoupler, as described above.

[0106] Referring to FIG. 6G , the A2D routine is executed. During this routine, the result of the A2D converter in the microcontroller is read, and if there is an automatic monitoring request, the value is checked to see if there is a failed SCR, for example, if the voltage is above 1.28 volts. If a failed SCR is determined, the counter is decremented. If the counter goes to zero, the end of life (EOL) flag is set, and the AMR is cleared. After that, the controller 301 proceeds to the subroutine A2D_LPWR.

[0107] When the A2D routine shown in FIG. 6G determines that there is no failed SCR because the voltage of the A2D result is above 1.28 volts, the A2D routine continues and then determines if the A2D result is greater than 0.17 volts. If so, the controller proceeds to subroutine A2D_LPWR.

[0108] In the instance where the result of the A2D converter is not greater than 0.17 volts, Q1-PB2 are powered on for a set time. Next, the A2D converter reads the test voltage to obtain a new result, and Q1-PB2 are powered off. If the A2D result is greater than 0.17 volts, the routine jumps to routine A2D_AM_DONE, where the PB1 pin is disconnected and the AMR flag is cleared. The routine proceeds to ADC_RET.

[0109] like Figure 6G1 to 6G2 As shown, also collectively referred to as FIG. 6G , when the A2D result is not greater than 0.17 volts after powering Q1 for a set time, the routine decrements a counter indicating a voltage fault. The number of decremented faults is compared to zero. If zero is not the value, the routine proceeds to subroutine A2D_LPWR. However, if after several interruptions and passes of the routine (where decrement occurs and a zero value is obtained), the EOL flag is set and AMR is cleared. Thereafter, the routine proceeds to A2D_LPWR. Therefore, the low voltage of the A2D result must occur a predetermined number of times to avoid setting the EOL flag in response to an erroneous measurement. Therefore, the reliability of the system is improved as false fault indications are minimized.

[0110] The A2D_LPWR subroutine shown in FIG. 6G and disclosed above determines the state of the load contacts via the optocoupler. More specifically, the A2D_LPWR subroutine looks for a positive voltage pulse on pin 5 and determines if the voltage is greater than 3.6 volts on VCC. If the test fails, the LPWRON flag is set. If the test fails three sets of three-second tests, the SCR is triggered.

[0111] Thus, the present invention provides, among other things, a microcontroller and circuitry that are implemented to periodically test a GFCI device.

[0112] While various embodiments have been chosen for illustrating the present invention, it will be understood by those skilled in the art that other modifications may be made without departing from the scope of the present invention as defined by the appended claims.

Claims

1. A recordable medium having stored thereon software code, the software code comprising: Code for automatic monitoring of electrical wiring installations; code for monitoring a test signal output from a fault detection circuit to determine an operational status of the electrical wiring device; code for decrementing a counter if the test signal from the fault detection circuit is less than a threshold; code for incrementing a counter if the test signal from the fault detection circuit is greater than the threshold; code for determining a temporary fault condition if the counter is equal to a first predetermined number; code for generating an indication when the temporary fault condition is determined; code for determining an end-of-life condition when the counter is equal to a second predetermined number; code for generating an alarm signal when determining the end-of-life state; and code that compares the decremented number of faults to zero; wherein the software code further comprises: code for reading the result of an analog-to-digital A2D converter in a microcontroller; if there is an automatic monitoring request, then checking the value to see if there is a failed SCR; if a failed SCR is determined, then decrementing the counter; wherein the software code further comprises: code for checking whether the automatic monitoring request includes the A2DAM flag cleared and whether the leading edge is not detected; if the A2DAM flag is cleared and / or the leading edge is not detected, then the automatic monitoring request routine returns to the loop routine; and if any condition is not met, then the test value is read and the A2DAM flag is cleared; and Wherein the end-of-life flag is set after several interruptions of the routine and after a decrement occurs and a zero value is obtained.

2. The recordable medium of claim 1, wherein the software code further comprises: code for monitoring an output signal from a contact sensing device; and code for determining, based on the output signal from the contact sensing device, whether the electrical wiring device is in a tripped state or a reset state, in which the AC electrical signal is prevented from being delivered to a load, and in which the AC electrical signal is delivered to the load.

3. The recordable medium of claim 1, wherein the software code further comprises: code for determining, in the programmable circuit device, a frequency associated with the AC electrical signal based on an evaluation of the test signal; Code for delaying the automatic monitoring procedure if the frequency associated with the AC electrical signal is unstable; and code for incrementing a failure score if the frequency associated with the AC electrical signal does not stabilize to within a predetermined frequency range within a predetermined time period.

4. The recordable medium of claim 1, wherein the software code further comprises: code for checking a supply voltage level of one or more electrical components of the electrical wiring device; Code for initializing a watchdog timer function in a processing device of the electrical wiring device; code for activating one or more input or output ports of the processing device.

5. The recordable medium of claim 1, wherein the software code further comprises: Code for detecting the edge of the line input voltage signal; Code for determining a frequency of the line-in signal based on the relative timing of the detected edges.

6. An electrical wiring device, comprising: a processing device storing software code; an interrupting device that electrically connects one or more line terminals to one or more load terminals when the circuit interrupting device is in a reset condition and disconnects the line terminals from the load terminals when the circuit interrupting device is in a trip condition; as well as a fault detection circuit that detects a fault condition in the circuit interrupting device and, upon detecting the fault condition, generates a fault detection signal that is provided to the interrupting device to place the circuit interrupting device in the trip condition, wherein the stored software code includes code for setting one or more input / output (I / O) ports of the processing device as input ports or output ports, and wherein the stored software code comprises: code for decrementing a counter if a test signal from the fault detection circuit is less than a threshold; code for incrementing a counter if the test signal from the fault detection circuit is greater than the threshold; code for determining a temporary fault condition if the counter is equal to a first predetermined number; code for generating an indication when the temporary fault condition is determined; code for determining an end-of-life condition when the counter is equal to a second predetermined number; and code for generating an alarm signal upon determining said end-of-life condition; and code for comparing the decremented number of faults to zero; wherein the stored software code further comprises: code for reading the result of an analog-to-digital A2D converter in a microcontroller; if there is an automatic monitoring request, then checking the value to see if there is a failed SCR; if a failed SCR is determined, then decrementing the counter; and wherein the stored software code further includes: code for checking whether the automatic monitoring request includes the A2DAM flag clear and whether a leading edge is not detected; If the A2DAM flag is clear and / or no edge is detected, the automatic monitoring request routine returns to the loop routine; and if either condition is not met, the test value is read and the A2DAM flag is cleared; and Wherein the end-of-life flag is set after several interruptions of the routine and after a decrement occurs and a zero value is obtained.

7. The electrical wiring device according to claim 6, further comprising: An automatic monitoring circuit includes the processing device electrically connected to the fault detection circuit and the interrupt device and constantly monitors one or more signals to determine the operating status of the electrical wiring device.

8. An electrical wiring device according to claim 7, wherein the software code of the processing device further includes: code for starting at least one self-test timer, the self-test timer having a corresponding timing variable for enabling the software code to operate different processing functions under different timing requirements.

9. The electrical wiring device according to claim 8, wherein the software code of the processing device further comprises: code for initializing the A2D converter in the processing device.

10. A method for automatically monitoring a ground fault circuit interrupter device, comprising the steps of: monitoring a test signal output from a fault detection circuit to determine an operational status of the electrical wiring device; If the test signal is less than a threshold, then decrementing a counter; If the test signal is greater than the threshold, incrementing the counter; If the counter is equal to a first predetermined number, determining a temporary fault state; When the temporary fault state is determined, generating an indication; determining an end-of-life condition if the counter is equal to a second predetermined number; as well as When the end-of-life state is determined, an alarm signal is generated; Wherein the method further comprises the steps of comparing the decremented number of faults with zero; wherein the method further comprises: steps for reading the result of an analogue / digital A2D converter in the microcontroller; if there is an automatic monitoring request, then checking the value to see if there is a failed SCR; if a failed SCR is determined, then decrementing the counter; and The method further comprises: checking whether the automatic monitoring request includes the A2DAM flag cleared and whether the leading edge is not detected; if the A2DAM flag is cleared and / or the leading edge is not detected, then the automatic monitoring request routine returns to the loop routine; and if any condition is not met, then reading the test value and clearing the A2DAM flag; and Wherein the end-of-life flag is set after several interruptions of the routine and after a decrement occurs and a zero value is obtained.

11. The method according to claim 10, further comprising: monitoring an output signal from a contact sensing device; as well as Based on the output signal from the contact sensing device, it is determined whether the electrical wiring device is in a trip state, in which an AC electrical signal is blocked from being delivered to a load, or a reset state, in which the AC electrical signal is delivered to the load.

12. The method according to claim 11, further comprising: in the programmable circuit device, determining a frequency associated with the AC electrical signal based on an evaluation of the test signal; delaying the automatic monitoring procedure if the frequency associated with the AC electrical signal is unstable; and If the frequency associated with the AC electrical signal does not stabilize to within a predetermined frequency range within a third predetermined time period, a failure score is incremented.

13. The method according to claim 12, further comprising: checking a supply voltage level of one or more electrical components of the electrical wiring device; initializing a watchdog timer function in a processing device of the electrical wiring device; activating one or more input or output ports of the processing device; Detect the edge of the line input voltage signal; as well as The frequency of the line input signal is determined based on the relative timing of the detected edges.

14. The method according to claim 10, further comprising: checking a supply voltage level of one or more electrical components of the electrical wiring device; initializing a watchdog timer function in a processing device of the electrical wiring device; activating one or more input or output ports of the processing device; Detect the edge of the line input voltage signal; as well as The frequency of the line input signal is determined based on the relative timing of the detected edges.

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