Method for forming a power semiconductor module device

Abstract

A method for forming a power semiconductor module arrangement comprises: arranging a housing (7) on a substrate (10), where the housing (7) comprises side walls and is arranged to directly abut the substrate such that the substrate forms a base surface of the housing; filling a liquid, viscous or semi-liquid UV curable potting material (50) into the housing, thereby covering the substrate with the potting material; irradiating a first portion of the potting material in a region of the potting material proximate an interface between the substrate and the sidewall of the housing so as to seal any gap between the substrate and the sidewall of the housing, and irradiating a second portion of the potting material farther from the interface between the substrate and the sidewall of the housing than the first portion of the potting material so as to seal any gap between the substrate and the sidewall of the housing, the irradiation of the first and second portions of the potting material is carried out at different times and / or via different radiation sources to form an encapsulation (52).

Description

Technical Field

[0001] The present disclosure relates to a method for forming a power semiconductor module device, and more particularly to a method for forming a power semiconductor module device including an encapsulant. Background Art

[0002] A power semiconductor module device generally comprises a substrate within a housing. The substrate generally comprises a substrate layer (e.g., a ceramic layer), a first metallization layer deposited on a first side of the substrate layer, and optionally a second metallization layer deposited on a second side of the substrate layer. A semiconductor device comprising one or more controllable semiconductor elements (e.g., two IGBTs in a half-bridge configuration) may be arranged on the substrate. One or more terminal elements (contact elements) are generally provided, which allow such semiconductor devices to be contacted from outside the housing. Power semiconductor modules are known in which the terminal elements are arranged on the substrate and protrude through the cover of the housing in a direction substantially perpendicular to the main surface of the substrate. The portion of the contact element protruding outside the housing may be mechanically and electrically coupled to a printed circuit board. The housing may be glued to the substrate so as to remain in a desired position until the substrate is permanently attached to a base plate or a heat sink by additional connecting elements. However, gluing the housing to the substrate requires additional pre-treatment steps (e.g., plasma treatment of the substrate), a step of applying glue to the substrate, and a hardening step of hardening the initial viscous glue, thereby attaching the housing to the substrate. Each additional step during the assembly process requires additional processing time and increases the overall cost of the power semiconductor module device.

[0003] There is a need for a power semiconductor module arrangement that can be assembled in an efficient and cost-effective manner. Summary of the invention

[0004] A method for forming a power semiconductor module device comprises: arranging a shell on a substrate, wherein the shell includes side walls and is arranged to directly abut the substrate so that the substrate forms a base surface of the shell, filling a liquid, viscous or semi-liquid UV-curable potting material into the shell to cover the substrate with the potting material, irradiating a first portion of the potting material in an area of ​​the potting material close to an interface between the substrate and the side walls of the shell so as to seal any gap between the substrate and the side walls of the shell, and irradiating a second portion of the potting material further away from the interface between the substrate and the side walls of the shell than the first portion of the potting material to form an encapsulation, wherein the irradiation of the first and second portions of the potting material occurs at different times and / or via different radiation sources.

[0005] Another method for forming a power semiconductor module device includes: applying a liquid, viscous or semi-liquid UV-curable potting material to a substrate, irradiating an outer portion along an edge of the substrate with ultraviolet light, thereby triggering cross-linking of the potting material along the edge of the substrate and forming a dam extending circumferentially along the edge of the substrate, filling a volume defined by the dam with UV-curable potting material, and after forming the dam and filling the volume defined by the dam with UV-curable potting material, irradiating the volume of UV-curable potting material with ultraviolet light, thereby triggering a cross-linking process of the remaining potting material and forming an encapsulation body covering the substrate.

[0006] The present invention can be better understood with reference to the following drawings and descriptions. The components in the drawings are not necessarily drawn to scale, but emphasis is placed on illustrating the principles of the present invention. In addition, in the drawings, similar reference numerals represent corresponding parts throughout the different views. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a cross-sectional view of a power semiconductor module device.

[0008] Figure 2 The steps of a method for forming a power semiconductor module arrangement according to an embodiment of the present disclosure are schematically illustrated.

[0009] Figure 3 A further step of a method for forming a power semiconductor module arrangement according to an embodiment of the present disclosure is schematically shown.

[0010] Figure 4 Steps of another method for forming a power semiconductor module arrangement according to an embodiment of the present disclosure are schematically illustrated. DETAILED DESCRIPTION

[0011] In the following detailed description, reference is made to the accompanying drawings. The accompanying drawings show specific examples in which the present invention can be practiced. It should be understood that, unless otherwise specifically stated, the features and principles described with respect to the various examples can be combined with each other. In the specification and in the claims, naming certain elements as "first element", "second element", "third element", etc. should not be understood as enumerable. On the contrary, such names are only used to address different "elements". That is, for example, the presence of a "third element" does not require the presence of a "first element" and a "second element". The semiconductor body as described herein can be made of (doped) semiconductor material and can be a semiconductor chip or can be included in a semiconductor chip. The semiconductor body has an electrical connection pad and includes at least one semiconductor element having an electrode.

[0012] refer to Figure 1, a cross-sectional view of a power semiconductor module device 100 is shown. The power semiconductor module device 100 comprises a housing 7 and a substrate 10. The substrate 10 comprises a dielectric insulating layer 11, a (structured) first metallization layer 111 attached to the dielectric insulating layer 11, and a (structured) second metallization layer 112 attached to the dielectric insulating layer 11. The dielectric insulating layer 11 is arranged between the first metallization layer 111 and the second metallization layer 112.

[0013] Each of the first metallization layer 111 and the second metallization layer 112 may be composed of or include one of the following materials: copper; copper alloy; aluminum; aluminum alloy; any other metal or alloy that remains solid during operation of the power semiconductor module device. The substrate 10 may be a ceramic substrate, i.e., a substrate in which the dielectric insulating layer 11 is a ceramic (e.g., a thin ceramic layer). The ceramic may be composed of or include one of the following materials: aluminum oxide; aluminum nitride; zirconium oxide; silicon nitride; boron nitride; or any other dielectric ceramic. Alternatively, the dielectric insulating layer 11 may be composed of an organic compound and include one or more of the following materials: Al2O3, AlN, SiC, BeO, BN, or Si3N4. For example, the substrate 10 may be, for example, a direct copper bonding (DCB) substrate, a direct aluminum bonding (DAB) substrate, or an active metal brazing (AMB) substrate. In addition, the substrate 10 may be an insulated metal substrate (IMS). The insulated metal substrate typically includes a dielectric insulating layer 11, which includes a (filled) material, such as an epoxy resin or a polyimide. The material of the dielectric insulating layer 11 can be filled with, for example, ceramic particles. Such particles can include, for example, SiO2, Al2O3, AlN, SiN or BN, and can have a diameter between about 1 μm and about 50 μm. The substrate 10 can also be a conventional printed circuit board (PCB) with a non-ceramic dielectric insulating layer 11. For example, the non-ceramic dielectric insulating layer 11 can be composed of or include a cured resin.

[0014] The substrate 10 is arranged in the housing 7. Figure 1 In the example shown, the substrate 10 forms the base surface of the housing 7 , while the housing 7 itself comprises only side walls and optionally a cover. In some power semiconductor module arrangements 100 , more than one substrate 10 is arranged in the same housing 7 .

[0015] One or more semiconductor bodies 20 may be arranged on at least one substrate 10. Each of the semiconductor bodies 20 arranged on at least one substrate 10 may include a diode, an IGBT (insulated gate bipolar transistor), a MOSFET (metal oxide semiconductor field effect transistor), a JFET (junction field effect transistor), a HEMT (high electron mobility transistor), or any other suitable semiconductor element.

[0016] One or more semiconductor bodies 20 may form a semiconductor device on the substrate 10. Figure 1 In FIG. 2 , only two semiconductor bodies 20 are shown by way of example. Figure 1 The second metallization layer 112 of the substrate 10 in the embodiment is a continuous layer. According to another example, the second metallization layer 112 may be a structured layer. According to other examples, the second metallization layer 112 may be completely omitted. Figure 1 In the example shown, the first metallization layer 111 is a structured layer. In this context, "structured layer" means that the corresponding metallization layer is not a continuous layer, but includes recesses between different sections of the layer. Such recesses are Figure 1 Schematically shown in . In this example, the first metallization layer 111 includes three different sections. Different semiconductor bodies 20 can be mounted to the same or different sections of the first metallization layer 111. Different sections of the first metallization layer may not have electrical connections, or may be electrically connected to one or more other sections using an electrical connection portion 3 such as a bonding wire. For example, the semiconductor bodies 20 can be electrically connected to each other or to the first metallization layer 111 using an electrical connection portion 3. Instead of a bonding wire, the electrical connection portion 3 can also include a bonding tape, a connecting plate or a conductor track. One or more semiconductor bodies 20 can be electrically and mechanically connected to the substrate 10 via a conductive connection layer 60. For example, such a conductive connection layer 60 can be a solder layer, a conductive adhesive layer or a sintered metal powder layer, such as a sintered silver (Ag) powder.

[0017] Figure 1 The power semiconductor module device 100 shown also includes a terminal element 4. The terminal element 4 is mechanically and electrically connected to the substrate 10 (e.g., to the first metallization layer 111), and provides an electrical connection between the interior and the exterior of the housing 7. The terminal element 4 can be mechanically and electrically connected to the first metallization layer 111 through a first end 41, while the second end 42 of the terminal element 4 protrudes to the exterior of the housing 7. The terminal element 4 can be electrically contacted from the outside at its second end 42. The housing 7 can optionally be provided with a cover, which includes a plurality of through holes 72, each of the plurality of terminal elements 4 protruding vertically through the through hole 72.

[0018] In addition to targeting Figure 1 In addition to or instead of the terminal element 4 described above, the components inside the housing 7 can also be electrically contacted from outside the housing 7 in any other suitable manner. For example, the additional terminal element 4 can be arranged closer to or adjacent to the side wall of the housing 7. The terminal element 4 can also protrude vertically or horizontally through the side wall of the housing 7. The first end 41 of the terminal element 4 can be connected to the conductive connection layer ( Figure 1The first end 41 of the terminal element 4 may also be electrically coupled to the substrate 10 via one or more electrical connections 3.

[0019] The power semiconductor module device 100 typically also includes an encapsulation 52. For example, the encapsulation 52 can be composed of or include silicone gel, or can be a rigid molding compound. The encapsulation 52 can at least partially fill the interior of the housing 7, thereby covering the components and electrical connections arranged on the substrate 10. The terminal elements 4 can be partially embedded in the encapsulation 52. However, at least their second ends 42 are not covered by the encapsulation 52 and protrude from the encapsulation 52 through the housing 7 to the outside of the housing 7. The encapsulation 52 is configured to protect the components and electrical connections of the power semiconductor module device 100, in particular the components on the substrate 10 arranged inside the housing 7, from certain environmental conditions and mechanical damage.

[0020] The housing 7 can be glued to the substrate 10 so as to remain in the desired position until the substrate 10 is permanently attached to the base plate or the heat sink by additional connecting elements. In particular, the housing 7 can be glued to the substrate 10 before the potting material 50 is filled into the housing 7, and the potting material 50 forms the encapsulation 52 after performing the hardening step. For example, the power semiconductor module device 100 with the housing 7 glued to the substrate 10 and the encapsulation 52 arranged inside the housing 7 can then be shipped to the customer, who then mounts the power semiconductor module device 100 to a support structure, such as a base plate or a heat sink. The power semiconductor module device 100 can be mounted on a support structure (e.g., a base plate or a heat sink) by means of, for example, screws or bolts, which are used to hold the substrate 10 in place and force its lower surface to contact the support structure. Therefore, during the operation of the power semiconductor module device 100, a glued joint between the housing 7 and the substrate 10 is generally not required to keep the housing 7 in its desired position relative to the substrate 10. The main purpose of the glue bonding is to prevent the potting material 50 forming the encapsulation body 52 from leaking from the housing before it is sufficiently hardened, and to keep the housing 7 in its desired position relative to the substrate 10 when the power semiconductor module device 100 is shipped to the end customer. However, gluing the housing 7 to the substrate 10 requires an additional pre-treatment step (e.g., plasma treatment of the substrate 10), a step of applying glue to the substrate 10, and a hardening step of hardening the initially viscous glue, thereby attaching the housing 7 to the substrate 10. Each additional step during the assembly process requires additional processing time and increases the overall cost of the power semiconductor module device 100.

[0021] In the following, a method for forming a power semiconductor module device 100 according to an embodiment of the present disclosure will be described, wherein the housing 7 does not need to be glued to the substrate 10. That is, the method described below requires fewer steps compared to conventional methods. In this way, the power semiconductor module device can be assembled in a very efficient and cost-effective manner. This is because each additional step of the conventional method takes time and increases the overall production cost of the power semiconductor module device 100.

[0022] The method for forming a power semiconductor module device 100 according to an embodiment of the present disclosure includes arranging a housing 7 on a substrate 10. The housing 7 can be attached to the substrate 10 in any suitable manner without a glued joint between the side walls of the housing 7 and the substrate 10. For example, the housing 7 can be attached to the substrate 10 only by a mechanical connection. Such a mechanical connection can be implemented in any suitable manner. The mechanical connection may be sufficient to attach the housing to the substrate 10 when forming the encapsulation 52 and when transporting the power semiconductor module device 100 to the end customer. For example, the power semiconductor module device 100 may include a specific retaining pin that is arranged on the substrate 10 and extends from the substrate 10 toward the cover of the housing 7 in the vertical direction y. The cover of the housing 7 may include a retaining element (e.g., a sleeve) that is configured to receive the free end of the retaining pin, thereby forming a force-fit connection. Additionally or alternatively, it is also possible that, for example, one or more of the terminal elements 4 include a retaining element arranged between the first end 41 and the second end 42, the retaining element being arranged in a through hole in the cover of the housing 7, wherein each retaining element exerts a force on the housing, thereby maintaining the housing in a desired position relative to the substrate 10. Additionally or alternatively, a simple removable clamping mechanism can be used to hold the assembly together. However, this mechanical connection is only an example. The mechanical connection between the housing 7 and the substrate 10 can also be formed in any other suitable manner.

[0023] Since there is no glue between the housing 7 and the substrate 10, the side wall of the housing 7 (i.e., the lower surface of the side wall facing the substrate 10) is arranged on the substrate 10 to directly abut the substrate 10 (i.e., the top surface of the substrate 10, wherein the top surface of the substrate 10 may be the top surface of the dielectric insulating layer 11 or the top surface of the first metallization layer 111, wherein the top surface of the dielectric insulating layer 11 is the surface facing the first metallization layer 111, and the top surface of the first metallization layer 111 is the surface to which the semiconductor body 20 and any other elements of the power semiconductor module device 100 are mounted). However, when the housing 7 is mounted to the substrate 10 without a glue joint between the housing 7 and the substrate 10, there is a risk that the potting material 50 filled into the housing 7 to form the encapsulation body leaks out of the housing 7. There may be a small gap at the interface between the housing 7 and the substrate 10. The potting material 50 filled into the housing 7 to form the encapsulation body 52 is generally liquid, viscous or semi-liquid before it hardens to form the encapsulation body 52. The potting material 50 at least partially fills the housing 7 and covers the substrate 10 and most of the components mounted thereon, such as Figure 2 As described above, for example, the terminal element 4 is usually not completely covered by the potting material 50 and the encapsulation body 52, respectively. Figure 2 Schematically shows the step of filling the potting material 50 into the housing 7, for example by means of a dispensing device 80. According to some embodiments of the present disclosure, the dispensing device 80 may be arranged centrally above the substrate 10. That is, the potting material 50 is dispensed centrally on the substrate 10 and spreads from there toward the edge of the substrate 10.

[0024] The potting material 50 is a UV curable material. The UV curable material generally includes a photoinitiator, which, when exposed to UV (ultraviolet) light, initiates crosslinking of the UV curable material 50, causing it to harden. UV curable materials generally cure significantly faster than non-UV curable materials. Figure 2 After the potting material 50 is dispensed into the module housing 7 as shown, the Figure 3 The UV light source 90 is shown arranged above the module to illuminate the UV curable potting material 50 within the housing 7 and harden it quickly. Of course, this part of the process is usually performed without a cover on the top of the housing 7 so that the UV light can reach the UV curable potting material 50.

[0025] The UV curable potting material 50 has a defined viscosity. The viscosity generally depends on the specific potting material 50 used to form the encapsulation body 52. ​​Such a material may, for example, be in the form of an epoxy resin or a silicone gel. A liquid, viscous or semi-liquid UV curable potting material suitable for forming the encapsulation body 52 may have, for example, a viscosity of at least 900 mPa*s. For example, some UV curable potting materials 50 may have a viscosity of 925 mPa*s, other UV curable potting materials 50 may have a viscosity of 1000 mPa*s, and some UV curable potting materials 50 may have a viscosity of 8000 mPa*s. Any other viscosity is generally possible. The higher the viscosity of the potting material 50, the lower its fluidity. Viscosity is generally the resistance of a material to shape changes or the movement of adjacent parts relative to each other. Viscosity means the opposite of flow. The inverse of viscosity is called fluidity, which is a measure of ease of flow. A potting material 50 with a lower viscosity will leak out of the housing 7 faster than a potting material 50 with a higher viscosity. Typically, even when using relatively fast-curing UV-curable potting materials, significant leaks may already be present within a very short time frame (eg within a few tens of seconds, a minute or two).

[0026] In order to prevent the UV curable potting material 50 from leaking from the housing 7, at least a portion of the power semiconductor module device 100 may be irradiated with ultraviolet light, thereby triggering cross-linking of the potting material 50. In particular, a first portion of the potting material 50 may be irradiated in an area of ​​the potting material 50 close to the interface between the substrate 10 and the side wall of the housing 7, so as to seal any gap between the substrate 10 and the side wall of the housing 7. In this regard, "close to" refers to any portion of the potting material 50 within a certain radius around the interface between the substrate 10 and the side wall of the housing 7, for example, up to 5 mm (millimeters), up to 10 mm, up to 20 mm, or even up to 30 mm. This is particularly useful in Figure 3 At least the edge region (at the Figure 3The method further comprises irradiating a second portion of the potting material 50 which is further away from the interface between the substrate 10 and the sidewall of the housing 7 than the first portion of the potting material 50 to form an encapsulation body 52, wherein the irradiation of the first portion of the potting material 50 and the second portion of the potting material 50 is performed at different times and / or via different radiation sources.

[0027] The encapsulation body 52 is formed by sufficiently hardening the first and second parts of the potting material 50. This can be achieved simply by irradiating the potting material 50 with ultraviolet light. However, an additional hardening step can also be performed after the initial crosslinking process. The additional hardening process can include an additional irradiation step, wherein the additional irradiation step includes irradiating the entire power semiconductor module device 100 with ultraviolet light. However, the power semiconductor module device 100 may also be exposed to moisture during the additional hardening process.

[0028] Irradiating the power semiconductor module arrangement 100 (eg, the first portion and / or the second portion of the potting material 50) may include using a UV light source 90 arranged on a side of the substrate 10 facing the housing 7 (at Figure 3 The power semiconductor module device 100 may be irradiated with the potting material 50 by means of a UV light source 90 (e.g., a first portion and / or a second portion of the potting material 50) arranged above the power semiconductor module device 100. In this case, it may be advantageous to first dispense only a thin layer of the potting material 50 on the substrate 10, sufficient to cover the interface between the housing 7 and the substrate 10, and then irradiate this thin layer near the edge of the substrate 10 to harden the potting material 50 and seal the interface. The housing 7 may then be filled with the potting material 50 to a final desired level before irradiating the remaining potting material to rapidly cure it. Alternatively or in addition, irradiating the power semiconductor module device 100 (e.g., the first portion and / or the second portion of the potting material 50) may include irradiating the power semiconductor module device 100 with the aid of a UV light source 90 (e.g., a first portion and / or a second portion of the potting material 50) arranged on a side of the substrate 10 facing away from the housing 7. Figure 3The power semiconductor module device 100 is irradiated with a UV light source 90 (arranged below the power semiconductor module device 100). It is generally possible that the entire power semiconductor module device 100 is equally irradiated with ultraviolet light. However, it is generally sufficient to irradiate at least those areas closest to the edge of the substrate 10 in order to form a barrier and seal the housing before any potting material 50 can leak out of the housing 7. For example, at least an area within a defined distance or radius d1 from or around the edge of the substrate 10 can be irradiated. The defined distance d1 can be, for example, up to 1 cm, up to 2 cm or up to 3 cm. The housing 7 can contact the substrate 10 within this defined distance d1. Once the cross-linking of the potting material 50 has been triggered, any gap between the housing 7 and the substrate 10 is sealed only by means of the resulting encapsulation 52 formed by cross-linking the potting material 50.

[0029] The time elapsed between the step of filling the potting material 50 into the housing 7 (filling the potting material 50 into the housing 7 has been completed) and the step of irradiating the first portion of the potting material 50 may depend on the fluidity (or viscosity) of the potting material 50. That is, if the fluidity is high (the viscosity is low), the time elapsed between filling the potting material 50 into the housing 7 and irradiating the first portion of the potting material 50 may be relatively short because the potting material 50 may leak out of the housing 7 relatively quickly. On the other hand, if the fluidity is low (the viscosity is high), the time elapsed between filling the potting material 50 into the housing 7 and irradiating the first portion of the potting material 50 may be quite long because the potting material 50 may not leak out of the housing 7 very quickly. Generally, depending on the fluidity of the corresponding potting material 50, the time elapsed between filling the potting material 50 into the housing 7 and irradiating the first portion of the potting material 50 may be zero seconds, up to 30 seconds (seconds), up to one minute, or even up to several minutes in a few cases. For example, the time elapsed between filling the potting material 50 into the housing 7 and irradiating the first portion of the potting material 50 may be less than five minutes. However, even when using a low-flow gel, this irradiation step typically takes much less time than the gluing and glue curing steps associated with conventional assembly processes.

[0030] Irradiating the UV-curable potting material 50 outside the semiconductor module housing 7 and inside the housing 7 can be performed simultaneously. However, because the volume of the material 50 inside the housing 7 is much larger than the volume of the potting material 50 present at the interface between the housing 7 and the substrate 10, the curing at the interface (the first portion of the potting material 50) will be completed faster at the external location. For example, the semiconductor module can be irradiated by a UV light source 90 below the module and another UV light source 90 above the module. Once the curing is completed at the interface between the housing 7 and the substrate 10, the UV light source 90 below the module can be turned off, while the UV light source 90 above the housing can remain on until the UV-curable potting material 50 inside the housing 7 (the second portion of the potting material 50) is completely cured.

[0031] The method for forming a power semiconductor module arrangement according to the above-described embodiment requires fewer manufacturing steps than conventional methods. Therefore, the method requires less manufacturing time and is therefore very cost-effective. Any thermal stress that may occur during the step of hardening the glue attaching the housing 7 to the substrate 10 is completely avoided by the method described herein. Figures 1 to 3 A method for forming a power semiconductor module arrangement 100 comprising a housing 7 is described. However, it is also possible to form a power semiconductor module arrangement 100 without a housing 7 similar to what has been described above.

[0032] Reference now Figure 4 , a method for forming a power semiconductor module device 100 without a housing 7 according to an embodiment of the present disclosure will be described in more detail. Figure 4The power semiconductor module arrangement 100 shown comprises a substrate 10 having a semiconductor body 20 and additional elements arranged thereon (e.g., terminal elements 4 or electrical connections 3). By applying a UV-curable potting material 50 onto the substrate 10, similarly to what has been described above (e.g., by means of a dispensing device 80), an encapsulation 52 is formed on the substrate 10. According to some embodiments of the present disclosure, the dispensing device 80 may be arranged centrally above the substrate 10. That is, the potting material 50 is dispensed centrally onto the substrate 10 and diffuses from there towards the edge of the substrate 10. An outer portion along the edge of the substrate 10 is irradiated with UV light (e.g., by means of one or more UV light sources 90), so that crosslinking of the UV-curable potting material 50 is triggered as soon as the UV-curable potting material 50 reaches the edge of the substrate 10. In this way, a barrier or dam 54 is formed extending circumferentially along the edge of the substrate 10, which prevents the still liquid, viscous or semi-liquid UV-curable potting material 50 in the central area of ​​the substrate 10 (within the volume defined by the dam 54) from flowing out of the substrate 10. However, the central area of ​​the substrate 10 is not initially irradiated with UV light, so that the potting material 50 within the dam 54 can still flow freely within the volume defined by the dam 54, thereby forming a uniform layer of the potting material 50 within the dam 54. The dam 54 can be formed to have a thickness d2 in the horizontal direction, for example, between 0.5 cm and 3 cm or between 1 cm and 2 cm.

[0033] A shielding tool or masking tool 84 may be arranged above the substrate 10 (e.g., on the side of the substrate 10 where the encapsulation material 50 is applied) so as to prevent any UV light from reaching the central area of ​​the substrate 10. One or more UV light sources 90 may be arranged on the same side of the substrate 10 as the shielding or masking tool 84, wherein the shielding or masking tool 84 is arranged between the one or more light sources 90 and the substrate 10.

[0034] When a dam 54 formed by the cross-linked potting material 50 along the edge of the substrate 10 has been formed and has a desired height h2 in the vertical direction y (for example, up to several centimeters), and the volume inside the dam 54 has been filled with additional UV-curable potting material 50, the remaining area of ​​the substrate 10 can be irradiated with ultraviolet light, thereby triggering cross-linking of the remaining potting material 50 and forming an encapsulation body 52.

[0035] According to some embodiments, once the encapsulation 52 is formed, the housing is arranged on the substrate 10. However, it is also possible that no housing 7 is mounted to the substrate 10. For example, if the encapsulation 52 is hard enough (e.g., a rigid molding compound), the encapsulation 52 alone may be sufficient to protect the substrate 10 and the components mounted thereon from any mechanical damage and any environmental conditions.

[0036] In summary, a method for forming a power semiconductor module device 10 according to an embodiment of the present disclosure includes: applying a liquid, viscous or semi-liquid UV-curable potting material 50 to a substrate 10, irradiating an outer portion along an edge of the substrate 10 with ultraviolet light, thereby triggering cross-linking of the potting material 50 along the edge of the substrate 10, and forming a dam 54 extending circumferentially along the edge of the substrate 10, filling the volume defined by the dam 54 with the UV-curable potting material 50, and after forming the dam 54 and filling the volume defined by the dam 54 with the potting material 50, irradiating the volume of UV-curable potting material 50 with ultraviolet light, thereby triggering a cross-linking process of the remaining potting material 50 and forming an encapsulation body 52 covering the substrate 10.

[0037] Depending on the specific material used as the potting material 50, when the potting material 50 is irradiated with UV light, crosslinking can be triggered in less than 10 seconds, less than 5 seconds, or even in 1 second or less. That is, crosslinking starts (almost) immediately. This is usually not the case when the potting material 50 is hardened by means of a heat treatment (e.g., by heating the potting material 50 to a defined temperature). Crosslinking the potting material 50 by means of a conventional heat treatment usually takes several minutes or even up to several hours. Once crosslinking is triggered, the potting material 50 remains in its current position and any further flow of the potting material 50 is prevented. For example, the above-mentioned Figures 1 to 4 The described method can be performed in a vacuum chamber. In particular, at least one of the irradiation steps can be performed in a vacuum chamber.

Claims

1. A method for forming a power semiconductor module device (100), the method comprising: Arranging a housing (7) on a substrate (10), wherein the housing (7) comprises side walls and is arranged directly adjacent to the substrate (10) so that the substrate (10) forms a base surface of the housing (7); Filling a liquid, viscous or semi-liquid UV curable potting material (50) into the housing (7), thereby covering the substrate (10) with the potting material (50); irradiating a first portion of the potting material (50) in an area of ​​the potting material (50) proximate an interface between the substrate (10) and the side wall of the housing (7) so as to seal any gap between the substrate (10) and the side wall of the housing (7), and irradiating a second portion of the encapsulation material (50) further away from the interface between the substrate (10) and the sidewall of the housing (7) than the first portion of the encapsulation material (50) to form an encapsulation (52), wherein: The irradiation of the first portion and the second portion of the potting material occurs at different times and / or via different radiation sources.

2. The method according to claim 1, wherein: Irradiating the first portion of the potting material (50) is performed by a UV light source (90) arranged on a side of the substrate (10) facing away from the housing (7).

3. The method according to claim 1 or 2, wherein: The second portion of the potting material (50) is applied by a UV light source (90) arranged on a side of the substrate (10) facing the housing (7).

4. The method according to any one of claims 1 to 3, wherein: The potting material (50) has a defined viscosity, and the time that elapses between filling the potting material (50) into the housing (7) and irradiating the first portion of the potting material (50) depends on the viscosity of the potting material (50).

5. The method according to claim 4, wherein: The time that elapses between filling the potting material (50) into the housing (7) and irradiating the first portion of the potting material (50) is less than five minutes.

6. A method according to any one of the preceding claims, wherein: Filling the liquid, viscous or semi-liquid UV-curable potting material (50) into the housing (7) comprises filling the potting material (50) having a viscosity of at least 900 mPa*s into the housing (7).

7. The method according to any one of the preceding claims, further comprising: After the encapsulation body (52) is formed by cross-linking the potting material (50), an additional hardening process is performed to further harden the encapsulation body (52).

8. The method according to any one of claims 1 to 7, wherein: Arranging the housing (7) on the substrate (10) comprises attaching the housing (7) to the substrate (10) by means of a mechanical connection, wherein the housing (7) is attached to the substrate (10) only by means of the mechanical connection.

9. A method according to any one of the preceding claims, wherein: At least one of the irradiation steps is performed in a vacuum chamber.

10. A method for forming a power semiconductor module device (100), the method comprising: applying a liquid, viscous or semi-liquid UV curable potting material (50) to the substrate (10); irradiating the outer portion along the edge of the substrate (10) with ultraviolet light, thereby triggering cross-linking of the potting material (50) along the edge of the substrate (10) and forming a dam (54) extending circumferentially along the edge of the substrate (10); filling the volume defined by the dam (54) with a UV curable potting material (50); as well as After forming the dam (54) and filling the volume defined by the dam (54) with a UV-curable potting material (50), the volume of UV-curable potting material (50) is irradiated with ultraviolet light, thereby triggering a cross-linking process of the remaining potting material (50) and forming an encapsulation body (52) covering the substrate (10).

11. The method according to claim 10, wherein: The dam (54) is formed to have a thickness (d2) between 0.5 cm and 3 cm or between 1 cm and 2 cm in the horizontal direction.

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