High electron mobility transistor packaging structure and preparation method

By setting up transistors in the high-electron mobility transistor package structure and optimizing the connection method, the problems of large electronic devices and poor electromagnetic compatibility are solved, and a smaller package size and higher stability are achieved.

CN119133169AActive Publication Date: 2024-12-13青岛聚能创芯微电子有限公司

Patent Information

Application Number
CN202411316931.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-20
Publication Date
2024-12-13
Estimated Expiration
2044-09-20

AI Technical Summary

Technical Problem

The existing driving circuit or power amplifier circuit integrated with high electron mobility transistors and totem pole circuits cannot meet the needs of high density, high integration, low energy efficiency and small volume, resulting in large electronic devices and long line lengths, increasing parasitic conditions. Inductor affects electromagnetic compatibility and circuit stability.

Method used

Design a high-electron mobility transistor package structure. By setting several transistors on the surface of one side of the transistor, and connecting the gate to the emitter conductively, the line length is reduced, and the conductive film layer is connected to reduce parasitic inductance. At the same time, the NPN type and PNP type transistor for improved functionality and stability.

Benefits of technology

It realizes reducing the device area and line length, reducing parasitic inductance, and improving the stability and power density of electronic devices, which is suitable for high-frequency application scenarios.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119133169A_ABST
    Figure CN119133169A_ABST
Patent Text Reader

Abstract

The invention discloses a high-electron-mobility transistor packaging structure and a preparation method, which are applied to the field of driving integrated circuit packaging, and the structure comprises a high-electron-mobility transistor and a plurality of triodes arranged on the surface of one side of the high-electron-mobility transistor, a grid electrode of the high-electron-mobility transistor is positioned on the surface of one side, close to the triode, of the high-electron-mobility transistor; an emitter of the triode is arranged on the surface of one side, close to the high-electron-mobility transistor, of the triode, the emitter is conductively connected with the grid electrode, and the remaining electrodes are all conductively connected with the corresponding pins. A triode is arranged on the surface of one side of a high-electron-mobility transistor, a grid electrode in the high-electron-mobility transistor is arranged on the surface of the side, close to the triode, of the high-electron-mobility transistor, and an emitting electrode in the triode is arranged on the surface of the side, close to the high-electron-mobility transistor, of the triode. And the parasitic inductance of the circuit is reduced while the circuit board area occupied by the device is reduced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of driver integrated circuit packaging, and in particular to a high electron mobility transistor packaging structure and a preparation method thereof. Background Art

[0002] As electronic components continue to develop towards high density, high integration, low energy efficiency and small size, taking totem pole drive as an example, the existing high electron mobility transistor and totem pole circuit integrated drive circuit or power amplifier circuit cannot meet the above requirements. The external transistor in the totem pole circuit occupies the area of ​​PCB (printed circuit board), resulting in a large volume of the formed electronic device. At the same time, the line length between the devices is long, which increases the parasitic inductance in the line, leading to serious electromagnetic compatibility problems and affecting the stability of the circuit.

[0003] Therefore, how to provide a device that can reduce the area occupied by a transistor driving a high electron mobility transistor, reduce the volume of the formed electronic device, and reduce the parasitic inductance of the circuit within the electronic device is a technical problem that technical personnel in this field urgently need to solve. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a high electron mobility transistor packaging structure and a preparation method, which solves the problem that the electronic devices formed in the prior art are large in size and the line length between devices is long, which increases the parasitic inductance in the line, thereby causing serious electromagnetic compatibility and affecting the stability of the circuit.

[0005] In order to solve the above technical problems, the present invention provides a high electron mobility transistor packaging structure, comprising:

[0006] A high electron mobility transistor, and a plurality of triodes arranged on a surface of one side of the high electron mobility transistor;

[0007] The high electron mobility transistor comprises a source, a drain and a gate, and the gate is located on a surface of the high electron mobility transistor on one side close to the triode;

[0008] The triode comprises a base, a collector and an emitter, and the emitter is arranged on a surface of the triode on one side close to the high electron mobility transistor;

[0009] The emitter of the transistor is conductively connected to the gate of the high electron mobility transistor, the base of the transistor is conductively connected to a base pin, and the collector of the transistor is conductively connected to a corresponding collector pin;

[0010] The source of the high electron mobility transistor is conductively connected to the source pin, and the drain of the high electron mobility transistor is conductively connected to the drain pin.

[0011] Optionally, the emitter of the triode is conductively connected to the gate of the high electron mobility transistor through a conductive film layer.

[0012] Optionally, an NPN transistor and a PNP transistor are provided on one side surface of the high electron mobility transistor.

[0013] Optionally, the base and the collector are both arranged on a surface of the transistor on a side facing away from the high electron mobility transistor.

[0014] Optionally, when a plurality of the transistors are arranged on one side surface of the high electron mobility transistor, the base is arranged on one side of the transistor surface along a direction perpendicular to the arrangement direction of the plurality of the transistors, and the collector is arranged on the other side of the transistor surface along a direction perpendicular to the arrangement direction of the plurality of the transistors.

[0015] Optionally, the source, the drain and the gate of the high electron mobility transistor are all located on a surface of the high electron mobility transistor that is close to the triode.

[0016] Optionally, the base of the transistor is conductively connected to the base pin via a binding wire, and the collector of the transistor is conductively connected to the corresponding collector pin via a binding wire;

[0017] The source of the high electron mobility transistor is conductively connected to the source pin via a bonding wire, and the drain of the high electron mobility transistor is conductively connected to the drain pin via a bonding wire.

[0018] Optionally, it also includes a packaging base island and a plastic package body for packaging and protecting the device;

[0019] A side of the high electron mobility transistor facing away from the triode is connected to the package base island.

[0020] Optionally, when a plurality of the triodes are disposed on one side surface of the high electron mobility transistor, the bases of the triodes are all conductively connected to the same base pin.

[0021] The present invention also provides a method for preparing a high electron mobility transistor packaging structure, comprising:

[0022] The pins and the high electron mobility transistor are placed correspondingly; the high electron mobility transistor includes a source, a drain and a gate, and the pins include a base pin, a collector pin, a source pin for conductively connecting to the source of the high electron mobility transistor, and a drain pin for conductively connecting to the drain of the high electron mobility transistor;

[0023] A plurality of triodes are arranged on a surface of one side of the high electron mobility transistor provided with the gate; the triodes include a base, a collector and an emitter, and the emitter is arranged on a surface of the triode close to the high electron mobility transistor;

[0024] The emitter of the transistor is conductively connected to the gate of the high electron mobility transistor, and the base of the transistor is conductively connected to the base pin, the collector of the transistor is conductively connected to the corresponding collector pin, the source of the high electron mobility transistor is conductively connected to the source pin, and the drain of the high electron mobility transistor is conductively connected to the drain pin, to complete the preparation of the high electron mobility transistor packaging structure.

[0025] It can be seen that the high electron mobility transistor packaging structure provided by the present invention includes a high electron mobility transistor, and a plurality of triodes arranged on one side surface of the high electron mobility transistor, the high electron mobility transistor includes a source, a drain and a gate, and the gate is located on the side surface of the high electron mobility transistor close to the triode, the triode includes a base, a collector and an emitter, and the emitter is arranged on the side surface of the triode close to the high electron mobility transistor, the emitter of the triode is conductively connected to the gate of the high electron mobility transistor, the base of the triode is conductively connected to the base pin, the collector of the triode is conductively connected to the corresponding collector pin, the source of the high electron mobility transistor is conductively connected to the source pin, and the drain of the high electron mobility transistor is conductively connected to the drain pin. The present invention arranges the triode on one side surface of the high electron mobility transistor, arranges the gate in the high electron mobility transistor on one side surface of the high electron mobility transistor close to the triode, and arranges the emitter in the triode on one side surface of the triode close to the high electron mobility transistor. This can reduce the layout length of the conductive line in the device while reducing the circuit board area occupied by the device, thereby reducing the parasitic inductance of the line and improving the stability of the device.

[0026] In addition, the present invention also provides a high electron mobility transistor packaging structure, which also has the above-mentioned beneficial effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0028] Figure 1 A schematic structural diagram of a high electron mobility transistor packaging structure provided by an embodiment of the present invention;

[0029] Figure 2 A schematic diagram of a top view of a high electron mobility transistor packaging structure provided by an embodiment of the present invention;

[0030] Figure 3 An equivalent circuit diagram of a high electron mobility transistor packaging structure provided by an embodiment of the present invention;

[0031] Figure 4 An equivalent circuit diagram of another high electron mobility transistor packaging structure provided by an embodiment of the present invention;

[0032] Figure 5 A flow chart of a method for preparing a high electron mobility transistor packaging structure provided by an embodiment of the present invention;

[0033] Figures 1 to 3 In the figure, the reference numerals are described as follows:

[0034] 1-first transistor, 2-second transistor, 3-high electron mobility transistor, 4-plastic package, 5-package base island, 6-package structure, 7-binding wire, 8-pin;

[0035] 101 - base of the first transistor, 102 - emitter of the first transistor, 103 - collector of the first transistor, 201 - base of the second transistor, 202 - emitter of the second transistor, 203 - collector of the second transistor, 301 - drain, 302 - source, 303 - gate. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] Please refer to Figure 1 , Figure 1 A schematic diagram of a high electron mobility transistor packaging structure provided by an embodiment of the present invention. The structure may include:

[0038] A high electron mobility transistor 3, and a plurality of triodes arranged on a surface of one side of the high electron mobility transistor 3;

[0039] The high electron mobility transistor 3 comprises a source 302, a drain 301 and a gate 303, and the gate 303 is located on a surface of the high electron mobility transistor 3 close to the triode;

[0040] The triode includes a base, a collector and an emitter, and the emitter is arranged on a surface of the triode on one side close to the high electron mobility transistor 3;

[0041] The emitter of the transistor is conductively connected to the gate 303 of the high electron mobility transistor 3, the base of the transistor is conductively connected to the base pin, and the collector of the transistor is conductively connected to the corresponding collector pin;

[0042] The source 302 of the high electron mobility transistor 3 is conductively connected to the source 302 pin, and the drain 301 of the high electron mobility transistor 3 is conductively connected to the drain 301 pin.

[0043] It should be noted that, in this embodiment, two transistors are provided on one side surface of a high electron mobility transistor as an example for explanation, and the above two transistors can be correspondingly provided as a first transistor 1 and a second transistor 2, and the overall structure is the above packaging structure 6. In addition, the pins in the drawings of this embodiment are uniformly marked with pins 8, and each pin 8 actually corresponds to a pin connected to a corresponding conductive electrode. In order to make the present invention easier to understand, the packaging structure of the high electron mobility transistor 3 in this embodiment can also refer to Figure 2 , Figure 2A schematic diagram of a top view of a high electron mobility transistor packaging structure provided in an embodiment of the present invention. In this embodiment, a plurality of triodes are arranged on a side surface of a high electron mobility transistor 3. This embodiment does not limit which specific surface of the high electron mobility transistor 3 the above-mentioned triodes are arranged on. What needs to be considered is that the emitter of the triode in this embodiment needs to be conductively connected to the gate 303 of the high electron mobility transistor 3, and arranging the emitter of the triode close to the gate 303 of the high electron mobility transistor 3 can reduce the length of the conductive connection line between the two, thereby reducing the parasitic inductance in the line. Existing electrodes are generally arranged on the front and back sides, so the above-mentioned triode is arranged on a side surface of the high electron mobility transistor 3 where the gate 303 is arranged, and the emitter in the triode is arranged on a side surface of the triode close to the high electron mobility transistor 3, so as to facilitate the conductive connection between the gate 303 of the high electron mobility transistor 3 and the emitter of the triode. In this embodiment, the base 101 of the first triode, the emitter 102 of the first triode, the collector 103 of the first triode, the base 201 of the second triode, the emitter 202 of the second triode, and the collector 203 of the second triode are all as shown in FIG. Figure 1 or Figure 2 As shown in , the drain 301 is specifically the drain 301 of the high electron mobility transistor, the source 302 is specifically the source 302 of the high electron mobility transistor, and the gate 303 is specifically the gate 303 of the high electron mobility transistor. In addition, the equivalent circuit diagram of the high electron mobility transistor 3 packaging structure in this embodiment can be referred to Figure 3 , Figure 3 An equivalent circuit diagram of a high electron mobility transistor packaging structure provided by an embodiment of the present invention, wherein the emitter 102 of the first triode and the emitter 202 of the second triode are both conductively connected to the gate 303 of the high electron mobility transistor 3 .

[0044] It should be further explained that, in this embodiment, the electrodes of the triode and the electrodes of the high electron mobility transistor 3 are all conductively connected to the corresponding pins to lead out the electrodes of the device and ensure that the package structure is connected to the outside. This embodiment does not limit the specific positions of the source 302 and the drain 301 in the high electron mobility transistor 3, as long as they can be conductively connected to the corresponding pins, and the source 302 and the drain 301 in the high electron mobility transistor 3 can be set on the same side as the gate 303, or one of the source 302 and the drain 301 can be selected, and the gate 303 is set on the same side, and the other is set on the side of the high electron mobility transistor 3 facing away from the gate 303. Correspondingly, in this embodiment, the specific positions of the base and the collector in the triode are not limited, as long as they can be conductively connected to the corresponding pins and ensure the functionality of the device, and can be set according to the actual working conditions. This embodiment also does not limit the specific number of triodes set on the surface of one side of the high electron mobility transistor 3, and can be set according to the actual circuit structure. In this embodiment, the gate 303 of the high electron mobility transistor 3 is not limited to one. To facilitate the connection, the gate 303 in the high electron mobility transistor 3 can be multiple. In addition, when a plurality of triodes are arranged on one side surface of the high electron mobility transistor 3, the bases of the plurality of triodes can be arranged to be conductively connected to the same base pin, or the bases of the plurality of triodes can be arranged to be conductively connected to different base pins.

[0045] The high electron mobility transistor packaging structure prepared in this embodiment can make the device packaging size smaller and the power density higher; the triode and the high electron mobility transistor are integrated and packaged together to reduce the driving volume, and the electrical connection line between the triode and the high electron mobility transistor is shortened to reduce parasitic inductance.

[0046] Furthermore, in order to further reduce the line length between devices, the emitter of the triode and the gate 303 of the high electron mobility transistor 3 may be conductively connected through a conductive film layer.

[0047] It should be noted that, in the present embodiment, the emitter of the transistor can be conductively connected to the gate 303 of the high electron mobility transistor 3 through a conductive film layer, so that the emitter of the above-mentioned transistor is only separated from the gate 303 of the high electron mobility transistor 3 by a conductive film layer, thereby minimizing the length of the line of conductive connection between the emitter of the transistor and the gate 303 of the high electron mobility transistor 3, and reducing the parasitic inductance of the line.

[0048] Furthermore, in order to ensure the functionality of the packaging structure, one side surface of the high electron mobility transistor 3 may be provided with an NPN transistor and a PNP transistor.

[0049] It should be noted that the transistors provided in this embodiment include an NPN transistor and a PNP transistor, which can ensure the functionality of the structure. Further, in this embodiment, the high electron mobility transistor 3 can be set as a gallium nitride transistor, specifically a high electron mobility gallium nitride transistor, which can be suitable for application scenarios of 1MHz and above. The equivalent circuit diagram of the packaging structure in this embodiment can be referred to Figure 4 , Figure 4 The equivalent circuit diagram of another high electron mobility transistor packaging structure provided by the embodiment of the present invention. Among them, GND is the ground terminal, the common lead-out terminal of the base of the NPN transistor and the base of the PNP transistor is connected to the PWM conductor, the collector of the NPN transistor is connected to the Vdd conductor, the emitter of the NPN transistor and the emitter of the PNP transistor are both connected to the gate of the high electron mobility transistor, and the collector of the PNP transistor is grounded, G is the gate 303 of the high electron mobility transistor, D is the drain 301 of the high electron mobility transistor, and S is the source 302 of the high electron mobility transistor. In this embodiment, a gallium nitride transistor is set to replace the MOS transistor in the existing structure. Because the gallium nitride transistor has no body diode and the reverse recovery is zero, it has a faster switching frequency, which can reach up to 10MHz, and the passive components can be reduced accordingly, and finally further achieve the purpose of overall shrinking and lightening of electronic devices.

[0050] Furthermore, in order to improve the convenience of connecting the electrodes and the pins in the triode, the base and the collector can be arranged on the surface of the triode on the side facing away from the high electron mobility transistor 3 .

[0051] It should be noted that, in this embodiment, the base and collector of the triode are arranged on the side surface of the triode facing away from the high electron mobility transistor 3, so that the base and collector of the triode are exposed. There is no need to consider that the side surface of the triode close to the high electron mobility transistor 3 affects the connection between the base and collector and the corresponding pins. The base and collector arranged on the side surface of the triode facing away from the high electron mobility transistor 3 can be directly connected to the corresponding pins, thereby improving the convenience of leading out the electrodes in the triode.

[0052] Furthermore, in order to ensure the simplicity of connection between the base and collector of the transistor and the corresponding pins when multiple transistors are set, when multiple transistors are set on one side surface of the high electron mobility transistor 3, the base can be set on one side of the transistor surface along a direction perpendicular to the arrangement direction of the multiple transistors, and the collector can be set on the other side of the transistor surface along a direction perpendicular to the arrangement direction of the multiple transistors.

[0053] It should be noted that in this embodiment, multiple transistors arranged on the surface of one side of the high electron mobility transistor 3 are arranged along a specified direction, and on the surface of the transistor, bases and collectors are correspondingly arranged on both sides perpendicular to the arrangement direction of the above-mentioned multiple transistors, that is, each transistor is provided with a base or collector on one side perpendicular to the arrangement direction of the above-mentioned multiple transistors, and a collector or base is correspondingly arranged on the other side, so that the base pin set on one side of the high electron mobility transistor 3 is connected to the base lead set on the side of the transistor close to the above-mentioned base pin, and at the same time, the collector pin set on the other side of the high electron mobility transistor 3 is connected to the collector lead set on the side of the transistor close to the above-mentioned collector pin.

[0054] Furthermore, in order to facilitate the connection between the source 302 and the drain 301 of the high electron mobility transistor 3 and the corresponding pins, the source 302, the drain 301 and the gate 303 of the high electron mobility transistor 3 can be arranged, all located on the side surface of the high electron mobility transistor 3 close to the triode.

[0055] It should be noted that the source 302 and the drain 301 provided on the surface of the high electron mobility transistor 3 on the side close to the triode in this embodiment are both located in the area outside the triode shielding area to ensure that the source 302 and the drain 301 of the high electron mobility transistor 3 are smoothly conductively connected to the corresponding pins. It should be noted that in order to ensure the convenience of connecting the source 302 and the drain 301 of the high electron mobility transistor 3 to the corresponding pins, the source 302 can be provided on the side of the surface of the high electron mobility transistor 3 close to the source 302 pin, and the drain 301 can be provided on the side of the surface of the high electron mobility transistor 3 close to the drain 301 pin.

[0056] Furthermore, in order to ensure the convenience of connecting the electrodes in the high electron mobility transistor 3 and the transistor to the corresponding pins, the base of the transistor and the base pin can be conductively connected through the binding wire 7, and the collector of the transistor and the corresponding collector pin can be conductively connected through the binding wire 7;

[0057] The source 302 of the high electron mobility transistor 3 is conductively connected to the source 302 pin via the bonding wire 7 , and the drain 301 of the high electron mobility transistor 3 is conductively connected to the drain 301 pin via the bonding wire 7 .

[0058] It should be noted that, in this embodiment, the source 302 and the drain 301 in the high electron mobility transistor 3, as well as the base and the collector in the triode, are all conductively connected to the corresponding pins through the binding wire 7, which can ensure the simplicity of the structure while ensuring the electrode lead-out of the high electron mobility transistor 3 and the triode. In this embodiment, the binding wire 7 can be set as a metal binding wire, specifically, it can be set as a silver metal binding wire, a copper metal binding wire or an aluminum metal binding wire. In addition, in this embodiment, the above conductive connection can also be achieved by using a metal strip or a bridge clip (clip).

[0059] Furthermore, in order to ensure the stability of the structure, the above-mentioned high electron mobility transistor 3 packaging structure may further include a packaging base island 5 and a plastic package body 4 for packaging and protecting the device;

[0060] The side of the high electron mobility transistor 3 facing away from the triode is connected to the package base island 5 .

[0061] It should be noted that the device encapsulated and protected by the plastic encapsulation body 4 in this embodiment includes the high electron mobility transistor 3, the triode, the pin, and the connection structure of connecting the electrode of the high electron mobility transistor 3 and the electrode of the triode to the corresponding pin, so that the formed package structure is protected by the plastic encapsulation body 4 to avoid damage such as external erosion. In this embodiment, the package base island 5 is used to carry the high electron mobility transistor 3, and the side of the high electron mobility transistor 3 facing away from the triode is connected to the package base island 5. On the basis of ensuring that the gate 303 of the high electron mobility transistor 3 and the emitter of the triode are directly connected to each other, the high electron mobility transistor 3 can be installed on the package base island 5, and the package base island 5 is used as a bearing part to ensure the stability of the structure. Specifically, in this embodiment, the side of the high electron mobility transistor 3 facing away from the triode can be set, and connected to the package base island by bonding with adhesive or soldering. In addition, in this embodiment, a resistor can also be set between the base of the triode and the package base island as a built-in driving resistor of the package structure.

[0062] Furthermore, in order to reduce the complexity of the above packaging structure, when a plurality of transistors are disposed on one side surface of the high electron mobility transistor 3 , the bases of the transistors are all conductively connected to the same base pin.

[0063] It should be noted that in this embodiment, when multiple transistors are arranged on one side surface of the high electron mobility transistor 3 in the above-mentioned packaging structure, the bases of all the transistors are connected to the same base pin. While ensuring the functionality of the structure, the number of base pins is reduced, thereby reducing the complexity of the above-mentioned packaging structure.

[0064] The high electron mobility transistor 3 packaging structure provided by the embodiment of the present invention includes a high electron mobility transistor 3 and a plurality of triodes arranged on one side surface of the high electron mobility transistor 3, wherein the high electron mobility transistor 3 includes a source 302, a drain 301 and a gate 303, and the gate 303 is located on the side surface of the high electron mobility transistor 3 close to the triode, the triode includes a base, a collector and an emitter, and the emitter is arranged on the side surface of the triode close to the high electron mobility transistor 3, the emitter of the triode is conductively connected to the gate 303 of the high electron mobility transistor 3, the base of the triode is conductively connected to the base pin, the collector of the triode is conductively connected to the corresponding collector pin, the source 302 of the high electron mobility transistor 3 is conductively connected to the source 302 pin, and the drain 301 of the high electron mobility transistor 3 is conductively connected to the drain 301 pin. The present invention arranges the triode on one side surface of the high electron mobility transistor 3, arranges the gate 303 in the high electron mobility transistor 3 on the side surface of the high electron mobility transistor 3 close to the triode, and arranges the emitter in the triode on the side surface of the triode close to the high electron mobility transistor 3. This can reduce the area of ​​the circuit board occupied by the device and reduce the layout length of the conductive line in the device, thereby reducing the parasitic inductance of the line and improving the stability of the device.

[0065] In addition, in the embodiment of the present invention, the emitter of the triode is conductively connected to the gate 303 of the high electron mobility transistor 3 through a conductive film layer, so that the emitter of the triode and the gate 303 of the high electron mobility transistor 3 are separated by only a conductive film layer, thereby minimizing the length of the line of conductive connection between the emitter of the triode and the gate 303 of the high electron mobility transistor 3, thereby reducing the parasitic inductance of the line; the triode is configured to include an NPN triode and a PNP triode, and the high electron mobility transistor 3 is configured to be a gallium nitride transistor, which can ensure The functionality of the structure is verified, and it can be applied to application scenarios of 1MHz and above; by setting the base and collector in the triode, both are set on the side surface of the triode facing away from the high electron mobility transistor 3, the base and collector set on the side surface of the triode facing away from the high electron mobility transistor 3 can be directly connected to the corresponding pins, which improves the convenience of leading out the electrodes in the triode; each triode is provided with a base or collector on one side perpendicular to the arrangement direction of the above-mentioned multiple triodes, and a collector or base is correspondingly set on the other side, which improves the base pin and the base pin in the triode close to the above-mentioned base pin. The convenience of connecting the base lead set on one side is improved, and the convenience of connecting the collector pin and the collector lead set on the side of the triode close to the above-mentioned collector pin is improved; by setting the source 302 and the drain 301 set on the surface of the side close to the triode in the high electron mobility transistor 3, both are located in the area outside the shielding area of ​​the triode, ensuring that the source 302 and the drain 301 of the high electron mobility transistor 3 are smoothly conductively connected with the corresponding pins; setting the source 302 and the drain 301 in the high electron mobility transistor 3, as well as the base and the collector in the triode, are all connected by binding wires. 7 is conductively connected to the corresponding pins, which can facilitate the extraction of the electrodes of the high electron mobility transistor 3 and the triode while ensuring the simplicity of the structure; by providing the plastic package 4 to encapsulate and protect the device, and utilizing the package base island 5 to carry the high electron mobility transistor 3, it is possible to avoid damage to the device such as external corrosion and ensure the stability of the structure; when a plurality of triodes are provided on one side surface of the high electron mobility transistor 3, the bases of all the triodes are connected to the same base pin, while ensuring the functionality of the structure, the number of base pins is reduced, and the complexity of the above-mentioned packaging structure is reduced.

[0066] A method for preparing a high electron mobility transistor packaging structure provided by an embodiment of the present invention is introduced below. The method for preparing the high electron mobility transistor packaging structure described below and the high electron mobility transistor packaging structure described above can be referred to each other.

[0067] Please refer to Figure 5 , Figure 5 A flowchart of a method for preparing a high electron mobility transistor packaging structure provided by an embodiment of the present invention may include:

[0068] S101: Place pins and a high electron mobility transistor correspondingly; the high electron mobility transistor includes a source, a drain and a gate, and the pins include a base pin, a collector pin, a source pin for conductively connecting to the source of the high electron mobility transistor, and a drain pin for conductively connecting to the drain of the high electron mobility transistor.

[0069] In this embodiment, the executor is a packaging structure preparation device. In this embodiment, the specific manner in which the pins are arranged relative to the high electron mobility transistor is not limited, as long as the pins can be conductively connected to the corresponding conductive electrodes. In this embodiment, the specific structure for carrying the high electron mobility transistor is also not limited. For example, the packaging base island can be used to carry the above-mentioned high electron mobility transistor. It should be further explained that in actual operation, the packaging base island and the pins in the device are located in the same frame.

[0070] S102: a plurality of transistors are arranged on a surface of a side of a high electron mobility transistor provided with a gate; the transistors include a base, a collector and an emitter, and the emitter is arranged on a surface of the transistor close to the high electron mobility transistor.

[0071] In this embodiment, the emitter of the triode is arranged opposite to the surface of the side where the gate of the high electron mobility transistor is arranged, and the surface of the triode where the emitter is arranged can be buckled with the surface of the side where the gate of the high electron mobility transistor is arranged. This embodiment does not limit the specific way of connecting the emitter of the triode with the gate of the high electron mobility transistor, as long as the two can be conductively connected. Preferably, the emitter of the triode can be conductively connected to the gate of the high electron mobility transistor through a conductive film layer to reduce the line path and reduce the parasitic inductance in the line.

[0072] S103: Conductively connect the emitter of the transistor to the gate of the high electron mobility transistor, and conductively connect the base of the transistor to the base pin, conductively connect the collector of the transistor to the corresponding collector pin, conductively connect the source of the high electron mobility transistor to the source pin, conductively connect the drain of the high electron mobility transistor to the drain pin, and complete the preparation of the high electron mobility transistor packaging structure.

[0073] In this embodiment, the base and collector in the triode, and the source and drain in the high electron mobility transistor are conductively connected to the corresponding pins, and after the conductive connection is completed, the above structure can be packaged using a plastic package to complete the preparation of the high electron mobility transistor packaging structure.

[0074] The method for preparing a high electron mobility transistor packaging structure provided by an embodiment of the present invention includes S101: placing pins and a high electron mobility transistor correspondingly, the high electron mobility transistor includes a source, a drain and a gate, and the pins include a base pin, a collector pin, a source pin for conductively connecting to the source of the high electron mobility transistor, and a drain pin for conductively connecting to the drain of the high electron mobility transistor; S102: arranging a plurality of triodes on a side surface of the high electron mobility transistor provided with a gate, the triodes including a base, a collector and an emitter, and the emitter is arranged on a side surface of the triode close to the high electron mobility transistor; S103: conductively connecting the emitter of the triode to the gate of the high electron mobility transistor, conductively connecting the base of the triode to the base pin, conductively connecting the collector of the triode to the corresponding collector pin, conductively connecting the source of the high electron mobility transistor to the source pin, and conductively connecting the drain of the high electron mobility transistor to the drain pin, thereby completing the preparation of the high electron mobility transistor packaging structure.

[0075] The present invention arranges the triode on one side surface of the high electron mobility transistor, arranges the gate in the high electron mobility transistor on one side surface of the high electron mobility transistor close to the triode, and arranges the emitter in the triode on one side surface of the triode close to the high electron mobility transistor. This can reduce the layout length of the conductive line in the device while reducing the circuit board area occupied by the device, thereby reducing the parasitic inductance of the line and improving the stability of the device.

[0076] In a feasible embodiment, the method for preparing the high electron mobility transistor packaging structure may specifically include the following steps:

[0077] Step S11: providing a metal frame as a packaging base island.

[0078] Step S12: Disposing metal pins outside the package base island.

[0079] Step S13: Arrange a gallium nitride transistor on the package base island.

[0080] Step S14: an NPN transistor and a PNP transistor are arranged on the gallium nitride transistor, and the gate of the gallium nitride transistor is arranged on a side surface of the gallium nitride transistor close to the NPN transistor and the PNP transistor, and the emitter of the NPN transistor and the emitter of the PNP transistor are both arranged on a side surface close to the gallium nitride transistor, and the emitter of the NPN transistor and the emitter of the PNP transistor are arranged, and are both conductively connected to the gate of the gallium nitride transistor through the conductive film layer.

[0081] Step S15: performing packaging molding using plastic packaging adhesive to complete the preparation of the high electron mobility transistor packaging structure.

[0082] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the structure disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0083] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0084] Finally, it should be noted that, in this article, relationships such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variations are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0085] The above is a detailed introduction to a high electron mobility transistor packaging structure and a preparation method provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the structure, method and core idea of ​​the present invention; at the same time, for general technical personnel in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A high electron mobility transistor packaging structure, characterized in that: include: A high electron mobility transistor, and a plurality of triodes arranged on a surface of one side of the high electron mobility transistor; The high electron mobility transistor comprises a source, a drain and a gate, and the gate is located on a surface of the high electron mobility transistor on one side close to the triode; The triode comprises a base, a collector and an emitter, and the emitter is arranged on a surface of the triode on one side close to the high electron mobility transistor; The emitter of the transistor is conductively connected to the gate of the high electron mobility transistor, the base of the transistor is conductively connected to a base pin, and the collector of the transistor is conductively connected to a corresponding collector pin; The source of the high electron mobility transistor is conductively connected to the source pin, and the drain of the high electron mobility transistor is conductively connected to the drain pin.

2. The high electron mobility transistor packaging structure according to claim 1, characterized in that: The emitter of the triode is conductively connected to the gate of the high electron mobility transistor through a conductive film layer.

3. The high electron mobility transistor packaging structure according to claim 1, characterized in that: An NPN transistor and a PNP transistor are arranged on one side surface of the high electron mobility transistor.

4. The high electron mobility transistor packaging structure according to claim 1, characterized in that: The base and the collector are both arranged on a surface of the transistor on a side facing away from the high electron mobility transistor.

5. The high electron mobility transistor packaging structure according to claim 4, characterized in that: When a plurality of transistors are arranged on one side surface of the high electron mobility transistor, the base is arranged on one side of the transistor surface along a direction perpendicular to the arrangement direction of the plurality of transistors, and the collector is arranged on the other side of the transistor surface along a direction perpendicular to the arrangement direction of the plurality of transistors.

6. The high electron mobility transistor packaging structure according to claim 1, characterized in that: The source, the drain and the gate of the high electron mobility transistor are all located on a surface of the high electron mobility transistor that is close to the triode.

7. The high electron mobility transistor packaging structure according to claim 1, characterized in that: The base of the transistor is conductively connected to the base pin via a binding wire, and the collector of the transistor is conductively connected to the corresponding collector pin via a binding wire; The source of the high electron mobility transistor is conductively connected to the source pin via a bonding wire, and the drain of the high electron mobility transistor is conductively connected to the drain pin via a bonding wire.

8. The high electron mobility transistor packaging structure according to claim 1, characterized in that: It also includes a packaging base island and a plastic package body for packaging and protecting the device; A side of the high electron mobility transistor facing away from the triode is connected to the package base island.

9. The high electron mobility transistor packaging structure according to claim 1, characterized in that: When a plurality of the triodes are disposed on one side surface of the high electron mobility transistor, the bases of the triodes are all conductively connected to the same base pin.

10. A method for preparing a high electron mobility transistor packaging structure, characterized in that: include: The pins and the high electron mobility transistor are placed correspondingly; the high electron mobility transistor includes a source, a drain and a gate, and the pins include a base pin, a collector pin, a source pin for conductively connecting to the source of the high electron mobility transistor, and a drain pin for conductively connecting to the drain of the high electron mobility transistor; A plurality of triodes are arranged on a surface of one side of the high electron mobility transistor provided with the gate; the triodes include a base, a collector and an emitter, and the emitter is arranged on a surface of the triode close to the high electron mobility transistor; The emitter of the transistor is conductively connected to the gate of the high electron mobility transistor, and the base of the transistor is conductively connected to the base pin, the collector of the transistor is conductively connected to the corresponding collector pin, the source of the high electron mobility transistor is conductively connected to the source pin, and the drain of the high electron mobility transistor is conductively connected to the drain pin, to complete the preparation of the high electron mobility transistor packaging structure.

Citation Information

Patent Citations

  • Cascaded GaN HEMT packaging device and preparation method thereof

    CN116913911A

  • GaN HEMT device integrated with GaN triode and having ESD protection function

    CN118299414A

  • Field-effect transistor and its manufacturing method

    JP2009246045A

  • Epitaxial wafer for compound semiconductor element and compound semiconductor element

    JP2015233089A

Cited By

  • IGBT device based on PNP triode and preparation method thereof

    CN119340225A