Power switch device

By designing a mesh-shaped planar gate structure in the shielded gate power switching device, the current path bottleneck problem is solved, the power density and current diffusion region are improved, and the current distribution efficiency is achieved.

CN119133248APending Publication Date: 2024-12-13HANGZHOU SILICON-MAGIC SEMICON TECH CO LTD
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Patent Information

Application Number
CN202411266088.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-10
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

Existing shielded gate power switching devices have bottlenecks in current path and platform width, limiting the improvement of their current capability and power density.

Method used

The planar gate structure is designed to be mesh-shaped and distributed on each platform of the field plate structure, adding a current diffusion region and optimizing the current distribution of the device.

Benefits of technology

The power density and current diffusion region are improved, the on-resistance is reduced, and the overall performance of the device is improved.

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Abstract

The invention discloses a power switch device which comprises a substrate layer, an epitaxial layer, a gate structure and a field plate structure. The gate structure is a planar gate structure. On a first surface of the power switch device, a planar gate structure is located on the first surface of the power switch device, and a mesh-shaped structure is arranged on a horizontal plane parallel to the first surface. According to the power switch device, the planar gate structure is designed into the mesh-shaped structure, so that the gate structures are distributed on each platform between the field plate structures, the current diffusion region of the device is increased, and the power density of the device is improved.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a power switch device and a structure thereof. Background Art

[0002] In some power switching devices, the load current flows from one surface of the power switching device to the other surface in a direction perpendicular to the surface. In order to increase the power density of the power switching device, reduce the volume of the power switching device, and improve the performance of the power switching device, a variety of power switching devices have been developed, such as trench gate power switching devices, shielded gate power switching devices, etc. Among them, the shielded gate power switching device introduces a field plate structure at the bottom of the gate trench, which makes the device have the advantages of high power density and low switching loss, and is widely used in various power supply systems.

[0003] The current path of the existing shielded gate power switch device is on the platform between each gate groove. The current capacity of the shielded gate power switch device depends on the width of the platform between the gate grooves, which causes a bottleneck in the device optimization. Summary of the invention

[0004] The present application provides a power switching device, which combines a planar gate structure and a field plate structure, and designs the planar gate structure into a mesh structure, so that the gate structure is distributed on each platform between the field plate structures, increasing the current diffusion area of ​​the device and improving the power density of the device.

[0005] According to one embodiment of the present invention, there is provided a power switching device having a first surface and a second surface which are parallel to each other, and comprising: a substrate layer; an epitaxial layer located on the substrate layer; a gate structure having a planar gate structure, located on the first surface of the power switching device, and having a mesh structure on a horizontal plane parallel to the first surface; and a field plate structure, comprising a field plate groove, a field plate electrode and a field plate insulating layer, wherein the field plate groove extends vertically from the first surface to the inside of the epitaxial layer, the field plate electrode is located in the field plate groove, and the field plate insulating layer covers the inner surface of the field plate groove to isolate the field plate electrode from the field plate groove, wherein the field plate structure is located in the mesh of the planar gate structure.

[0006] According to an embodiment of the present invention, in the aforementioned power switch device, each mesh of the gate structure is in a quadrilateral shape.

[0007] According to an embodiment of the present invention, in the aforementioned power switch device, each mesh of the gate structure is in a hexagonal shape.

[0008] According to an embodiment of the present invention, in the aforementioned power switch device, each mesh of the gate structure is in the shape of a regular polygon.

[0009] According to an embodiment of the present invention, in the aforementioned power switch device, the corners of each mesh of the gate structure are processed into an arc shape.

[0010] According to an embodiment of the present invention, in the aforementioned power switch device, on a horizontal plane parallel to the first surface, a shape of each mesh of the gate structure is consistent with a shape of the field plate trench.

[0011] According to an embodiment of the present invention, in the aforementioned power switch device, in a horizontal plane parallel to the first surface, a shape of each mesh of the gate structure is different from a shape of the field plate trench.

[0012] According to an embodiment of the present invention, in the aforementioned power switch device, a depth of the field plate structure in a direction perpendicular to the first surface is 0.8 μm-1.5 μm.

[0013] According to one embodiment of the present invention, the aforementioned power switching device further includes: a body region, located in the epitaxial layer, exposed to the first surface of the power switching device, and distributed in the mesh of the gate structure, wherein the outer wall of the body region is located below the mesh-shaped gate structure, and on a horizontal plane parallel to the first surface, the outer wall of the body region has a circumference larger than the mesh of the gate structure in which it is located, and the inner wall of the body region is connected to the side wall of the field plate structure in the mesh of the gate structure; and a source region, located in the body region, exposed to the first surface of the power switching device, wherein the outer wall of the source region is located below the mesh-shaped gate structure, and on a horizontal plane parallel to the first surface, the outer wall of the source region has a circumference larger than the inner circle of the mesh of the gate structure in which it is located, but smaller than the circumference of the outer wall of the body region in which it is located, and the inner wall of the source region has a certain distance from the side wall of the field plate structure in the mesh of the gate structure.

[0014] According to an embodiment of the present invention, in the aforementioned power switch device, the field plate electrode and the source region are electrically connected to the same source potential, and the gate structure is electrically connected to the gate potential. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and other objects, features and advantages of the present application will become more apparent through the following description of the embodiments of the present application with reference to the accompanying drawings:

[0016] Figure 1 is a schematic structural diagram of a partial cell region of a power switch device 100 according to an embodiment of the present invention;

[0017] Figure 2 According to an embodiment of the present invention, Figure 1 The schematic diagram of the cross-sectional structure of a part of the cell area of ​​the power switch device 100 along the AA line is shown;

[0018] Figure 3 is a schematic structural diagram of a single cell of a power switch device 100 according to an embodiment of the present invention;

[0019] Figure 4 is a schematic cross-sectional structure diagram of a partial cell region of a power switch device 400 according to an embodiment of the present invention;

[0020] Figure 5 FIG. 5 is a schematic cross-sectional structure diagram of a partial cell region of a power switch device 500 according to an embodiment of the present invention. DETAILED DESCRIPTION

[0021] The specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are only for illustration and are not intended to limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to those of ordinary skill in the art that these specific details do not have to be used to implement the present invention. In other examples, in order to avoid confusing the present invention, known circuits, materials or methods are not specifically described.

[0022] Throughout the specification, references to "one embodiment", "an embodiment", "an example" or "an example" mean that a particular feature, structure or characteristic described in conjunction with the embodiment or example is included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment", "in an embodiment", "an example" or "an example" appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. In addition, particular features, structures or characteristics may be combined in one or more embodiments or examples in any appropriate combination and / or sub-combination. In addition, it should be understood by those of ordinary skill in the art that the drawings provided herein are for illustrative purposes and that the drawings are not necessarily drawn to scale. The same reference numerals indicate the same elements. The term "and / or" used herein includes any and all combinations of one or more related listed items. The drawings are not drawn to scale and are for illustrative purposes only. For clarity, unless otherwise specified, the same elements have been designated by corresponding reference numerals in different drawings.

[0023] The terms “having,” “comprising,” “including,” “including,” and the like are open ended, and these terms indicate the presence of stated structures, elements, or features, but do not exclude additional elements or features.

[0024] When describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or region, it may mean that it is directly on the other layer or region, or that other layers or regions are included between it and the other layer or region. Furthermore, if the device is turned over, the layer or region will be "below" or "beneath" another layer or region.

[0025] If it is intended to describe a situation where it is directly on another layer or another area, this article will use the expression “directly on…” or “on… and adjacent to…”.

[0026] In this document, relative doping concentrations are described by indicating "-" or "+" next to the doping type "n" or "p". For example, "n-" means that the doping concentration is lower than the doping concentration of an "n"-doped region, while the "n"-doped region has a higher doping concentration than the "n-"-doped region. Doping regions of the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different "n"-doped regions may have the same or different absolute doping concentrations.

[0027] In an embodiment of the present invention, each semiconductor layer or region has a first conductivity type or a second conductivity type. The first conductivity type refers to one of n-type or p-type, and the second conductivity type is the other one. That is to say, the semiconductor layer with the first conductivity type can be an n-type semiconductor layer or a p-type semiconductor layer. When the semiconductor layer with the first conductivity type is an n-type semiconductor layer, the semiconductor layer with the second conductivity type is a p-type semiconductor layer. The n-type semiconductor layer is formed by doping n-type impurities in the semiconductor layer. The n-type impurities can be pentavalent elements such as phosphorus and arsenic. The p-type semiconductor layer is formed by doping p-type impurities in the semiconductor layer. The p-type impurities can be trivalent elements such as boron, indium, and gallium.

[0028] Figure 1 FIG. 1 is a schematic structural diagram of a partial cell region of a power switch device 100 according to an embodiment of the present invention.

[0029] The power switch device 100 may be or include an insulated gate field effect transistor, such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The power switch device 100 may also include other power semiconductor devices such as an IGBT (Insulated Gate Bipolar Transistor).

[0030] like Figure 1 As shown, the power switch device 100 includes a gate structure 101 and a field plate structure 102. The gate structure 101 is a planar gate structure and is distributed in a mesh shape. Figure 1 In the embodiment, each mesh 101a of the gate structure 101 is a quadrilateral structure, and each mesh 101a is provided with a field plate structure 102. The field plate structure 102 includes a field plate groove 102a, a field plate electrode 102b and a field plate insulating layer 102c.

[0031] It should be understood that Figure 1 FIG. 1 shows one surface of the power switch device 100. On this surface, in addition to the gate structure 101 and the field plate structure 102, there are other regions, such as a source region and / or a body region. For the sake of clarity of the example, other regions except the gate structure 101 and the field plate structure 102 are not shown. Figure 1 Shown in.

[0032] exist Figure 1 In the embodiment, the gate structure 101 has a quadrilateral shape. The quadrilateral is formed by the intersection of linear gates in different directions and positions, and the intersections, that is, the four corners of the quadrilateral, are cut to form an arc shape.

[0033] The field plate structure 102 is adapted to the mesh of the gate structure 101 and also has a quadrilateral shape. The four corners of the quadrilateral field plate structure are also chamfered to form an arc shape.

[0034] It should be understood that the purpose of chamfering the corners of the gate structure 101 and the field plate structure 102 is to make the electric field and stress distribution nearby more uniform. In some embodiments, the corners of the gate structure 101 and the field plate structure 102 do not need to be chamfered.

[0035] exist Figure 1 In an embodiment, the mesh 101a of the gate structure 101 has a quadrilateral shape, and the four sides of the quadrilateral are approximately equal. Correspondingly, the field plate structure 102 is also adapted to be a quadrilateral, and its four sides are approximately equal. In some embodiments, the mesh 101a of the gate structure 101 may also be a rectangular shape. Correspondingly, the field plate structure 102 may also be adapted to be a rectangle. In some embodiments, the mesh 101a of the gate structure 101 may also have other polygonal shapes, such as a hexagon or an octagon. Correspondingly, the field plate structure 102 may also be adapted to other polygonal shapes. In some embodiments, the field plate structure 102 may also have a shape different from the mesh shape of the gate structure 101.

[0036] Figure 2 According to an embodiment of the present invention, Figure 1 The schematic diagram of the cross-sectional structure of a partial cell region of the power switch device 100 along the AA line is shown.

[0037] like Figure 2 As shown, the power switch device 100 has a first surface 104 and a second surface 105. The first surface 104 is Figure 1The plane of the power switch device 100 shown. The first surface 104 and the second surface 105 are parallel and face opposite directions in a vertical direction. The distance between the first surface 104 and the second surface 105 may be between tens of microns and hundreds of microns according to design requirements. In the embodiment of the present invention, the plane parallel to the first surface 104 and the second surface 105 is called a horizontal plane, and the direction perpendicular to the first surface 104 and the second surface 105 is called a vertical direction.

[0038] like Figure 2 As shown, the power switch device 100 includes a substrate 106 and an epitaxial layer 107. The epitaxial layer 107 is located on the substrate 106. The first surface 104 is not only a surface of the power switch device 100, but also a surface of the epitaxial layer 107. The other surface of the epitaxial layer 107 is parallel to and opposite to the first surface 104, and is connected to the substrate 106. The second surface 105 is not only a surface of the power switch device 100, but also a surface of the substrate 106. The other surface of the substrate 106 is parallel to and opposite to the second surface 105, and is connected to the epitaxial layer 107.

[0039] In some embodiments, other semiconductor layers are further included between the substrate 106 and the epitaxial layer 107 .

[0040] In one embodiment, the substrate 106 and the epitaxial layer 107 have a first conductivity type, and the doping concentration of the substrate 106 is greater than the doping concentration of the epitaxial layer 107. In one embodiment, the substrate layer 106 and the epitaxial layer 107 are both n-type semiconductor layers, and the substrate 106 of the power switch device 100 can be made of any suitable semiconductor material such as silicon, silicon carbide, germanium, silicon germanium, gallium nitride, gallium arsenide, etc.

[0041] For clarity of illustration, Figure 2 The metal contact structures or polysilicon contact structures corresponding to the regions on the first surface 104 are not shown. A person skilled in the art should understand that, in order for the power switch device 100 to work properly, the regions on the horizontal plane of the power switch device 100 will also be connected to corresponding potentials through conductive contact structures.

[0042] Combination Figure 1 and 2 As shown, the gate structure 101 included in the power switch device 100 is a planar gate structure and is located on the epitaxial layer 107 , that is, located on the first surface 104 .

[0043] like Figure 2As shown, the gate structure 101 includes a gate electrode 101b and a gate oxide layer 101c. The material of the gate electrode 101b can be polysilicon or metal. The gate oxide layer 101c is located between the gate electrode 101b and the first surface 104, isolating the gate electrode 101b from the epitaxial layer 107. The material of the gate oxide layer 101c can be silicon oxide, silicon nitride or a combination of the two, and is formed by thermal oxygen growth or deposition.

[0044] like Figure 1 and 2 As shown, the field plate structure 102 includes a field plate groove 102a, a field plate electrode 102b and a field plate insulating layer 102c. The field plate groove 102a extends vertically inward from the first surface 104 of the power switch device 100, that is, extends into the epitaxial layer 107. The bottom of the field plate groove 102a is located in the epitaxial layer 107 and does not reach the substrate layer 106. The inner surface of the field plate groove 102a, that is, the inside of the groove, is covered by the field plate insulating layer 102c. The field plate electrode 102b is located in the field plate groove 102a, and is isolated from the field plate groove 102a by the field plate insulating layer 102c, which is equivalent to being isolated from the epitaxial layer 107. The material of the field plate electrode 102b can be metal or polysilicon. The material of the field plate insulating layer 102c can be silicon oxide, silicon nitride, or a combination of the two, etc., formed by thermal oxygen growth or deposition. In one embodiment, the field plate insulating layer 102 c is uniformly wrapped around the field plate electrode 102 b .

[0045] exist Figure 2 In an embodiment, the power switch device 100 further includes a body region 108 and a source region 109 .

[0046] Figure 3 FIG. 1 is a schematic structural diagram of a single cell of a power switch device 100 according to an embodiment of the present invention.

[0047] Combination Figure 2 and Figure 3 As shown, the body region 108 is located in the epitaxial layer 107, exposed to the first surface 104 of the power switch device 100, and distributed in the mesh 101a of the gate structure 101. On a horizontal plane, the outer sidewall 108a of the body region 108 is located below the mesh-shaped gate structure 101. On a horizontal plane parallel to the first surface 104, as shown in FIG. Figure 3As shown, the circumference of the outer sidewall of the body region 108 is larger than the mesh 101a of the gate structure 101 in which it is located. The inner sidewall 108b of the body region 108a is connected to the sidewall of the field plate structure 102 in the mesh 101a. The source region 109 is located in the body region 108 and exposed to the first surface 104 of the power switch device 100. The outer sidewall 109a of the source region 109 is located below the mesh-shaped gate structure 101. And on the horizontal plane parallel to the first surface 104, the circumference of the outer sidewall of the source region 109 is larger than the mesh 101a of the gate structure 101 in which it is located, but smaller than the circumference of the outer sidewall of the body region 108 in which it is located. The inner sidewall 109a of the source region is at a certain distance from the sidewall of the field plate structure 102 in the mesh of the gate structure 101, that is, it is not connected.

[0048] In one embodiment, the source region 109 has a first conductivity type, and the body region 108 has a second conductivity type. In one embodiment, the source region 109 is an n-type semiconductor, and the body region 108 is a p-type semiconductor. In one embodiment, the doping concentration of the source region 109 is greater than the doping concentration of the body region 108.

[0049] exist Figure 2 In the embodiment, the gate structure 101 is connected to a gate potential G of the power switch device 100 , and the field plate electrode 102 b and the source region 109 are connected to a source potential S of the power switch device 100 .

[0050] like Figure 2 As shown, the field plate trench 102 has a depth H1 in a direction perpendicular to the first surface 104 of the power switch device 100. In one embodiment, the depth H1 ranges from 0.8 μm to 1.5 μm.

[0051] The power switching device 100 shown in the embodiment of the present invention designs the gate structure 101 into a mesh shape, so that each platform between adjacent field plate structures 102 is distributed with a gate structure, thereby optimizing the layout of the field plate structure and the gate structure of the power switching device, increasing the current diffusion area of ​​the device, and allowing the current to be distributed in more areas, which is beneficial to reducing the on-resistance of the device.

[0052] Figure 4 FIG. 4 is a schematic cross-sectional structure diagram of a partial cell region of a power switch device 400 according to an embodiment of the present invention.

[0053] like Figure 4 As shown, the power switch device 400 includes a gate structure 401 and a field plate structure 402. The gate structure 401 is a planar gate structure distributed in a mesh shape. The field plate structure 402 includes a field plate groove 402a, a field plate electrode 402b and a field plate insulating layer 402c.

[0054] exist Figure 4In an embodiment, the gate structure 401 has a quadrilateral shape on a horizontal plane, and the field plate structure 402 has a circular shape on a horizontal plane.

[0055] Figure 5 FIG. 5 is a schematic cross-sectional structure diagram of a partial cell region of a power switch device 500 according to an embodiment of the present invention.

[0056] like Figure 5 As shown, the power switch device 500 includes a gate structure 501 and a field plate structure 102. The gate structure 501 is a planar gate structure and is distributed in a mesh shape.

[0057] exist Figure 5 In the embodiment, each corner of the quadrilateral mesh of the gate structure 501 is chamfered to form an arc shape, thereby making the electric field and stress distribution nearby more uniform.

[0058] The embodiments of the present application are described above, and these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present application, so that those skilled in the art can make good use of the present application and the modifications based on the present application. The present application is only limited by the claims and their full scope and equivalents.

Claims

1. A power switching device having a first surface and a second surface that are parallel to each other, include: substrate layer; an epitaxial layer, located on the substrate layer; A gate structure having a planar gate structure, located on a first surface of the power switch device, and having a mesh-like structure on a horizontal plane parallel to the first surface; as well as A field plate structure comprises a field plate groove, a field plate electrode and a field plate insulating layer, wherein the field plate groove vertically extends from the first surface to the inside of the epitaxial layer, the field plate electrode is located in the field plate groove, and the field plate insulating layer covers the inner surface of the field plate groove to isolate the field plate electrode from the field plate groove, wherein the field plate structure is located in the mesh of the planar gate structure. 2 . The power switch device as claimed in claim 1 , wherein each mesh of the gate structure is in a quadrilateral shape. The power switch device as claimed in claim 1 , wherein each mesh of the gate structure is hexagonal in shape. The power switch device as claimed in claim 1 , wherein each mesh of the gate structure is in the shape of a regular polygon. 5 . The power switch device according to claim 1 , wherein a corner of each mesh of the gate structure is processed into an arc shape. 6 . The power switch device of claim 1 , wherein on a horizontal plane parallel to the first surface, a shape of each mesh of the gate structure is consistent with a shape of the field plate trench. 7 . The power switch device of claim 1 , wherein on a horizontal plane parallel to the first surface, a shape of each mesh of the gate structure is different from a shape of the field plate trench. 8 . The power switch device of claim 1 , wherein a depth of the field plate structure in a direction perpendicular to the first surface is 0.8 μm-1.5 μm.

9. The power switch device according to any one of claims 1 to 4 and 6 to 8, further comprising: include: A body region, located in the epitaxial layer, exposed to the first surface of the power switch device, and distributed in the mesh of the gate structure, wherein the outer sidewall of the body region is located below the mesh-shaped gate structure, and on a horizontal plane parallel to the first surface, the outer sidewall of the body region has a circumference larger than the mesh of the gate structure in which it is located, and the inner sidewall of the body region is connected to the sidewall of the field plate structure in the mesh of the gate structure; and A source region is located in the body region and exposed to the first surface of the power switching device, wherein the outer wall of the source region is located below the mesh-shaped gate structure, and on a horizontal plane parallel to the first surface, the outer wall of the source region has a diameter larger than the inner circle of the mesh of the gate structure in which it is located, but smaller than the diameter of the outer wall of the body region in which it is located, and the inner wall of the source region has a certain distance from the side wall of the field plate structure in the mesh of the gate structure. 10 . The power switch device of claim 9 , wherein the field plate electrode and the source region are electrically connected to the same source potential, and the gate structure is electrically connected to a gate potential.