Control circuit for power management, power management chip and electronic equipment

Abstract

The invention provides a control circuit for internal power supply management, an internal power supply management chip and electronic equipment, the control circuit comprises a switch module, a control module and a driving module, the switch module is electrically connected between an internal power supply and a load system, and is used for connecting or disconnecting the electrical connection between the internal power supply and the load system; the control module is electrically connected with the input end of the load system, and the control module is configured to output a first control signal in the power-on stage of the load system and output a second control signal after power-on is completed; the driving module is electrically connected with the internal power supply and the switch module, generates bias current in response to the first control signal, and outputs first driving voltage to the switch module; the switch module is configured to be conducted under the action of the first driving voltage and allow the first driving current to pass through, and the first driving current is in positive correlation with the bias current. Therefore, the first driving current can be effectively controlled, and a good power-on starting process is realized.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of integrated circuits, and in particular to a control circuit, a power management chip and an electronic device for power management. Background Art

[0002] With the widespread use of portable electronic products in daily life, the demand for power management chips is also increasing exponentially. Among them, power management chips with path management functions are widely used in portable devices such as smart bracelets, watches, and wireless headphones.

[0003] If there is a large capacitive load or output short circuit at the load system end, when the internal power supply of the device is discharged, if the soft start circuit of the traditional power management chip starts quickly, it will generate a large surge current, resulting in a large voltage fluctuation at the chip end. Excessive surge current may cause the power tube or other circuits in the power management chip to burn out; large voltage fluctuations may cause the chip to start repeatedly, resulting in abnormal chip operation. Summary of the invention

[0004] In view of this, embodiments of the present invention provide a control circuit, a power management chip and an electronic device for power management, so as to at least partially solve the above problems.

[0005] According to a first aspect of an embodiment of the present invention, a control circuit for power management is provided, the control circuit comprising a switch module, a control module and a drive module, the switch module being electrically connected between an internal power supply and a load system, and being used to conduct or disconnect the electrical connection between the internal power supply and the load system; the control module being electrically connected to an input end of the load system, the control module being configured to output a first control signal during a power-on phase of the load system, and to output a second control signal after power-on is completed; the drive module being electrically connected to both the internal power supply and the switch module, the drive module generating a bias current in response to the first control signal, and outputting a first drive voltage to the switch module; wherein the switch module is configured to conduct and allow a first drive current to pass under the action of the first drive voltage, and the first drive current and the bias current are positively correlated.

[0006] According to a second aspect of an embodiment of the present invention, there is provided a power management chip, comprising the above-mentioned control circuit.

[0007] According to a third aspect of an embodiment of the present invention, there is provided an electronic device, comprising the above-mentioned power management chip.

[0008] Based on the above technical solution, when the load system starts to power on, the driving module generates a bias current and a first driving voltage in response to the first control signal, so that the first driving current can flow from the internal power supply through the switch module to the load system, and as time accumulates, the load system completes the power-on startup process. In this process, since the bias current is constant, the first driving current is also constant, thereby achieving a stable power-on startup. In this way, the magnitude of the first driving current can be controlled by simply setting the proportional relationship between the first driving current and the bias current, and a good power-on startup process can be achieved. The circuit does not require a small current of nanoampere level, so it can reduce the influence of factors such as temperature, pressure, and manufacturing process on the circuit, making the circuit more reliable; and the circuit achieves soft start by limiting the average soft start current, and there will be no problem of overcurrent, so there will be no problem of repeated startup or failure to start the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0010] Figure 1 A schematic diagram of the structure of a control circuit provided in this application.

[0011] Figure 2 A schematic diagram of a control module in a control circuit provided in the present application.

[0012] Figure 3 A schematic diagram of the local structure of a control circuit provided in this application.

[0013] Figure 4 A schematic diagram of a voltage selection module in a control circuit provided in the present application.

[0014] Figure 5 A schematic diagram of the local structure of a control circuit provided in this application.

[0015] Figure 6 A schematic diagram of a shunt module in a control circuit provided in the present application.

[0016] Reference numerals:

[0017] 100-switch module, 200-control module, 300-driving module, 301-first driving unit, 3011-current mirror, 302-second driving unit, 3021-logic gate group,

[0018] 400-charge and discharge module, 600-voltage selection module, 700-charge pump, 800-sampling module, 900-shunt module. DETAILED DESCRIPTION

[0019] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, the technical solutions in the embodiments of the present invention will be described clearly and in detail below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in the field based on the embodiments in the embodiments of the present invention should fall within the scope of protection of the embodiments of the present invention.

[0020] It should be understood that the terms "first", "second", and "third" in the claims, specifications, and drawings of the present disclosure are used to distinguish different objects rather than to describe a specific order. The terms "include" and "comprise" used in the specifications and claims of the present disclosure indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their collections.

[0021] It should also be understood that the terms used in this disclosure are only for the purpose of describing specific embodiments and are not intended to limit the disclosure. As used in this disclosure and claims, the singular forms of "a", "an", and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should also be further understood that the term "and / or" used in this disclosure and claims refers to any combination of one or more of the associated listed items and all possible combinations, including these combinations.

[0022] The present application provides a control circuit for power management, referring to Figure 1, the control circuit includes a switch module 100, a control module 200 and a drive module 300, the switch module 100 is electrically connected between the internal power supply and the load system, and is used to conduct or disconnect the electrical connection between the internal power supply and the load system; the control module 200 is electrically connected to the input end of the load system, and the control module 200 is configured to output a first control signal during the power-on startup phase of the load system, and output a second control signal after the power-on startup is completed; the drive module 300 is electrically connected to the internal power supply and the switch module 100, and the drive module 300 generates a bias current Ibias in response to the first control signal, and outputs a first drive voltage Vd1 to the switch module 100, wherein the switch module 100 is configured to conduct and allow the first drive current to pass under the action of the first drive voltage Vd1, and the first drive current is positively correlated with the bias current Ibias. It should be understood that the positive correlation between the first drive current and the bias current Ibias means that the absolute value of the first drive current and the absolute value of the bias current Ibias are positively correlated. For example, the first drive current can be an integer multiple of the bias current.

[0023] Based on the above technical solution, when the load system starts to power on, the switch module 100 is turned on under the control of the first drive voltage and allows the first drive current to pass through, so that the first drive current can flow from the internal power supply through the switch module 100 to the load system, and as time accumulates, the load system completes the power-on startup process. In this process, the first drive current is set to be positively correlated with the bias current Ibias. Therefore, by controlling the size of the bias current Ibias, the size of the first drive current can be controlled, and the first drive current is the startup current that flows from the internal power supply through the switch module 100 into the load system. Therefore, through the control circuit provided in the present application, a good power-on startup process of the load system can be achieved.

[0024] From the above, it can be seen that the control circuit provided in the present application does not require a small current of nanoampere level, so it can reduce the influence of factors such as temperature, pressure, manufacturing process, etc. on the circuit, making the circuit more reliable; and the circuit realizes the power-on startup of the load system by limiting the first drive current, and there will be no overcurrent problem, so there will be no problem of repeated startup or failure to start the chip.

[0025] In one example, the magnitude of the bias current Ibias can be stable, so the first drive current is also stable, thereby achieving a stable power-on startup. Stability here means that the floating range of the bias current Ibias is very small. For example, the magnitude of the bias current Ibias can be within the range of 1uA±0.1uA. In this way, the magnitude of the first drive current can be controlled by simply setting the integer multiple relationship between the first drive current and the bias current Ibias, thereby achieving a good power-on startup process.

[0026] Among them, reference Figure 2 The first control signal output by the control module 200 may be a high level signal, for example, the first control signal is SOFT_START=H, and the second control signal output by the control module 200 may be a low level signal, for example, the second control signal is SOFT_START=L.

[0027] In actual use, the internal power supply can be understood as a battery in various electronic devices that can realize repeated charging and discharging functions, that is, the internal power supply can be in a charging state or a discharging state. When the internal power supply is in the charging state, it can be provided with power by the external power supply Vin and store this power. When the internal power supply is in the discharging state, it can provide its own stored power to the load system so that the load system can be kept in a charged state.

[0028] Therefore, reference Figure 1 and Figure 2 , the control circuit may further include a charge and discharge module 400, which is configured to generate a charge enable signal or a discharge enable signal; wherein the charge enable signal represents that the internal power supply is in a state of being charged by the external power supply Vin, and the discharge enable signal represents that the internal power supply is in a discharge state of supplying power to the load system. The control module 200 is electrically connected to the charge and discharge module 400 to obtain the discharge enable signal and the charge enable signal, and the control module 200 is electrically connected to the input end of the load system to obtain the load voltage Vsys. In this way, the control module 200 can compare and determine the magnitude relationship between the load voltage Vsys and the first reference voltage Vref1. When the control module 200 receives the discharge enable signal, if the load voltage Vsys is less than the first reference voltage Vref1 (indicating that the load system is in the power-on startup stage at this time), the control module 200 outputs the first control signal SOFT_START=H, and if the load voltage Vsys is greater than or equal to the first reference voltage Vref1 (indicating that the power-on startup stage of the load system has been completed at this time), the control module 200 outputs the second control signal SOFT_START=L. When the charging enable signal is received, it indicates that the internal power supply is in a charging state, and the control module 200 outputs the second control signal SOFT_START=L.

[0029] It should be clarified here that the load voltage Vsys refers to the voltage at the input end of the load system. In an example, the discharge enable signal output by the charge and discharge module 400 may be EN_CHG=L and EN_DSCHG=H. The charge enable signal output by the charge and discharge module 400 may be EN_CHG=H and EN_DSCHG=L.

[0030] In one example, the control module 200 may be a comparison circuit (Comparator, COMP).

[0031] In a possible implementation, the driving module includes a first driving unit 301, which is turned on in response to a first control signal and turned off in response to a second control signal; the first driving unit 301 generates a bias current when turned on, and outputs a first driving voltage 301 to the switch module 100. When the control module 200 receives a discharge enable signal, if the load voltage Vsys is less than the first reference voltage Vref1 (indicating that the load system is in the power-on startup stage at this time), the control module 200 outputs a first control signal SOFT_START=H, and the first driving unit 301 is turned on in response to the first control signal SOFT_START=H; if the load voltage Vsys is greater than or equal to the first reference voltage Vref1 (indicating that the power-on startup stage of the load system has been completed at this time), the control module 200 outputs a second control signal SOFT_START=L. When a charging enable signal is received, it indicates that the internal power supply is in a charging state at this time, and the control module 200 outputs a second control signal SOFT_START=L, and the first driving unit 301 is turned off in response to the second control signal SOFT_START=L.

[0032] It should be clear that the first driving unit 301 is connected to the internal power supply in order to obtain electrical energy so as to output the first driving voltage Vd1. Figure 3 The control circuit provided in the present application may further include a charge pump 700, which is electrically connected between the output terminal of the internal power supply and the input terminal of the first driving unit 301. The charge pump 700 may boost the voltage so that the first driving unit 301 can output the first driving voltage Vd1.

[0033] After the power-on startup phase is completed, the first driving unit 301 is turned off in response to the second control signal SOFT_START=L, but the load system still needs to be powered by the internal power supply to be able to operate with power. Figure 1 and Figure 3 The control circuit provided in the present application also includes a second driving unit 302, which is electrically connected between the charge pump 700 and the switch module 100. The second driving unit 302 is turned off in response to the first control signal and turned on in response to the second control signal. When the second driving unit 302 is turned on, it outputs a second driving voltage Vd2. The switch module 100 is configured to be turned on under the action of the second driving voltage Vd2 and allow the second driving current to pass through. In this way, the second driving current flows from the internal power supply through the second switch module 100 to the load system, so that the internal power supply can continue to supply power to the load system through the switch module 100. Here, the second driving unit 302 obtains electrical energy from the charge pump 700 to generate the second driving voltage Vd2.

[0034] In one possible embodiment, reference Figure 1 , Figure 3 and Figure 5 , the first driving unit 301 includes a voltage output node T0, and the first driving unit 301 outputs a first driving voltage Vd1 at the voltage output node T0 when it is turned on; the switch module 100 includes a plurality of first switches K1, the first ends of the plurality of first switches K1 are connected in parallel and are all electrically connected to the output end of the internal power supply, the second ends of the plurality of first switches K1 are connected in parallel and are all electrically connected to the input end of the load system, the control ends of the plurality of first switches K1 are connected in parallel and are all electrically connected to the voltage output node T0, and each first switch K1 is turned on under the action of the first driving voltage Vd1 to allow the first conduction current to pass. It can be understood that the first driving voltage Vd1 can control the conduction of the first switch K1, so that the first switch K1 allows the first conduction current corresponding to the first driving voltage Vd1 to pass, and the sum of the first conduction currents allowed to pass by each first switch K1 is the first driving current. In other words, the magnitude of the first conduction current is positively correlated with the magnitude of the first driving voltage Vd1, that is, if the absolute value of the first driving voltage Vd1 increases, the absolute value of the first conduction current will increase.

[0035] Since the first driving voltage Vd1 is generated based on the bias current Ibias when the first driving unit 301 is in the on state, and the first driving voltage Vd1 is provided to the first switch K1 of the switch module 100 at the voltage output node T0, the magnitude of the first driving voltage Vd1 is positively correlated with the magnitude of the bias current Ibias, that is, if the absolute value of the bias current Ibias increases, the absolute value of the first driving voltage Vd1 will increase. Therefore, the first on current is positively correlated with the bias current Ibias.

[0036] In an example, the switch module 100 may be a power path management transistor (BATFET), or the first switch K1 may be a metal oxide semiconductor field effect transistor (MOS transistor). The first conduction current flows between the first terminal and the second terminal of the first switch K1.

[0037] In a specific implementation, reference Figure 3The first driving unit 301 includes a current mirror 3011 and a second MOS transistor K2. The ratio of the current mirror 3011 is 1:1. The input end of the current mirror 3011 is electrically connected to the output end of the charge pump 700. The first output end T1 of the current mirror 3011 is grounded. The second output end T2 of the current mirror 3011 is electrically connected to the voltage output node T0. The control end and the first end of the second MOS transistor K2 are both electrically connected to the voltage output node T0. The second end of the second MOS transistor K2 is electrically connected to the input end of the load system. The second MOS transistor K2 is turned on in response to the first control signal and turned off in response to the second control signal. It can be understood that the conduction of the second MOS transistor K2 can make the second output end T2 of the current mirror 3011 and the output end of the load system conduct, and the bias current Ibias flows from the input end of the current mirror 3011 to the second output end T2, so that the first driving voltage Vd1 can be generated at the voltage output node T0. At this time, the control terminal voltage of the second MOS tube K2 and the control terminal voltage of the first switch K1 are both equal to the first driving voltage Vd1, and the second terminal voltage of the second MOS tube K2 and the second terminal voltage of the first switch K1 are both equal to the load voltage Vsys, so that the currents allowed to pass through the first switch K1 and the second MOS tube K2 can be the same, that is, the currents allowed to pass through each first switch K1 and each second MOS tube K2 are equal to the bias current Ibias. Therefore, the first driving current allowed to pass through the switch module 100 is an integer multiple of the bias current Ibias.

[0038] Based on the fact that the first on-current is positively correlated with the bias current Ibias, the first on-current and the bias current Ibias can be made equal in magnitude by designing the unit width-to-length ratio of the first switch K1, thereby making the multiple relationship between the first drive current and the bias current Ibias equal to the integer multiple relationship between the number of first switches K1 and the number of second MOS tubes K2, thereby achieving the purpose of accurately controlling the first drive current.

[0039] In one example, the first switch K1 and the second MOS tube K2 may be the same, for example, both are metal oxide semiconductor field effect transistors (MOS tubes). Alternatively, the switch module 100 may be a power path management tube (BATFET tube), and the second MOS tube K2 may be a metal oxide semiconductor field effect transistor (MOS tube), for example, the second MOS tube K2 is an NMOS tube. In one example, the control end of the second MOS tube K2 is a gate, and the gate voltage is the first driving voltage Vd1, the second end of the second MOS tube K2 is a source, and the source voltage is the load voltage Vsys; the control end of the first switch K1 is a gate, and the gate voltage is the first driving voltage Vd1, the second end of the first switch K1 is a source, and the source voltage is the load voltage Vsys; then the gate-source potential difference of the first switch K1 is equal to the gate-source potential difference of the second MOS tube K2, then the current allowed to pass through the first switch K1 and the second MOS tube K2 is the same, and both are equal to the bias current Ibias. It should be clear that in the power-on startup phase, the first drive voltage Vd1 and the load voltage Vsys both increase gradually with the passage of time, but the difference between the two is constant, so the gate-source potential difference of the first switch K1 is constant, and the gate-source potential difference of the second MOS tube K2 is constant. Then, since the bias current Ibias is constant, the first drive current is constant.

[0040] In order to make the current allowed to pass through the first switch K1 and the second MOS tube K2 as close as possible, refer to Figure 3 and Figure 4 , the control circuit also includes a voltage selection module 600, the first switch K1 and the second MOS tube K2 are both MOS tubes, the first input end and the second input end of the voltage selection module 600 are respectively input with the internal power supply voltage Vbat and the load voltage Vsys, the voltage selection module 600 outputs the lower of the internal power supply voltage Vbat and the load voltage Vsys as the output voltage, and the output end of the voltage selection module 600 is electrically connected to the substrate of the second MOS tube K2 and the substrate of the first switch K1. In this way, the substrate voltage of the first switch K1 and the substrate voltage of the second MOS tube K2 are both equal to the output voltage of the voltage selection module 600. Therefore, in the power-on startup stage of the load system, not only the gate-source potential difference of the first switch K1 and the gate-source potential difference of the second MOS tube K2 are the same, but also the source-substrate potential difference of the first switch K1 and the source-substrate potential difference of the second MOS tube K2 are the same, so that the opening degree of the first switch K1 and the second MOS tube K2 can be the same, that is, the magnitude of the current allowed to pass is the same. When the external power source Vin charges the internal power source, Vbat<Vsys, and the voltage selection module 600 provides Vbat as the output voltage to the substrate of the second MOS transistor K2.

[0041] In an example, the width-to-length ratio of the first switch K1 can be made the same as the width-to-length ratio of the second MOS tube K2, so that the multiple relationship between the first drive current and the bias current Ibias is equal to the multiple relationship between the number of the second MOS tubes K2 and the number of the first switches K1.

[0042] Further, the first driving unit 301 further includes a third switch K3, which is a MOS transistor, a first end of the third switch K3 is electrically connected to the substrate of the second MOS transistor K2, a second end of the third switch K3 is connected to the output end of the voltage selection module 600, and a control end of the third switch K3 is electrically connected to the control module 200; in response to the first control signal, the third switch K3 is turned on, and in response to the second control signal, the third switch K3 is turned off. Therefore, the second MOS transistor K2 and the third switch K3 can be controlled by the control module 200 to be turned off and on synchronously. When the second MOS transistor K2 and the third switch K3 are both turned off, the performance of the parasitic diode of the MOS transistor is utilized, so that the third switch K3 can isolate the voltage selection module 600 from the second MOS transistor K2, and prevent the output end of the voltage selection module 600 from leaking to the voltage output node T0.

[0043] In a possible implementation, in order to better control the on and off of the current mirror 3011, refer to Figure 3 In the present application, the first driving unit 301 may further include a first AND gate AND1 and a fourth switch K4, wherein the first end of the fourth switch K4 is electrically connected to the first output end T1 of the current mirror 3011, the second end of the fourth switch K4 is grounded, and the control end of the fourth switch K4 is electrically connected to the signal output end of the first AND gate AND1; the signal input end of the first AND gate AND1 is electrically connected to the control module 200, and the signal output end of the first AND gate AND1 is electrically connected to the control end of the second MOS tube K2; in response to the first control signal, the first AND gate AND1 outputs a first conduction signal to control the second MOS tube K2 and the fourth switch K4 to be turned on; in response to the second control signal, the first AND gate AND1 outputs a first disconnection signal to control the second MOS tube K2 and the fourth switch K4 to be turned off. In this way, by setting the second MOS tube K2 and the fourth switch K4, the conduction and disconnection of the current mirror 3011 can be controlled, that is, the two branches of the current mirror 3011 are synchronously disconnected and turned on. When the two branches of the current mirror 3011 are synchronously turned on, a bias current Ibias is generated. When the two branches of the current mirror 3011 are disconnected synchronously, the bias current Ibias cannot be generated, and the first driving voltage Vd1 cannot be provided to the control terminal of the first switch K1.

[0044] Of course, the first AND gate AND1 can also be electrically connected to the charge and discharge module 400 to receive the discharge enable signal and the charge enable signal. When the charge and discharge module 400 outputs the discharge enable signal, the control module 200 may output the first control signal or the second control signal. Such a setting can ensure that the first AND gate AND1 outputs the correct first conduction signal or the first disconnection signal. Specifically, if the first AND gate receives the discharge enable signal and the first control signal at the same time, the first AND gate will output the first conduction signal, which is used to control the second MOS tube K2 and the fourth switch K4 to be turned on; if the first AND gate receives the discharge enable signal and the second control signal at the same time, the first AND gate will output the first disconnection signal, which is used to control the second MOS tube K2 and the fourth switch K4 to be turned off; if the charge and discharge module 400 outputs the charge enable signal, the control module 200 outputs the second control signal, and the first AND gate receives the charge enable signal and the second control signal at the same time, thereby outputting the first disconnection signal, which is used to control the second MOS tube K2 and the fourth switch K4 to be turned off.

[0045] In an example, the first conduction signal output by the first AND gate AND1 may be a high level signal, and the first disconnection signal may be a low level signal. For example, the first conduction signal is CTR=H, and the first disconnection signal is CTR=L. Accordingly, the third switch K3 may be an NMOS tube.

[0046] Further, the first driving unit 301 may also include a fifth switch K5, which is a MOS tube, and the fifth switch K5 is electrically connected between the second end of the second MOS tube K2 and the input end of the load system, and the control end of the fifth switch K5 is electrically connected to the signal output end of the first AND gate AND1; wherein, in response to the first on signal, the fifth switch K5 is turned on to turn on the second MOS tube K2; in response to the first off signal, the fifth switch K4 is turned off to turn off the second MOS tube K2. It can be understood that when the fifth switch K5 is turned off, the electrical connection between the second MOS tube K2 and the load system is disconnected, thereby making it difficult to generate the bias current Ibias between the input end and the second output end T2 of the current mirror 3011, thereby disconnecting the first switch K1. Since the fifth switch is a MOS tube, when the fifth switch K5 is turned off, it can also isolate the second MOS tube K2 from the load system, and prevent the load voltage Vsys from leaking toward the voltage output node T0. In addition, if the first on signal is CTR=H and the first off signal is CTR=L, correspondingly, the second MOS transistor K2 and the fifth switch K5 can both be NMOS transistors.

[0047] Furthermore, the first driving unit 301 may further include a sixth switch K6, the fifth switch K5 is the same as the sixth switch K6, and the sixth switch K6 is the same as the fifth switch K5, and the first end of the sixth switch K6 is electrically connected to the first end of the fifth switch K5, the second end of the sixth switch K6 is electrically connected to the input end of the load system, and the control end of the sixth switch K6 is electrically connected to the output signal end of the first AND gate. In this way, the fifth switch K5 and the sixth switch K6 are connected back to back, which can not only be turned on or off at the same time under the control of the first AND gate, but also can isolate the second MOS tube K2 and the load system when disconnected, so as to prevent the load voltage Vsys from leaking toward the voltage output node T0.

[0048] In an example, the fifth switch K4 and the sixth switch K5 can be low-impedance switches, so that the on-resistance of the fifth switch K4 and the sixth switch K5 can be ignored, thereby ensuring that the current allowed to pass through the first switch K1 and the second MOS tube K2 is the same.

[0049] In addition, the control end of the third switch K3 can be electrically connected to the signal output end of the first AND gate AND1. In response to the first on signal, the third switch K3 is turned on. In response to the first off signal, the third switch K3 is turned off.

[0050] In one possible implementation, reference Figure 3 , the second driving unit 302 includes a seventh switch K7, a first end of the seventh switch K7 is electrically connected to the output end of the charge pump 700, and a second end of the seventh switch K7 is electrically connected to the switch module 100; wherein, the second driving unit 302 is turned off in response to the first control signal, including: the seventh switch K7 is turned off in response to the first control signal; the second driving unit 302 is turned on in response to the second control signal, including: the seventh switch K7 is turned on in response to the first control signal. In this way, by controlling the conduction or disconnection of the seventh switch K7, it is possible to control whether the second driving unit 302 can output the second driving voltage Vd2 to the switch module 100. Specifically, when the seventh switch K7 is turned on, the charge pump 700 provides the second driving voltage Vd2 to the switch module 100 through the seventh switch K7. If the conduction impedance of the seventh switch K7 is ignored, it can be considered that the output voltage of the charge pump 700 is equal to the second driving voltage Vd2.

[0051] In order to control the on and off of the seventh switch K7, in an example, referring to Figure 3, the seventh switch K7 is a PMOS tube, the second driving unit 302 also includes a logic gate group 3021, an eighth switch K8, a first resistor R1, a second resistor R2 and a capacitor C1, the two ends of the capacitor C1 are electrically connected to the first end and the control end of the seventh switch K7, the two ends of the first resistor R1 are electrically connected to the first end and the control end of the seventh switch K7, the second resistor R2 is electrically connected between the first resistor R1 and the first end of the eighth switch K8, the second end of the eighth switch K8 is grounded, the control end of the eighth switch K8 is electrically connected to the output end of the logic gate group 3021, and the logic gate group 3021 is electrically connected to the control module 200, wherein, in response to the first control signal, the logic gate group 3021 outputs a second disconnection signal to control the eighth switch to disconnect, and in response to the second control signal, the logic gate group 3021 outputs a second conduction signal to control the eighth switch to conduct. In this way, the capacitor C1 can play a filtering role, the first resistor R1 and the second resistor R2 can play a voltage dividing role, so when the eighth switch K8 is turned on, the gate-source voltage difference of the seventh switch K7 can make itself turned on. For example, the resistance ratio of the first resistor R1 to the second resistor R2 is 1:2. When the eighth switch K8 is turned on, the gate voltage of the seventh switch K7 is 1 / 3 of the source voltage, and the seventh switch is turned on. Therefore, at this time, the second driving unit 302 provides the second driving voltage to the switch module 100 via the seventh switch K7, and the switch module 100 allows the second driving current to pass, thereby supplying power to the load system. In an example, the eighth switch K8 can be an NMOS tube. For example, the second turn-on signal output by the logic gate group 3021 can be CTRA=L, and the second turn-off signal can be CTRA=H.

[0052] In one example, reference Figure 3The logic gate group 3021 may include an OR gate OR, an IN gate INV and a second AND gate AND2, the output end of the second AND gate AND2 is electrically connected to the control end of the eighth switch K8, the output end of the OR gate OR is electrically connected to the first input end of the second AND gate AND2, the output end of the IN gate INV is electrically connected to the second input end of the second AND gate AND2, the OR gate OR is connected to the charge and discharge module 400 to receive a discharge enable signal and a charge enable signal, and the IN gate INV is electrically connected to the control module 200 to receive a first control signal and a second control signal; in response to the first control signal, the second AND gate AND2 outputs a second disconnection signal, and in response to the second control signal, the second AND gate AND2 outputs a second conduction signal. For example, the eighth switch K8 is an NMOS tube. When the discharge enable signal is EN_CHG=L, EN_DSCHG=H), if the control module 200 outputs the first control signal SOFT_START=H, then the invertor INV outputs a low level L based on SOFT_START=H, and the OR gate OR outputs a high level H based on the discharge enable signal, so the second AND gate AND2 outputs a second disconnection signal CTRA=L, thereby causing the eighth switch K8 to be disconnected. On the contrary, after the power-on startup phase ends, the control module 200 outputs the second control signal SOFT_START=L, then the invertor INV outputs a low level H based on SOFT_START=L, and the OR gate OR outputs a high level H based on the discharge enable signal, so the second AND gate AND2 outputs a second disconnection signal CTRA=H, thereby causing the eighth switch K8 to be turned on.

[0053] refer to Figure 5In order to effectively control the charging current or charging voltage when the external power supply Vin charges the internal power supply, the control circuit of the present application further includes a sampling module 800 and a shunt module 900. The sampling module 800 is electrically connected to the charge and discharge module 400. The sampling module 800 is configured to output a charging sampling voltage Vsns when receiving a charging enable signal. The first end of the shunt module 900 is electrically connected to the sampling module 800 to receive the charging sampling voltage Vsns. The second end of the shunt module 900 obtains the second reference voltage Vref2. The third end of the shunt module 900 is electrically connected to the output end of the second driving unit 302 to form an extraction current Iotg from the second driving unit 302 toward the third end of the shunt module 900. The fourth end of the shunt module 900 is grounded, wherein the shunt module 900 is configured to: when the charging sampling voltage Vsns is less than the second reference voltage Vref2, control the extraction current Iotg to decrease; when the charging sampling voltage Vsns is greater than the second reference voltage Vref2, control the extraction current Iotg to increase. In this way, since the extraction current Iotg flows from the second driving unit 302 to the third end of the shunt module 900, it is equivalent to separating a portion of the current from the total current output by the charge pump 700 as the extraction current Iotg and entering the shunt module 900, and separating a portion of the current from the total current output by the charge pump 700 toward the switch module 100, thereby forming the second driving voltage Vd2 provided to the switch module 100. Therefore, the magnitude of the second driving voltage Vd2 is inversely proportional to the magnitude of the extraction current Iotg, that is, if the extraction current Iotg is reduced, the second driving voltage Vd2 will increase, thereby increasing the charging current allowed to pass through the switch module 100, so as to quickly charge the internal power supply; if the extraction current Iotg is increased, the second driving voltage Vd2 will be smaller, thereby reducing the charging current allowed to pass through the switch module 100, and reducing the speed of charging the internal power supply. It should be clear that if the charging sampling voltage Vsns is less than the second reference voltage Vref2, it means that the charging current at this time is less than the preset charging current, so it is necessary to increase the charging current by reducing the extraction current Iotg; if the charging sampling voltage Vsns is greater than the second reference voltage Vref2, it means that the charging current at this time is greater than the preset charging current, so it is necessary to reduce the charging current by increasing the extraction current Iotg; if the charging sampling voltage Vsns is equal to the second reference voltage Vref2, it means that the charging current at this time is equal to the preset charging current.

[0054] In one example, the charge pump 700 includes a current limiting resistor R3, a first input terminal of the charge pump 700 obtains an internal power supply voltage Vbat, a second input terminal of the charge pump 700 obtains an operating voltage VDD, and the seventh switch K7 is electrically connected between the current limiting resistor R3 and the switch module 100. Then, ignoring the on-resistance of the seventh switch K7, it can be considered that the second driving voltage Vd2 = VDD + Vbat - Iotg * R3. It should be understood that the operating voltage VDD is the operating voltage of the power management chip.

[0055] In one example, the sampling module 800 may be a current sense (CS) module. The current shunting module 900 may be an operational transconductance amplifier (OTA), and the extracted current Iotg enters from the current input terminal of the transconductance amplifier and flows to the ground terminal of the transconductance amplifier. For details, please refer to Figure 6 .

[0056] In addition, the present application can also be understood in conjunction with the following formula. The current mirror 3011 may include a first PMOS tube (ie, PMOS1) and a second PMOS tube (ie, PMOS2). The current mirror ratio of PMOS1 and PMOS2 is 1:1, so the current flowing through the second MOS tube K2 is also the bias current Ibias. Then,

[0057] in,

[0058] μ n is the electron mobility, C ox is the gate oxide capacitance per unit area, is the width-to-length ratio,

[0059] V GS is the gate-source potential difference, V TH0 is the intrinsic threshold voltage, γ is the body effect coefficient,

[0060] Φ F is the semiconductor electrostatic barrier (Fermi level), V SB is the source-substrate potential difference.

[0061] The number ratio of the second MOS tube K2 and the first switch K1 is 1:n, the width-to-length ratio of each tube is the same, the on-resistance of the second MOS tube K5 and the first switch K6 is ignored, the gate-source potential difference of the second MOS tube K2 and the first switch K1 is the same, and the source-substrate potential difference of the second MOS tube K2 and the first switch K1 is the same, then, the first drive current

[0062] In addition, the present application also provides a power management chip, on which the control circuit for power management provided by the present application is provided. The power management chip can control the magnitude of the first driving current during the power-on startup phase of the load system to achieve a good power-on startup process. Therefore, the power management chip has good management capabilities for the internal power supply.

[0063] Furthermore, the present application provides an electronic device, which is provided with the above-mentioned power management chip. Based on the beneficial effects of the above-mentioned control circuit and the power management chip, it can be known that the power-on startup process of the electronic device is more stable and reliable.

[0064] It should be noted that the preferred embodiments of the present application are described in detail above in conjunction with the accompanying drawings. However, the present application is not limited to the specific details in the above embodiments. Within the technical concept of the present application, the technical solution of the present application can be subjected to a variety of simple modifications, and these simple modifications all belong to the protection scope of the present application. For example, the various specific technical features described in the above specific embodiments can be combined in any suitable manner if there is no contradiction. In order to avoid unnecessary repetition, the present application will not further describe various possible combinations. For another example, the various different embodiments of the present application can also be arbitrarily combined, and as long as they do not violate the ideas of the present application, they should also be regarded as the contents disclosed in the present application.

[0065] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0066] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A control circuit for power management, characterized in that: include: A switch module, electrically connected between the internal power supply and the load system, and used to switch on or off the electrical connection between the internal power supply and the load system; A control module, the control module is electrically connected to the input end of the load system, the control module is configured to output a first control signal during a power-on phase of the load system, and output a second control signal after power-on is completed; a driving module, electrically connected to the internal power supply and the switch module, wherein the driving module generates a bias current in response to the first control signal and outputs a first driving voltage to the switch module; The switch module is configured to be turned on under the action of the first drive voltage and allow a first drive current to pass through, and the first drive current is positively correlated with the bias current.

2. The control circuit for power management according to claim 1, characterized in that: The first driving current is an integer multiple of the bias current.

3. The control circuit for power management according to claim 1 or 2, characterized in that: The control circuit further includes a charge and discharge module, wherein the charge and discharge module is configured to generate a charge enable signal or a discharge enable signal; The control module is electrically connected to the input end of the load system to obtain the load voltage, and the control module is electrically connected to the charge and discharge module to obtain the discharge enable signal and the charge enable signal. When the discharge enable signal is received, if the load voltage is less than a first reference voltage, the control module outputs a first control signal, and if the load voltage is greater than or equal to the first reference voltage, the control module outputs a second control signal; when the charge enable signal is received, the control module outputs a second control signal.

4. The control circuit for power management according to claim 3, characterized in that: The driving module includes a first driving unit, which is turned on in response to the first control signal and turned off in response to the second control signal; the first driving unit generates a bias current when turned on, and outputs a first driving voltage to the switch module; The control circuit includes a charge pump electrically connected between an output terminal of the internal power supply and an input terminal of the first driving part.

5. The control circuit for power management according to claim 4, characterized in that: The first driving unit includes a voltage output node, and the first driving unit outputs a first driving voltage at the voltage output node when it is turned on; the switch module includes a plurality of first switches, the first ends of the plurality of first switches are connected in parallel and are all electrically connected to the output end of the internal power supply, the second ends of the plurality of first switches are connected in parallel and are all electrically connected to the input end of the load system, the control ends of the plurality of first switches are connected in parallel and are all electrically connected to the voltage output node, and each of the first switches is turned on under the action of the first driving voltage to allow a first conduction current to pass through.

6. The control circuit for power management according to claim 5, characterized in that: The first driving unit includes a current mirror and a second MOS tube, and the ratio of the current mirror is 1:

1. The input end of the current mirror is electrically connected to the output end of the charge pump, the first output end of the current mirror is grounded, and the second output end is electrically connected to the voltage output node; The control end and the first end of the second MOS transistor are both electrically connected to the voltage output node, and the second end of the second MOS transistor is electrically connected to the input end of the load system; The second MOS transistor is turned on in response to the first control signal and is turned off in response to the second control signal.

7. The control circuit for power management according to claim 6, characterized in that: The control circuit also includes a voltage selection module, the first switch is a MOS tube, the first input terminal and the second input terminal of the voltage selection module are respectively input with an internal power supply voltage and a load voltage, the voltage selection module outputs the lower of the internal power supply voltage and the load voltage as an output voltage, and the output terminal of the voltage selection module is electrically connected to the substrate of the second MOS tube and the substrate of the first switch.

8. The control circuit for power management according to claim 7, characterized in that: The first driving unit also includes a third switch, which is a MOS tube. The first end of the third switch is electrically connected to the substrate of the second MOS tube, the second end of the third switch is connected to the output end of the voltage selection module, and the control end of the third switch is electrically connected to the control module; in response to the first control signal, the third switch is turned on, and in response to the second control signal, the third switch is turned off.

9. The control circuit for power management according to claim 6, characterized in that: The first driving unit further includes a first AND gate and a fourth switch. A first end of the fourth switch is electrically connected to the first output end of the current mirror, a second end of the fourth switch is grounded, and a control end of the fourth switch is electrically connected to the signal output end of the first AND gate; The signal input end of the first AND gate is electrically connected to the control module, and the signal output end of the first AND gate is electrically connected to the control end of the second MOS transistor; In response to the first control signal, the first AND gate outputs a first conduction signal to control the second MOS tube and the fourth switch to be turned on; In response to the second control signal, the first AND gate outputs a first disconnection signal to control the second MOS tube and the fourth switch to be disconnected.

10. The control circuit for power management according to claim 9, characterized in that: The first driving unit further includes a fifth switch, which is a MOS tube. The fifth switch is electrically connected between the second end of the second MOS tube and the input end of the load system, and the fifth switch control end is electrically connected to the signal output end of the first AND gate; wherein, In response to the first turn-on signal, the fifth switch is turned on to turn on the second MOS transistor; In response to the first disconnection signal, the fifth switch is disconnected to disconnect the second MOS transistor.

11. The control circuit for power management according to claim 10, characterized in that: The first driving unit further includes a sixth switch, the sixth switch is the same as the fifth switch, and, The first end of the sixth switch is electrically connected to the first end of the fifth switch, the second end of the sixth switch is electrically connected to the input end of the load system, and the control end of the sixth switch is electrically connected to the output signal end of the first AND gate.

12. The control circuit for power management according to claim 4, characterized in that: The driving module also includes a second driving unit, which is electrically connected between the charge pump and the switch module. The second driving unit is turned off in response to the first control signal and turned on in response to the second control signal. When the second driving unit is turned on, it outputs a second driving voltage. The switch module is configured to be turned on and allow a second driving current to pass under the action of the second driving voltage.

13. The control circuit for power management according to claim 12, characterized in that: The second driving unit includes a seventh switch, a first end of the seventh switch is electrically connected to the output end of the charge pump, and a second end of the seventh switch is electrically connected to the switch module; wherein, The second driving unit is turned off in response to the first control signal, comprising: the seventh switch is turned off in response to the first control signal; The second driving unit is turned on in response to the second control signal, including: the seventh switch is turned on in response to the first control signal.

14. The control circuit for power management according to claim 13, characterized in that: The seventh switch is a PMOS tube, and the second driving unit further includes a logic gate group, an eighth switch, a first resistor, a second resistor and a capacitor. The two ends of the capacitor are electrically connected to the first end and the control end of the seventh switch respectively. The two ends of the first resistor are electrically connected to the first end and the control end of the seventh switch respectively. The second resistor is electrically connected between the first resistor and the first end of the eighth switch, The second end of the eighth switch is grounded, and the control end of the eighth switch is electrically connected to the output end of the logic gate group. The logic gate group is electrically connected to the control module, wherein: In response to the first control signal, the logic gate group outputs a second disconnection signal to control the eighth switch to be disconnected. In response to the second control signal, the logic gate group outputs a second turn-on signal to control the eighth switch to be turned on.

15. The control circuit for power management according to claim 12, characterized in that: The control circuit also includes a sampling module and a shunt module. The sampling module is electrically connected to the charging and discharging module, and the sampling module is configured to output a charging sampling voltage upon receiving a charging enable signal. The first end of the shunt module is electrically connected to the sampling module to receive the charging sampling voltage. The second end of the shunt module obtains a second reference voltage, The third end of the shunt module is electrically connected to the output end of the second driving unit to form an extraction current from the second driving unit toward the third end of the shunt module; The fourth terminal of the shunt module is grounded, wherein the shunt module is configured as follows: When the charging sampling voltage is less than the second reference voltage, controlling the extraction current to decrease; When the sampling voltage is greater than the second reference voltage, the extraction current is controlled to increase.

16. A power management chip, comprising the control circuit for power management according to any one of claims 1 to 15.

17. An electronic device comprising the power management chip according to claim 16.

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