Low-noise amplifier with gain capable of being digitally controlled and control method

Abstract

The invention discloses a gain digitally-controllable low-noise amplifier and a control method, the gain digitally-controllable low-noise amplifier comprises a low-noise amplifier transistor, a grid electrode of the low-noise amplifier transistor is connected with a V1 end, and the V1 end is connected with a first capacitor and a first inductor; the source electrode of the low-noise amplifier transistor is connected with a second inductor, and the second inductor is connected with a gain digital control module; the drain electrode of the low-noise amplifier transistor is connected with a V3 end, and the V3 end is connected with a third inductor and a fourth capacitor; the third inductor is connected with a V2 end, and the V2 end is connected with a VD end and a third capacitor; the fourth capacitor is connected with a V7 end, and the V7 end is connected with a fifth capacitor and a fourth inductor. According to the control method, the on-off of the switching transistor is controlled by controlling the gate-source voltage Vgs of the switching transistor and the turn-on voltage Vth of the switching transistor, so that the gain can be digitally controlled. The circuit has the characteristics that the circuit is simple, the signal transmission loss can be reduced, and the generation of extra noise can be reduced.

Description

Technical Field

[0001] The invention relates to a low noise amplifier, in particular to a low noise amplifier with digitally controllable gain and a control method. Background Art

[0002] In the communication system, the low noise amplifier is located at a key position between the antenna and the intermediate frequency module. The low noise amplifier receives the radio frequency signal in the air, and then enters the intermediate frequency module after being amplified by the low noise amplifier. However, the signal power received by the low noise amplifier is random and can be large or small. When the signal power is large, it will be further amplified by the low noise amplifier, and the power will increase, which will lead to circuit saturation and signal distortion in the subsequent circuit.

[0003] In order to output a stable circuit, the pre-amplifier needs to have the function of adjusting the gain. Gain-variable low-noise amplifiers often achieve gain control by controlling gate voltage, drain shunting, changing feedback resistance, or directly using attenuators and gain-variable amplifiers in the next stage. However, the circuits of the above methods are relatively complicated, and the signal will also be damaged during transmission, generating some additional noise. Therefore, it is urgent to develop a low-noise amplifier that can simplify the circuit, reduce signal transmission loss and additional noise. Summary of the invention

[0004] The purpose of the present invention is to provide a low noise amplifier with digitally controllable gain and a control method thereof. The present invention has the characteristics of simple circuit, capable of reducing signal transmission loss and reducing the generation of additional noise.

[0005] The technical solution of the present invention is: a low-noise amplifier with digitally controllable gain, comprising a low-noise amplifier transistor, the gate of the low-noise amplifier transistor is connected to the V1 terminal, the V1 terminal is respectively connected to a first capacitor and a first inductor, the first capacitor is connected to the RFin terminal; the source of the low-noise amplifier transistor is connected to a second inductor, the second inductor is connected to a gain digitally controllable module; the drain of the low-noise amplifier transistor is connected to the V3 terminal, the V3 terminal is respectively connected to a third inductor and a fourth capacitor;

[0006] The third inductor is connected to the V2 terminal, and the V2 terminal is respectively connected to the VD terminal and the third capacitor;

[0007] The fourth capacitor is connected to the V7 terminal, the V7 terminal is respectively connected to the fifth capacitor and the fourth inductor, and the fifth capacitor is connected to the RFout terminal.

[0008] In the aforementioned low-noise amplifier with digitally controllable gain, the digitally controllable gain module includes a V4 terminal connected to the second inductor, one end of the V4 terminal is sequentially connected to the second capacitor and the switch transistor, and the other end of the V4 terminal is sequentially connected to the first resistor and the second resistor;

[0009] The positive end of the second resistor and the drain end of the switch transistor are both connected to the V5 end, and the negative end of the second resistor and the source of the switch transistor are both connected to the V6 end.

[0010] The gate of the switch transistor is connected to the third resistor and the VC terminal in sequence.

[0011] A control method for a low noise amplifier with digitally controllable gain is: by controlling the gate-source voltage V gs and the turn-on voltage V of the switching transistor th The size of the switching transistor is used to control the on and off of the switching transistor, thereby achieving digital control of the gain.

[0012] Compared with the prior art, the present invention connects a second inductor and a gain digitally controllable module to the source of the low-noise amplifier transistor, and can change the gain of the low-noise amplifier through the control of a digital signal, that is, the low-noise amplifier has a gain adjustment function, so that the gain of the low-noise amplifier can be adjusted according to the size of the input signal power, so that the circuit can work normally; and the overall circuit structure is simple. When the gain-adjustable low-noise amplifier is applied to a receiver, the receiver has greater flexibility, can output a signal of appropriate power to the next-level circuit, and can also reduce the power consumption of the circuit. In summary, the present invention has the characteristics of simple circuit, can reduce the transmission loss of the signal and reduce the generation of additional noise.

[0013] After testing, the working gain of the final simulation result of the circuit is 17.954dB and 13.748dB gain switching. When the control voltage VC is higher than the turn-on voltage of transistor M2, the gain is 17.954dB, the noise figure is 0.206, and the reflection coefficient is less than -14dB; when the control voltage VC is lower than the turn-on voltage of transistor M2, the gain is 13.748dB, the noise figure is 0.394, and the reflection coefficient is less than -15dB. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a circuit schematic diagram of the present invention;

[0015] Figure 2 It is a schematic diagram of the equivalent circuit of the switching transistor on and off;

[0016] Figure 3 is the equivalent circuit diagram when the switch transistor M2 is turned on;

[0017] Figure 4 is the equivalent circuit diagram of the switch transistor M2 in the off state;

[0018] Figure 5 It is a schematic diagram of variable gain of low noise amplifier;

[0019] Figure 6 is the noise figure of the low noise amplifier in low gain mode;

[0020] Figure 7 is the reflection coefficient of the low noise amplifier in low gain mode;

[0021] Figure 8 is the noise figure of the low noise amplifier in high gain mode;

[0022] Fig. 9 is the reflection coefficient of the low noise amplifier in high gain mode.

[0023] The marks in the accompanying drawings are: M1-low noise amplifier transistor, M2-switch transistor, C1-first capacitor, C2-second capacitor, C3-third capacitor, C4-fourth capacitor, C5-fifth capacitor, L1-first inductor, L2-second inductor, L3-third inductor, L4-fourth inductor, R1-first resistor, R2-second resistor, R3-third resistor. DETAILED DESCRIPTION

[0024] The present invention is further described below in conjunction with the accompanying drawings and embodiments, but they are not intended to limit the present invention.

[0025] Embodiment. A low noise amplifier with digitally controllable gain, comprising: Figure 1 As shown, it includes a low noise amplifier transistor M1, the gate of the low noise amplifier transistor M1 is connected to the V1 terminal, the V1 terminal is respectively connected to the first capacitor C1 and the first inductor L1, the first capacitor C1 is connected to the RFin terminal; the source of the low noise amplifier transistor M1 is connected to the second inductor L2, the second inductor L2 is connected to the gain digital control module; the drain of the low noise amplifier transistor M1 is connected to the V3 terminal, the V3 terminal is respectively connected to the third inductor L3 and the fourth capacitor C4;

[0026] The third inductor L3 is connected to the V2 terminal, and the V2 terminal is respectively connected to the VD terminal and the third capacitor C3;

[0027] The fourth capacitor C4 is connected to the V7 terminal, the V7 terminal is respectively connected to the fifth capacitor C5 and the fourth inductor L4, and the fifth capacitor C5 is connected to the RFout terminal.

[0028] The gain digital control module includes a V4 terminal connected to the second inductor L2, one end of the V4 terminal is connected to the second capacitor C2 and the switch transistor M2 in sequence, and the other end of the V4 terminal is connected to the first resistor R1 and the second resistor R2 in sequence;

[0029] The positive end of the second resistor R2 and the drain end of the switch transistor M2 are both connected to the V5 end, and the negative end of the second resistor R2 and the source of the switch transistor M2 are both connected to the V6 end.

[0030] The gate of the switch transistor M2 is connected to the third resistor R3 and the VC terminal in sequence.

[0031] The gain can be digitally controlled by controlling the gate-source voltage V gs and the turn-on voltage V of the switching transistor th The size of the switching transistor is used to control the on and off of the switching transistor, thereby achieving digital control of the gain.

[0032] Its overall schematic diagram is as follows Figure 1 As shown, the specific circuit connection method is as follows:

[0033] RFin is connected to the positive terminal of C1;

[0034] The positive terminal of C1, the positive terminal of L1, and the gate of M1 are all connected to V1;

[0035] The negative terminal of L1 is connected to GND;

[0036] The source of M1 is connected to the positive terminal of L2;

[0037] The negative end of L2, the positive end of C2, and the positive end of R1 are all connected to V4;

[0038] The negative end of C2, the negative end of R1, the drain end of M2, and the positive end of R2 are all connected to V5;

[0039] The source of M2 and the negative terminal of R2 are connected to GND;

[0040] The gate of M2 is connected to the negative terminal of R3;

[0041] The positive end of R2 is connected to VC;

[0042] The drain of M1, the negative terminal of L3, and the positive terminal of C4 are all connected to V3;

[0043] The positive end of L3, the positive end of C3, and VD are all connected to V2;

[0044] The negative terminal of C3 is connected to GND;

[0045] The negative terminal of L4 is connected to GND;

[0046] The negative end of C4, the positive end of L4, and the positive end of C5 are all connected to V7;

[0047] The negative terminal of L4 is connected to GND;

[0048] The negative terminal of C5 is connected to RFout;

[0049] Among them, M1 and M2 are both N-type enhancement field effect transistors under the gallium arsenide semiconductor compound pHEMT process; R1, R2, and R3 are metal resistors; L1, L2, L3, and L4 are inductors; C1, C2, C3, C4, and C5 are capacitors; RFin is the RF signal input terminal; RFout is the RF signal output terminal; VD is the drain bias voltage input terminal; VC is the circuit control voltage enable terminal;

[0050] Among them, M1 is a low noise amplifier transistor, M2 is a switch transistor; R1 and R2 have different resistance values; L1, L2, L3, and L4 have different inductance values; C1, C2, C3, C4, and C5 have different capacitance values;

[0051] The digital control of the self-biased low-noise amplifier with digitally controllable gain is achieved by switching the transistor on and off. In order to analyze the control function of the switching transistor more simply and intuitively, the equivalent circuit model of the transistor can be used to analyze and design the circuit. The equivalent circuit model of the transistor is as follows: Figure 2 As shown:

[0052] When the gate-source voltage V gs Greater than the transistor's turn-on voltage V th When the transistor is in the on state, the transistor can be equivalent to an on-resistance R on , and the on-capacitor C on . The on-capacitor C on The on-resistance R on satisfy:

[0053]

[0054] Where μ is the electron mobility of the transistor, C ox is the gate oxide capacitance per unit area of ​​the transistor, W is the gate width of the transistor, and L is the gate length of the transistor. From formula (1), it can be seen that the on-resistance of the transistor is inversely proportional to the width-to-length ratio of the transistor. When the transistor is turned on, due to the on-resistance R on Very small, the on-capacitance C on The impedance can be ignored.

[0055] When the gate-source voltage V gs Less than the transistor's turn-on voltage V th When the transistor is cut off, the transistor can be equivalent to an off resistor R off and the off capacitor C off , where the off capacitor C off :

[0056]

[0057] Among them, C gsis the gate-source capacitance of the transistor, C gd is the gate-drain capacitance of the transistor, C ds is the drain-source capacitance of the transistor. When the transistor is turned off, the turn-off resistor R off Very large, the off resistance can be ignored.

[0058] Therefore, the present invention designs a self-biased low-noise amplifier with digitally controllable gain by utilizing the switching characteristics of the switch tube, which is described in detail as follows:

[0059] When the gate-source voltage V gs Greater than the transistor's turn-on voltage V th When the switch transistor M2 is turned on, it can be equivalent to a very small on-resistance R on , the resistance is usually around a few ohms, connected in parallel with R2, that is:

[0060]

[0061] Resistor R o The resistance value can be ignored, and the circuit can be equivalent to:

[0062] Among them, inductor L2 is the source degeneration inductor, which is used to stabilize the circuit. Compared with the lossy stable circuit, it can prevent the noise coefficient from deteriorating; resistor R1 provides a bias point for the circuit; capacitor C2 is an RF bypass capacitor; capacitors C1 and C4 are DC blocking capacitors, and also participate in matching as matching capacitors; capacitor C3 is a parallel grounding capacitor, which provides grounding for RF signals; inductor L1 is a matching inductor, which participates in input matching. The gate of transistor M1 makes the DC voltage V G =0V. In the DC equivalent circuit, the drain voltage VD = VDD, assuming the drain current is I D , then the source voltage is:

[0063] V s =I D *R1, (4);

[0064] The gate-source voltage is therefore:

[0065] V GS =V G -V S =-I d *R1, (5);

[0066] The drain-source voltage is:

[0067] V DS =V D -V S =V D -V S +V G =VDD-VGS , (6);

[0068] Therefore, the size of the resistor R1 can be calculated by formula (7):

[0069]

[0070] Ideally, the RF signal passes through the bypass capacitor C2 instead of the resistor R1 to avoid deterioration of gain and output power. Therefore, the bypass capacitor C2 is generally selected to have a larger capacitance.

[0071] When the gate-source voltage V gs Lower than the turn-on voltage V th When the transistor M2 is turned off, the capacitor C off , the equivalent circuit diagram is as follows Figure 4 As shown:

[0072] At this time, resistors R1 and R2 provide bias points for the circuit; capacitors C2 and C off is the RF bypass capacitor. At this time, the source voltage is

[0073] V s =I D *(R1+R2), (8);

[0074] The gate-source voltage is therefore:

[0075] V GS =V G -V S =-I d *(R1+R2), (9);

[0076] The drain-source voltage is:

[0077] V DS =V D -V S =V D -V S +V G =VDD-V GS , (10);

[0078] Therefore, the size of the resistor R1 can be calculated by formula (7):

[0079]

[0080] In summary, compared with the on state of transistor M2, the bias resistance of M2 in the off state increases, and the source voltage V S Increase, the gate-source voltage V GSTherefore, the present invention uses transistors to realize a self-biased low-noise amplifier with digitally controllable gain.

Claims

1. A low noise amplifier with digitally controllable gain, characterized in that: The invention comprises a low noise amplifier transistor (M1), wherein the gate of the low noise amplifier transistor (M1) is connected to a V1 terminal, the V1 terminal is respectively connected to a first capacitor (C1) and a first inductor (L1), and the first capacitor (C1) is connected to an RFin terminal; the source of the low noise amplifier transistor (M1) is connected to a second inductor (L2), and the second inductor (L2) is connected to a gain digitally controllable module; the drain of the low noise amplifier transistor (M1) is connected to a V3 terminal, and the V3 terminal is respectively connected to a third inductor (L3) and a fourth capacitor (C4); The third inductor (L3) is connected to the V2 terminal, and the V2 terminal is respectively connected to the VD terminal and the third capacitor (C3); The fourth capacitor (C4) is connected to the V7 terminal, the V7 terminal is respectively connected to the fifth capacitor (C5) and the fourth inductor (L4), and the fifth capacitor (C5) is connected to the RFout terminal.

2. A low noise amplifier with digitally controllable gain according to claim 1, characterized in that: The gain digital control module comprises a V4 terminal connected to a second inductor (L2), one end of the V4 terminal is connected to a second capacitor (C2) and a switch transistor (M2) in sequence, and the other end of the V4 terminal is connected to a first resistor (R1) and a second resistor (R2) in sequence; The positive end of the second resistor (R2) and the drain end of the switch transistor (M2) are both connected to the V5 end, and the negative end of the second resistor (R2) and the source of the switch transistor (M2) are both connected to the V6 end. The gate of the switch transistor (M2) is connected to the third resistor (R3) and the VC terminal in sequence.

3. A control method for a low noise amplifier with digitally controllable gain according to claim 1 or 2, characterized in that: By controlling the gate-source voltage V gs and the turn-on voltage V of the switching transistor th The size of the switching transistor is used to control the on and off of the switching transistor, thereby achieving digital control of the gain.

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