Chip switch circuit and chip

Abstract

The present application relates to a chip switch circuit and a chip. The chip switch circuit includes: a switch element and a voltage-dividing logic circuit, wherein the first end of the switch element is used to connect to a power supply external to the chip or to ground, the second end of the switch element is connected to the first end of the voltage-dividing logic circuit, the control end of the switch element is arranged outside the chip, the switch element is used to conduct the circuit between the first end of the voltage-dividing logic circuit and the power supply external to the chip or to ground the first end of the voltage-dividing logic circuit; the second end of the voltage-dividing logic circuit is used to connect to a power conversion module inside the chip, and is used to perform voltage division processing based on a high level obtained by connecting to the power supply external to the chip or a low level obtained by grounding, output an enable valid signal or an enable invalid signal to the power conversion module, and start or shut down the power conversion module. When the chip does not need to work, the chip switch circuit turns off the power conversion module by controlling the switch element outside the chip, thereby reducing the power consumption of the chip when it is not working.

Description

Technical Field

[0001] The present application relates to the technical field of communication integrated circuits, and in particular to a chip power on / off circuit and a chip. Background Art

[0002] In the chip, the source voltage of the on-chip power supply system is generally the battery voltage outside the chip, and the value range is generally 2.8 V to 5 V. The system power management unit on the chip uses power conversion modules such as LDO or DCDC to reduce the battery voltage to the power required by each module on the chip.

[0003] However, when the digital register is not started, an enable signal cannot be generated to control the power conversion module; therefore, the power conversion module in the chip for supplying power to the digital register is always in a working state, resulting in high power consumption of the chip. Summary of the invention

[0004] Based on this, it is necessary to provide a chip power on / off circuit and a chip that can reduce chip power consumption.

[0005] In a first aspect, the present application provides a chip power on / off circuit, comprising:

[0006] A switch element, wherein the first end of the switch element is used to connect to a power supply external to the chip or to ground, the second end of the switch element is connected to the first end of the voltage-dividing logic circuit, the control end of the switch element is arranged outside the chip, and the switch element is used to conduct the circuit between the first end of the voltage-dividing logic circuit and the power supply external to the chip or to ground the first end of the voltage-dividing logic circuit;

[0007] A voltage-divider logic circuit, the second end of which is used to connect to a power conversion module inside the chip, and to perform voltage division based on a high level obtained by connecting to an external power supply of the chip or a low level obtained by grounding, and to output an enable valid signal or an enable invalid signal to the power conversion module to start or shut down the power conversion module.

[0008] In one embodiment, the switch element includes a first switch element, and the voltage division logic circuit includes a first voltage division circuit, a second voltage division circuit and a first inverter, wherein:

[0009] The first end of the first switch element is used to be connected to a power supply outside the chip or to ground, and the second end of the first switch element is connected to a first end of the first voltage divider circuit;

[0010] The second end of the first voltage divider circuit is connected to the first end of the first inverter;

[0011] The first end of the second voltage divider circuit is used to be connected to a power supply outside the chip, and the second end of the second voltage divider circuit is connected to a power supply end of the first inverter;

[0012] The second end of the first inverter is used to connect to the power conversion module.

[0013] In one embodiment, the first voltage divider circuit includes a first MOS transistor and a second MOS transistor, wherein:

[0014] The source of the first MOS tube is connected to the second end of the switch element, the gate of the first MOS tube is connected to the drain of the first MOS tube, and the drain of the first MOS tube is connected to the drain of the second MOS tube;

[0015] The gate of the second MOS tube is connected to the drain of the second MOS tube, and the source of the second MOS tube is grounded;

[0016] The connection end between the first MOS tube and the second MOS tube is the second end of the first voltage divider circuit.

[0017] In one embodiment, the number of the first MOS tubes is multiple, and the number of the second MOS tubes is the same as the number of the first MOS tubes.

[0018] In one embodiment, the first voltage divider circuit further includes a first capacitor and a second capacitor; wherein,

[0019] The first capacitor is connected in parallel with the first MOS tube, and the second capacitor is connected in parallel with the second MOS tube.

[0020] In one embodiment, the switch element includes a second switch element, and the voltage-dividing logic circuit includes a third voltage-dividing circuit, a third MOS tube, a fourth voltage-dividing circuit and a second inverter, wherein:

[0021] The first end of the second switch element is used to be connected to a power supply outside the chip or to ground, and the second end of the second switch element is connected to a first end of the third voltage divider circuit;

[0022] The second end of the third voltage divider circuit is connected to the gate of the third MOS tube, the first electrode of the third MOS tube is grounded, the second electrode of the third MOS tube is connected to the second end of the fourth voltage divider circuit and the first end of the second inverter, the first electrode is one of the source or drain of the third MOS tube, and the second electrode is the other of the source or drain of the third MOS tube;

[0023] A first end of the fourth voltage divider circuit is used to be connected to a power supply outside the chip, and a second end of the fourth voltage divider circuit is connected to a power supply end of the second inverter;

[0024] The second end of the second inverter is used to connect to the power conversion module.

[0025] In one embodiment, the voltage-dividing logic circuit further includes: a third inverter group, the third inverter group includes a plurality of third inverters connected in series in sequence, wherein the number of the third inverters is an even number;

[0026] The first end of the first third inverter in the third inverter group is connected to the second end of the fourth voltage divider circuit, and the second end of the last third inverter in the third inverter group is connected to the second electrode of the third MOS tube;

[0027] The power supply terminal of each third inverter is connected to the second terminal of the fourth voltage divider circuit.

[0028] In one embodiment, the voltage-dividing logic circuit further includes: a fourth inverter group, the fourth inverter group includes a plurality of fourth inverters connected in series in sequence, wherein the number of the fourth inverters is an even number;

[0029] A first end of the first fourth inverter in the fourth inverter group is connected to the second electrode of the third MOS tube, and a second end of the last fourth inverter in the fourth inverter group is connected to the first end of the second inverter;

[0030] The power supply terminal of each fourth inverter is connected to the second terminal of the fourth voltage divider circuit.

[0031] In one embodiment, the switch element further includes a first switch element, and the voltage division logic circuit further includes a first voltage division circuit and an AND gate circuit, wherein:

[0032] The first end of the first switch element is used to be connected to a power supply outside the chip or to ground, and the second end of the first switch element is connected to a first end of the first voltage divider circuit;

[0033] The second end of the first voltage divider circuit is connected to the first input end of the AND gate circuit;

[0034] The second electrode of the third MOS tube is connected to the second input terminal of the AND gate circuit.

[0035] The power supply end of the AND gate circuit is connected to the second end of the fourth voltage divider circuit, and the output end of the AND gate circuit is connected to the first end of the second inverter.

[0036] In a second aspect, a chip is provided, comprising the chip switch circuit provided in the first aspect.

[0037] The chip power on / off circuit and chip provided above, the chip power on / off circuit comprises: a switch element, the first end of the switch element is used to connect the chip external power supply or ground, the second end of the switch element is connected to the first end of the voltage divider logic circuit, the control end of the switch element is arranged outside the chip, the switch element is used to conduct the circuit between the first end of the voltage divider logic circuit and the chip external power supply or to connect the first end of the voltage divider logic circuit to the ground; a voltage divider logic circuit, the second end of the voltage divider logic circuit is used to connect to the power conversion module inside the chip, and is used to perform voltage division processing based on the high level obtained by connecting the chip external power supply or the low level obtained by grounding, and the output enable is effective In this way, the circuit between the first end of the voltage-dividing logic circuit and the power supply outside the chip is turned on by the switch element or the first end of the voltage-dividing logic circuit 200 is grounded, and the voltage-dividing logic circuit performs voltage-dividing processing based on the high level obtained by connecting the power supply voltage outside the chip or the low level obtained by grounding, and outputs the enable valid signal or the enable invalid signal to the power conversion module to start or shut down the power conversion module. In this way, when the chip does not need to work, the power conversion module can be shut down by controlling the switch element outside the chip to reduce the power consumption of the chip when it is not working. Among them, the voltage-dividing logic circuit performs voltage-dividing processing on the power supply outside the chip to ensure that the voltage value corresponding to the enable valid signal or the signal invalid signal will not damage the enable pin of the power conversion module. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0039] Figure 1 A structural block diagram of a chip power on / off circuit according to an embodiment;

[0040] Figure 2 It is a structural block diagram of a chip power on / off circuit in another embodiment;

[0041] Figure 3 is a schematic structural diagram of a first voltage divider circuit in an embodiment;

[0042] Figure 4 is a schematic structural diagram of a first voltage divider circuit in another embodiment;

[0043] Figure 5 It is a schematic diagram of the structure of a chip power on / off circuit in another embodiment;

[0044] Figure 6It is a schematic diagram of the structure of a chip power on / off circuit in another embodiment;

[0045] Figure 7 It is a schematic diagram of the structure of a chip power on / off circuit in another embodiment;

[0046] Figure 8 FIG. 4 is a schematic diagram of the structure of a chip power on / off circuit in another embodiment.

[0047] Description of reference numerals:

[0048] 100-switching element, 110-first switching element, 120-second switching element, 200-voltage-dividing logic circuit, 210-first voltage-dividing circuit, 220-second voltage-dividing circuit, 230-first inverter, 240-third voltage-dividing circuit, 250-fourth voltage-dividing circuit, 260-second inverter, 270-third inverter, 280-fourth inverter, 290-AND gate circuit, 300-power conversion module, 310-first power conversion module, 320-second power conversion module, 400-chip external power supply, M1-first MOS tube, M2-second MOS tube, M3-third MOS tube. DETAILED DESCRIPTION

[0049] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0051] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0052] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0053] It is understood that the term "based on" used in this application is used to describe one or more factors that affect the determination, and does not exclude other factors that may affect the determination. For example, the phrase "determine A based on B" means that the determination of A can be based entirely or at least partially on factor B, that is, B is a factor that affects the determination of A, but does not exclude that the determination of A is also based on C.

[0054] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0055] like Figure 1 As shown, in an exemplary embodiment, a chip switch circuit is provided including a switch element 100 and a voltage division logic circuit 200 .

[0056] The first end of the switch element 100 is used to connect to the chip external power supply or ground, the second end of the switch element 100 is connected to the first end of the voltage-dividing logic circuit 200, and the control end of the switch element 100 is arranged outside the chip. The switch element 100 is used to conduct the circuit between the first end of the voltage-dividing logic circuit 200 and the chip external power supply 400 or to ground the first end of the voltage-dividing logic circuit 200.

[0057] Exemplarily, the chip external power supply 400 may be a battery on a PCB (Printed Circuit Board). Generally, the power supply voltage VABT of the chip external power supply 400 is 2.8V-5V.

[0058] In a possible implementation, the switch element 100 is a single-pole double-throw switch. Exemplarily, the first end of the switch element 100 corresponds to two contacts, which are respectively referred to as a first contact and a second contact in the embodiment of the present application. The first contact is used to represent a contact in the corresponding single-pole double-throw switch for connecting the chip external power supply 400, and the second contact is used to represent a contact in the corresponding single-pole double-throw switch for grounding.

[0059] The first contact is connected to the chip external power supply 400, and the second contact is grounded. Exemplarily, the control end of the switch element 100 is a button, and by physically pressing, the first end of the switch element 100 is pressed to the first contact, that is, connected to the chip external power supply 400, or pressed to the second contact, that is, grounded. Another exemplary embodiment, the control end of the switch element 100 is a USB charging interface, and by supplying power to or disconnecting the USB charging interface, the first end of the switch element 100 is connected to the chip external power supply 400 or grounded.

[0060] The first end of the voltage-dividing logic circuit 200 is connected to the second end of the switch element 100, and the second end of the voltage-dividing logic circuit 200 is used to connect to the power conversion module 300. The voltage-dividing logic circuit 200 is used to perform voltage division processing based on the high level obtained by connecting to the chip external power supply 400 or the low level obtained by grounding, and output an enable valid signal or an enable invalid signal to the power conversion module 300 to start or shut down the power conversion module 300.

[0061] The power conversion module 300 is used to convert the power supply voltage VABT of the chip external power supply 400 into the voltage required for the operation of each module in the chip. Exemplarily, the power conversion module 300 is an LDO (low dropout regulator, low voltage difference linear regulator), or the power conversion module 300 is a DCDC (direct current-to-direct current voltage converter).

[0062] Exemplarily, the voltage reduction ratio of the voltage-dividing logic circuit 200 for the power supply voltage VBAT of the chip external power supply 400 can be determined according to the power supply voltage VBAT and the withstand voltage value of the enable pin of the power conversion module 300. Also exemplarily, the voltage reduction ratio of the voltage-dividing logic circuit 200 for the power supply voltage VBAT of the chip external power supply 400 can be determined according to the power supply voltage VBAT and the high level of the logic signal in the chip.

[0063] Among them, please refer to Figure 1 , the voltage divider logic circuit 200 is a circuit inside the chip.

[0064] In the above embodiment, the circuit between the first end of the voltage-dividing logic circuit 200 and the chip external power supply 400 is turned on by the switch element 100, or the first end of the voltage-dividing logic circuit 200 is grounded, and the voltage-dividing logic circuit 200 performs voltage-dividing processing based on the high level obtained by connecting the power supply voltage of the chip external power supply 400 or the low level obtained by grounding, and outputs an enable valid signal or an enable invalid signal to the power conversion module 300 to start or shut down the power conversion module. In this way, when the chip does not need to work, the power conversion module can be shut down by controlling the switch element 100 outside the chip to reduce the power consumption of the chip when it is not working. Among them, the voltage-dividing logic circuit 200 performs voltage-dividing processing on the chip external power supply 400, ensuring that the voltage value corresponding to the enable valid signal or the signal invalid signal will not damage the enable pin of the power conversion module 300; avoiding directly using the power supply voltage VBAT of the chip external power supply 400 as the enable valid signal or the enable invalid signal, which may damage the enable pin of the power conversion module 300, and the above chip switch circuit has a high safety.

[0065] Furthermore, the chip power on / off circuit uses the chip external power supply 400 as the power supply voltage, which is consistent with the voltage domain of the power conversion module 300, thereby reducing the chip area occupied at the board level, simplifying the circuit topology design of the chip including the chip power on / off circuit, and reducing the complexity of the circuit design.

[0066] In one application scenario of the present embodiment, the chip power switch circuit controls a power conversion module that supplies power to a digital register in the chip; in another application scenario of the present embodiment, the chip power switch circuit connects multiple power conversion modules in the chip including the power conversion module that supplies power to a digital register. When the chip does not need to work, the multiple power conversion modules are turned off with one click through a switch element arranged outside the chip at the control end.

[0067] In an exemplary embodiment, please refer to Figure 2 The switch element 100 in the chip switch circuit provided includes a first switch element 110, and the voltage divider logic circuit 200 includes a first voltage divider circuit 210, a second voltage divider circuit 220 and a first inverter 230. The first end of the first switch element 110 is used to connect to the chip external power supply 400 or to ground, the second end of the first switch element 110 is connected to the first end of the first voltage divider circuit 210, and the second end of the first voltage divider circuit 210 is connected to the first end of the first inverter 230; the first end of the second voltage divider circuit 220 is used to connect to the chip external power supply 400, the second end of the second voltage divider circuit 220 is connected to the power supply end of the first inverter 230, and the second end of the first inverter 230 is used to connect to the power conversion module 300.

[0068] In this embodiment, the voltage divider logic circuit 200 is equivalent to having three terminals, wherein the first terminal is connected to the chip external power supply 400 through the first switching element 110, the second terminal is used to connect to the power conversion module 300, and the third terminal is directly connected to the chip external power supply 400, and is used to reduce the power supply voltage VBAT of the chip external power supply to the power supply voltage VDD of the first inverter 230 in the voltage divider logic circuit 200.

[0069] In a possible implementation of the present embodiment, the first switch element 110 is a push-button single-pole double-throw switch, wherein when the first end of the first switch element 110 is pressed to the first contact, the circuit between the first voltage divider circuit 210 and the chip external power supply 400 is turned on, the first voltage divider circuit 210 divides the power supply voltage VBAT of the chip external power supply 400, and the second end outputs the power supply voltage VDD, that is, a high level, and outputs a low level to the power conversion module 300 through the first inverter 230, that is, the power conversion module 300 inputs an enable invalid signal, and the power conversion module 300 is turned off; when the first end of the first switch element 110 is pressed to the second contact, the first end of the first voltage divider circuit 210 is grounded, the first voltage divider circuit 210 inputs a low level, and after the voltage division process, the second end of the first voltage divider circuit 210 still outputs a low level, and outputs a high level to the power conversion module 300 through the first inverter 230, that is, the power conversion module 300 inputs an enable valid signal, and the power conversion module 300 is turned on. That is, in this embodiment, when the button of the first switch element 110 is pressed to the first contact, the power conversion module 300 is turned off, and when the button of the first switch element 110 is pressed to the second contact, the power conversion module 300 is turned on, thereby realizing one-key turning on or off of the power conversion module 300.

[0070] In a possible implementation manner of the present embodiment, the first switch element 110 is based on a first switch control signal to turn on the circuit between the first end of the first voltage divider circuit 210 and the chip external power supply 400 or to ground the first voltage divider circuit 210; wherein, when the first switch control signal is at a low level, the first switch element 110 grounds the first end of the voltage divider logic circuit 200, the first voltage divider circuit 210 outputs a low level, and outputs a high level to the power conversion module 300 through the first inverter 230, that is, the input to the power conversion module 300 is an enable valid signal, and the power conversion module 300 is turned on; when the first switch control signal is at a high level, the first switch element 110 turns on the circuit between the voltage divider logic circuit 200 and the chip external power supply 400, the first voltage divider circuit 210 outputs a high level, and outputs a low level to the power conversion module 300 through the first inverter 230, that is, the input to the power conversion module 300 is an enable invalid signal, and the power conversion module 300 is turned off.

[0071] In this embodiment, a low level is input to the voltage-dividing logic circuit 200 through the first switch element 110 to turn on the power conversion module 300, and a high level is input to the voltage-dividing logic circuit 200 through the first switch element 110 to turn off the power conversion module 300; in this way, it is a low effective state for the entire chip power-on / off circuit, which can reduce the influence of noise on the chip power-on / off control. At the same time, when the power conversion module 300 is turned on, the low level input to the control end of the chip power-on / off circuit, the first voltage-dividing circuit 210 is in a low level state, reducing the power consumption of the chip when working. The chip power-on / off circuit provided in this embodiment includes two voltage-dividing circuits, one of which is connected to the switch element, and the switch element is controlled to make the voltage-dividing circuit and the chip external power supply 400 connected or grounded to control the opening and closing of the power conversion module, and the other voltage-dividing circuit is directly connected to the chip external power supply 400 to supply power to the components in the chip power-on / off circuit that need power supply voltage.

[0072] In an exemplary implementation example, please refer to Figure 3 In the provided chip switch circuit, the first voltage divider circuit 210 includes a first MOS tube M1 and a second MOS tube M2, wherein the source of the first MOS tube M1 is connected to the second end of the switch element 100, the gate of the first MOS tube M1 is connected to the drain of the first MOS tube M1, and the drain of the first MOS tube M1 is connected to the drain of the second MOS tube M2; the gate of the second MOS tube M2 is connected to the drain of the second MOS tube M2, the source of the second MOS tube M2 is grounded, and the connection end between the first MOS tube M1 and the second MOS tube M2 is the second end of the first voltage divider circuit 210.

[0073] The source of the first MOS transistor M1 serves as a first end of the first voltage divider circuit 210 , and the connection point between the drain of the first MOS transistor M1 and the drain of the second MOS transistor M2 serves as a second end of the first voltage divider circuit 210 .

[0074] The MOS tube in the embodiment of the present application refers to a metal-oxide-semiconductor field-effect transistor (MOSFET for short), which is referred to as MOS tube in the present application.

[0075] In one possible implementation, please refer to Figure 4The first voltage divider circuit 210 includes a plurality of first MOS tubes M1 and a plurality of second MOS tubes M2. The plurality of first MOS tubes M1 are connected in series in sequence, the source of the first first MOS tube M1 is connected to the second end of the switch element, the sources of the remaining first MOS tubes M1 are connected to the drain of the previous first MOS tube M1, and the drain of the last first MOS tube M1 is connected to the drain of the first second MOS tube. The plurality of second MOS tubes M2 are connected in series in sequence, the drain of the second MOS tube M2 is connected to the source of the previous second MOS tube M2, and the source of the last second MOS tube M2 is grounded.

[0076] The specific number of the first MOS tubes M1 and the second MOS tubes M2 can be determined according to the specific application scenario. For example, the number of the first MOS tubes M1 is the same as the number of the second MOS tubes M2, and VDD=VBAT / 2.

[0077] In a possible implementation manner, the first voltage divider circuit 210 includes one first MOS transistor M1 and a plurality of second MOS transistors M2.

[0078] In a possible implementation manner, the first voltage divider circuit 210 includes a plurality of first MOS transistors M1 and a single second MOS transistor M2.

[0079] In one possible implementation, please refer to Figure 3 and Figure 4 The first voltage divider circuit also includes a first capacitor C1 and a second capacitor C2, wherein the first capacitor C1 is connected in parallel with the first MOS tube M1, and the second capacitor C2 is connected in parallel with the second MOS tube.

[0080] In the example where the first voltage divider circuit 210 includes multiple first MOS transistors M1 , the first capacitor C1 is connected in parallel across the multiple first MOS transistors M1 connected in series, and the second capacitor C2 is connected in parallel across the multiple second MOS transistors M2 connected in series.

[0081] In this embodiment, when the circuit between the first voltage divider circuit 210 and the chip external power supply is turned on, the first capacitor C1 and the second capacitor C2 quickly establish and output the power supply voltage VDD, thereby improving the reliability of the chip power on / off circuit operation and improving the accuracy of starting the power conversion module 300.

[0082] For example, the first MOS tube M1 is an NMOS tube (N-channel MOS tube), and the second MOS tube M2 is a PMOS tube (P-channel MOS tube). Figure 3 and Figure 4 shown.

[0083] In another exemplary embodiment, both the first MOS tube M1 and the second MOS tube M2 are NMOS tubes; in another exemplary embodiment, both the first MOS tube M1 and the second MOS tube M2 are PMOS tubes.

[0084] The first voltage divider circuit 210 in this embodiment includes a first MOS transistor and a second MOS transistor, avoiding the problem of large area and high power consumption caused by the use of a resistor voltage divider circuit in the related art. The first voltage divider circuit 210 provided in this embodiment allows the chip power on / off circuit to occupy a smaller area in the chip, thereby reducing power consumption.

[0085] In an exemplary embodiment, the second voltage divider circuit 220 has the same structure as the first voltage divider circuit 210 , so that the first inverter 230 and the power conversion module 300 are in the same voltage domain.

[0086] In an exemplary embodiment, please refer to Figure 5 In the chip switch circuit provided, the switch element 100 includes a second switch element 120, and the voltage divider logic circuit 200 includes a third voltage divider circuit 240, a third MOS tube M3, a fourth voltage divider circuit 250 and a second inverter 260.

[0087] Among them, the first end of the second switch element 120 is used to connect to the chip external power supply 400 or to the ground, and the second end of the second switch element 120 is connected to the first end of the third voltage divider circuit 240. The second end of the third voltage divider circuit 240 is connected to the gate of the third MOS tube M3, the second pole of the third MOS tube M3 is connected to the second end of the fourth voltage divider circuit 250 and the first end of the second inverter 260, the first pole is one of the source or drain of the third MOS tube M3, and the second pole is the other of the source or drain of the third MOS tube M3. The first end of the fourth voltage divider circuit 250 is used to connect to the chip external power supply 400, the second end of the fourth voltage divider circuit 250 is connected to the power supply end of the second inverter 260, and the second end of the second inverter 260 is used to connect to the power conversion module 300.

[0088] For example, please refer to Figure 5 The third MOS tube M3 is a PMOS tube, wherein the drain of the third MOS tube M3 is connected to the second end of the fourth voltage divider circuit 250 and the first end of the second inverter 260, and the source of the third MOS tube M3 is grounded.

[0089] As another example, the third MOS tube M3 is an NMOS tube, wherein the source of the third MOS tube M3 is connected to the second end of the fourth voltage divider circuit 250 and the first end of the second inverter 260 , and the drain of the third MOS tube M3 is grounded.

[0090] In a possible implementation of this embodiment, the second switch element 120 is a push-button single-pole double-throw switch, wherein when the second switch element 120 is pressed to the first contact, the circuit between the first end of the voltage-dividing logic circuit 200 and the chip external power supply 400 is turned on, and the third voltage-dividing circuit 240 divides the voltage VBAT of the chip external power supply 400, and the second end outputs the power supply voltage VDD, that is, a high level. At this time, the third MOS tube M3 is turned on, so that the input to the second inverter 260 is a low level, and the second inverter 260 outputs a high level to the power conversion module 30. 0, that is, the input to the power conversion module 300 is an enable valid signal, and the power conversion module 300 is turned on; when the second switch element 120 is pressed to the second contact, that is, the circuit between the first end of the voltage-dividing logic circuit 200 and the chip external power supply 400 is turned off, the second end of the second voltage-dividing circuit 220 outputs a low level, and at this time the third MOS tube M3 is not turned on, so that the input to the second inverter 260 is a high level, and the second inverter 260 outputs a low level to the power conversion module 300, that is, the input to the power conversion module 300 is an enable invalid signal, and the power conversion module 300 is turned off.

[0091] In this embodiment, the power conversion module 300 is turned on or off by pressing the second switch element 120, so that the power conversion module 300 can be turned on or off with one key.

[0092] In a possible implementation of this embodiment, the second switch element 120 switches on the first end of the third voltage divider circuit 240 and the chip external power supply 400 or grounds the first end of the third voltage divider circuit 240 based on the second switch control signal. Among them, when the second switch control signal is at a low level, the second switch element 120 grounds the first end of the third voltage divider circuit 240, and the third voltage divider circuit 240 outputs a low level. At this time, the third MOS tube M3 is not turned on, so that the input to the second inverter 260 is a high level, and the second inverter 260 outputs a low level to the power conversion module 300, that is, the power conversion module 300 inputs an enable invalid signal, and the power conversion module 300 is turned off; when the second switch control signal is at a high level, the second switch element 120 turns on the circuit between the first end of the third voltage divider circuit 240 and the chip external power supply 400, and the third voltage divider circuit 240 divides the voltage VBAT of the chip external power supply 400, and the second end outputs the power supply voltage VDD. At this time, the third MOS tube M3 is turned on, so that the input to the second inverter 260 is a low level, and the second inverter 260 outputs a high level to the power conversion module, that is, the input to the power conversion module 300 is an enable valid signal, and the power conversion module 300 is turned on.

[0093] In this embodiment, when the second switch element 120 of the chip switch circuit receives a high level, the power conversion module 300 is turned on, and when the second switch element 120 receives a low level, the power conversion module 300 is turned off.

[0094] In a possible implementation of this embodiment, the second switch element 120 is a charging enable switch element. Exemplarily, the charging enable switch element is controlled by a USB (Universal Serial Bus) charging interface. When the USB charging interface is powered, the second switch element receives a high level, turns on the circuit between the chip external power supply 400 and the first end of the third voltage divider circuit 240, and the second end of the third voltage divider circuit 240 outputs a high level. At this time, the third MOS tube M3 is turned on, and the second inverter 260 outputs a high level to the power conversion module 300, that is, the power conversion module 300 inputs an enable valid signal, and the power conversion module 300 is turned on; when the USB charging interface is not powered, the second switch element 120 receives a low level, grounds the first end of the third voltage divider circuit 240, and the second end of the third voltage divider circuit 240 outputs a low level. At this time, the third MOS tube M3 is turned off, and the second inverter 260 outputs a low level to the power conversion module 300, that is, the power conversion module 300 inputs an enable invalid signal, and the power conversion module 300 is turned off. In this embodiment, the power conversion module 300 may be a power conversion module for supplying power to a module in the chip that communicates with the USB interface.

[0095] In an exemplary embodiment, based on Figure 5 In the embodiment shown, the voltage-dividing logic circuit 200 in the chip power-on / off circuit provided further includes a third inverter group; the third inverter group includes a plurality of third inverters connected in series in sequence, wherein the number of the third inverters 270 is an even number. Figure 6 , taking the third inverter group including two third inverters 270 as an example, a structural schematic diagram of a chip switching circuit is given.

[0096] Among them, the first end of the first third inverter 270 in the third inverter group is connected to the second end of the fourth voltage divider circuit 250, and the second end of the last third inverter 270 in the third inverter group is connected to the second electrode of the third MOS tube M3; the power supply end of each third inverter 270 is connected to the second end of the fourth voltage divider circuit 250.

[0097] In the chip power on / off circuit provided in this embodiment, a third inverter group is provided between the fourth voltage divider circuit 250 and the second electrode of the third MOS tube M3 to isolate the second end of the fourth voltage divider circuit 250 and the second electrode of the third MOS tube M3, thereby improving the stability of the chip power on / off circuit.

[0098] In a possible implementation manner, the number of the fourth voltage divider circuit 250 is one, and the power supply end of the second inverter 260 and the power supply end of each third inverter 270 are respectively connected to the second end of the same fourth voltage divider circuit 250. In a possible implementation manner, the number of the fourth voltage divider circuit 250 is multiple, and the power supply end of the second inverter 260 and each third inverter 270 is respectively connected to one fourth voltage divider circuit 250. In a possible implementation manner, the number of the fourth voltage divider circuit 250 is multiple, and the power supply end of the second inverter 260 is connected to one fourth voltage divider circuit 250, and the power supply end of each third inverter 270 is connected to the same fourth voltage divider circuit 250.

[0099] In an exemplary embodiment, please refer to Figure 6 , the voltage-dividing logic circuit 200 further includes a fourth inverter group; the fourth inverter group includes a plurality of fourth inverters 280 connected in series in sequence, wherein the number of the fourth inverters 280 is an even number. Figure 6 In the embodiment, a schematic diagram of the structure of a chip power on / off circuit is given by taking the fourth inverter group including two fourth inverters 280 as an example.

[0100] Among them, the first end of the first fourth inverter 280 in the fourth inverter group is connected to the second electrode of the third MOS tube M3, and the second end of the last fourth inverter 280 in the fourth inverter group is connected to the first end of the second inverter 260; the power supply end of each fourth inverter 280 is connected to the second end of the fourth voltage divider circuit 250.

[0101] In the chip power on / off circuit provided in this embodiment, a fourth inverter group is provided between the second electrode of the third MOS tube M3 and the first end of the second inverter 260 to isolate the second electrode of the third MOS tube M3 and the first end of the second inverter 260, thereby improving the stability of the chip power on / off circuit.

[0102] In a possible implementation manner, the number of the fourth voltage divider circuit 250 is one, and the power supply end of the second inverter 260 and the power supply end of each fourth inverter 280 are respectively connected to the second end of the same fourth voltage divider circuit 250. In a possible implementation manner, the number of the fourth voltage divider circuit 250 is multiple, and the power supply end of the second inverter 260 and each fourth inverter 280 is respectively connected to one fourth voltage divider circuit 250. In a possible implementation manner, the number of the fourth voltage divider circuit 250 is multiple, and the power supply end of the second inverter 260 is connected to one fourth voltage divider circuit 250, and the power supply end of each fourth inverter 280 is connected to the same fourth voltage divider circuit 250.

[0103] In an exemplary embodiment, based on Figure 5 For the examples shown, please refer to Figure 7In the chip switch circuit provided, the switch element 100 also includes a first switch element 110, and the voltage divider logic circuit 200 also includes a first voltage divider circuit 210 and an AND gate circuit 290, wherein the first end of the first switch element 110 is used to connect to the chip external power supply 400 or to ground, the second end of the first switch element 110 is connected to the first end of the first voltage divider circuit 210, and the second end of the first voltage divider circuit 210 is connected to the first input end of the AND gate circuit 290; the second electrode of the third MOS tube M3 is connected to the second input end of the AND gate circuit 290, the power supply end of the AND gate circuit 290 is connected to the second end of the fourth voltage divider circuit 250, and the output end of the AND gate circuit 290 is connected to the first end of the second inverter 260.

[0104] The second electrode of the third MOS transistor M3 is connected to the input end of the second inverter 260 through the AND gate circuit 290 .

[0105] In a possible implementation, the second switch element 120 is a charging enable switch element, and illustratively, the charging enable switch element is controlled by a USB (Universal Serial Bus) charging interface. When the USB charging interface is powered, the high level received by the second switch element 120 turns on the circuit between the chip external power supply 400 and the first end of the third voltage divider circuit 240, and the second end of the third voltage divider circuit 240 outputs a high level. At this time, the third MOS tube M3 is turned on, and the second input end of the AND gate circuit 290 inputs a low level. Regardless of whether the first input end of the AND gate circuit 290 inputs a high level or a low level, the AND gate circuit 290 outputs a low level, and outputs a high level to the power conversion module 300 through the second inverter 260, that is, the power conversion module 300 is turned on and remains turned on when the USB charging interface corresponding to the chip is powered.

[0106] The power on / off control logic implemented by the chip power on / off circuit provided in this embodiment is shown in Table 1:

[0107] Table 1, Figure 7 The power on / off control logic implemented by the chip power on / off circuit shown

[0108]

[0109] Among them, charger is the second control signal corresponding to the second switch element. For example, when the second switch element 120 is a push-button single-pole double-throw switch, the second switch element 120 is pressed to the first contact, charger is 1, and when the second switch element 120 is pressed to the second contact, charger is 0. When the second switch element 120 is a charging enable switch element, when the USB charging interface is powered, charger is 1, and when the USB charging interface is not powered, chaeger is 0; keyon is the first control signal corresponding to the first switch element 110. For example, when the first switch element 110 is a push-button single-pole double-throw switch, when the first switch element 110 is pressed to the first contact, keyon is 1, and when the first switch element 110 is pressed to the second contact, keyon is 0. EN is the enable signal input to the power conversion module 300. EN is 1, representing an enable valid signal, and EN is 0, representing an enable invalid signal.

[0110] Exemplarily, the first switch element 110 is a push-button single-pole double-throw switch and the second switch element 120 is a USB charging enable signal. In this way, when the USB interface is powered, the power conversion module 300 is in the on state. When the USB interface is not powered, the power conversion module 300 is turned on or off based on the switching state of the second switch element 120.

[0111] like Figure 7 As shown, in a possible implementation manner, the voltage-dividing logic circuit 200 further includes a third inverter group. In a possible implementation manner, the voltage-dividing logic circuit 200 further includes a fourth inverter group.

[0112] In an exemplary embodiment, please refer to Figure 8 In the chip switch circuit provided, the switch element 100 includes a first switch element 110 and a second switch element 120, and the voltage divider logic circuit 200 includes a first voltage divider circuit 210, a first inverter 230, a third voltage divider circuit 240, a fourth voltage divider circuit 250, a third MOS tube M3 and a second inverter 260.

[0113] Figure 8 The embodiment shown is Figure 7 The embodiment shown is different in that the first switch element 110 is connected to the first inverter 230 for controlling the first power conversion module 310, and the second switch element 120 is connected to the second inverter 260 for controlling the second power conversion module 320. Exemplarily, the second switch element 120 is a charging enabling element, the second power conversion module 320 corresponds to a power conversion module in the chip that supplies power to a module that communicates with the USB interface, and the first power conversion module 310 is a power conversion module in the chip other than the second power conversion module 320.

[0114] In an exemplary embodiment, the structures of the third voltage divider circuit 240 and the fourth voltage divider circuit 250 are consistent with the structure of the first voltage divider circuit 210 .

[0115] In one embodiment, a chip is further provided, comprising the chip power on / off circuit provided in the above embodiment.

[0116] Exemplarily, the chip can be based on the structure provided by the above-mentioned chip switch circuit, using EDA (Electronic Design Automation) software to design circuit design, logic design, layout and wiring, etc., and then manufactured through chip manufacturing process; it can be implemented based on FPGA (Field Programmable Gate Array) logic chip.

[0117] In one embodiment, a communication device is further provided, comprising the chip power on / off circuit or chip provided in the above embodiment.

[0118] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0119] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0120] The above-described embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A chip power on / off circuit, characterized in that: The chip power on / off circuit comprises: A switch element, wherein the first end of the switch element is used to connect to a power supply external to the chip or to ground, the second end of the switch element is connected to the first end of the voltage-dividing logic circuit, the control end of the switch element is arranged outside the chip, and the switch element is used to conduct the circuit between the first end of the voltage-dividing logic circuit and the power supply external to the chip or to ground the first end of the voltage-dividing logic circuit; The voltage-dividing logic circuit, the second end of which is used to connect to the power conversion module inside the chip, and to perform voltage division processing based on the high level obtained by connecting to the external power supply of the chip or the low level obtained by grounding, and output an enable valid signal or an enable invalid signal to the power conversion module to start or shut down the power conversion module; Wherein, the switch element includes a first switch element, and the voltage-dividing logic circuit includes a first voltage-dividing circuit, a second voltage-dividing circuit and a first inverter, wherein the first end of the first switch element is used to be connected to the power supply outside the chip or to the ground, and the second end of the first switch element is connected to the first end of the first voltage-dividing circuit; the second end of the first voltage-dividing circuit is connected to the first end of the first inverter; the first end of the second voltage-dividing circuit is used to be connected to the power supply outside the chip, and the second end of the second voltage-dividing circuit is connected to the power supply end of the first inverter; the second end of the first inverter is used to be connected to the power conversion module; or, The switch element includes a second switch element, and the voltage-dividing logic circuit includes a third voltage-dividing circuit, a third MOS tube, a fourth voltage-dividing circuit and a second inverter, wherein the first end of the second switch element is used to connect to the power supply outside the chip or to ground, and the second end of the second switch element is connected to the first end of the third voltage-dividing circuit; the second end of the third voltage-dividing circuit is connected to the gate of the third MOS tube, the first pole of the third MOS tube is grounded, the second pole of the third MOS tube is connected to the second end of the fourth voltage-dividing circuit and the first end of the second inverter, the first pole is one of the source or drain of the third MOS tube, and the second pole is the other of the source or drain of the third MOS tube; the first end of the fourth voltage-dividing circuit is used to connect to the power supply outside the chip, and the second end of the fourth voltage-dividing circuit is connected to the power supply end of the second inverter; the second end of the second inverter is used to connect to the power conversion module.

2. The chip power on / off circuit according to claim 1, characterized in that: The first voltage divider circuit includes a first MOS transistor and a second MOS transistor, wherein: The source of the first MOS tube is connected to the second end of the switch element, the gate of the first MOS tube is connected to the drain of the first MOS tube, and the drain of the first MOS tube is connected to the drain of the second MOS tube; The gate of the second MOS tube is connected to the drain of the second MOS tube, and the source of the second MOS tube is grounded; The connection end between the first MOS tube and the second MOS tube is the second end of the first voltage divider circuit.

3. The chip power on / off circuit according to claim 2, characterized in that: The number of the first MOS tubes is multiple, and the number of the second MOS tubes is the same as the number of the first MOS tubes.

4. The chip switch circuit according to claim 2, characterized in that: The first voltage divider circuit also includes a first capacitor and a second capacitor; wherein, The first capacitor is connected in parallel with the first MOS transistor, and the second capacitor is connected in parallel with the second MOS transistor.

5. The chip switch circuit according to claim 1, characterized in that: The voltage-dividing logic circuit further includes: a third inverter group, the third inverter group includes a plurality of third inverters connected in series in sequence, wherein the number of the third inverters is an even number; The first end of the first third inverter in the third inverter group is connected to the second end of the fourth voltage divider circuit, and the second end of the last third inverter in the third inverter group is connected to the second electrode of the third MOS tube; The power supply end of each of the third inverters is connected to the second end of the fourth voltage divider circuit.

6. The chip switch circuit according to claim 1, characterized in that: The voltage-dividing logic circuit further includes: a fourth inverter group, the fourth inverter group including a plurality of fourth inverters connected in series in sequence, wherein the number of the fourth inverters is an even number; The first end of the first fourth inverter in the fourth inverter group is connected to the second electrode of the third MOS tube, and the second end of the last fourth inverter in the fourth inverter group is connected to the first end of the second inverter; The power supply end of each of the fourth inverters is connected to the second end of the fourth voltage divider circuit.

7. The chip switch circuit according to claim 1, characterized in that: The switch element further includes a first switch element, and the voltage-dividing logic circuit further includes a first voltage-dividing circuit and an AND gate circuit, wherein: The first end of the first switch element is used to be connected to the chip external power supply or to ground, and the second end of the first switch element is connected to the first end of the first voltage divider circuit; The second end of the first voltage divider circuit is connected to the first input end of the AND gate circuit; The second electrode of the third MOS tube is connected to the second input terminal of the AND gate circuit. The power supply end of the AND gate circuit is connected to the second end of the fourth voltage divider circuit, and the output end of the AND gate circuit is connected to the first end of the second inverter.

8. A chip, characterized in that: The chip includes the chip switch circuit as described in any one of claims 1-7.

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