Method and apparatus for learning-based channel estimation with data pre-processing

Abstract

Methods and apparatus are provided in which frequency domain (FD) interpolation is performed on broadband reference signal (RS) resource elements (REs) to generate channel estimates for corresponding RS symbols. Denoising may be performed on channel estimates in a time domain (TD) or a delayed Doppler domain (DD). Learning-based channel estimates (LCEs) are applied to the channel estimates using a neural network (NN) to generate accurate channel estimates for the corresponding RS symbols. Time domain (TD) interpolation is performed on the precise channel estimates to produce cross-symbol channel estimates.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. Provisional Application No. 63 / 472,451, filed on June 12, 2023, and U.S. Application No. 18 / 465,517, filed on September 12, 2023, the disclosures of which are incorporated herein by reference in their entireties as if fully set forth herein. Technical Field

[0003] The present disclosure relates generally to channel estimation (CE) in wireless communication systems. More specifically, the subject matter disclosed herein relates to improvements to learning-based CE (LCE) employing data preprocessing. Background Art

[0004] CE is a key feature in wireless communication systems. In systems based on Orthogonal Frequency Division Multiplexing (OFDM), such as, for example, fifth generation (5G) New Radio (NR) or fourth generation (4G) Long Term Evolution (LTE), CE can be performed with the aid of pilot symbols (e.g., cell-specific reference signals (CRS) in LTE, or demodulation reference signals (DMRS) in NR) to facilitate the estimation of channel characteristics.

[0005] Specifically, information may be sent via time-frequency resource elements (REs) on a physical downlink shared channel (PDSCH). It may be necessary to estimate the channel of the REs through which data is sent. Traditional CE schemes obtain channel estimates for REs containing pilot symbols, and then interpolate these estimates along the frequency direction and the time direction to obtain estimated channel values ​​in all REs of interest. Summary of the invention

[0006] To improve performance, LCE is a CE technique that utilizes one or more neural networks (NNs).

[0007] In this paper, an LCE architecture is designed for LTE based on wideband reference signals (e.g., CRS). A sliding window implementation of LCE is also provided, which can be applied to both NR and LTE. In addition, a data preprocessing technique using domain knowledge is also provided.

[0008] Preprocessing techniques focus on how to transform the dataset (obtained from simulation or experimental measurements) to facilitate the task of training NN. By leveraging domain knowledge derived from traditional CE algorithms, time domain (TD) denoising and delay-Doppler domain (DD) denoising are provided as preprocessing techniques.

[0009] The disclosed techniques may improve training performance in terms of normalized mean square error (NMSE) when compared to training without preprocessing.

[0010] In an embodiment, a method is provided in which a user equipment (UE) performs frequency domain (FD) interpolation on a wideband reference signal (RS) RE to generate a channel estimate for a corresponding RS symbol (e.g., an OFDM symbol where the RS is located). The UE applies LCE to the channel estimate using a NN to generate a refined channel estimate for the corresponding RS symbol. The UE performs time domain (TD) interpolation on the refined channel estimate to produce a channel estimate across symbols.

[0011] In an embodiment, a method is provided in which a UE generates a channel estimate for an RS symbol in FD. The UE converts the channel estimate to TD or DD to generate a converted channel estimate. The UE performs denoising on the converted channel estimate. The UE applies LCE to the denoised channel estimate to generate an accurate channel estimate for the RS symbol. The accurate channel estimate is converted to FD.

[0012] In an embodiment, a UE having a processor and a non-transitory computer-readable storage medium storing instructions is provided. When the instructions are executed, the processor performs FD interpolation on the wideband RS RE to generate a channel estimate for the corresponding RS symbol. The instructions also cause the processor to apply LCE to the channel estimate using NN to generate an accurate channel estimate for the corresponding RS symbol. The instructions also cause the processor to perform TD interpolation on the accurate channel estimate to generate a channel estimate across symbols. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In the following sections, aspects of the subject matter disclosed herein will be described with reference to exemplary embodiments shown in the accompanying drawings, in which:

[0014] Figure 1 is a diagram showing a communication system according to an embodiment;

[0015] Figure 2 is a diagram showing a processing architecture of a DMRS-based LCE according to an embodiment;

[0016] Figure 3 is a diagram showing a processing architecture for broadband-based LCE according to an embodiment;

[0017] Figure 4 is a diagram showing a sliding window implementation for LCE according to an embodiment;

[0018] Figure 5 is a diagram showing a system for TD / DD denoising preprocessing according to an embodiment;

[0019] Figure 6is a diagram showing a system for LCE preprocessing according to an embodiment;

[0020] Figure 7 is a flowchart illustrating a method for performing LCE according to an embodiment; and

[0021] Figure 8 is a block diagram of an electronic device in a network environment according to an embodiment. DETAILED DESCRIPTION

[0022] In the following detailed description, many specific details are set forth to provide a comprehensive understanding of the present disclosure. However, those skilled in the art will appreciate that the disclosed aspects can be practiced without these specific details. In other cases, well-known methods, processes, components, and circuits are not described in detail to avoid obscuring the subject matter disclosed herein.

[0023] References throughout this specification to "one embodiment" or "embodiment" mean that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment disclosed herein. Therefore, the phrases "in one embodiment" or "in an embodiment" or "according to an embodiment" (or other phrases with similar meanings) appearing in various places in this specification may not necessarily refer to the same embodiment. In addition, specific features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In this regard, as used in this article, the word "exemplary" means "used as an example, instance or illustration". Any embodiment described as "exemplary" herein is not to be construed as necessarily preferred or superior to other embodiments. Additionally, specific features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In addition, depending on the context discussed herein, singular terms may include corresponding plural forms, and plural terms may include corresponding singular forms. Similarly, hyphenated terms (e.g., "two-dimensional", "pre-determined", "pixel-specific", etc.) may sometimes be used interchangeably with corresponding non-hyphenated versions (e.g., "two dimensional", "predetermined", "pixel specific", etc.), and capitalized terms (e.g., "Counter Clock", "Row Select", "PIXOUT", etc.) may be used interchangeably with corresponding non-capitalized versions (e.g., "counter clock", "row select", "pixout", etc.). Such occasional interchangeable usage should not be considered inconsistent with each other.

[0024] In addition, depending on the context discussed herein, singular terms may include corresponding plural forms, and plural terms may include corresponding singular forms. It should also be noted that the various drawings (including component drawings) shown and discussed herein are for illustrative purposes only and are not drawn to scale. For example, for clarity, the size of some of the elements may be enlarged relative to other elements. In addition, if deemed appropriate, reference numerals are reused in the drawings to indicate corresponding and / or similar elements.

[0025] The terms used herein are only used for the purpose of describing some example embodiments and are not intended to limit the claimed subject matter. As used herein, the singular forms "a", "an", and "the" are also intended to include the plural forms, unless the context clearly indicates otherwise. It will also be understood that the terms "include" and / or "comprise" when used in this specification specify the presence of the described features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or combinations thereof.

[0026] It will be understood that when an element or layer is referred to as being on, "connected to" or "coupled to" another element or layer, it may be directly on, directly connected to or coupled to another element or layer, or there may be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. The same reference numerals always refer to the same elements. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0027] As used herein, the terms "first", "second", etc. are used as labels for the nouns that follow them, and do not imply any type of ordering (e.g., spatial, temporal, logical, etc.) unless explicitly defined as such. In addition, the same reference numerals may be used in two or more figures to refer to parts, components, blocks, circuits, units, or modules having the same or similar functions. However, this usage is only for simplicity of illustration and ease of discussion; it does not mean that the construction or architectural details of these components or units are the same in all embodiments, or that these commonly referenced components / modules are the only way to implement some of the example embodiments disclosed herein.

[0028] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the subject matter belongs. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and will not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0029] As used herein, the term "module" refers to any combination of software, firmware, and / or hardware configured to provide the functionality described herein in conjunction with the module. For example, software may be embodied as a software package, code, and / or instruction set or instructions, and the term "hardware" used in any embodiment described herein may include, for example, individually or in any combination, an assembly, a hardwired circuit, a programmable circuit, a state machine circuit, and / or firmware storing instructions executed by a programmable circuit. Modules may be embodied collectively or individually as circuits forming part of a larger system, such as, but not limited to, an integrated circuit (IC), a system on a chip (SoC), an assembly, and the like.

[0030] Figure 1 is a diagram showing a communication system according to an embodiment. Figure 1 In the illustrated architecture, a control path 102 may enable transmission of control information through a network established between a gNode B (gNB) 104, a first UE 106, and a second UE 108. A data path 110 may enable transmission of data (and some control information) on a side link (SL) between the first UE 106 and the second UE 108. The control path 102 and the data path 110 may be on the same frequency or may be on different frequencies.

[0031] Figure 2 is a diagram showing a processing architecture of DMRS-based LCE according to an embodiment. The purpose of LCE in NR may be to enhance the CE performance of PDSCH carrying data symbols in NR, thereby reducing the block error rate (BLER) and increasing throughput. The reference signal used for PDSCH CE in NR may be DMRS. Figure 2 In the embodiment, it can be assumed that DMRS type 1 is configured on two symbols per time slot. However, the embodiments are not limited to DMRS type 1, and alternative embodiments may also cover DMRS type 2 or a different number of DMRS symbols per time slot.

[0032] refer to Figure 2 , DMRS RE 202 is provided as an input to the FD minimum mean square error (MMSE). Two resource blocks (RBs) are shown (a first RB 208 and a second RB 210), with six DMRS REs per symbol in a single RB, and therefore, 12 DMRS REs are provided per symbol. The FD interpolator (e.g., FD-MMSE) produces an output of DMRS symbol 204 with 24 REs per symbol.

[0033] LCE includes a training phase and an inference phase. NN (e.g., a multilayer perceptron (MLP)) can be trained using pairs of ideal channel samples and estimated channel samples at the output of FD-MMSE. MLP can have a single hidden layer with, for example, 32 nodes. The activation function of the hidden layer can be a rectified linear unit (ReLU).

[0034] During the inference phase, the trained MLP can be applied to refine the FD-MMSE output. The input and output of the MLP have the same size (e.g., the number of interpolated subcarriers in a processing bundle can be 1 or 2 RB). The LCE processing bundle can be consistent with the precoding resource group (PRG) configured by the gNB, or can be a subset of the PRG.

[0035] Reference back Figure 2 , DMRS symbol 204 is provided as input to the LCE and outputs a refined estimate of DMRS symbol 206, 24 REs per symbol. The refined estimate of DMRS symbol 206 is provided as input to the TD-MMSE to generate CE for all REs.

[0036] Regarding the LCE architecture for CRS-based CE in LTE, similar to the above-mentioned DMRS-based CE, the LCE receives the output of FD-MMSE interpolation and outputs an accurate estimated channel in FD. Then, TD interpolation (e.g., TD-MMSE) can be applied to interpolate the LCE output at different OFDM symbols.

[0037] Figure 3 is a diagram showing a processing architecture for broadband-based LCE according to an embodiment. LTE has several transmission modes, and depending on the transmission mode, CRS or DMRS can be used as RS. CRS-based CE in LTE can be used for PDSCH or physical downlink control channel (PDCCH). Therefore, LCE can be used to enhance PDSCH CE or PDCCH CE performance.

[0038] refer to Figure 3 , CRS RE 302 is provided as input to FD-MMSE. When reference signal time interpolation (RSTI) is not enabled, two CRS REs per symbol are provided, while when RSTI is enabled, four CRS REs per symbol are provided. FD-MMSE can be applied with a sliding window over the entire bandwidth, which will be referred to below. Figure 4 The number of FD-MMSE taps can be 6 or 12, depending on whether RSTI is enabled or disabled.

[0039] FD-MMSE generates an output on CRS symbols 304 on two RBs, which is provided as an input to be processed jointly by LCE. Each CRS symbol can be processed separately. The LCE input and output size can be 24 complex numbers. The real and imaginary parts can be processed separately using the same NN, and the effective input / output size of the NN can be 24 real numbers. Unlike DMRS, CRS is a broadband reference signal. Therefore, there is no concept of PRG.

[0040] The NN may be a fully connected MLP with a single hidden layer having 32 hidden nodes. The MLP size may be 24 × 32 × 24. The activation function of the hidden layer may be ReLU.

[0041] LCE can be applied directly to the channel samples in FD, either using a transform to DD (by applying a discrete Fourier transform (DFT) / fast Fourier transform (FFT) matrix), or using ad-hoc preprocessing based on domain knowledge (i.e., mimicking the TD denoising operation for wideband channel estimation (WBCE)).

[0042] At inference time, LCE may be applied to each CRS symbol and each layer separately. The first two layers (eg, CRS port 0 and port 1) may have four CRS symbols, while the remaining layers (eg, CRS port 2 and port 3) may have only two CRS symbols.

[0043] Reference back Figure 3 , the LCE outputs accurate estimates of the CRS symbols 306, which can be provided as input to the TD-MMSE to generate CEs for all REs.

[0044] A sliding window implementation of LCE can be provided for both NR and LTE. LCE processes data blocks in FD (also called LCE processing bundles). A processing bundle can be, for example, 1 or 2 RBs. This sliding window implementation can be provided to mitigate CE quality degradation at the edge of each bundle.

[0045] Figure 4is a diagram showing a sliding window implementation for LCE according to an embodiment. It may be assumed that the LCE processing bundle includes a single RB (12 subcarriers). The first LCE processing bundle 402 may be consistent with the first RB (subcarriers 1 to 12) 404. The second LCE processing bundle 406 may not completely cover the second RB 408, but instead, may be offset by a small amount (e.g., 1 / 2 RB or six subcarriers) relative to the first LCE processing bundle 402. According to an embodiment of the present disclosure, the first LCE processing bundle 402 may overlap at least partially with the second LCE processing bundle 406 at the FD. Similarly, each subsequent LCE processing bundle 410, 412 may be offset by the same small amount until the last bundle 414 covering the last RB 416.

[0046] Offsetting the LCE processing bundles results in some overlap between the bundles, which makes it possible to avoid using the LCE output corresponding to the edge of each bundle. Figure 4 It is shown that the final output includes the six central subcarriers of each beam. The edges (first three and last three subcarriers) can be discarded because they are covered by adjacent beams. The only exceptions are the first and last beams, for which nine subcarriers are used for the final output.

[0047] The offset of 1 / 2 RB (six subcarriers) is provided as an example, and the embodiments are not limited thereto. The offset can be as small as one subcarrier. The smaller the step size, the higher the complexity because the number of bundles increases.

[0048] Data preprocessing involves the transformation of a data set (obtained from simulation or experimental measurements) in order to facilitate the training of the neural network NN. h can be set to the FD complex channel sample vector collected at the output of the FD interpolator for a single OFDM symbol containing a pilot signal, which is shown as Figure 2 DMRS symbol 204 or Figure 3 CRS symbol 304. Assuming that the LCE processing bundle size is two RBs, the vector h may include 24 samples. In the following description, for the purpose of illustration, this size may be assumed, however, the embodiments are not limited to a specific size.

[0049] For LCE, the simplest option may be to directly use the sample h (e.g., h 1 ,…,h n ) to train the NN, and apply the NN at inference time, as shown in Equation (1) below.

[0050] h refined =f Θ (h)…(1)

[0051] Among them, f Θ(·) represents the MLP input-output relationship, which may be a function of the weight / bias parameters θ for all layers.

[0052] Regarding the transformation to DD, instead of applying LCE directly in FD, it may be beneficial to convert the channel samples to DD by applying DFT or FFT (with zero padding). The zero-padded version of The DD channel can be obtained by the following equation (2).

[0053] h D =Fh ZP …(2)

[0054] Where F can be a 32×32 FFT matrix. Sample h can be used D (For example, h D,1 ,…,h D,n ) performs NN training; inference can also be applied to the transformed domain to obtain the following equation (3).

[0055] h D,refined =f Θ (h D )…(3)

[0056] And the exact FD channel can be recovered by the following equation (4).

[0057] h refined =F H h D,refined …(4)

[0058] The pre-processing options can be based on the concept of application domain knowledge. Since it is known that WBCE performs better than narrowband channel estimation (NBCE) in PDCCH CE due to the wideband nature of CRS, the same processing of WBCE can be applied (i.e., TD denoising) to the channel vector TD denoising can be interpreted as a heuristic preprocessing technique, which does not have the same theoretical basis as TD denoising used for WBCE.

[0059] In addition, a variation of the same preprocessing technique that operates in DD rather than TD can be considered. The TD transform and the DD transform are similar in form. In one case, an inverse FFT (IFFT) can be used, and in the other case, an FFT can be used. This alternative preprocessing technique can be called DD denoising.

[0060] In summary, two preprocessing methods are proposed based on domain knowledge: TD denoising and DD denoising.

[0061] Figure 5is a diagram illustrating a system for TD / DD denoising preprocessing according to an embodiment.

[0062] The FFT size can be determined as shown in equation (5) below.

[0063]

[0064] Where N may be the size of the complex FD channel vector h, and K ≥ 1 may be an arbitrary upsampling factor.

[0065] At 502, the FD channel vector h and the FFT size N may be used. FFT To perform zero padding, as shown in equation (6) below.

[0066]

[0067] At 504, the FD channel vector h may be filled with zeros. ZP To perform the conversion to TD, as shown in equation (7) below.

[0068] h T =F H h ZP …(7)

[0069] Alternatively, the conversion to DD may be performed by the following equation (8).

[0070] h T =Fh ZP …(8)

[0071] in, Can be an FFT matrix.

[0072] At 506, the noise mask can be obtained by taking a predefined noise mask The TD / DD channel vector h T The noise variance (NV) estimation is performed by taking the average energy of , which selects the time samples that are expected to contain only noise and not the channel taps, as shown in equation (9) below.

[0073]

[0074] Can be relative to h T (i.e., the training dataset) to take the expected Instead, the average within the noise mask can be taken for each individual realization.

[0075] At 508, the estimated noise variance σ may be used 2To perform power delay profile (PDP) estimation, as shown in equation (10) below.

[0076]

[0077] i∈{1,…,N FFT}, and the expectation can be taken for all realizations of each time index i The result may be floored around 0 to avoid negative values, which would not be physically meaningful (which may occur if the data set is not large enough and / or if the NV estimate is inaccurate).

[0078] At 510, the estimated PDP P may be used i To initially calculate the per-tap MMSE weight, as shown in equation (11) below.

[0079]

[0080] In addition, tap masking and tap thresholding can be applied. With tap masking, a predefined PDP mask (usually with a noise mask) The weights in the same) are set to zero. By tap thresholding, below a certain threshold βσ 2 The weight of is set to zero, where β may be a configurable parameter (eg, β=0.5). Therefore, the final weight may be as shown in the following equation (12).

[0081]

[0082] Then, at 512, the weight w may be used i and TD / DD channel vector h T To apply per-tap MMSE, as shown in equation (13) below.

[0083] h T,denoised =w T h T …(13)

[0084] in,

[0085] Finally, if upsampling (K>1) is applied in determining the FFT size (Eq. (5)), then at 514, the denoised TD / DD channel vector h may be used before being passed as input to the NN. T,denoised The denoised output is downsampled as shown in equation (14) below.

[0086] h′ T,denoised =h T,denoised (1:K:N FFT)…(14)This downsampling step may be optional and may be used to reduce the NN input size.

[0087] After preprocessing, the sample h T,denoised (or h′ T,denoised ) to train the NN. In the inference stage, LCE can be applied to the TD / DD domain as shown in Equation (15) below.

[0088] h T,refined =f Θ (h T,denoised )…(15)

[0089] By inverting equation (7) or (8), the result can be converted back to FD as shown below in equation (16) for the TD case.

[0090] h refined =Fh T,refined …(16)

[0091] Equation (17) is shown for the DD case.

[0092] h refined =F H h T,refined …(17)

[0093] Finally, by removing the samples corresponding to the zeros added in equation (6), h refined The size is reduced to N.

[0094] Figure 6 604. FIG. 605 is a diagram illustrating a system for LCE preprocessing according to an embodiment. Infinite impulse response (IIR) filtering 602 may be performed prior to data preprocessing 604. The purpose of IIR filtering 602 may be to smooth channel variations in time prior to data preprocessing 604 and training NN / NN processing 606. Figure 5 The steps of data preprocessing 604 are described in detail.

[0095] Figure 7 is a flow chart showing a method for LCE processing according to an embodiment. At 702, the UE performs FD interpolation on the wideband RS RE to generate a channel estimate for the corresponding RS symbol. The wideband RS may be a CRS, and the FD interpolation may be FD-MMSE interpolation.

[0096] At 704, the UE applies LCE to the channel estimate using the NN to generate an accurate channel estimate for the corresponding RS symbol. The NN may be an MLP with a hidden layer having an activation function of ReLU. The LCE process may be applied based on a sliding window across the beam of the channel estimate. Prior to applying LCE, TD or DD denoising preprocessing may be performed on the channel estimate.

[0097] At 706, the UE performs TD interpolation on the refined channel estimate to generate a channel estimate across symbols. The TD interpolation may be TD-MMSE interpolation.

[0098] Figure 8 is a block diagram of electronic devices in a network environment 800 according to an embodiment.

[0099] refer to Figure 8 , the electronic device 801 in the network environment 800 may communicate with the electronic device 802 via the first network 898 (e.g., a short-range wireless communication network), or communicate with the electronic device 804 or the server 808 via the second network 899 (e.g., a long-range wireless communication network). The electronic device 801 may communicate with the electronic device 804 via the server 808. The electronic device 801 may include a processor 820, a memory 830, an input device 850, a sound output device 855, a display device 860, an audio module 870, a sensor module 876, an interface 877, a tactile module 879, a camera module 880, a power management module 888, a battery 889, a communication module 890, a subscriber identity module (SIM) card 896, or an antenna module 897. In one embodiment, at least one of the components (e.g., the display device 860 or the camera module 880) may be omitted from the electronic device 801, or one or more other components may be added to the electronic device 801. Some of the components may be implemented as a single integrated circuit (IC). For example, the sensor module 876 (eg, a fingerprint sensor, an iris sensor, or an illumination sensor) may be embedded in the display device 860 (eg, a display).

[0100] The processor 820 may execute software (eg, program 840 ) to control at least one other component (eg, hardware or software component) of the electronic device 801 coupled to the processor 820 , and may perform various data processing or calculations.

[0101] As at least part of data processing or calculation, the processor 820 may load commands or data received from another component (e.g., the sensor module 876 or the communication module 890) into the volatile memory 832, process the commands or data stored in the volatile memory 832, and store the resultant data in the non-volatile memory 834. The processor 820 may include a main processor 821 (e.g., a central processing unit (CPU) or an application processor (AP)) and an auxiliary processor 823 (e.g., a graphics processing unit (GPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)), which may operate independently of the main processor 821 or in conjunction with the main processor 821. Additionally or alternatively, the auxiliary processor 823 may be adapted to consume less power than the main processor 821, or to perform a specific function. The auxiliary processor 823 may be implemented as a separate part from the main processor 821 or as a part of the main processor 821.

[0102] When the main processor 821 is in an inactive (e.g., sleep) state, the auxiliary processor 823 may control at least some of the functions or states related to at least one component (e.g., display device 860, sensor module 876, or communication module 890) among the components of the electronic device 801 instead of the main processor 821, or when the main processor 821 is in an active state (e.g., executing an application), the auxiliary processor 823 may control at least some of the functions or states related to at least one component (e.g., display device 860, sensor module 876, or communication module 890) among the components of the electronic device 801 together with the main processor 821. The auxiliary processor 823 (e.g., an image signal processor or a communication processor) may be implemented as a part of another component (e.g., a camera module 880 or a communication module 890) that is functionally related to the auxiliary processor 823.

[0103] The memory 830 may store various data used by at least one component of the electronic device 801 (e.g., the processor 820 or the sensor module 876). The various data may include, for example, software (e.g., program 840) and input data or output data for commands related thereto. The memory 830 may include a volatile memory 832 or a non-volatile memory 834. The non-volatile memory 834 may include an internal memory 836 and / or an external memory 838.

[0104] The program 840 may be stored as software in the memory 830 , and may include, for example, an operating system (OS) 842 , middleware 844 , or an application 846 .

[0105] The input device 850 may receive a command or data from outside the electronic device 801 (eg, a user) to be used by another component (eg, the processor 820) of the electronic device 801. The input device 850 may include, for example, a microphone, a mouse, or a keyboard.

[0106] The sound output device 855 can output sound signals to the outside of the electronic device 801. The sound output device 855 may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as playing multimedia or recording, and the receiver may be used to receive incoming calls. The receiver may be implemented as being separate from the speaker or as a part of the speaker.

[0107] The display device 860 may visually provide information to the outside (e.g., user) of the electronic device 801. The display device 860 may include, for example, a display, a holographic device, or a projector, and a control circuit that controls a corresponding one of the display, the holographic device, and the projector. The display device 860 may include a touch circuit suitable for detecting a touch, or a sensor circuit (e.g., a pressure sensor) suitable for measuring the strength of a force caused by a touch.

[0108] The audio module 870 can convert sound into an electrical signal, and vice versa. The audio module 870 can obtain sound via the input device 850, or output sound via the sound output device 855 or the earphone of the external electronic device 802 directly (eg, wired) or wirelessly coupled to the electronic device 801.

[0109] The sensor module 876 can detect the operating state (e.g., power or temperature) of the electronic device 801 or the environmental state (e.g., the state of the user) outside the electronic device 801, and then generate an electrical signal or data value corresponding to the detected state. The sensor module 876 may include, for example, a gesture sensor, a gyroscope sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illumination sensor.

[0110] The interface 877 may support one or more designated protocols for the electronic device 801 to be directly (e.g., wired) or wirelessly coupled with the external electronic device 802. The interface 877 may include, for example, a high-definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, or an audio interface.

[0111] The connection terminal 878 may include a connector via which the electronic device 801 may be physically connected to the external electronic device 802. The connection terminal 878 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (eg, a headphone connector).

[0112] The haptic module 879 may convert an electrical signal into a mechanical stimulus (eg, vibration or motion) or an electrical stimulus, which the user may recognize via tactile or kinesthetic sense. The haptic module 879 may include, for example, a motor, a piezoelectric element, or an electrical stimulator.

[0113] The camera module 880 may capture still images or moving images. The camera module 880 may include one or more lenses, an image sensor, an image signal processor, or a flash. The power management module 888 may manage the power supplied to the electronic device 801. The power management module 888 may be implemented as at least a portion of a power management integrated circuit (PMIC), for example.

[0114] The battery 889 may supply power to at least one component of the electronic device 801. The battery 889 may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0115] The communication module 890 can support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device 801 and an external electronic device (e.g., electronic device 802, electronic device 804, or server 808), and perform communication via the established communication channel. The communication module 890 may include one or more communication processors that operate independently of the processor 820 (e.g., AP) and support direct (e.g., wired) communication or wireless communication. The communication module 890 may include a wireless communication module 892 (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 894 (e.g., a local area network (LAN) communication module or a power line communication (PLC) module). A corresponding one of these communication modules can communicate via a first network 898 (e.g., a short-range communication network such as Bluetooth TM (BLUETOOTH TM), Wireless Fidelity (Wi-Fi) Direct, or Infrared Data Association (IrDA) standards) or a second network 899 (e.g., a remote communication network such as a cellular network, the Internet, or a computer network (e.g., a LAN or a wide area network (WAN)) to communicate with an external electronic device. These different types of communication modules can be implemented as a single component (e.g., a single IC), or can be implemented as multiple components (e.g., multiple ICs) separated from each other. The wireless communication module 892 can use the subscriber information (e.g., an International Mobile Subscriber Identity (IMSI)) stored in the subscriber identification module 896 to identify and authenticate the electronic device 801 in a communication network such as the first network 898 or the second network 899.

[0116] The antenna module 897 may transmit a signal or power to the outside of the electronic device 801 (e.g., an external electronic device) or receive a signal or power from the outside of the electronic device 801. The antenna module 897 may include one or more antennas, and thus, for example, at least one antenna suitable for a communication scheme used in a communication network such as the first network 898 or the second network 899 may be selected by the communication module 890 (e.g., the wireless communication module 892). Then, a signal or power may be transmitted or received between the communication module 890 and the external electronic device via the selected at least one antenna.

[0117] Commands or data may be sent or received between the electronic device 801 and the external electronic device 804 via a server 808 coupled to the second network 899. Each of the electronic devices 802 and 804 may be a device of the same type or a different type as the electronic device 801. All or some of the operations to be performed on the electronic device 801 may be performed on one or more of the external electronic devices 802, 804 or the server 808. For example, if the electronic device 801 should automatically or in response to a request from a user or another device to perform a function or service, the electronic device 801 may request one or more external electronic devices to perform at least a portion of the function or service instead of performing the function or service, or in addition to performing the function or service. The one or more external electronic devices receiving the request may perform at least a portion of the requested function or service, or an additional function or additional service related to the request, and the result of the execution may be delivered to the electronic device 801. The electronic device 801 may provide the result as at least a portion of the reply to the request with or without further processing of the result. For this purpose, cloud computing, distributed computing or client-server computing technology may be used, for example.

[0118] The subject matter and the embodiments of the operation described in this specification may be implemented in digital electronic circuits, or in computer software, firmware or hardware, including the structures disclosed in this specification and their structural equivalents, or in a combination of one or more of them. The embodiments of the subject matter described in this specification may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, which are encoded on a computer storage medium to be executed by a data processing device or to control the operation of the data processing device. Alternatively or additionally, the program instructions may be encoded on an artificially generated propagation signal, such as a machine-generated electrical, optical or electromagnetic signal, which is generated to encode information for transmission to a suitable receiver device for execution by a data processing device. The computer storage medium may be or be included in a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or a combination thereof. In addition, although the computer storage medium is not a propagation signal, the computer storage medium may be the source or destination of the computer program instructions encoded in the artificially generated propagation signal. The computer storage medium may also be or be included in one or more separate physical components or media (e.g., multiple CDs, disks or other storage devices). Additionally, the operations described in this specification may be implemented as operations performed by a data processing apparatus on data stored on one or more computer-readable storage devices or received from other sources.

[0119] Although this specification may include many specific implementation details, these implementation details should not be interpreted as limiting the scope of any claimed subject matter, but should be interpreted as a description of features specific to a particular embodiment. Certain features described in the context of a separate embodiment in this specification may also be implemented in combination in a single embodiment. On the contrary, the various features described in the context of a single embodiment may also be implemented separately or in any suitable sub-combination in multiple embodiments. In addition, although features may be described above as working in certain combinations, and even initially claimed as such, one or more features from the claimed combination may be deleted from the combination in some cases, and the claimed combination may be directed to a variant of a sub-combination or a sub-combination.

[0120] Similarly, although operations are described in a particular order in the accompanying drawings, this should not be understood as requiring that the operations be performed in the particular order shown or in a sequential order, or that all of the operations shown be performed to obtain the desired results. In some cases, multitasking and parallel processing may be advantageous. In addition, the separation of various system components in the above-described embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0121] Thus, specific embodiments of the subject matter have been described herein. Other embodiments are within the scope of the appended claims. In some cases, the actions set forth in the claims can be performed in a different order and still achieve the desired results. Additionally, the processes depicted in the accompanying drawings do not necessarily require the particular order or sequential order shown to achieve the desired results. In some implementations, multitasking and parallel processing may be advantageous.

[0122] As those skilled in the art will appreciate, the innovative concepts described herein can be modified and varied over a wide range of applications. Therefore, the scope of the claimed subject matter should not be limited to any of the specific exemplary teachings discussed above, but rather is defined by the following claims.

Claims

1. A method for channel estimation include: By a user equipment UE, performing frequency domain FD interpolation on a wideband reference signal RS resource element RE to generate a channel estimate for a corresponding RS symbol; applying, by the UE, a learning-based channel estimate (LCE) to the channel estimate using a neural network NN to generate an accurate channel estimate for the corresponding RS symbol; and By the UE, time domain TD interpolation is performed on the refined channel estimate to generate channel estimates across symbols.

2. The method according to claim 1, in, The broadband RS includes a cell-specific RS CRS.

3. The method according to claim 1, in, The FD interpolation includes FD minimum mean square error FD-MMSE interpolation, and the TD interpolation includes TD-MMSE interpolation.

4. The method according to claim 3, in, Enabling reference signal time interpolation RSTI increases a first number of wideband RS REs provided per symbol and increases a second number of taps used for the FD-MMSE interpolation.

5. The method according to claim 1, in, The LCE is applied to bundles of resource blocks RB using a NN with the same input and output size.

6. The method according to claim 1, in, The NN comprises a multilayer perceptron (MLP) having a hidden layer comprising hidden nodes, wherein an activation function of the hidden layer is a rectified linear unit (ReLU).

7. The method according to claim 1, further comprising: include: transforming the channel estimate to a delay-Doppler domain DD before applying the LCE; and After applying the LCE, the refined channel estimate is transformed to the FD.

8. The method according to claim 1, in, The LCE is applied to bundles of estimated channel samples in a sliding window manner, and the bundles are at least partially overlapping in the FD such that a predetermined number of overlapping subcarriers at one or more edges of each bundle are removed from the LCE processing.

9. The method according to claim 1, further comprising: include: Prior to applying the LCE, converting, by the UE, the channel estimate to a time domain TD or a delay-Doppler domain DD to generate a converted channel estimate, and performing denoising on the converted channel estimate by the UE; and After applying the LCE, the refined channel estimate is converted to the FD.

10. The method according to claim 9, further comprising: Before switching to the TD or DD, the UE performs zero padding on the channel estimate based on a Fast Fourier Transform (FFT) size.

11. The method according to claim 9, in, Performing denoising involves: estimating, by the UE, a noise variance based on an average energy of the converted channel estimate within a predefined noise mask; By the UE, estimating a power delay profile PDP using the estimated noise variance; Determining, by the UE, a per-tap minimum mean square error (MMSE) weight based on an estimated PDP, a predefined PDP mask, and a noise variance threshold; and The per-tap MMSE weights are applied, by the UE, to the transformed channel estimate to generate a de-noised channel estimate.

12. The method according to claim 9, further comprising: include: Prior to converting the channel estimate, infinite impulse response (IIR) filtering is performed on the channel estimate.

13. A method for channel estimation, include: Generating, by a user equipment UE, a channel estimate for a reference signal RS symbol in the frequency domain FD; The UE converts the channel estimate to a time domain TD or a delay Doppler domain DD to generate a converted channel estimate; performing, by the UE, denoising on the converted channel estimate; Applying, by the UE, a learning-based channel estimate (LCE) to the de-noised channel estimate to generate an accurate channel estimate for the RS symbol; converting the refined channel estimate to the FD; and By the UE, TD interpolation is performed on the refined channel estimate to produce a channel estimate across symbols.

14. The method according to claim 13, further comprising: include: Before switching to the TD or DD, the UE performs zero padding on the channel estimate based on a Fast Fourier Transform (FFT) size.

15. The method according to claim 13, in, Performing denoising involves: estimating, by the UE, a noise variance based on an average energy of the converted channel estimate within a predefined noise mask; By the UE, estimating a power delay profile PDP using the estimated noise variance; Determining, by the UE, a per-tap minimum mean square error (MMSE) weight based on an estimated PDP, a predefined PDP mask, and a noise variance threshold; and The per-tap MMSE weights are applied, by the UE, to the transformed channel estimate to generate the de-noised channel estimate.

16. The method according to claim 13, further comprising: include: Prior to transforming the channel estimate, infinite impulse response (IIR) filtering is performed on the channel estimate.

17. A user equipment UE, include: processor; and a non-transitory computer-readable storage medium storing instructions that, when executed, cause the processor to: Performing frequency domain FD interpolation on a wideband reference signal RS resource element RE to generate a channel estimate for a corresponding RS symbol; applying a learning based channel estimate, LCE, to the channel estimate using a neural network NN to generate an accurate channel estimate for the corresponding RS symbol; and Time domain TD interpolation is performed on the refined channel estimate to produce channel estimates across symbols.

18. The UE according to claim 17, in, In applying the LCE, the instructions further cause the processor to apply the LCE to bundles of estimated channel samples in a sliding window manner, and the bundles are at least partially overlapping in the FD, so that a predetermined number of overlapping subcarriers at one or more edges of each bundle are removed from the LCE processing.

19. The UE according to claim 17, in, The instructions further cause the processor to: Before applying the LCE, converting the channel estimate to a time domain TD or a delay-Doppler domain DD to generate a converted channel estimate, and performing denoising on the converted channel estimate; and After applying the LCE, the refined channel estimate is converted to the FD.

20. The UE according to claim 19, in, In performing the denoising, the instructions further cause the processor to: estimating a noise variance based on an average energy of the transformed channel estimates within a predefined noise mask; Using the estimated noise variance to estimate the power delay profile PDP; Determining a per-tap minimum mean square error (MMSE) weight based on the estimated PDP, a predefined PDP mask, and a noise variance threshold; and The per-tap MMSE weights are applied to the transformed channel estimate to generate a de-noised channel estimate.

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