Optical fiber transmission system for high-speed image data

By combining statistical counters and encoding techniques in optical fiber transmission systems, determining the position of line header identifiers and line end identifiers, combining RS encoding and 64B66B encoding, the problem of coding error and low efficiency in high-speed image data transmission is solved, and the stability is achieved Efficient data transmission and optimized storage resource usage.

CN119135934AActive Publication Date: 2024-12-13CHANGCHUN INST OF OPTICS FINE MECHANICS & PHYSICS CHINESE ACAD OF SCI
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Patent Information

Application Number
CN202411462426.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-18
Publication Date
2024-12-13
Estimated Expiration
2044-10-18

AI Technical Summary

Technical Problem

High-speed image data is prone to errors and transmission errors during transmission, especially data loss problems caused by uncertain positions of line header identifiers and line end identifiers, and the existing encoding methods are inefficient and occupy too much storage resources.

Method used

An optical fiber transmission system consisting of detectors, serial-parallel conversion modules, non-uniform correction modules, Reed-Solomon encoders, 64B66B interval adjusters, scramblers and GTX transmitters is determined through statistical counters. The location of the symbol, combined with RS encoding and 64B66B encoding, realizes stable data transmission and optimizes storage resources through first-in-first-out queue cache.

Benefits of technology

It realizes stable and reliable transmission of high-speed image data, improves transmission efficiency, reduces storage resource usage, corrects code errors in real time, and avoids transmission errors caused by high and low levels imbalance.

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Abstract

The invention relates to the field of image data transmission, in particular to a high-speed image data optical fiber transmission system which comprises a detector, a serial-parallel conversion module, a multi-channel data cache memory, a non-uniformity correction module, a Reed-Solomon encoder, a 64B66B interval adjuster, a scrambler, a GTX transmitter and an optical fiber module. According to the count value of the read operation counter, the specific positions of a row head identifier and a row tail identifier are set according to the combination of the detected image data effective indication cycle count signals when the count value of the read operation counter is 0, and meanwhile, the positions of the rising edge and the falling edge of an FIFO read stage enable signal are set; and except the specific positions for setting the row head identifier and the row tail identifier, the rest positions are set as data read by the FIFO when the read enable delay signal of the FIFO is at a high level, and the rest positions are set as synchronous codes. According to the invention, stable and reliable transmission of high-speed image data under various relative phase relationships can be ensured.
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Description

Technical Field

[0001] The invention relates to the technical field of image data transmission, and in particular to an optical fiber transmission system for high-speed image data based on space applications. Background Art

[0002] For the transmission of high-speed image data, if the peak data rate reaches 16Gbps, if 2711 transmission with a reference clock of 100MHz is used, 10 2711 channels need to be used for simultaneous transmission, while only 2 channels are needed if an optical fiber with a transmission rate of 10Gbps is used. To improve the transmission efficiency, the use of 64B66B encoding can effectively improve the efficiency of data transmission compared to 8B10B encoding. High-speed image data is prone to bit errors during transmission. To improve the reliability of image data transmission, RS (Reed-Solomon) encoding is required before 64B66B encoding, and the correctness of image data transmission is verified through redundant error correction codes, and possible bit errors in image data transmission are corrected. RS encoding, 64 / 66 encoding and scrambler require precise timing coordination. The effective signal of the image data sent to the scrambler needs to maintain a constant duty cycle, and the counting signal sent to the GTX module needs to change continuously without blanking or fixed numbers, otherwise transmission errors may occur or too many storage resources may be occupied.

[0003] like Figure 1 As shown in the figure, conventional high-speed image data is usually transmitted in units of lines. It is necessary to add a line header identifier before the first valid data in each line and a line end identifier after the last valid data. The valid data is represented by a high level. The line header identifier and the line end identifier are not RS encoded, so the line header identifier and the line end identifier can only be added in the stage after RS ​​encoding. In addition, Figure 2a-2e As shown, although the line head identifier and the line end identifier are not image data and will not be indicated by the image data valid indication signal like the image data, they need to maintain a high level in the scramble code valid level indication stage. In other words, the duty cycle of the scrambler data valid indication signal is constant, the synchronization code can appear in the high level and low level stages of the scrambler data valid indication signal, and the valid image data, line head identifier and line end identifier must appear at the high level of the scrambler data valid indication signal.

[0004] For imaging applications, the line cycle length of each line changes at any time. Therefore, the count value of the scrambler data valid indication counter corresponding to the starting position of each line may be different, which may cause the position where the line head identifier and the line end identifier are set to correspond to the low level of the scrambler data valid indication signal. In addition, the first or last valid data read may correspond to the low level of the scrambler data valid indication signal. These states will cause errors in the transmission of high-speed image data, such as loss of the line head, loss of the line end, or loss of the first or last valid data. Summary of the invention

[0005] In view of the above technical problems, the present invention aims to provide a high-speed optical fiber transmission system for image data. To solve the above technical problems, the present invention adopts the following technical solutions: The present invention provides a high-speed image data optical fiber transmission system, comprising a detector, a serial-to-parallel conversion module, a multi-channel data cache memory, a non-uniform correction module, a Reed-Solomon encoder, a 64B66B interval adjuster, a scrambler, a GTX transmitter, and an optical fiber module. The high-speed serial image data output by the detector is converted into 64-bit parallel image data by the serial-to-parallel conversion module, and is simultaneously written into the multi-channel data cache memory in parallel, and the image data is read out channel by channel, and sent to the non-uniform correction module for non-uniform correction. The image data after the non-uniform correction is sent to the Reed-Solomon encoder for encoding. The encoded image data is sent to the 64B66B interval adjuster to output the image data before scrambling; the image data before scrambling and a scrambler data valid indication signal are simultaneously sent to the scrambler to output the scrambled image data; the scrambled image data, the image data valid indication signal, and the image data valid indication cycle count signal are jointly sent to the GTX transmitter, and the high-speed serial differential data output by the GTX transmitter is sent to the optical fiber module to output a modulated signal; The read operation of the 64B66B interval adjuster is realized by using a read operation counter. When the count value of the read operation counter is 0, the detected image data indicates that the cycle count signal has 33 combination states, that is, the count value is 0 to 32, and the effective data length of a row output is p more than an integer multiple of 32, where p is an integer less than 32. There are four working modes in the 33 combination states: The first working mode: the row header identifier and the valid data are transmitted in different 32 combination states, the row header identifier is set in the current set of count values, the valid data is set in the next set of count values, the position of the row header identifier alone in the current set of count values ​​is one count value position ahead of the position of the row header identifier and the valid data in the same set of count values; the rising edge position of the corresponding read phase enable signal when the row header identifier is alone in the current set of count values ​​is one count value position ahead of the rising edge position of the corresponding read phase enable signal when the row header identifier and the valid data are in the same set of count values; The second working mode: the row head identifier and the valid data are transmitted in different 31-p combination states, the position of the row head identifier lags one position compared with the position of the row head identifier in the first working mode; the rising edge position of the read phase enable signal lags one position compared with the rising edge position of the read phase enable signal in the first working mode; The third working mode: the end-of-line identifier and valid data are transmitted in different 32 combination states, the valid data is set in the current set of count values, the end-of-line identifier is set in the next set of count values, and the position of the end-of-line identifier in the next set of count values ​​lags behind the position of the end-of-line identifier and valid data in the same set of count values ​​by 1 count value; The fourth working mode: the end-of-row identifier and the valid data are transmitted in different P combination states, and the falling edge position of the read phase enable signal corresponds to the end position of the read operation of the last valid data.

[0006] Furthermore, the number of Reed-Solomon encoders is eight, and the 64-bit parallel image data is divided into eight groups and sent to eight Reed-Solomon encoders for encoding. The number of valid image data continuously written by each Reed-Solomon encoder each time is m. If a row of valid image data is less than m, redundant data is added to make up an integer multiple of m, and finally k groups of encoded data groups containing n image data are formed; the minimum number of clocks between two adjacent continuous write operations of each Reed-Solomon encoder is 2 (nm) + 1.

[0007] Furthermore, the 64B66B interval adjuster is implemented using a first-in-first-out queue, and the read and write clocks of the first-in-first-out queue use the data synchronization clock returned by the GTX transmitter; the write enable of the first-in-first-out queue is the data valid signal output by the Reed-Solomon encoder; the read operation of the first-in-first-out queue is started by detecting the falling edge position of the empty state flag signal of the first-in-first-out queue, and the falling edge of the empty state flag signal is used to reset the read operation counter; the read enable operation of the first-in-first-out queue is started by the two clock cycle advance signal of the scrambler data valid indication signal and the result of the AND operation of the read phase enable signal.

[0008] Furthermore, the minimum capacity of the FIFO queue cache is 33mk / 32-2n+m-1.

[0009] Furthermore, in the first working mode, the row header identifier is set at the 31st count value of the current group of count values, and the 32 valid data following the row header identifier are set at the 0th to 31st count values ​​of the next group of count values.

[0010] Furthermore, in the third working mode, 32 valid data are set at the positions of the 0th to 31st count values ​​of the current group of count values, and the end-of-line identifier behind the 32 valid data is set at the position of the 0th count value of the next group of count values.

[0011] Compared with the prior art, the present invention can achieve the following beneficial effects: (1) By counting the valid image data transmitted in a line, the number of remainders outside the complete number of groups transmitted is calculated, and then the corresponding line head identifier and line end identifier setting positions are determined according to the relative starting phase relationship between the counter of each line read operation and the scrambler data valid indication counter, including the rising and falling edge positions of the FIFO read phase enable signal, thereby ensuring that high-speed image data can be transmitted stably and reliably under various relative phase relationships; by determining the counting range that needs to be adjusted through statistics, a maximum of four working modes are formed, which can reduce the testing workload and improve work efficiency.

[0012] (2) By using the RS coding function, it is possible to detect in real time whether there are errors in the image data transmission process, and at the same time correct the bit errors in the image data transmission process; by using the scrambling function combined with 64B66B coding, the transmission efficiency of effective image data can be improved compared with 8B10B coding, while avoiding transmission errors caused by imbalance of high and low levels in image data transmission; by synchronously detecting the ready state flag signals of 8 Reed-Solomon encoders, it is ensured that 8 groups of 8-bit parallel data are operated synchronously.

[0013] (3) Using a first-in-first-out queue to cache RS-encoded data and pre-scrambled data with different duty cycles requires less storage resources to overcome the difference in duty cycles of the two compared to using RAM resources to cache the entire row of data.

[0014] (4) Ping-pong caching of high-speed image data and intermittent reading of RS-encoded data are performed through a large-capacity RAM, and RS-encoded intermittent data and 64B66B-encoded intermittent data are cached through a small-capacity FIFO. Data can be read out continuously and with low resource utilization while satisfying the transmission protocol. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a schematic diagram of conventional image data transmission forms in the prior art; Figure 2a-2e This is a schematic diagram of the optical fiber image data transmission form based on 64B66B encoding in the prior art; wherein, Figure 2a It shows that the line head identifier and the line end identifier (simplified as line head and line end in the figure) and the valid image data (simplified as valid data in the figure) are transmitted in 32 different combination states; Figure 2bIt is shown that the end-of-line identifier and the valid data are transmitted in the same 32 combinations, with a total length of 32 count positions; Figure 2c It is shown that the end-of-line identifier and valid data are transmitted in the same 32 combinations, with a total length of less than 32 count positions; Figure 2d It shows that the line header identifier and valid data are transmitted in the same 32 combinations, with a total length of 32 count positions; Figure 2e It shows that the line header identifier and valid data are transmitted in the same 32 combinations, with a total length of less than 32 count positions; Figure 3 Schematic diagram of the structure of a high-speed optical fiber transmission system for image data provided according to an embodiment of the present invention.

[0016] Explanation of the reference numerals: detector 1, serial-to-parallel conversion module 2, multi-channel data cache memory 3, non-uniform correction module 4, Reed-Solomon encoder 5, 64B66B interval adjuster 6, scrambler 7, GTX transmitter 8, optical fiber module 9. DETAILED DESCRIPTION

[0017] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the following description, the same modules are represented by the same reference numerals. In the case of the same reference numerals, their names and functions are also the same. Therefore, the detailed description thereof will not be repeated.

[0018] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and do not constitute a limitation of the present invention.

[0019] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments.

[0020] like Figure 3As shown, an embodiment of the present invention provides a high-speed image data optical fiber transmission system, comprising a detector 1, a serial-to-parallel conversion module 2, a multi-channel data cache memory 3, a non-uniform correction module 4, a Reed-Solomon encoder 5, a 64B66B interval adjuster 6, a scrambler 7, a GTX transmitter 8 and an optical fiber module 9; wherein the high-speed serial image data output by the detector 1 is converted into 64-bit parallel image data by the serial-to-parallel conversion module 2, and the 64-bit parallel image data is written in parallel to the multi-channel data cache memory 3. At the moment when the parallel write operation ends, the image data is read out channel by channel from the multi-channel data cache memory 3, and the read out The image data is sent to the non-uniform correction module 4 for non-uniform correction, and the image data after the non-uniform correction is sent to the Reed-Solomon encoder 5 for encoding. The encoded image data is output after passing through the 64B66B interval adjuster 6, and the image data before scrambling is output; the image data before scrambling and the scrambler data valid indication signal are sent to the scrambler 7 at the same time, and the scrambler 7 outputs the scrambled image data. The scrambled image data, the image data valid indication signal, and the image data valid indication cycle count signal are sent to the GTX transmitter 8 together, and the high-speed serial differential data output by the GTX transmitter 8 is sent to the optical fiber module 9, and the optical fiber module 9 outputs the modulated laser signal.

[0021] There are eight Reed-Solomon encoders 5 (one is shown in the figure), and the 64-bit parallel image data is divided into eight groups and sent to eight Reed-Solomon encoders respectively. The write enable operation of the Reed-Solomon encoder is intermittent, that is, when it is detected that the ready state flag signals of the eight Reed-Solomon encoders 5 are all valid and the image data of the row has not been completed, the image data input continues, and when it is detected that the ready flag signal is invalid or the image data of the row has been completed, the image data input is stopped; for the (m,n) Reed-Solomon encoder such as (129,133), the number of valid image data written continuously each time is m. If the number of valid image data in a row is less than m, redundant data must be added to make it an integer multiple of m, and finally k groups of encoded data groups containing n data are formed; the minimum number of clocks between two adjacent continuous write operations of each Reed-Solomon encoder is 2 (nm) + 1.

[0022] The function of the 64B66B interval adjuster 6 is to realize the caching of RS-encoded intermittent data and 64B66B-encoded intermittent data with different effective image data transmission ratios. The 64B66B interval adjuster 6 is realized by a small-capacity FIFO (First Input First Output). The read and write clocks of the FIFO are both based on the data synchronization clock returned by the GTX transmitter; the write enable of the FIFO is the data valid signal output by the Reed-Solomon encoder; the read operation of the 64B66B interval adjuster 6 is realized by a read operation counter, and the read operation of the FIFO is started by detecting the falling edge position of the empty state flag signal of the FIFO, and the falling edge of the empty state flag signal is used to reset the read operation counter, and then count up. When the count reaches the end of the image data reading of the row, the read operation counter stops counting; the read enable operation of the FIFO is started by the two clock cycle advance signal of the scrambler data valid indication signal and the AND operation result of the read phase enable signal.

[0023] The minimum capacity of the FIFO buffer is 33mk / 32-2n+m-1.

[0024] The head of line identifier, the end of line identifier and the synchronization code are added in the FIFO read phase. The specific positions of the head of line identifier and the end of line identifier are set according to the count value of the read operation counter and the combination of the image data valid indication cycle count signal detected when the count value of the read operation counter is 0, and the rising edge and falling edge positions of the FIFO read phase enable signal are set at the same time. In addition to setting the specific positions of the head of line identifier and the end of line identifier, when the FIFO read enable delay signal (which is in a delayed relationship with the read phase enable signal, the two are of the same source but different in phase) is high, it is set to the data read out by the FIFO, and the remaining positions (the positions remaining after removing the positions of the read image data) are set to the synchronization code.

[0025] When the count value of the read operation counter is 0, the detected image data valid indication cycle count signal has 33 combination states, that is, the count value is 0 to 32, and the length of the valid data output in one row is p more than an integer multiple of 32 (p is an integer less than 32 and the value may be 0), and there are four working modes in the 33 combination states.

[0026] The first working mode: the row header identifier and valid data are transmitted in different 32 combination states, the row header identifier is set in the current set of count values, and the valid data is set in the next set of count values. The position of the row header identifier alone in the current set of count values ​​is one count value position ahead of the position of the row header identifier and the valid data in the same set of count values; the rising edge position of the corresponding read phase enable signal when the row header identifier is alone in the current set of count values ​​is one count value position ahead of the rising edge position of the corresponding read phase enable signal when the row header identifier and the valid data are in the same set of count values.

[0027] It should be noted that the count value of the read operation counter changes cyclically from 0 to 32, that is, it changes in a regular pattern of 0, 1, 2, 3, 4, 5, ... 30, 31, 32, 0, 1, 2 ... Among the 33 count values ​​of 0 to 32, valid data can be transmitted only in the 32 count positions of 0 to 31, while the 32nd count position cannot transmit valid data. This count position will be considered as invalid data by the scrambler and ignored. In the present invention, in order to facilitate the distinction between invalid data and valid data, synchronization codes are placed at the positions of invalid data. The row header identifier and valid data can only be distributed in the 32 count positions of 0 to 31, so there are 32 combination states between the row header identifier and the valid data.

[0028] The row header identifier is set in the current set of count values, and the valid data is set in the next set of count values. In fact, the row header identifier is set at the 31st count value of the current set of count values, and the 32 valid data after the row header identifier are set at the 0th to 31st count values ​​of the next set of count values.

[0029] The second working mode: the row head identifier and valid data are transmitted in different 31-p combination states, and the position of the row head identifier lags behind by one position compared to the position of the row head identifier in the first working mode; the rising edge position of the read phase enable signal lags behind by one position compared to the rising edge position of the read phase enable signal in the first working mode.

[0030] The third working mode: the end-of-line identifier and valid data are transmitted in different 32 combination states, the valid data is set in the current set of count values, the end-of-line identifier is set in the next set of count values, and the position of the end-of-line identifier in the next set of count values ​​lags behind the position of the end-of-line identifier and valid data in the same set of count values ​​by 1 count value position.

[0031] The valid data is set in the count value of the current group, and the end-of-line identifier is set in the count value of the next group. Actually, 32 valid data are set at the positions of the 0th to 31st count values ​​of the current group of count values, and the end-of-line identifier after the 32 valid data is set at the position of the 0th count value of the next group of count values.

[0032] The fourth working mode: the end-of-row identifier and the valid data are transmitted in different P combination states, and the falling edge position of the read phase enable signal corresponds to the end position of the read operation of the last valid data.

[0033] Compared with the first three working modes (an incomplete group of valid data is distributed in two different groups of count values), the falling edge position of the read phase enable signal in the fourth working mode (an incomplete group of valid data is distributed in the same group of count values) lags behind the falling edge position of the read phase enable signal in the first three working modes by one count position, and the position of the end-of-row identifier is the same as that in the third working mode.

[0034] The position of the end-of-row identifier and the falling edge position of the read phase enable signal not mentioned in the first working mode and the second working mode remain unchanged, and the position of the head-of-row identifier and the rising edge position of the read phase enable signal not mentioned in the third working mode and the fourth working mode remain unchanged.

[0035] The operation embodiment of Table 1 is 33 combinations when the length of valid data outputted in each row is 8 more than an integer multiple of 32.

[0036] Table 1 Operation Example

[0037] In Table 1, the position of the row head identifier assignment, the position of the row end identifier assignment, the rising edge position of the read phase enable signal, and the falling edge position of the read phase enable signal are expressed in decimal.

[0038] The present invention calculates the number of remainders outside the complete number of groups transmitted by counting the effective image data transmitted in a row, and then determines the corresponding row head identifier and row end identifier setting positions, including the rising edge and falling edge positions of the FIFO read phase enable signal, according to the relative starting phase relationship between the counter of each row read operation and the scrambler data effective indication counter, so as to ensure that high-speed image data can be stably and reliably transmitted under various relative phase relationships; the counting range that needs to be adjusted is determined by statistics to form up to four working modes, which can reduce the testing workload and improve work efficiency.

[0039] The present invention can detect whether there is an error in the image data transmission process in real time by using the RS encoding function, and can correct the bit errors in the image data transmission process; by using the scrambling function combined with 64B66B encoding, the transmission efficiency of effective image data can be improved compared with 8B10B encoding, and the transmission errors caused by the imbalance of high and low levels in the image data transmission can be avoided; by synchronous detection of the ready state flag signals of 8 Reed-Solomon encoders, it is ensured that 8 groups of 8-bit parallel data are operated synchronously.

[0040] The present invention uses a first-in-first-out queue to cache RS coded data and pre-scrambling data with different duty cycles. Compared with using RAM resources to cache the entire row of data, only fewer storage resources are needed to overcome the difference in duty cycles between the two.

[0041] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the disclosure of the present invention can be performed in parallel, sequentially or in different orders, as long as the desired results of the technical solution disclosed in the present invention can be achieved, and this document does not limit this.

[0042] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A high-speed optical fiber transmission system for image data, characterized in that: It includes a detector, a serial-to-parallel conversion module, a multi-channel data cache memory, a non-uniform correction module, a Reed-Solomon encoder, a 64B66B interval adjuster, a scrambler, a GTX transmitter, and an optical fiber module. The high-speed serial image data output by the detector is converted into 64-bit parallel image data by the serial-to-parallel conversion module, and is simultaneously written into the multi-channel data cache memory in parallel, and the image data is read out channel by channel, and sent to the non-uniform correction module for non-uniform correction. The image data after non-uniform correction is sent to the Reed-Solomon encoder for encoding. The encoded image data is output after the 64B66B interval adjuster, and the image data before scrambling is output; the image data before scrambling and the scrambler data valid indication signal are simultaneously sent to the scrambler, and the scrambled image data is output; the scrambled image data, the image data valid indication signal, and the image data valid indication cycle count signal are jointly sent to the GTX transmitter, and the high-speed serial differential data output by the GTX transmitter is sent to the optical fiber module, and a modulated signal is output; The read operation of the 64B66B interval adjuster is realized by using a read operation counter. When the count value of the read operation counter is 0, the detected image data indicates that the cycle count signal has 33 combination states, that is, the count value is 0 to 32, and the effective data length of a row output is p more than an integer multiple of 32, where p is an integer less than 32. There are four working modes in the 33 combination states: The first working mode: the line header identifier and valid data are transmitted in different 32 combination states, the line header identifier is set in the current set of count values, and the valid data is set in the next set of count values. The position of the line header identifier alone in the current set of count values ​​is one count value ahead of the position of the line header identifier and valid data in the same set of count values. When the row head identifier is alone in the current set of count values, the rising edge position of the read phase enable signal corresponding to the row head identifier is one count value position earlier than the rising edge position of the read phase enable signal corresponding to the row head identifier and the valid data in the same set of count values; The second working mode: the row head identifier and the valid data are transmitted in different 31-p combination states, the position of the row head identifier lags one position compared with the position of the row head identifier in the first working mode; the rising edge position of the read phase enable signal lags one position compared with the rising edge position of the read phase enable signal in the first working mode; The third working mode: the end-of-line identifier and valid data are transmitted in different 32 combination states, the valid data is set in the current set of count values, the end-of-line identifier is set in the next set of count values, and the position of the end-of-line identifier in the next set of count values ​​lags behind the position of the end-of-line identifier and valid data in the same set of count values ​​by 1 count value; The fourth working mode: the end-of-row identifier and the valid data are transmitted in different P combination states, and the falling edge position of the read phase enable signal corresponds to the end position of the read operation of the last valid data.

2. The optical fiber transmission system for high-speed image data according to claim 1, characterized in that: There are eight Reed-Solomon encoders. The 64-bit parallel image data is divided into eight groups and sent to eight Reed-Solomon encoders for encoding. The number of valid image data written continuously by each Reed-Solomon encoder is m. If a row of valid image data is less than m, redundant data is added to make it an integer multiple of m, and finally k groups of encoded data groups containing n image data are formed; the minimum number of clocks between two adjacent continuous write operations of each Reed-Solomon encoder is 2 (nm) + 1.

3. The optical fiber transmission system for high-speed image data according to claim 2, characterized in that: The 64B66B interval adjuster is implemented using a first-in-first-out queue, and the read and write clocks of the first-in-first-out queue use the data synchronization clock returned by the GTX transmitter; the write enable of the first-in-first-out queue is the data valid signal output by the Reed-Solomon encoder; the read operation of the first-in-first-out queue is started by detecting the falling edge position of the empty state flag signal of the first-in-first-out queue, and the falling edge of the empty state flag signal is used to reset the read operation counter; the read enable operation of the first-in-first-out queue is started by the two clock cycle advance signal of the scrambler data valid indication signal and the result of the AND operation of the read phase enable signal.

4. The optical fiber transmission system for high-speed image data according to claim 3, characterized in that: The minimum capacity of the FIFO queue cache is 33mk / 32-2n+m-1.

5. The optical fiber transmission system for high-speed image data according to claim 1, characterized in that: In the first working mode, the row header identifier is set at the 31st count value of the current group of count values, and the 32 valid data following the row header identifier are set at the 0th to 31st count values ​​of the next group of count values.

6. The optical fiber transmission system for high-speed image data according to claim 1, characterized in that: In the third working mode, 32 valid data are set at the positions of the 0th to 31st count values ​​of the current group of count values, and the end-of-line identifier behind the 32 valid data is set at the position of the 0th count value of the next group of count values.

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