Surge Current Generation Device, Surge Evaluation System and Evaluation Method for Power Devices

Abstract

The present application provides a surge current generating device, a surge evaluation system and an evaluation method for a power device. The device includes: an IGBT module; a first driving module electrically connected to the gate and the emitter of the IGBT module respectively, and configured to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, so that the IGBT module outputs a surge current in the conducting state, and the preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a sine half-wave waveform; a charge and discharge module electrically connected to the collector of the IGBT module, and configured to supply power to the collector of the IGBT module; a surge current output terminal electrically connected to the emitter of the IGBT module, and configured to perform a surge current test on the power device when electrically connected to the power device. The present application can controllably generate a surge current with a waveform similar to a sine half-wave, and the amplitude and pulse duration are adjustable, so that the test results can be more in line with the actual operating conditions, and accurate surge evaluation of MOSFET devices is achieved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and more particularly, to a surge current generating device, a surge evaluation system for a power device, a surge evaluation method for a power device, a computer-readable storage medium, and an electronic device. Background Art

[0002] The main limiting factor of MOSFET devices is their reliability. The reliability of the devices directly affects the reliable and stable operation of the system. Once the devices degrade or fail, it may cause the safe operation of converters or other components, or even lead to major safety problems. Therefore, it is necessary to explore the degradation characteristics and failure characteristics of MOSFET devices under different working conditions.

[0003] In practical converter applications, MOSFET devices may be subjected to one or more surges of surge current. Lightning pulses or power switches may cause the generation of surge current. In electronic design, a surge mainly refers to a powerful pulse that may be higher than the power supply itself at the moment when the power supply is just turned on; it also refers to the interference of sharp pulses from the power supply itself or other parts of the circuit. The circuit is likely to be burned out in an instant by the surge, resulting in the breakdown of the PN junction capacitance, the burnout of the resistor, etc. Surge current can be well observed in AC inductive loads such as transformers and motors. The amplitude of its surge current is usually twenty or thirty times the nominal value, and the duration level can cover microseconds to milliseconds. At present, the commonly used test waveform is a 10ms sine current half-wave, but its waveform form and duration scale do not conform to the actual working conditions.

[0004] Therefore, how to achieve accurate surge evaluation of MOSFET devices is a technical problem that needs to be solved urgently at present. Summary of the Invention

[0005] The main objective of the present application is to provide a surge current generating device, a surge evaluation system for a power device, a surge evaluation method for a power device, a computer-readable storage medium, and an electronic device, so as to at least solve the problem that it is difficult to achieve accurate surge evaluation of MOSFET devices in the prior art.

[0006] To achieve the above object, according to one aspect of the present application, there is provided a surge current generating device, including: an IGBT module; a first driving module electrically connected to the gate and the emitter of the IGBT module respectively, for providing a driving voltage signal with preset waveform parameters to the gate of the IGBT module, so that the IGBT module outputs a surge current in the conducting state, wherein the preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a sine half-wave waveform; a charge and discharge module electrically connected to the collector of the IGBT module, for supplying power to the collector of the IGBT module; a surge current output terminal electrically connected to the emitter of the IGBT module, for performing a surge current test on the power device when electrically connected to the power device.

[0007] Optionally, the first driving module includes: a waveform generating circuit for generating a voltage signal with a sine half-wave waveform; a control circuit, the input end of the control circuit receives a control signal, and the output end of the control circuit is electrically connected to the waveform generating circuit, for adjusting the waveform generating circuit according to the control signal, so that the voltage signal output by the waveform generating circuit has the preset waveform parameters.

[0008] Optionally, the first driving module further includes: an isolation and amplification circuit electrically connected to the output end of the waveform generating circuit and the gate of the IGBT module respectively, for amplifying the driving voltage signal.

[0009] Optionally, the charge and discharge module includes: a voltage source; a capacitor module connected in parallel with the voltage source, and one end of the capacitor module is electrically connected to the collector of the IGBT module, and the other end is grounded; a switch module electrically connected to the voltage source and the capacitor module respectively, for switching the charging and discharging of the capacitor module; a first control module electrically connected to the switch module, for controlling the opening and closing of the switch module to control the charging and discharging of the capacitor module.

[0010] To achieve the above object, according to one aspect of the present application, there is provided a surge evaluation system for a power device, including the surge current generating device, the power device and a second driving module, wherein: the second driving module is electrically connected to the power device, for controlling the conduction and cut-off of the power device or the parasitic diode in the power device; the emitter of the IGBT module in the surge current generating device is electrically connected to the power device.

[0011] Optionally, the surge evaluation system further includes a surge current input terminal, and there are multiple power devices, where: at least one of the power devices is an NMOS device, and the surge current input terminal is electrically connected to the source electrode of each power device; at least one of the power devices is a PMOS device, and the surge current input terminal is electrically connected to the drain electrode of each power device.

[0012] Optionally, the surge evaluation system further has a test circuit board, on which there is the surge current input terminal, the surge current input terminal is electrically connected to the emitter of the IGBT module, and multiple power devices are electrically connected to the surge current input terminal through transmission lines on the test circuit board.

[0013] According to another aspect of the present application, a method for evaluating the surge of a power device is provided. The surge evaluation system of the power device is used, and the surge evaluation system includes a surge current generating device, a power device, and a second driving module. The method includes: controlling the charge and discharge module in the surge current generating device to supply power to the collector of the IGBT module; controlling the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and controlling the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs a surge current to the power device.

[0014] Optionally, the controlling the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module includes: receiving a target instruction, where the target instruction has waveform parameters of a target surge current; determining, according to the target instruction and a preset relationship, waveform parameters of a target sine half-wave voltage corresponding to the waveform parameters of the target surge current, where the preset relationship is used to represent the corresponding relationship between the waveform parameters of the surge current and the waveform parameters of the sine half-wave voltage; controlling the first driving module in the surge current generating device to provide the target sine half-wave voltage to the gate of the IGBT module, so that the IGBT module outputs the target surge current.

[0015] Optionally, the surge evaluation method further includes: establishing a preset database according to a plurality of first waveform parameters and a plurality of second waveform parameters, where the plurality of first waveform parameters are waveform parameters of a plurality of sinusoidal half-wave voltages, and the second waveform parameters are waveform parameters of the output current of the IGBT module with the sinusoidal half-wave voltage input thereto. Determining the waveform parameters of the target sinusoidal half-wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and the preset relationship includes: determining the waveform parameters of the target sinusoidal half-wave voltage from the waveform parameters of the plurality of sinusoidal half-wave voltages according to the target instruction and the preset database.

[0016] According to another aspect of the present application, there is provided a surge evaluation device for a power device, adopting the surge evaluation system for a power device. The surge evaluation system includes a surge current generating device, a power device, and a second driving module. The device includes: a first control module for controlling the charge and discharge module in the surge current generating device to supply power to the collector of the IGBT module; a second control module for controlling the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and controlling the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and a surge current is output to the power device.

[0017] According to another aspect of the present application, there is provided a computer-readable storage medium, which includes a stored program. When the program runs, it controls the device where the computer-readable storage medium is located to execute the surge evaluation method for a power device.

[0018] According to another aspect of the present application, there is also provided an electronic device, including: one or more processors, a memory, and one or more programs, where the one or more programs are stored in the memory and are configured to be executed by the one or more processors. The one or more programs include those for executing the surge evaluation method for a power device.

[0019] Applying the technical solution of the present application, a surge current generating device is provided. Since the first driving module is electrically connected to the gate and the emitter of the IGBT module respectively, it can provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module. The preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a sine half-wave waveform, so that the IGBT module outputs a surge current with a quasi-sine half-wave waveform in the conducting state. Thus, when the charge-discharge module supplies power to the collector of the IGBT module, by electrically connecting the surge current output terminal electrically connected to the emitter of the IGBT module to the power device to be tested, the surge current generated by the emitter of the IGBT module can be used to perform a surge current test on the above-mentioned power device. Therefore, by using the above-mentioned surge current generating device of the present application, the waveform parameters of the driving voltage of the IGBT module, such as the amplitude and period of the driving voltage, can be pre-adjusted, and by using the transfer characteristic curve, a surge current with adjustable amplitude and adjustable pulse duration can be controllably generated, so that the test result can more conform to the operation of the actual working conditions, realizing an accurate surge assessment of the MOSFET device; and, when in the continuous generation mode, the above-mentioned surge current generating device is also convenient for automatic counting and has the characteristics of strong flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings forming a part of this application are used to provide a further understanding of the present application. The schematic embodiments and descriptions thereof of the present application are used to explain the present application and do not constitute an improper limitation to the present application. In the drawings:

[0021] Figure 1 shows a structural block diagram of a surge current generating device provided according to an embodiment of the present application;

[0022] Figure 2 shows a structural schematic diagram of a surge current generating device provided according to an embodiment of the present application;

[0023] Figure 3 shows a circuit structural schematic diagram of a surge current generating device electrically connected to a power device provided according to an embodiment of the present application;

[0024] Figure 4 shows Figure 2 a schematic diagram of the charging process of the circuit structure therein;

[0025] Figure 5 shows Figure 2 a schematic diagram of the discharging process of the circuit structure therein;

[0026] Figure 6 shows Figure 2 a schematic diagram of the surge current generation process of the circuit structure therein;

[0027] Figure 7The block diagram of a surge evaluation system for a power device provided according to an embodiment of the present application is shown;

[0028] Figure 8 The schematic diagram of a surge evaluation system for a power device provided according to an embodiment of the present application is shown;

[0029] Figure 9 The hardware block diagram of a mobile terminal for performing a surge evaluation method for a power device provided according to an embodiment of the present application is shown;

[0030] Figure 10 The flowchart of a surge evaluation method for a power device provided according to an embodiment of the present application is shown;

[0031] Figure 11 The schematic diagram of the relationship between a pulse current waveform and a sinusoidal half-wave voltage waveform in a surge evaluation method for a power device provided according to an embodiment of the present application is shown;

[0032] Figure 12 The block diagram of a surge evaluation device for a power device provided according to an embodiment of the present application is shown.

[0033] Among them, the above-mentioned drawings include the following reference numerals:

[0034] 10, IGBT module; 11, drive input control terminal; 20, first drive module; 21, waveform generation circuit; 22, isolation and amplification circuit; 30, charge and discharge module; 31, voltage source; 32, capacitor module; 301, first switch component; 302, second switch component; 303, third switch component; 331, first drive signal control terminal; 332, second drive signal control terminal; 333, third drive signal control terminal; 34, charging resistor; 35, discharging resistor; 40, surge current output terminal; 50, second drive module; 70, surge current input terminal; 80, grounding terminal; 100, surge current generating device; 200, power device; 201, first power device; 202, second power device; 203, third power device; 204, fourth power device; 102, processor; 104, memory; 106, transmission device; 108, input / output device; 300, first control module; 400, second control module. Detailed implementation manners

[0035] It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments may be combined with each other. The present application will be described in detail below with reference to the drawings and in combination with the embodiments.

[0036] To enable those skilled in the art to better understand the solution of this application, the following will clearly and completely describe the technical solution in the embodiments of this application in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of this application.

[0037] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so as to describe the embodiments of this application here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0038] As introduced in the background art, in the prior art, a MOSFET device may be subjected to surge current impacts, either once or multiple times. Lightning pulses or power switches may both cause the generation of surge current. Surge current can be well observed in AC inductive loads such as transformers and motors, but its waveform form and duration scale are not able to closely approximate the actual working conditions. To solve the problem in the prior art that it is difficult to accurately evaluate the surge of MOSFET devices, the embodiments of this application provide a surge current generating device, a surge evaluation system for power devices, its surge evaluation method, a computer-readable storage medium, and an electronic device.

[0039] The following will clearly and completely describe the technical solution in the embodiments of this invention in conjunction with the accompanying drawings in the embodiments of this invention.

[0040] To achieve the above object, according to an embodiment of this application, a surge current generating device is provided, as Figure 1As shown, it includes an IGBT module 10, a first drive module 20, a charge and discharge module 30, and a surge current output terminal 40, where: The first drive module 20 is electrically connected to the gate and emitter of the IGBT module 10 respectively, and is used to provide a drive voltage signal with preset waveform parameters to the gate of the IGBT module 10, so that the IGBT module 10 outputs a surge current in the conducting state, where the preset waveform parameters are used to characterize that the waveform of the drive voltage signal is a sine half-wave waveform; The charge and discharge module 30 is electrically connected to the collector of the IGBT module 10 and is used to supply power to the collector of the IGBT module 10; The surge current output terminal 40 is electrically connected to the emitter of the IGBT module 10 and is used to perform a surge current test on the power device when electrically connected to the power device.

[0041] In the above embodiment of the present application, since the first drive module 20 is electrically connected to the gate and emitter of the IGBT module 10 respectively, it can provide a drive voltage signal with preset waveform parameters to the gate of the IGBT module 10, so that the IGBT module 10 outputs a surge current in the conducting state. Thus, when the charge and discharge module 30 supplies power to the collector of the IGBT module 10, by electrically connecting the surge current output terminal 40 electrically connected to the emitter of the IGBT module 10 to the power device to be tested, the surge current generated by the emitter of the IGBT module 10 can be used to perform a surge current test on the above power device.

[0042] Therefore, by using the above surge current generating device of the present application, the waveform parameters of the drive voltage of the IGBT module, such as the amplitude and period of the drive voltage, can be pre-adjusted, and by using the transfer characteristic curve, a surge current with a quasi-sine half-wave waveform can be controllably generated, and the amplitude and pulse duration of the surge current waveform are adjustable, so that the test results can more conform to the actual operating conditions, realizing an accurate surge assessment of the MOSFET device; and when in the continuous generation mode, the above surge current generating device is also convenient for automatic counting and has the characteristics of strong flexibility.

[0043] In some optional embodiments, the first drive module includes a waveform generating circuit 21 and a control circuit (not shown in the figure). The waveform generating circuit is used to generate a voltage signal with a sine half-wave waveform. The input end of the control circuit receives a control signal, and the output end is electrically connected to the waveform generating circuit, and is used to adjust the waveform generating circuit according to the control signal so that the voltage signal output by the waveform generating circuit has preset waveform parameters.

[0044] In the above optional embodiments, the methods for adjusting the waveform parameters of the output voltage signal of the waveform generating circuit 21 by the control circuit include but are not limited to: 1. By adjusting the power supply voltage in the waveform generating circuit 21, the amplitude of the output voltage signal can be changed; 2. Changing the resistance value in the waveform generating circuit 21 can change the response time of the circuit, thereby changing the frequency and amplitude of the output voltage signal; 3. Changing the capacitance value in the waveform generating circuit 21 can change the frequency response of the circuit, thereby changing the frequency and amplitude of the output voltage signal; 4. Using adjustable resistors, capacitors or other components to automatically adjust the amplitude and frequency of the output voltage signal of the waveform generating circuit 21; 5. By an external control signal to adjust the working state of the waveform generating circuit 21, the amplitude and frequency of the output voltage signal can be adjusted. In short, by adjusting the component parameters in the waveform generating circuit 21 by the control circuit or using an external control signal, the amplitude and frequency of the output voltage signal of the waveform generating circuit 21 can be adjusted.

[0045] Exemplarily, the driving voltage of the IGBT module is pre-debugged, including the amplitude and period of the driving voltage corresponding to various driving modes of the IGBT module, and a data table of the corresponding relationship between the waveform parameters of the driving voltage of the IGBT module and the waveform parameters of the output current is formed and pre-stored in a database. Then, after receiving a target instruction, the above database is searched, and with reference to the data table, the driving mode of the IGBT module is selected, and the driving parameter value is set on the driving panel of the IGBT module, so that the driving of the IGBT module changes from the negative voltage turn-off state to the on state, and through the setting of the driving, a sinusoidal half-wave voltage V with the required amplitude and pulse time is provided to the input GE so that, according to the transfer characteristic curve of the IGBT module, a surge current i with the required pulse waveform is output, as Figure 11 shown, the peak current of the surge current i is i 1 , and the peak of the sinusoidal half-wave voltage V GE corresponds to the peak of the surge current i in the same time period T 1 , and there is a time period T 1 between the time periods T 2 , where T 1 can be 50 -20 ms, and T 2 can be a single or repeated surge current of 300 ms - 1 s. The above range can support more driving modes of the IGBT module, enabling the operator to select the driving mode of the IGBT module according to actual needs, and realizing the surge test of power devices such as SiC MOSFETs in different application scenarios, making the test results more in line with the operation of the actual working conditions, thereby facilitating the study of the degradation characteristics and failure characteristics of power devices under different working conditions.

[0046] In some alternative embodiments, such as Figure 1 and Figure 2 shown, the surge current generating device in the embodiments of the present application further includes an isolation amplifier circuit 22, which is electrically connected to the output end of the first driving module 20 and the gate of the IGBT module 10 respectively, and is used for amplifying the driving voltage signal. The isolation amplifier circuit 22 has a first sub-module with a signal amplification function and a second sub-module with a signal isolation function. The signal output by the first driving module 20 is amplified by the first sub-module and isolated by the second sub-module, and then is respectively applied to the gate and emitter of the IGBT module 10.

[0047] In some alternative embodiments, such as Figure 1 and Figure 2 shown, the charge and discharge module 30 includes a voltage source 31, a capacitor module 32 and a switch module, wherein: the capacitor module 32 is connected in parallel with the voltage source 31, and one end of the capacitor module 32 is electrically connected to the collector E of the IGBT module 10, and the other end is grounded; the switch module is electrically connected to the voltage source 31 and the capacitor module 32 respectively, and is used for switching the charging and discharging of the capacitor module 32.

[0048] In the above alternative embodiments, the capacitor module 32 can be in a charging process, a discharging process and a surge current process through the voltage source 31 and the switch module. During the charging process of the capacitor module 32, the capacitor module 32 can be charged. After switching the charging process to the surge current process, the charged capacitor module 32 can supply power to the IGBT module 10; and, the gate and emitter of the IGBT module 10 are electrically connected to the first driving module 20, and the first driving module 20 can provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module 10, so that the IGBT module 10 outputs a surge current in the conducting state.

[0049] Specifically, as Figure 2 shown, the charge and discharge module 30 includes a voltage source 31, a capacitor module 32 and a switch module. The capacitor module 32 is connected in parallel with the voltage source 31, and one end of the capacitor module 32 is electrically connected to the collector C of the IGBT module 10, and the other end is grounded. The switch module is electrically connected to the voltage source 31 and the capacitor module 32 respectively, and the switch module includes a first switch component 301, a second switch component 302 and a third switch component 303. The charge and discharge module further includes a charging resistor 34 and a discharging resistor 35.

[0050] In order to perform a surge current test on a power device, as Figure 2 described, the emitter of the IGBT module 10 is electrically connected to the source S of the device under test, and the gate G of the device under test 2It is electrically connected to the source S and the second driving module 50. The second driving module 50 is used to provide the turn-on voltage of the IGBT module 10. The drain D of the NMOS device is connected to a low level. When the device under test or the parasitic diode therein conducts, the surge current generated by the IGBT module 10 can enter the device under test to achieve the surge current test of the power device.

[0051] Exemplarily, as Figure 3 shown, the switch module in the charge and discharge module 30 includes a first switch component K 1 , a second switch component K 2 and a third switch component K 3 . The first switch component K 1 is electrically connected to the output terminal of the voltage source 31 and the first end of the capacitor C 2 in the capacitor module respectively. The second switch component K 2 is electrically connected to the first end and the second end of the capacitor C 2 respectively. The third switch component K 3 is electrically connected to the first end of the capacitor C 2 and the collector C of the IGBT module 10 respectively. The charge and discharge module 30 further includes a discharge resistor R 1 and a charging resistor R 2 . The charging resistor R 2 is electrically connected between the first switch component K 1 and the first end of the capacitor C 2 . The discharge resistor R 1 is electrically connected between the output terminal of the charging resistor R 2 and the second switch component K 2 .

[0052] In the above example, the first switch component K 1 , the second switch component K 2 and the third switch component K 3 are all in the off state. As Figure 4 shown, in order to make the capacitor module in the charging state, the first switch component K 1 can be controlled to close, so that the voltage source 31 outputs a preset voltage V 2 to charge the capacitor C DC . As Figure 5 shown, after charging the capacitor C 2 for a preset time, such as 1 s - 2 s, the first switch component K 1 is controlled to disconnect, and the third switch component K 3 is controlled to close, so that the charge and discharge module 30 is electrically connected to the collector C of the IGBT module 10 to supply power to the collector C of the IGBT module 10. At the same time, the first driving module 20 supplies power to the gate G 1Provide a driving voltage signal with preset waveform parameters to cause a surge current to be generated in the IGBT module 10 in the conducting state. The surge current output terminal is electrically connected to the emitter E of the IGBT module 10 and is used to output the above-mentioned surge current. At this time, by connecting the above-mentioned surge current output terminal to the power device to be tested, the test of the surge current of the power device can be realized.

[0053] In addition, as Figure 6 shown, the second switch component K can also be controlled to 2 close, and the first switch component K 1 and the third switch component K 3 are both in the off state, so that the capacitor module is in the discharge process.

[0054] In the above optional embodiment, the surge current generating device in the embodiment of the present application may further include a control unit, which is electrically connected to the switch module and is used to control the opening and closing of the switch module (such as the first switch component K 1 , the second switch component K 2 , and the third switch component K 3 ) to control the capacitor module to be in the charging process, the discharging process, and the surge current process respectively, so as to realize the automatic surge current test of the power device.

[0055] Specifically, as Figure 2 shown, the surge current generating device may further include a first drive signal control terminal 331, a second drive signal control terminal 332, and a third drive signal control terminal 333. The first drive signal control terminal 331 is electrically connected to the first switch component 301, the second drive signal control terminal 332 is electrically connected to the second switch component 302, and the third drive signal control terminal 333 is electrically connected to the third switch component 303. The above control unit is electrically connected to the above first drive signal control terminal 331, the above second drive signal control terminal 332, and the above third drive signal control terminal 333 respectively, and controls the closing and turning off of the first switch component 301, the second switch component 302, and the third switch component 303 by sending control signals.

[0056] The surge current generating device in the embodiments of the present application may further include a signal receiving end, a database unit, a processing unit, and a signal sending end, where: the database unit is used to store a plurality of first waveform parameters, a plurality of second waveform parameters corresponding to the plurality of first waveform parameters one by one, and the corresponding relationship between the first waveform parameters and the second waveform parameters. The first waveform parameter is the waveform parameter of a sine half-wave voltage, and the second waveform parameter is the waveform parameter of the output current of an IGBT module with a sine half-wave voltage input; the processing unit is used to receive and parse the target instruction received by the signal receiving end to obtain the waveform parameter of the target surge current, and then obtain the waveform parameter of the target sine half-wave voltage corresponding to the waveform parameter of the target surge current from the database module to generate a control signal, and send it to the control circuit in the first driving module through the signal sending end, so that the control circuit adjusts the waveform generating circuit according to the control signal, so that the voltage signal output by the waveform generating circuit has a preset waveform parameter.

[0057] Next, the surge current generating device provided by the embodiments of the present application will be specifically described in conjunction with Figures 1 to 3 .

[0058] As Figure 1 and Figure 2 shown, the surge current generating device includes an IGBT module 10, a first driving module 20, a charge and discharge module 30, and a surge current output terminal 40. The first driving module 20 is electrically connected to the gate G 1 and the emitter E of the IGBT module 10 respectively. The charge and discharge module 30 is electrically connected to the collector C of the IGBT module 10. The surge current output terminal 40 is electrically connected to the emitter E of the IGBT module 10. The charge and discharge module 30 includes a voltage source 31, a capacitor module 32, and a switch module. The capacitor module 32 is connected in parallel with the voltage source 31. One end of the capacitor module 32 is electrically connected to the collector C of the IGBT module 10, and the other end is grounded. The switch module is electrically connected to the voltage source 31 and the capacitor module 32 respectively, and the switch module includes a first switch component 301, a second switch component 302, and a third switch component 303. The charge and discharge module further includes a charging resistor 34 and a discharging resistor 35.

[0059] Connect the surge current output terminal in the above surge current generating device to the source electrode of the NMOS device. After the connection, the circuit structure of the surge current generating device and the power device is as Figure 3 shown, Figure 2 The first switch component 301, the second switch component 302, and the third switch component 303 in Figure 3 are respectively 1 the first switch component K 2 in 3 , the above Figure 2The charging resistor 34 and the discharging resistor 35 in Figure 3 the discharging resistor R in 1 and the charging resistor R 2 , the above-mentioned Figure 2 the capacitor module 32 in Figure 3 has the capacitor C in 2 . The first driving module 20 is electrically connected to the gate G and the emitter E of the IGBT module 10 respectively through the driving input control terminal 11.

[0060] The above-mentioned first switching component K 1 is electrically connected to the output terminal of the voltage source and the first terminal of the capacitor C in the capacitor module 2 respectively, and the second switching component K 2 is electrically connected to the first terminal and the second terminal of the capacitor C 2 respectively, and the third switching component K 3 is electrically connected to the first terminal of the capacitor C 2 and the collector C of the IGBT module 10 respectively. The charging resistor R 2 is electrically connected between the first switching component K 1 and the first terminal of the capacitor C 2 ; the discharging resistor R 1 is electrically connected between the output terminal of the charging resistor R 2 and the second switching component K 2 .

[0061] After connecting the surge current output terminal in the above-mentioned surge current generating device to the source S of the NMOS device, the following test steps are executed:

[0062] S1: Before the surge test of the MOSFET device, control the first switching component K 1 , the second switching component K 2 and the third switching component K 3 to be in the off state, connect the surge current output terminal to the MOSFET to be tested, turn on the voltage source, set the input voltage V DC , control the first switching component K 1 to close, and charge the capacitor C 2 ;

[0063] S2: After the capacitor C 2 is charged for 1 s - 2 s, disconnect the first switching component K 1 , and close the third switching component K 3 ;

[0064] S3: Pre-debug the driving voltage of the IGBT module, including the amplitude and waveform of the driving voltage, so as to form a data table between the waveform parameters of the driving voltage of the IGBT module and the waveform parameters of the output current;

[0065] S4: Refer to the data table, select the driving method of the IGBT module, set the driving parameter values on the driving panel of the IGBT module, change the driving of the IGBT module from the negative voltage turn-off state to the on state, and through the driving setting, provide a sine half-wave voltage with the required amplitude and pulse time to the input;

[0066] S5: According to the transfer characteristic curve of the IGBT module, make the IGBT module output a required quasi-sine half-wave current to the MOSFET.

[0067] To achieve the above object, according to an embodiment of the present application, a surge evaluation system for a power device is provided, as Figure 7 and Figure 8 shown, including the surge current generating device 100, the power device 200 and the second driving module 50 in the above embodiment, wherein: the second driving module 50 is electrically connected to the power device 200 and is used to control the conduction and cut-off of the power device 200 or the parasitic diode in the power device 200; the emitter E of the IGBT module 10 in the surge current generating device is electrically connected to the power device 200.

[0068] In the above embodiment of the present application, the first driving module 20 in the surge current generating device can provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module 10, so that the IGBT module 10 outputs a surge current in the conducting state, so that when the charge and discharge module in the current generating device supplies power to the collector of the IGBT module 10, a surge current test can be performed on the power device 200 through the surge current generated by the emitter E of the IGBT module 10.

[0069] Therefore, by using the above surge evaluation system of the present application, through the design of the driving part of the IGBT module and the use of the transfer characteristic curve, a surge current waveform with adjustable amplitude and adjustable pulse duration can be controllably generated, so that the test results can better conform to the operation of the actual working conditions, realizing accurate surge evaluation of the MOSFET device; and when in the continuous generation mode, the above surge current generating device is also convenient for automatic counting and has the characteristics of strong flexibility.

[0070] In the above-mentioned surge assessment system of the embodiment of the present application, the surge assessment system also includes a test circuit board and a surge current input terminal located on the test circuit board, the surge current input terminal is electrically connected to the emitter of the IGBT module, and there may be multiple power devices, and the multiple power devices are electrically connected to the surge current input terminal through a transmission line on the test circuit board. Since in actual applications, multiple chips are often connected in parallel to increase the rated current capacity and meet industrial needs, the above-mentioned surge assessment system of the embodiment of the present application can realize surge current testing of multiple power devices, so that the test results can be more in line with the actual working conditions, and then more optimize the reasonable packaging layout, providing reference for module integration.

[0071] In the case where the MOSFET device in the surge assessment system is electrically connected to a plurality of power devices, each power device may be independently selected from any one of an NMOS device and a PMOS device.

[0072] Specifically, the surge assessment system provided in the embodiment of the present application can be as follows: Figure 8 As shown, the surge current output terminal 40 is electrically connected to the surge current input terminal 70, and the surge current input terminal 70 is electrically connected to the first power device 201, the second power device 202, the third power device 203 and the fourth power device 204, respectively, for outputting surge current to each power device, respectively. Taking the power device as an NMOS device as an example, the above-mentioned second driving module is electrically connected to the gate and source of the NMOS device, respectively, for providing a turn-on voltage, and the drain of the NMOS device is electrically connected to the ground terminal 80. Figure 8 Other structures in Figure 2 As shown, no further details are given here.

[0073] like Figure 8 As shown, an embodiment of the present application provides a surge evaluation system with four chips connected in parallel. The parasitic parameters of the driving branches of the four chips are adjustable and can be set to be symmetrical in pairs, which can provide the most practical guidance for future modular packaging.

[0074] It should be noted that the surge evaluation system is not limited to including the above four devices under test, and the embodiment of the present application does not specifically limit the number of devices under test electrically connected to the surge current output terminal.

[0075] The surge assessment system of the present application is described below by taking an NMOS device as an example.

[0076] like Figure 7 and Figure 8As shown, the surge evaluation system includes a surge current generating device 100, a power device 200, and a second driving module 50. The second driving module 50 is electrically connected to the power device 200. The emitter E of the IGBT module 10 in the surge current generating device is electrically connected to the power device 200. The surge current generating device 100 includes an IGBT module 10, a first driving module 20, a charge-discharge module 30, and a surge current output terminal 40. The first driving module 20 is electrically connected to the gate G 1 and the emitter E of the IGBT module 10. The charge-discharge module 30 is electrically connected to the collector C of the IGBT module 10. The surge current output terminal 40 is electrically connected to the emitter E of the IGBT module 10. The charge-discharge module 30 includes a voltage source 31, a capacitor module 32, and a switch module. The capacitor module 32 is connected in parallel with the voltage source 31. One end of the capacitor module 32 is electrically connected to the collector C of the IGBT module 10, and the other end is grounded. The switch module is electrically connected to the voltage source 31 and the capacitor module 32 respectively. The switch module includes a first switch component 301, a second switch component 302, and a third switch component 303. The charge-discharge module further includes a charging resistor 34 and a discharging resistor 35.

[0077] Connect the surge current output terminal in the above-mentioned surge current generating device to the source of the NMOS device. After the connection, the circuit structure of the surge current generating device and the power device is as Figure 3 shown. Figure 8 The first switch component 301, the second switch component 302, and the third switch component 303 in Figure 3 are respectively the first switch component K 1 in 2 , the second switch component K 3 , and the third switch component K Figure 8 The charging resistor 34 and the discharging resistor 35 in Figure 3 are respectively the discharging resistor R 1 and the charging resistor R 2 in Figure 8 The capacitor module 32 in Figure 3 has the capacitor C 2 in

[0078] The above-mentioned first switch component K 1 is respectively electrically connected to the output terminal of the voltage source and the first end of the capacitor C 2 in the capacitor module. The second switch component K 2 is respectively electrically connected to the first end and the second end of the capacitor C 2 . The third switch component K 3 is respectively electrically connected to the first end of the capacitor C 2 and the collector C of the IGBT module 10. The charging resistor R 2 is electrically connected between the first switch component K1 between the first end of the capacitor C 2 ; the discharge resistor R 1 is electrically connected between the output end of the charging resistor R 2 and the second switch assembly K 2 .

[0079] The following test steps are performed using the above surge evaluation system:

[0080] S10: Before the surge test of the MOSFET device starts, control the first switch assembly K 1 , the second switch assembly K 2 and the third switch assembly K 3 to be in the off state, electrically connect the surge current output terminal to the MOSFET under test, turn on the voltage source, set the input voltage V DC , control the first switch assembly K 1 to close, and charge the capacitor C 2 ;

[0081] S20: After the capacitor C 2 is charged for 1 s - 2 s, disconnect the first switch assembly K 1 , and close the third switch assembly K 3 ;

[0082] S30: Pre - debug the drive voltage of the IGBT module, including the amplitude and waveform of the drive voltage, to form a data table between the waveform parameters of the drive voltage of the IGBT module and the waveform parameters of the output current;

[0083] S40: Referring to the data table, select the drive mode of the IGBT module, set the drive parameter values on the drive panel of the IGBT module, change the drive of the IGBT module from the negative - voltage turn - off state to the on state, and provide a sine - half - wave voltage with the required amplitude and pulse time to the input through the drive setting;

[0084] S50: According to the transfer characteristic curve of the IGBT module, make the IGBT module output the required quasi - sine - half - wave current to the MOSFET.

[0085] According to another embodiment of the present application, a method for evaluating the surge of a power device is provided.

[0086] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal, or a similar computing device. Taking running on a mobile terminal as an example, Figure 9 is a hardware structure block diagram of a mobile terminal for a method for evaluating the surge of a power device according to an embodiment of the present invention. As Figure 9 shown, the mobile terminal may include one or more ( Figure 9Only one processor 102 (the processor 102 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data are shown. Among them, the above mobile terminal may further include a transmission device 106 for communication functions and an input / output device 108. Those of ordinary skill in the art can understand that Figure 9 The structure shown is only schematic and does not limit the structure of the above mobile terminal. For example, the mobile terminal may further include more or fewer components than Figure 9 shown in, or have a different configuration from Figure 9 shown.

[0087] The memory 104 can be used to store computer programs. For example, software programs and modules of application software, such as the computer program corresponding to the display method of device information in the embodiment of the present invention. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implements the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memories. In some instances, the memory 104 may further include a memory remotely set relative to the processor 102, and these remote memories can be connected to the mobile terminal through a network. Examples of the above network include, but are not limited to, the Internet, an enterprise intranet, a local area network, a mobile communication network, and combinations thereof. The transmission device 106 is used to receive or send data via a network. Specific examples of the above network may include a wireless network provided by a communication provider of the mobile terminal. In one instance, the transmission device 106 includes a network adapter (Network Interface Controller, abbreviated as NIC), which can be connected to other network devices through a base station and thus communicate with the Internet. In one instance, the transmission device 106 may be a radio frequency (Radio Frequency, abbreviated as RF) module, which is used to communicate with the Internet wirelessly.

[0088] In this embodiment, a method for evaluating the surge of a power device running on a mobile terminal, a computer terminal, or a similar computing device is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. And, although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.

[0089] Figure 10 is a flowchart of a method for evaluating the surge of a power device according to an embodiment of the present application. As Figure 10As shown, the surge evaluation system of the power device in the above embodiment is adopted, and the method includes the following steps:

[0090] Step S101: Control the charge-discharge module in the surge current generating device to supply power to the collector of the IGBT module.

[0091] Step S102: Control the first drive module in the surge current generating device to provide a drive voltage signal with preset waveform parameters to the gate of the IGBT module, and control the second drive module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and a surge current is output to the power device.

[0092] In the above embodiment of the present application, since the first drive module is controlled to provide a drive voltage signal with preset waveform parameters to the gate of the IGBT module, so that the IGBT module outputs a surge current in the on state, thus, when controlling the charge-discharge module to supply power to the collector of the IGBT module, by electrically connecting the surge current output terminal electrically connected to the emitter of the IGBT module to the power device to be tested, the surge current generated by the emitter of the IGBT module can be used to perform a surge current test on the above power device.

[0093] Therefore, by adopting the above surge evaluation method for the power device, the waveform parameters of the drive voltage of the IGBT module can be pre-adjusted, such as the amplitude and period of the drive voltage, and using the transfer characteristic curve, a surge current waveform with adjustable amplitude and adjustable pulse duration can be controllably generated, so that the test result can more conform to the operation of the actual working condition, realizing accurate surge evaluation of the MOSFET device; and, when in the continuous generation mode, the above surge current generating device is also convenient for automatic counting and has the characteristic of strong flexibility.

[0094] Exemplarily, as Figure 3 shown, the charge-discharge module in the surge evaluation system includes a voltage source 31, a capacitor module, a first switch assembly K 1 , a second switch assembly K 2 , a third switch assembly K 3 , a discharge resistor R 1 and a charging resistor R 2 . The above first switch assembly K 1 is respectively electrically connected to the output terminal of the voltage source and the first end of the capacitor C 2 in the capacitor module. The second switch assembly K 2 is respectively electrically connected to the first end and the second end of the capacitor C 2 . The third switch assembly K 3 is respectively electrically connected to the first end of the capacitor C 2 and the collector C of the IGBT module 10. The charging resistor R 2is electrically connected between the first switch component K 1 and the first terminal of the capacitor C 2 ; the discharge resistor R 1 is electrically connected between the output terminal of the charging resistor R 2 and the second switch component K 2 .

[0095] In some alternative embodiments, the surge evaluation system shown above is adopted to control the charge and discharge module in the surge current generating device to supply power to the collector of the IGBT module, including: sending a first control signal to the first switch component K Figure 3 to make the first switch component K 1 closed, so that the voltage source 31 and the capacitor C in the capacitor module 1 are conducted; sending a second control signal to the second switch component K 2 and the third switch component K 2 to make the second switch component K 3 open, and make the third switch component K 2 closed, so that the capacitor C 3 is conducted with the IGBT module 10 to supply power to the collector C of the IGBT module 10. 2

[0096] In some alternative embodiments, controlling the first drive module in the surge current generating device to provide a drive voltage signal with preset waveform parameters to the gate of the IGBT module includes: receiving a target instruction, where the target instruction has waveform parameters of a target surge current; determining waveform parameters of a target sine half-wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and a preset relationship, where the preset relationship is used to represent the corresponding relationship between the waveform parameters of the surge current and the waveform parameters of the sine half-wave voltage; controlling the first drive module in the surge current generating device to provide the target sine half-wave voltage to the gate of the IGBT module so that the IGBT module outputs the target surge current.

[0097] In the above alternative embodiments, a preset database can be established according to a plurality of first waveform parameters and a plurality of second waveform parameters, where the plurality of first waveform parameters are waveform parameters of a plurality of sine half-wave voltages, and the second waveform parameters are waveform parameters of the output current of the IGBT module with a sine half-wave voltage input. At this time, determining the waveform parameters of the target sine half-wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and the preset relationship includes: determining the waveform parameters of the target sine half-wave voltage from the waveform parameters of the plurality of sine half-wave voltages according to the target instruction and the preset database.

[0098] ​Specifically, waveform parameters of multiple sine half-wave voltages (i.e., the first waveform parameters) can be obtained in advance, as well as waveform parameters of the current corresponding to the output of the IGBT module after inputting the historical waveform parameters of the multiple sine half-wave voltages (i.e., the second waveform parameters). Then, a database is established with the above first waveform parameters and the above second waveform parameters, so that the database stores waveform parameters of multiple sine half-wave voltages, waveform parameters of multiple currents, and the corresponding relationship between the waveform parameters of each sine half-wave voltage and the corresponding waveform parameters of the current. Thus, after parsing the target instruction and obtaining the waveform parameters of the target surge current to be generated, a search can be performed in the above database to obtain the waveform parameters of the sine half-wave voltage corresponding to the waveform parameters of the target surge current, so as to provide the sine half-wave voltage corresponding to the surge current with the required amplitude and pulse time to the IGBT module.

[0099] Therefore, by adopting the above surge evaluation method of the embodiment of the present application, the waveform parameters of the driving voltage of the IGBT module can be pre-adjusted to generate a pulse current waveform with an arbitrarily adjustable amplitude within thousands of amperes, and a single or continuous and countable pulse current waveform can also be generated. Moreover, the time scale of the current pulse waveform can be adjusted, covering the range from microseconds (μs) to milliseconds (ms).

[0100] Exemplarily, pre-adjusting the driving voltage of the IGBT module includes the amplitude and period of the driving voltage corresponding to various driving modes of the IGBT module, and forming a data table of the corresponding relationship between the waveform parameters of the driving voltage of the IGBT module and the waveform parameters of the output current, and pre-storing it as a database. Then, after receiving the target instruction, the above database is searched, and in contrast to the data table, the driving mode of the IGBT module is selected, and the driving parameter value is set on the driving panel of the IGBT module, so that the driving of the IGBT module changes from the negative voltage turn-off state to the on state, and through the setting of the driving, a sine half-wave voltage V with the required amplitude and pulse time is provided to the input. GE , so as to output the required pulse waveform surge current i according to the transfer characteristic curve of the IGBT module, as Figure 11 shown, the peak current of the surge current i is i 1 , and the peak of the sine half-wave voltage V GE corresponds to the peak of the surge current i in the same time period T 1 , and there is a time period T 1 between them, where, T 2 , and T 1 can be 50 -20 ms, T 2A single or repetitive surge current that can be from 300 ms to 1 s. The above range can support more driving methods for IGBT modules, enabling operators to select the driving method of IGBT modules according to actual needs, and can realize surge tests on power devices such as SiC MOSFETs under different application scenarios, making the test results more in line with the operation of actual working conditions, thus facilitating the study of the degradation characteristics and failure characteristics of power devices under different working conditions.

[0101] The embodiment of the present application also provides a surge evaluation device for power devices. It should be noted that the surge evaluation device for power devices in the embodiment of the present application can be used to execute the surge evaluation method for power devices provided in the embodiment of the present application. This device is used to implement the above-mentioned embodiments and preferred implementation manners, and those that have been described will not be repeated. As used hereinafter, the term "module" can be a combination of software and / or hardware that can achieve a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware is also possible and contemplated.

[0102] The following introduces the surge evaluation device for power devices provided in the embodiment of the present application.

[0103] Figure 12 is a schematic diagram of the surge evaluation device for power devices according to the embodiment of the present application. As Figure 12 shown, using the surge evaluation system for power devices in the above-mentioned embodiment, the device includes:

[0104] A first control module 300, configured to control the charge and discharge module in the surge current generating device to supply power to the collector of the IGBT module;

[0105] A second control module 400, configured to control the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and control the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and a surge current is output to the power device.

[0106] In some optional implementation manners, the charge and discharge module includes a voltage source, a capacitor module, a first switch component, a second switch component, a third switch component, a charging resistor, and a discharging resistor. The first switch component is electrically connected to the output terminal of the voltage source and the first end of the capacitor module respectively. The second switch component is electrically connected to the first end and the second end of the capacitor module respectively. The third switch component is electrically connected to the first end of the capacitor module and the collector of the IGBT module respectively. To control the charge and discharge module in the surge current generating device to supply power to the collector of the IGBT module, the first control module 300 includes: a first sending sub-module, configured to send to the first switch component K 1Send a first control signal to cause the first switch component K 1 to close, so that the voltage source 31 and the capacitor C in the capacitor module 2 are conducted; a second sending sub-module, configured to send a second control signal to the second switch component K 2 and the third switch component K 3 to cause the second switch component K 2 to open, and cause the third switch component K 3 to close, so that the capacitor C 2 is conducted with the IGBT module 10 to supply power to the collector C of the IGBT module 10.

[0107] In some alternative embodiments, the second control module 400 includes: a receiving sub-module, configured to receive a target instruction, where the target instruction has target waveform parameters; a determining sub-module, configured to determine, according to the target instruction, a sine half-wave voltage waveform corresponding to the target waveform parameters from a preset database, where the preset database includes correspondences between multiple pulse current waveforms and multiple sine half-wave voltage waveforms, and the multiple pulse current waveforms include the target waveform parameters; a control sub-module, configured to control the first driving module in the surge current generating device to provide a sine half-wave voltage signal to the gate of the IGBT module, so that the IGBT module outputs a surge current with a pulse waveform, where the sine half-wave voltage signal is used to reflect the sine half-wave voltage waveform corresponding to the target waveform parameters.

[0108] The surge evaluation device of the power device includes a processor and a memory. The above first control module 300 and the above second control module 400, etc. are all stored in the memory as program units, and the corresponding functions are implemented by the processor executing the above program units stored in the memory. The above modules are all located in the same processor; or, the above respective modules are separately located in different processors in any combination form.

[0109] The processor contains a kernel, and the kernel retrieves the corresponding program units from the memory. One or more kernels can be set, and accurate surge evaluation of the MOSFET device is achieved by adjusting the kernel parameters.

[0110] The memory may include non-permanent memory in the computer-readable medium, forms such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash memory (flash RAM), and the memory includes at least one memory chip.

[0111] An embodiment of the present invention provides a computer-readable storage medium. The computer-readable storage medium includes a stored program, where, when the program runs, it controls the device where the computer-readable storage medium is located to execute the surge evaluation method of the power device in the above embodiment.

[0112] An embodiment of the present invention provides an electronic device, which includes a processor, a memory, and a program stored on the memory and executable on the processor. When the processor executes the program, at least the following steps are implemented: controlling a charge and discharge module in a surge current generating device to supply power to the collector of an IGBT module; controlling a first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and controlling a second driving module to turn on a power device or a parasitic diode in the power device, so that the IGBT module is turned on and a surge current is output to the power device. The electronic device herein can be a server, a PC, a PAD, a mobile phone, etc.

[0113] The present application also provides a computer program product, which, when executed on a data processing device, is adapted to execute a program initialized with at least the following method steps: controlling a charge and discharge module in a surge current generating device to supply power to the collector of an IGBT module; controlling a first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and controlling a second driving module to turn on a power device or a parasitic diode in the power device, so that the IGBT module is turned on and a surge current is output to the power device.

[0114] Obviously, those skilled in the art should understand that the above-mentioned modules or steps of the present invention can be implemented by a general-purpose computing device. They can be concentrated on a single computing device or distributed on a network composed of multiple computing devices. They can be implemented by program codes executable by the computing device. Thus, they can be stored in a storage device and executed by the computing device. And in some cases, the steps shown or described can be executed in a different order from here, or they can be separately fabricated into individual integrated circuit modules, or multiple modules or steps among them can be fabricated into a single integrated circuit module to be implemented. In this way, the present invention is not limited to any specific combination of hardware and software.

[0115] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memories, CD-ROMs, optical memories, etc.) containing computer-usable program codes.

[0116] This application is described with reference to the flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, as well as the combination of flows and / or blocks in the flowchart and / or block diagram. These computer program instructions can be provided to the processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing device produce a means for implementing the functions specified in one flow Figure 1 one flow or multiple flows and / or blocks Figure 1 or multiple blocks.

[0117] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory produce a manufactured article including an instruction means that implements the functions specified in one flow Figure 1 one flow or multiple flows and / or blocks Figure 1 or multiple blocks.

[0118] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one flow Figure 1 one flow or multiple flows and / or blocks Figure 1 or multiple blocks.

[0119] In a typical configuration, a computing device includes one or more processors (CPUs), an input / output interface, a network interface, and a memory.

[0120] The memory may include non-permanent memory in the form of computer-readable media, random access memory (RAM), and / or non-volatile memory, such as read-only memory (ROM) or flash memory (flash RAM). The memory is an example of computer-readable media.

[0121] A computer-readable medium includes permanent and non-permanent, removable and non-removable media and can implement information storage by any method or technology. The information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassette tapes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transitory medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media do not include transitory computer-readable media, such as modulated data signals and carrier waves.

[0122] It should also be noted that the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0123] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0124] 1) By using the above surge current generating device of the present application, the waveform parameters of the driving voltage of the IGBT module can be pre-adjusted. The preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a sine half-wave waveform, and by using the transfer characteristic curve, a surge current with a quasi-sine half-wave waveform can be controllably generated, and the amplitude and pulse duration of the surge current waveform are adjustable, so that the test results can more conform to the operation of the actual working conditions, realizing accurate surge evaluation of MOSFET devices;

[0125] 2) Since in practical applications, multiple chips are often connected in parallel to increase the rated current capacity to meet industrial requirements, the above surge evaluation system of the embodiments of the present application can perform surge current tests on multiple power devices, making the test results more conform to the operation of the actual working conditions, and further optimizing and rationalizing the package layout, providing a reference for module integration.

[0126] The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A surge current generating device, characterized in that: include: IGBT modules; A first driving module, electrically connected to the gate and emitter of the IGBT module, respectively, for providing a driving voltage signal with preset waveform parameters to the gate of the IGBT module, so that the IGBT module outputs a surge current when it is turned on, wherein the preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a half-sine wave waveform; A charging and discharging module, electrically connected to the collector of the IGBT module, and used to supply power to the collector of the IGBT module; A surge current output terminal is electrically connected to the emitter of the IGBT module and is used to perform a surge current test on the power device when electrically connected to the power device. The first driving module includes a waveform generating circuit and a control circuit, the waveform generating circuit is used to generate a voltage signal with a waveform of a half-sine wave, the input end of the control circuit receives a control signal, and the output end of the control circuit is electrically connected to the waveform generating circuit, the surge current generating device also includes a signal receiving end, a database unit, a processing unit and a signal sending end, wherein: The database unit is used to store a plurality of first waveform parameters, a plurality of second waveform parameters corresponding one-to-one to the plurality of first waveform parameters, and a corresponding relationship between the first waveform parameters and the second waveform parameters, the first waveform parameters are waveform parameters of a half-sine wave voltage, and the second waveform parameters are waveform parameters of an output current of an IGBT module input with a half-sine wave voltage; The processing unit is used to receive and parse the target instruction received by the signal receiving end to obtain the waveform parameters of the target surge current, and then obtain the waveform parameters of the target sinusoidal half-wave voltage corresponding to the waveform parameters of the target surge current from the database unit to generate a control signal, which is sent to the control circuit through the signal sending end, so that the control circuit adjusts the waveform generating circuit according to the control signal, so that the voltage signal output by the waveform generating circuit has preset waveform parameters.

2. The surge current generating device according to claim 1, characterized in that: The first driving module further includes: The isolation amplifier circuit is electrically connected to the output end of the waveform generating circuit and the gate of the IGBT module respectively, and is used to amplify the driving voltage signal.

3. The surge current generating device according to claim 1, characterized in that: The charging and discharging module comprises: Voltage source; A capacitor module is connected in parallel with the voltage source, one end of the capacitor module is electrically connected to the collector of the IGBT module, and the other end is grounded; a switch module, electrically connected to the voltage source and the capacitor module respectively, and used for switching the charging and discharging of the capacitor module; The first control module is electrically connected to the switch module and is used to control the opening and closing of the switch module to control the charging and discharging of the capacitor module.

4. A surge assessment system for a power device, characterized in that: The invention comprises a surge current generating device, a power device and a second driving module according to any one of claims 1 to 3, wherein: The second driving module is electrically connected to the power device and is used to control the conduction and cutoff of the power device or a parasitic diode in the power device; The emitter of the IGBT module in the surge current generating device is electrically connected to the power device.

5. The surge assessment system according to claim 4, characterized in that: The surge assessment system further includes a surge current input terminal, and the power device is multiple, wherein: At least one of the power devices is an NMOS device, and the surge current input terminal is electrically connected to a source of each of the power devices; At least one of the power devices is a PMOS device, and the surge current input terminal is electrically connected to a drain of each of the power devices.

6. The surge assessment system according to claim 5, characterized in that The surge evaluation system also has a test circuit board, on which the surge current input terminal is provided. The surge current input terminal is electrically connected to the emitter of the IGBT module, and a plurality of the power devices are electrically connected to the surge current input terminal on the test circuit board via a transmission line.

7. A surge assessment method for a power device, characterized in that: A surge assessment system for a power device according to any one of claims 4 to 6, wherein the surge assessment system comprises a surge current generating device, a power device and a second driving module, and the method comprises: Controlling the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module; The first driving module in the surge current generating device is controlled to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and the second driving module is controlled to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

8. The surge assessment method according to claim 7, characterized in that: The controlling the first driving module in the surge current generating device to provide a driving voltage signal having a preset waveform parameter to the gate of the IGBT module comprises: receiving a target instruction, wherein the target instruction has a waveform parameter of a target surge current; Determining the waveform parameters of the target half-sine wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and the preset relationship, wherein the preset relationship is used to characterize the corresponding relationship between the waveform parameters of the surge current and the waveform parameters of the half-sine wave voltage; The first driving module in the surge current generating device is controlled to provide the target sinusoidal half-wave voltage to the gate of the IGBT module, so that the IGBT module outputs the target surge current.

9. The surge assessment method according to claim 8, characterized in that: Also includes: A preset database is established according to a plurality of first waveform parameters and a plurality of second waveform parameters, wherein the plurality of first waveform parameters are waveform parameters of a plurality of half-sine wave voltages, and the second waveform parameters are waveform parameters of the output current of the IGBT module input with the half-sine wave voltage, The step of determining the waveform parameters of the target half-sine wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and the preset relationship includes: According to the target instruction and the preset database, the waveform parameters of the target half-sine wave voltage are determined from the waveform parameters of the plurality of half-sine wave voltages.

10. A surge assessment device for a power device, characterized in that: A surge assessment system for a power device according to any one of claims 4 to 6, the surge assessment system comprising a surge current generating device, a power device and a second driving module, the device comprising: A first control module, used for controlling the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module; The second control module is used to control the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and control the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes a stored program, wherein when the program is executed, the device where the computer-readable storage medium is located is controlled to execute the surge evaluation method for a power device according to any one of claims 7 to 9.

12. An electronic device, characterized in that: include: One or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and the one or more programs include a method for executing a surge assessment method for a power device as described in any one of claims 7 to 9.

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