Reusable SOC system verification system, construction method thereof and medium

Abstract

The invention provides a reusable SOC system verification system and a construction method thereof, and a medium. The reusable SOC system verification system comprises a DUT module, an SOC verification module and a verification module, the top layer module is connected with the DUT module and comprises an instantiation unit, the instantiation unit comprises a test environment, and the instantiation unit is used for instantiating the test environment; the test environment is used for mounting each test sequence for testing, and the test environment comprises a plurality of different preset VIP components; the test sequence comprises a plurality of VIP components, the test sequence comprises a plurality of VIP components, the define switch module comprises a define file, the define file comprises conditional compiling statements, and the conditional compiling statements are used for selecting and using the VIP components so as to verify the SOC system through the test sequence; wherein the defin switch module is used for changing the VIP component which is selected to be used by modifying the defin file.

Description

Technical Field

[0001] The present invention relates to the field of chip verification technology, and in particular to a reusable SOC system verification system, a construction method of the reusable SOC system verification system, and a computer-readable storage medium. Background Art

[0002] At present, with the development of modern technology and people's needs for consumption and entertainment, the growing variety of intelligent and electronic products require more and more customized system-on-chips (SOC). SOC usually consists of processor cores, memory, peripherals, and some analog IPs. It contains many standardized functional modules, such as Universal Serial Bus (USB), Serial Peripheral Interface (SPI), Inter-IC (I2C) and other peripherals, or standard bus protocols Advanced eXtensible Interface (AXI), Advanced High-performance Bus (AHB), etc.

[0003] As the functions of SOC chips become more and more complex and the customization cycle becomes more and more compact, higher requirements are placed on the efficiency of verification. The chip companies' requirements for rapid upgrades of SOC chips put pressure on the verification team. In order to quickly build a verification platform and efficiently complete verification tasks, it is necessary to use standardized verification IP (VIP) to establish a universal SOC system verification platform that can be quickly reused.

[0004] In the traditional method, the verification platform will include all the required VIPs at one time to verify the SOC chip. For example, a SOC chip contains a CPU core, a memory and an AXI, an I2C, two SPI modules, and three UART modules. Then the ideal verification environment (ENV) will contain an axi_vip_env, an i2c_vip_env, a spi_vip_env (including two agents), and a uart_vip_env (three agents). The structure is as follows Figure 1 shown.

[0005] When the second SOC chip verification was conducted, this SOC chip had changed from the previous one. In addition to the CPU, memory and AXI, it also had a USB and two SPI modules. There were no I2C and UART modules. So the ideal verification platform should be like this Figure 2As shown in the figure, the first verification platform cannot be reused directly and needs to be modified, which slows down the verification process.

[0006] Therefore, it is necessary to provide a reusable SOC system verification system, a construction method of a reusable SOC system verification system and a computer-readable storage medium to effectively solve the above problems. Summary of the invention

[0007] The present invention provides a reusable SOC system verification system, a construction method of the reusable SOC system verification system, and a computer-readable storage medium.

[0008] An embodiment of the present invention provides a reusable SOC system verification system, including: DUT module; A top-level module connected to the DUT module, comprising an instantiation unit, the instantiation unit comprising a test environment, the instantiation unit being used to instantiate the test environment; the test environment being used to mount various test sequences for testing, the test environment comprising a plurality of different preset VIP components; and A define switch module, comprising a define file, wherein the define file comprises a conditional compilation statement, wherein the conditional compilation statement is used to select and use each of the VIP components to verify the SOC system through the test sequence; The define switch module modifies the define file to change the VIP component selected for use.

[0009] Preferably, the conditional compilation statement selects to use the corresponding VIP component based on the compilation path of each VIP component.

[0010] Preferably, the define file also includes the master / slave number of the VIP component.

[0011] Preferably, the VIP component includes at least one of an axi component, a spi component, a usb component, a uart component, an i2s component and an i2c component.

[0012] Preferably, the VIP component includes the axi component, the spi component, the usb component, the uart component, the i2s component and the i2c component.

[0013] The present application also provides a reusable SOC system verification chip, comprising a chip body and a reusable SOC system verification system as described in any one of the above items, wherein the reusable SOC system verification system is configured on the chip body.

[0014] The present application also provides a method for building a reusable SOC system verification system, the method comprising: Establishing a connection between a DUT module and a top-level module; the top-level module includes an instantiation unit, and the instantiation unit includes a test environment; The test environment is instantiated using the instantiation unit; the test environment is used to mount various test sequences for testing, and the test environment includes a plurality of different preset VIP components; and Establishing a define switch module, wherein the define switch module includes a define file, and the define file includes a conditional compilation statement; The conditional compilation statement is used to select and use each of the VIP components to verify the SOC system through the test sequence; the define file can be modified to change the VIP component selected for use.

[0015] Preferably, the define file also includes the master / slave number of the VIP component.

[0016] Preferably, the VIP component includes at least one of an axi component, a spi component, a usb component, a uart component, an i2s component and an i2c component.

[0017] Furthermore, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the steps of any of the above-mentioned methods are implemented.

[0018] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects: The reusable SOC system verification system, the construction method of the reusable SOC system verification system and the computer-readable storage medium provided in the embodiments of the present invention can change the VIP component selected for use only by modifying the define file to adapt to the changed test environment, which can quickly realize the reuse of SOC system verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the prior art descriptions. Obviously, the drawings described below are some embodiments of the present invention, not all embodiments. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor.

[0020] Figure 1 Verify the system block diagram for a traditional reusable SOC system; Figure 2The structural block diagram of the traditional reusable SOC system verification system after changing the test environment; Figure 3 A flow chart of the verification method after changing the test environment for the traditional reusable SOC system verification system; Figure 4 A structural block diagram of a reusable SOC system verification system provided by an embodiment of the present invention; Figure 5 A schematic diagram of a define file provided for an embodiment of the present invention; Figure 6 A flow chart of a method for building a reusable SOC system verification system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0023] When using the traditional method to build a verification platform for the second SOC chip, the following five steps are required, such as Figure 3 As shown. The first step is to modify the instantiation and connection of a VIP sub-environment that needs to be added in the env file. The second step is to modify env_pkg and add the file package of the required VIP. The third step is to modify top_cfg and add the config (configuration options) of the required VIP. The fourth step is to modify virtual_seqr and connect the sequencer of the required VIP to the virtual sequencer. The fifth step is to modify tb_top and set the interface of the required IP.

[0024] Errors may occur after each modification, and they need to be corrected through continuous debugging. Assuming that three IPs have changed and need to be modified accordingly, then modifying 3*5=15 places will greatly increase the probability of compilation errors, thereby extending the completion time of the verification platform.

[0025] Based on the problems existing in the prior art, the embodiments of the present invention provide a reusable SOC system verification system, a construction method of the reusable SOC system verification system, and a computer-readable storage medium.

[0026] Using the present invention to build a verification platform only requires two simple steps: modifying the enablement and number of three IPs in the define file. Such modification saves more modification time than the traditional method, and almost no related compilation errors will be generated, greatly saving the completion time of the entire platform.

[0027] Figure 4 A reusable SOC system verification system structure block diagram is provided for one embodiment of the present invention, such as Figure 4 As shown, the reusable SOC system verification system includes a DUT module 21, a top-level module 13 and a define switch module (not shown).

[0028] The DUT module is the design under test (DUT), which is an IP module to be tested and is usually composed of a series of RTL files. The top-level module 13 (tb_top) is connected to the DUT module 21, and can be specifically connected through an interface 22 (interface). The top-level module 13 includes an instantiation unit 131 (base_test). The instantiation unit 131 includes a test environment 132 (ENV). The instantiation unit 131 is used to instantiate the test environment 132. The test environment 132 is used to mount various test sequences (test sequences) for testing, and the test environment 132 includes multiple different preset VIP components. The define switch module contains a define file, and the define file contains conditional compilation statements. The conditional compilation statements are used to select and use each VIP component to verify the SOC system through the test sequence. Among them, the define switch module modifies the define file to change the VIP component selected for use.

[0029] In some specific embodiments, the fast reusable SOC system verification system provided by the present application can be based on the SystemVerilog language and UVM verification method. The top-level module 13 instantiates the DUT module 21 of the design to be tested, and instantiates, transfers, and connects through the interface. The instantiation unit 131 instantiates the entire test environment 132. Subsequent tests (test) inherited from the instantiation unit 131 can mount various test sequences (testsequences) used for testing using the test environment 132.

[0030] The test environment 132 in this embodiment may include all VIP components that are likely to be used. Exemplarily, the VIP components may include at least one of the axi component 133 (axi_vip_env), the spi component 135 (spi_vip_env), the usb component 134 (usb_vip_env), the uart component 136 (uart_vip_env), the i2s component 137 (i2s_vip_env), and the i2c component 138 (i2c_vip_env).

[0031] Furthermore, the VIP component may include an axi component 133 (axi_vip_env), an spi component 135 (spi_vip_env), a usb component 134 (usb_vip_env), a uart component 136 (uart_vip_env), an i2s component 137 (i2s_vip_env) and an i2c component 138 (i2c_vip_env).

[0032] The conditional compilation statement (`ifdef xx_env_en) in the define file included in the define switch module is used to select the use of each VIP component to verify the SOC system through the test sequence.

[0033] For conditional compilation statements, the list of files required for compilation includes the compilation paths of these VIP components, so that the conditional compilation statement selects to use the corresponding VIP component based on the compilation path of each VIP component.

[0034] Furthermore, the top-level module 13 (tb_top) and related files such as the control flow graph (top_cfg) inside the compiler should also be added with these define files, so that during testing, each individual VIP component can be enabled or disabled by the switch in the define file, and can be successfully connected to the DUT module 21 when enabled.

[0035] In some embodiments, the define file also includes the master / slave number of the VIP component. When considering the number of master / slave modules (master / slave) of the VIP component, the master / slave number (define xxx_num) of the submodule of the VIP component should be added in the define file.

[0036] For example, Figure 5As shown, the design of DUT module 21 uses two spi component 135 IPs, both of which are masters and can be configured as slaves. Define SPI_MST_NUM 2 indicates that there are two master modules (master agents) in spi_vip, which can be used to test the slave function of spi component 135 of DUT module 21.

[0037] define file and the spi component 135 related to the opening method as follows Figure 5 , where define SPI_ENV_EN turns on the switch of the environment package of the VIP component of the spi component 135, so that the test environment 132 includes the spi component 135. If there is no such definition in the define file, the VIP component is closed by default.

[0038] The reusable SOC system verification system provided in the present application can quickly build a test verification environment for a second SOC system by simply modifying a define file after the test verification of the previous SOC system is completed.

[0039] The present application also provides a method for building a reusable SOC system verification system, such as Figure 6 As shown, the method includes: Step S11, establishing a connection between the DUT module and the top-level module, the top-level module includes an instantiation unit, and the instantiation unit includes a test environment.

[0040] Step S12, instantiating a test environment using the instantiation unit; the test environment is used to mount various test sequences for testing, and the test environment includes a plurality of different preset VIP components; and Step S13, establishing a define switch module, the define switch module includes a define file, and the define file includes conditional compilation statements; wherein the conditional compilation statements are used to select and use each VIP component to verify the SOC system through a test sequence; the define file can be modified to change the selected VIP component.

[0041] In some examples, the define file also contains the master / slave number of the VIP component.

[0042] In some examples, the VIP component includes at least one of an axi component, a spi component, a usb component, a uart component, an i2s component, and an i2c component.

[0043] Furthermore, the present application also provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the method for building a reusable SOC system verification system in any of the above embodiments are implemented.

[0044] The various steps in the construction method of the reusable SOC system verification system and the computer-readable storage medium provided in the present application can refer to the relevant description of the reusable SOC system verification system, which will not be repeated here.

[0045] The reusable SOC system verification system, the construction method of the reusable SOC system verification system and the computer-readable storage medium provided in the embodiments of the present invention can change the VIP component selected for use only by modifying the define file to adapt to the changed test environment, which can quickly realize the reuse of SOC system verification.

[0046] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A reusable SOC system verification system, characterized in that: include: DUT module; A top-level module, connected to the DUT module, comprising an instantiation unit, the instantiation unit comprising a test environment, and the instantiation unit is used to instantiate the test environment; The test environment is used to mount various test sequences for testing, and the test environment includes a plurality of different preset VIP components; and a define switch module, comprising a define file, wherein the define file comprises a conditional compilation statement, wherein the conditional compilation statement is used to select and use each of the VIP components to verify the SOC system through the test sequence; The define switch module modifies the define file to change the VIP component selected for use.

2. The reusable SOC system verification system according to claim 1, characterized in that: The conditional compilation statement selects to use the corresponding VIP component based on the compilation path of each VIP component.

3. The reusable SOC system verification system according to claim 1, characterized in that: The define file also contains the master / slave number of the VIP component.

4. The reusable SOC system verification system according to claim 1, characterized in that: The VIP component includes at least one of an axi component, a spi component, a usb component, a uart component, an i2s component and an i2c component.

5. The reusable SOC system verification system according to claim 4, characterized in that: The VIP component includes the axi component, the spi component, the usb component, the uart component, the i2s component and the i2c component.

6. A reusable SOC system verification chip, characterized in that: It comprises a chip body and a reusable SOC system verification system as described in any one of claims 1 to 5, wherein the reusable SOC system verification system is configured on the chip body.

7. A method for building a reusable SOC system verification system, characterized in that: The method comprises: Establishing a connection between a DUT module and a top-level module; the top-level module includes an instantiation unit, and the instantiation unit includes a test environment; The test environment is instantiated using the instantiation unit; the test environment is used to mount various test sequences for testing, and the test environment includes a plurality of different preset VIP components; and Establishing a define switch module, wherein the define switch module includes a define file, and the define file includes a conditional compilation statement; The conditional compilation statement is used to select and use each of the VIP components to verify the SOC system through the test sequence; the define file can be modified to change the VIP component selected for use.

8. The method for constructing a reusable SOC system verification system according to claim 7, characterized in that: The define file also contains the master / slave number of the VIP component.

9. The method for constructing a reusable SOC system verification system according to claim 7, characterized in that: The VIP component includes at least one of an axi component, a spi component, a usb component, a uart component, an i2s component and an i2c component.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 7 to 9 are implemented.

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