Data transmission device and method

Abstract

The invention relates to the technical field of embedded systems, and provides a data transmission device and method.The device comprises a programmable logic chip and a processor chip; the programmable logic chip comprises a plurality of data transmission modules, and each data transmission module is connected with the processor chip and used for transmitting received data to be transmitted to a memory connected with the processor chip. And the processor chip is triggered to execute the action of transmitting the data to be transmitted from the memory to a user application program. According to the invention, the transmission control of the to-be-transmitted data is completed at the data transmission module at the programmable logic chip end, a data transmission engine does not need to be developed at the processor chip end (i.e., the PS end), the complexity of application program research and development is reduced, and the programmable logic chip end comprises a plurality of data transmission modules, so that the data transmission efficiency is improved. And data transmission control can be executed in parallel, so that high-speed data transmission is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of embedded systems, and in particular to a data transmission device and method. Background Art

[0002] Real-time and high-speed data transmission is the technical bottleneck of the current beam diagnosis system. The research on data transmission methods must be based on a certain hardware platform. In recent years, hardware platforms based on Xilinx ZYNQ series chips have been widely used. Many laboratories use ZYNQ series embedded chips to build readout electronics.

[0003] The ZYNQ platform provides HP (High Performance) ports for high-speed data transmission. Currently, high-speed data transmission in various laboratories generally adopts AXI DMA (Advanced eXtensible Interface Direct Memory Access) or AXI CDMA (Advanced eXtensible Interface CentralDirect Memory Access), which are implementation methods with a lower level of abstraction. Users need to develop a data transmission engine on the ARM side, that is, the PS (Processing System) side, and generate complex device-oriented transmission instructions (physical address, number of bytes, etc.), which increases the complexity of application development. At the same time, its transmission speed cannot fully meet the data transmission requirements of the beam diagnosis system. Therefore, the development of a universal interface and a high-throughput transmission method is a technical problem that the beam diagnosis system urgently needs to solve. Summary of the invention

[0004] The present invention provides a data transmission device and method, which are used to solve the technical problems in the prior art that data transmission for a beam diagnosis system increases the complexity of application development and has a low data transmission rate.

[0005] The present invention provides a data transmission device, comprising: a programmable logic chip and a processor chip; the programmable logic chip comprises a plurality of data transmission modules, each of the data transmission modules is connected to the processor chip, each of the data transmission modules is used to transmit received data to be transmitted to a memory connected to the processor chip, and trigger the processor chip to execute the action of transmitting the data to be transmitted from the memory to a user application.

[0006] According to a data transmission device provided by the present invention, each of the data transmission modules comprises: a data interface module, a transmission control module and a data migration module, and the transmission control module is connected to the data interface module and the data migration module.

[0007] The data interface module is used to receive data transmission parameters and send the data transmission parameters to the transmission control module.

[0008] The transmission control module generates a data transmission instruction based on the data transmission parameter, and sends the data transmission instruction to the data migration module.

[0009] The data migration module is used to receive the data to be transmitted, and based on the data transmission instruction, transmit the data to be transmitted to the memory. The transmission control module is connected to the processor chip, and is used to trigger the processor chip to execute the action of transmitting the data to be transmitted from the memory to the user application after the data migration module transmits the data to be transmitted.

[0010] According to a data transmission device provided by the present invention, the programmable logic chip also includes: a signal trigger module, used to generate an internal trigger signal of the programmable logic chip; the data transmission parameters include: an operating mode, a data transmission duration, an external trigger signal and a trigger frequency of the signal trigger module; the operating mode includes: an external trigger mode and an internal trigger mode, in the external trigger mode, the data transmission is triggered by the external trigger signal, and in the internal trigger mode, the signal trigger module generates an internal trigger signal to trigger the data transmission, the operating mode, data transmission duration and the trigger frequency of the signal trigger module are set by a user application on the processor chip side, and the external trigger signal is provided by an external device.

[0011] According to a data transmission device provided by the present invention, the data interface module is also used to, after receiving the data transmission parameters, convert the data transmission duration into the number of transmissions based on the preset input frequency of the data to be transmitted, the number of bytes input each time of the data to be transmitted and the maximum number of bytes that can be output at one time, and send the number of transmissions, the working mode, the trigger frequency of the signal trigger module and the external trigger signal to the transmission control module; the transmission control module generates and sends the data transmission instruction to the data migration module based on the number of transmissions, the working mode, the trigger frequency of the signal trigger module and the external trigger signal.

[0012] According to a data transmission device provided by the present invention, the transmission control module is used to determine the target number of data transmission instructions to be generated based on the number of transmissions, generate the target number of data transmission instructions, and according to the working mode, choose to send the data transmission instructions to the data migration module when triggered by an external trigger signal or when triggered by an internal trigger signal. The data transmission instructions include: a target storage address and a data frame transmission length. The target storage address is a memory address automatically generated by the transmission control module to store the data frame transmitted each time, and the data frame transmission length is the actual amount of data transmitted at one time.

[0013] According to a data transmission device provided by the present invention, an instruction buffer is provided in the data migration module, and the data migration module is further used to cache the received data transmission instructions in the instruction buffer in the form of a queue.

[0014] According to a data transmission device provided by the present invention, the transmission control module is used to send an interrupt signal to the processor chip after the data migration module transmits the data to be transmitted, and the processor chip is used to send a data read signal based on the interrupt signal, and the data read signal is used to instruct the user application to read the data in the memory.

[0015] According to a data transmission device provided by the present invention, the processor chip is also used to provide a data processing interface called by a user application in a driving manner, and the data processing interface is used to transfer the data in the memory to the user application when the user application calls it.

[0016] According to a data transmission device provided by the present invention, it is implemented based on a Zynq UltraScale+MPSoC device, the programmable logic chip is the programmable logic end of the device, and the processor chip is the processor end of the device.

[0017] The present invention also provides a data transmission method, which is implemented based on any of the data transmission devices described above, and the method includes the following steps.

[0018] Receive data to be transmitted, and transmit the data to be transmitted to a memory connected to the processor chip.

[0019] The processor chip is triggered to execute an action of transmitting the data to be transmitted from the memory to the user application.

[0020] In the data transmission device and method provided by the present invention, the device includes a programmable logic chip and a processor chip; the programmable logic chip includes a plurality of data transmission modules, each of which is connected to the processor chip, and is used to transmit the received data to be transmitted to a memory connected to the processor chip, and trigger the processor chip to execute the action of transmitting the data to be transmitted from the memory to the user application. Since the transmission control of the data to be transmitted is completed in the data transmission module on the programmable logic chip side, it is not necessary to develop a data transmission engine on the processor chip side (i.e., the PS side), which reduces the complexity of application development, and the programmable logic chip side includes a plurality of data transmission modules, which can execute data transmission control in parallel, thereby realizing high-speed data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 It is a structural schematic diagram of the data transmission device provided by the present invention.

[0023] Figure 2 It is a structural schematic diagram of a data transmission module in the data transmission device provided by the present invention.

[0024] Figure 3 It is a flow chart of the data transmission method provided by the present invention.

[0025] The reference numerals are as follows.

[0026] 100: programmable logic chip; 200: programmable logic chip; 300: memory; 110: data transmission module; 111: data interface module; 112: transmission control module; 113: data migration module; 210: bridge; 220: storage controller. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] The data transmission device according to the embodiment of the present invention is as follows: Figure 1 As shown, it includes: a programmable logic chip (Progarmmable Logic, PL) 100 and a processor chip (PS) 200. The programmable logic chip 100 can be a field programmable gate array (Field Programmable Gate Array, FPGA).

[0029] The programmable logic chip 100 includes multiple data transmission modules 110, each of which is connected to the processor chip 200. Each of the data transmission modules 110 is used to transmit the received data to be transmitted to the memory 300 (such as DDR content) connected to the processor chip 200, and trigger the processor chip 200 to execute the action of transmitting the data to be transmitted from the memory 300 to the user application, thereby completing the data transmission, wherein the data to be transmitted is input into the data transmission module 110 in the form of a data stream.

[0030] In this embodiment, the data transmission module 110 is implemented at the programmable logic chip 100 end (PL end), and there is no need to develop a data transmission engine at the processor chip end (i.e., PS end), thereby reducing the complexity of application development; moreover, multiple data transmission modules 110 can execute data transmission control in parallel, and all bandwidth of the transmission channel is used for the transmission of valid data, thereby improving data transmission efficiency and further improving data throughput.

[0031] In some embodiments, the data transmission device can be implemented based on a Zynq UltraScale+MPSoC device, the programmable logic chip 100 is the programmable logic end (PL end) of the device, and the processor chip 200 is the processor end (PS end) of the device. A plurality of data transmission modules 110 are developed at the PL end of the Zynq UltraScale+MPSoC device, and the plurality of data transmission modules 110 are firmware at the PL end of the Zynq UltraScale+MPSoC device. Figure 1Four data transmission modules 110 are shown in the figure, thereby realizing four high-speed data transmission channels. Each data transmission module 110 is connected to the AXI HP port on the PS side. The four data transmission modules 110 are each connected to an AXI HP port, and there are four AXI HP ports in total: HP0, HP1, HP2 and HP3. Port HP0 is connected to the S3 port of the storage controller 220 through a bridge 210 (the bridge 210 includes TBU3 (translation buffer units 3) and QoS (The quality of service) function) to achieve access to the memory. HP1 and HP2 are connected to the S4 port of the storage controller 220 through another bridge 210 (the bridge 210 includes TBU4 (translation buffer units 4) and QoS function) to achieve access to the memory. HP3 is connected to the S5 port of the storage controller 220 through another bridge 210 (the bridge 210 includes TBU5 (translation buffer units 5) and QoS function) to achieve access to the memory. HP1 and HP2 are used for applications with relatively low transmission clock frequencies and each data point contains more data bits. HP0 and HP3 are used to transmit high-speed ADC raw sampling data. They can support up to 8 channels of 16-bit 250-Msps ADC data transmission, and the real-time data rate of the two channels can reach 4000 MB / s.

[0032] In some embodiments, Figure 2 As shown, each of the data transmission modules 110 includes: a data interface module 111 , a transmission control module 112 and a data migration module 113 , and the transmission control module 112 is connected to the data interface module 111 and the data migration module 113 .

[0033] The data interface module 111 is used to receive data transmission parameters and send the data transmission parameters to the transmission control module 112. Specifically, the data interface module 111 provides a transmission interface of the data transmission parameters to the user application of the external device and the processor chip end. The user application of the external device and the processor chip end can send the data transmission parameters according to the requirements. The data transmission parameters are used to subsequently generate data transmission instructions to define the specific transmission mode of the data transmission.

[0034] The transmission control module 112 generates a data transmission instruction based on the data transmission parameter, and sends the data transmission instruction to the data migration module 113 .

[0035] The data migration module 113 is used to receive the data to be transmitted, and based on the data transmission instruction, transmit the data to be transmitted to the memory 300. The transmission control module 112 is connected to the processor chip 200, and is used to trigger the processor chip 200 to execute the action of transmitting the data to be transmitted from the memory 300 to the user application after the data migration module 113 transmits the data to be transmitted.

[0036] In this embodiment, the data transmission parameters provided by the user application on the external device and the processor chip are user-oriented parameters with a high level of abstraction. The data interface module 111 separates the underlying transmission instructions from the user, which has better versatility for external devices and user applications.

[0037] In some embodiments, the programmable logic chip 100 further includes: a signal trigger module for generating an internal trigger signal of the programmable logic chip 100. The data transmission parameters include: working mode (work mode), data transmission duration (Time), external trigger signal (Trigger) and trigger frequency (Frequence) of the signal trigger module; the working mode includes: external trigger mode and internal trigger mode. In the external trigger mode, the data transmission is triggered by the external trigger signal, and in the internal trigger mode, the data transmission is triggered by the internal trigger signal. Among them, the user application on the processor chip side, as the data receiving end, needs to set the working mode, data transmission duration and trigger frequency of the signal trigger module. The external trigger signal is provided by an external device (the sending end device of the data to be transmitted). The specific values ​​of the data transmission parameters can be set according to the data transmission requirements of the external device and the user application on the processor chip side.

[0038] In this embodiment, the user application on the processor chip side sets the transmission parameters of the working mode, data transmission duration and trigger frequency of the signal trigger module according to its own needs, thereby achieving efficient data transmission that meets its own needs.

[0039] In some embodiments, the data interface module 111 is also used to convert the data transmission duration into the number of transmissions based on the preset input frequency of the data to be transmitted, the number of bytes input each time of the data to be transmitted, and the maximum number of bytes that can be output at one time after receiving the data transmission parameters. Specifically, the total number of transmission bytes transmitted within the data transmission duration = the input frequency of the data to be transmitted × the number of bytes input each time of the data to be transmitted × the data transmission duration, and the number of transmissions = the total number of transmission bytes / the maximum number of bytes that can be output at one time. For example: the input frequency of the data to be transmitted is 10MHz, the number of bytes input each time of the data to be transmitted is 4 bytes, and the maximum number of bytes that can be output at one time is 4MB (4M bytes). If the data transmission duration is 1 second, then the total number of transmission bytes is 10MHz × 4 bytes × 1 second = 40MB, and the number of transmissions = 40MB / 4MB = 10 times.

[0040] After converting the data transmission duration into the number of transmissions, the number of transmissions, the working mode, the trigger frequency of the signal trigger module and the external trigger signal are sent to the transmission control module 112. The transmission control module 112 is used to generate a data transmission instruction according to the number of transmissions, the working mode, the trigger frequency of the signal trigger module and the external trigger signal, and send the data transmission instruction to the data migration module 113.

[0041] Specifically, the data interface module 111 generates a corresponding trigger pulse signal to the transmission control module 112 according to the external trigger signal. The transmission control module 112 determines the target number of data transmission instructions to be generated according to the number of transmissions, and generates the target number of data transmission instructions. The transmission control module 112 selects whether to send the data transmission instruction to the data migration module 113 when triggered by the external trigger signal or the internal trigger signal according to the working mode. The data transmission instruction includes: a target storage address and a data frame transmission length, wherein the target storage address is a memory address automatically generated by the transmission control module 112 to store the data frame transmitted each time, and the data frame transmission length is the actual amount of data transmitted at one time, usually the maximum number of bytes that can be output at one time. For example: in the data transmission instruction, the bit width of the target storage address is 64 bits, and the bit width of the data frame transmission length descriptor is 23 bits.

[0042] In some embodiments, an instruction buffer is provided in the data migration module 113, and the data migration module 113 is also used to cache the received data transmission instructions in the form of a queue in the instruction buffer, so that the data transmission instructions in the instruction buffer can be executed continuously without waiting for new instructions to arrive after executing a data transmission instruction, thereby improving the efficiency of data transmission.

[0043] In some embodiments, the transmission control module 112 is used to send an interrupt signal to the processor chip 200 after the data migration module 113 transmits the data to be transmitted, and the processor chip 200 is used to send a data read signal based on the interrupt signal, and the data read signal is used to instruct the user application to read the data in the memory 300. Specifically, the data migration module 113 feeds back a data transmission completion signal to the transmission control module 112 once after executing a data transmission instruction, and the transmission control module 112 sends an interrupt signal to the processor chip 200 according to a preset interrupt signal sending strategy, and the sending strategy is specifically: after receiving n data transmission completion signals, an interrupt signal is sent once, and the received data transmission completion signals are counted, n is greater than or equal to 1 and less than the number of transmissions, for example, n=2, the data migration module 113 transmits two data frames, and the transmission control module 112 sends an interrupt signal. After receiving the last data transmission completion signal (that is, the data transmission completion signal count is equal to the number of transmissions), the transmission control module 112 sends the last interrupt signal of this data transmission, and sets an interrupt flag different from the previous interrupt signal for the last interrupt signal.

[0044] The processor chip 200 is deployed with an interrupt response program, and an interrupt mechanism is used to achieve real-time response to data transmission. When the processor chip 200 receives an interrupt signal sent by the transmission control module 112, the processor chip 200 calls the interrupt response program to run. The interrupt response program identifies the interrupt identifier and releases the corresponding semaphore (in the solution implemented with the Zynq UltraScale+MPSoC device, the SIGIO semaphore is released). The user application responds to the semaphore to read data from the memory 300. If the identified interrupt identifier determines that the current terminal signal is the last interrupt signal for this data transmission, the user application responds to the semaphore to read data from the memory 300 and exits access to the memory 300.

[0045] It should be noted that: in the data migration module 113, the data is transferred to the memory 300 through the storage controller 220, and the storage controller 220 will record the current target storage address. The user application responds to the semaphore and reads data from the memory 300 through the storage controller 220. The user application can obtain the current target storage address from the storage controller 220 and read data from the memory 300 based on the current target storage address.

[0046] The transmission control module 112 is the core of the data transmission module 110. When receiving the number of transmissions, the working mode, the external trigger signal and the trigger frequency of the signal trigger module, the transmission control module 112 jumps from the standby state to the data transmission instruction generation state, and after the data transmission instruction is generated, jumps to the data transmission instruction sending state, sends multiple data transmission instructions to the data migration module 113, and after sending the data transmission instruction, the transmission control module 112 enters the interrupt signal sending state, and jumps to the standby state after sending the last interrupt signal. Preferably, the control structure of the transmission control module 112 is designed and implemented using a state machine, so as to have high stability.

[0047] In some embodiments, the processor chip 200 is also used to provide a data processing interface called by a user application in a driving manner, and the data processing interface is used to transfer the data in the memory 300 to the user application when the user application calls it. Specifically, the processor chip 200 is deployed with a data processing program, and the data processing program provides a data processing interface for the user application to call. The user application calls the data processing interface to execute the data processing program, and the data processing program obtains data from the memory 300 through the storage controller 220 and returns the obtained data to the user application.

[0048] The data transmission device of the above embodiment is implemented with a Zynq UltraScale+ MPSoC device, and four data transmission modules 110 are provided at the PL end, so that data transmission at full bandwidth can be achieved, meeting the following performance requirements: 1. Able to achieve a single-channel 2000-MB / s transmission speed and a maximum real-time transmission of 2500ms of data at 250MHz.

[0049] 2. The application layer interface is parameters such as time length and working mode.

[0050] 3. Provide transmission channels with different data rates.

[0051] 4. Provide four-channel parallel data high-speed transmission.

[0052] In addition, since the generation of data transmission instructions and the control of data transmission are all implemented by the PL side, the transmission channel bandwidth is fully used for effective data transmission, which improves the data transmission efficiency and makes the data transmission more stable. The test results show that the data transmission speed can reach 2000-MB / s per channel. Since the memory is 16GB and the four-channel data is transmitted in parallel, the HP0 port and the HP3 port are each allocated 5GB of memory space. Therefore, the 250MHz data stream can transmit 2500ms of data in real time at most.

[0053] The data transmission device of the above embodiment meets the needs of beam diagnosis and can be applied to the measurement of various beam parameters, especially for the acquisition of high data rate raw sampling data, so that physicists can further analyze the quality parameters of the beam, evaluate the performance parameters of the accelerator, and provide a basis for accelerator regulation. Of course, as a high-speed data transmission solution, the data transmission device of the above embodiment can not only meet the data transmission needs in the field of beam diagnosis, but also can be applied to other application fields that require high-speed data transmission, and has broad application prospects.

[0054] The present invention also provides a data transmission method, which is implemented based on the data transmission device of any of the above embodiments. The specific process of the method is as follows: Figure 3 As shown, it includes step S310 and step S320.

[0055] Step S310: receiving data to be transmitted, and transmitting the data to be transmitted to a memory connected to the processor chip.

[0056] Step S320: triggering the processor chip to execute an action of transmitting the data to be transmitted from the memory to the user application.

[0057] In some embodiments, the data transmission method further includes: receiving data transmission parameters, and generating a data transmission instruction based on the data transmission parameters.

[0058] The step of transmitting the data to be transmitted to a memory connected to the processor chip includes: transmitting the data to be transmitted to the memory connected to the processor chip based on the data transmission instruction.

[0059] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0060] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0061] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data transmission device, characterized in that: include: Programmable logic chips and processor chips; The programmable logic chip includes multiple data transmission modules, each of which is connected to the processor chip. Each of the data transmission modules is used to transmit the received data to be transmitted to the memory connected to the processor chip, and trigger the processor chip to execute the action of transmitting the data to be transmitted from the memory to the user application.

2. The data transmission device according to claim 1, characterized in that: Each of the data transmission modules includes: a data interface module, a transmission control module and a data migration module, and the transmission control module is connected to the data interface module and the data migration module; The data interface module is used to receive data transmission parameters and send the data transmission parameters to the transmission control module; The transmission control module generates a data transmission instruction based on the data transmission parameter, and sends the data transmission instruction to the data migration module; The data migration module is used to receive the data to be transmitted, and based on the data transmission instruction, transmit the data to be transmitted to the memory. The transmission control module is connected to the processor chip, and is used to trigger the processor chip to execute the action of transmitting the data to be transmitted from the memory to the user application after the data migration module transmits the data to be transmitted.

3. The data transmission device according to claim 2, characterized in that: The programmable logic chip also includes: a signal trigger module, which is used to generate an internal trigger signal of the programmable logic chip; the data transmission parameters include: an operating mode, a data transmission duration, an external trigger signal and a trigger frequency of the signal trigger module; the operating mode includes: an external trigger mode and an internal trigger mode, in the external trigger mode, the data transmission is triggered by the external trigger signal, and in the internal trigger mode, the signal trigger module generates an internal trigger signal to trigger the data transmission, the operating mode, the data transmission duration and the trigger frequency of the signal trigger module are set by the user application on the processor chip side, and the external trigger signal is provided by an external device.

4. The data transmission device according to claim 3, characterized in that: The data interface module is also used to, after receiving the data transmission parameters, convert the data transmission duration into the number of transmissions based on the preset input frequency of the data to be transmitted, the number of input bytes of the data to be transmitted each time and the maximum number of bytes that can be output at one time, and send the number of transmissions, the working mode, the trigger frequency of the signal trigger module and the external trigger signal to the transmission control module. The transmission control module generates and sends the data transmission instruction to the data migration module based on the number of transmissions, the working mode, the trigger frequency of the signal trigger module and the external trigger signal.

5. The data transmission device according to claim 4, characterized in that: The transmission control module is used to determine the target number of data transmission instructions to be generated based on the number of transmissions, generate the target number of data transmission instructions, and according to the working mode, choose to send the data transmission instructions to the data migration module when triggered by an external trigger signal or when triggered by an internal trigger signal. The data transmission instructions include: a target storage address and a data frame transmission length. The target storage address is a memory address automatically generated by the transmission control module to store the data frame transmitted each time, and the data frame transmission length is the actual amount of data transmitted once.

6. The data transmission device according to claim 2, characterized in that: The data migration module is provided with an instruction buffer, and the data migration module is further used to cache the received data transmission instructions in the instruction buffer in the form of a queue.

7. The data transmission device according to claim 2, characterized in that: The transmission control module is used to send an interrupt signal to the processor chip after the data migration module transmits the data to be transmitted. The processor chip is used to send a data read signal based on the interrupt signal. The data read signal is used to instruct the user application to read the data in the memory.

8. The data transmission device according to claim 1, characterized in that: The processor chip is also used to provide a data processing interface called by a user application in a driving manner, and the data processing interface is used to transfer the data in the memory to the user application when the user application calls it.

9. The data transmission device according to any one of claims 1 to 8, characterized in that: Based on the Zynq UltraScale+MPSoC device, the programmable logic chip is the programmable logic end of the device, and the processor chip is the processor end of the device.

10. A data transmission method, characterized in that: The method is implemented based on the data transmission device according to any one of claims 1 to 9, comprising: receiving data to be transmitted, and transmitting the data to be transmitted to a memory connected to the processor chip; The processor chip is triggered to execute an action of transmitting the data to be transmitted from the memory to the user application.

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